[][src]Type Definition wip_s32k144::pdb1::CHDLY1

type CHDLY1 = Reg<u32, _CHDLY1>;

Channel n Delay 1 register

This register you can read, reset, write, write_with_zero, modify. See API.

For information about available fields see chdly1 module

Trait Implementations

impl Readable for CHDLY1[src]

read() method returns chdly1::R reader structure

impl ResetValue for CHDLY1[src]

Register CH%sDLY1 reset()'s with value 0

type Type = u32

Register size

impl Writable for CHDLY1[src]

write(|w| ..) method takes chdly1::W writer structure