[][src]Struct stm32f3::R

pub struct R<U, T> { /* fields omitted */ }

Register/field reader

Result of the read method of a register. Also it can be used in the modify method

Methods

impl<U, T> R<U, T> where
    U: Copy
[src]

pub fn bits(&self) -> U[src]

Read raw bits from register/field

impl<FI> R<bool, FI>[src]

pub fn bit(&self) -> bool[src]

Value of the field as raw bits

pub fn bit_is_clear(&self) -> bool[src]

Returns true if the bit is clear (0)

pub fn bit_is_set(&self) -> bool[src]

Returns true if the bit is set (1)

impl R<u8, MODER15_A>[src]

pub fn variant(&self) -> MODER15_A[src]

Get enumerated values variant

pub fn is_input(&self) -> bool[src]

Checks if the value of the field is INPUT

pub fn is_output(&self) -> bool[src]

Checks if the value of the field is OUTPUT

pub fn is_alternate(&self) -> bool[src]

Checks if the value of the field is ALTERNATE

pub fn is_analog(&self) -> bool[src]

Checks if the value of the field is ANALOG

impl R<u32, Reg<u32, _MODER>>[src]

pub fn moder15(&self) -> MODER15_R[src]

Bits 30:31 - Port x configuration bits (y = 0..15)

pub fn moder14(&self) -> MODER14_R[src]

Bits 28:29 - Port x configuration bits (y = 0..15)

pub fn moder13(&self) -> MODER13_R[src]

Bits 26:27 - Port x configuration bits (y = 0..15)

pub fn moder12(&self) -> MODER12_R[src]

Bits 24:25 - Port x configuration bits (y = 0..15)

pub fn moder11(&self) -> MODER11_R[src]

Bits 22:23 - Port x configuration bits (y = 0..15)

pub fn moder10(&self) -> MODER10_R[src]

Bits 20:21 - Port x configuration bits (y = 0..15)

pub fn moder9(&self) -> MODER9_R[src]

Bits 18:19 - Port x configuration bits (y = 0..15)

pub fn moder8(&self) -> MODER8_R[src]

Bits 16:17 - Port x configuration bits (y = 0..15)

pub fn moder7(&self) -> MODER7_R[src]

Bits 14:15 - Port x configuration bits (y = 0..15)

pub fn moder6(&self) -> MODER6_R[src]

Bits 12:13 - Port x configuration bits (y = 0..15)

pub fn moder5(&self) -> MODER5_R[src]

Bits 10:11 - Port x configuration bits (y = 0..15)

pub fn moder4(&self) -> MODER4_R[src]

Bits 8:9 - Port x configuration bits (y = 0..15)

pub fn moder3(&self) -> MODER3_R[src]

Bits 6:7 - Port x configuration bits (y = 0..15)

pub fn moder2(&self) -> MODER2_R[src]

Bits 4:5 - Port x configuration bits (y = 0..15)

pub fn moder1(&self) -> MODER1_R[src]

Bits 2:3 - Port x configuration bits (y = 0..15)

pub fn moder0(&self) -> MODER0_R[src]

Bits 0:1 - Port x configuration bits (y = 0..15)

impl R<bool, OT15_A>[src]

pub fn variant(&self) -> OT15_A[src]

Get enumerated values variant

pub fn is_push_pull(&self) -> bool[src]

Checks if the value of the field is PUSHPULL

pub fn is_open_drain(&self) -> bool[src]

Checks if the value of the field is OPENDRAIN

impl R<u32, Reg<u32, _OTYPER>>[src]

pub fn ot15(&self) -> OT15_R[src]

Bit 15 - Port x configuration bits (y = 0..15)

pub fn ot14(&self) -> OT14_R[src]

Bit 14 - Port x configuration bits (y = 0..15)

pub fn ot13(&self) -> OT13_R[src]

Bit 13 - Port x configuration bits (y = 0..15)

pub fn ot12(&self) -> OT12_R[src]

Bit 12 - Port x configuration bits (y = 0..15)

pub fn ot11(&self) -> OT11_R[src]

Bit 11 - Port x configuration bits (y = 0..15)

pub fn ot10(&self) -> OT10_R[src]

Bit 10 - Port x configuration bits (y = 0..15)

pub fn ot9(&self) -> OT9_R[src]

Bit 9 - Port x configuration bits (y = 0..15)

pub fn ot8(&self) -> OT8_R[src]

Bit 8 - Port x configuration bits (y = 0..15)

pub fn ot7(&self) -> OT7_R[src]

Bit 7 - Port x configuration bits (y = 0..15)

pub fn ot6(&self) -> OT6_R[src]

Bit 6 - Port x configuration bits (y = 0..15)

pub fn ot5(&self) -> OT5_R[src]

Bit 5 - Port x configuration bits (y = 0..15)

pub fn ot4(&self) -> OT4_R[src]

Bit 4 - Port x configuration bits (y = 0..15)

pub fn ot3(&self) -> OT3_R[src]

Bit 3 - Port x configuration bits (y = 0..15)

pub fn ot2(&self) -> OT2_R[src]

Bit 2 - Port x configuration bits (y = 0..15)

pub fn ot1(&self) -> OT1_R[src]

Bit 1 - Port x configuration bits (y = 0..15)

pub fn ot0(&self) -> OT0_R[src]

Bit 0 - Port x configuration bits (y = 0..15)

impl R<u8, OSPEEDR15_A>[src]

pub fn variant(&self) -> OSPEEDR15_A[src]

Get enumerated values variant

pub fn is_low_speed(&self) -> bool[src]

Checks if the value of the field is LOWSPEED

pub fn is_medium_speed(&self) -> bool[src]

Checks if the value of the field is MEDIUMSPEED

pub fn is_high_speed(&self) -> bool[src]

Checks if the value of the field is HIGHSPEED

pub fn is_very_high_speed(&self) -> bool[src]

Checks if the value of the field is VERYHIGHSPEED

impl R<u32, Reg<u32, _OSPEEDR>>[src]

pub fn ospeedr15(&self) -> OSPEEDR15_R[src]

Bits 30:31 - Port x configuration bits (y = 0..15)

pub fn ospeedr14(&self) -> OSPEEDR14_R[src]

Bits 28:29 - Port x configuration bits (y = 0..15)

pub fn ospeedr13(&self) -> OSPEEDR13_R[src]

Bits 26:27 - Port x configuration bits (y = 0..15)

pub fn ospeedr12(&self) -> OSPEEDR12_R[src]

Bits 24:25 - Port x configuration bits (y = 0..15)

pub fn ospeedr11(&self) -> OSPEEDR11_R[src]

Bits 22:23 - Port x configuration bits (y = 0..15)

pub fn ospeedr10(&self) -> OSPEEDR10_R[src]

Bits 20:21 - Port x configuration bits (y = 0..15)

pub fn ospeedr9(&self) -> OSPEEDR9_R[src]

Bits 18:19 - Port x configuration bits (y = 0..15)

pub fn ospeedr8(&self) -> OSPEEDR8_R[src]

Bits 16:17 - Port x configuration bits (y = 0..15)

pub fn ospeedr7(&self) -> OSPEEDR7_R[src]

Bits 14:15 - Port x configuration bits (y = 0..15)

pub fn ospeedr6(&self) -> OSPEEDR6_R[src]

Bits 12:13 - Port x configuration bits (y = 0..15)

pub fn ospeedr5(&self) -> OSPEEDR5_R[src]

Bits 10:11 - Port x configuration bits (y = 0..15)

pub fn ospeedr4(&self) -> OSPEEDR4_R[src]

Bits 8:9 - Port x configuration bits (y = 0..15)

pub fn ospeedr3(&self) -> OSPEEDR3_R[src]

Bits 6:7 - Port x configuration bits (y = 0..15)

pub fn ospeedr2(&self) -> OSPEEDR2_R[src]

Bits 4:5 - Port x configuration bits (y = 0..15)

pub fn ospeedr1(&self) -> OSPEEDR1_R[src]

Bits 2:3 - Port x configuration bits (y = 0..15)

pub fn ospeedr0(&self) -> OSPEEDR0_R[src]

Bits 0:1 - Port x configuration bits (y = 0..15)

impl R<u8, PUPDR15_A>[src]

pub fn variant(&self) -> Variant<u8, PUPDR15_A>[src]

Get enumerated values variant

pub fn is_floating(&self) -> bool[src]

Checks if the value of the field is FLOATING

pub fn is_pull_up(&self) -> bool[src]

Checks if the value of the field is PULLUP

pub fn is_pull_down(&self) -> bool[src]

Checks if the value of the field is PULLDOWN

impl R<u32, Reg<u32, _PUPDR>>[src]

pub fn pupdr15(&self) -> PUPDR15_R[src]

Bits 30:31 - Port x configuration bits (y = 0..15)

pub fn pupdr14(&self) -> PUPDR14_R[src]

Bits 28:29 - Port x configuration bits (y = 0..15)

pub fn pupdr13(&self) -> PUPDR13_R[src]

Bits 26:27 - Port x configuration bits (y = 0..15)

pub fn pupdr12(&self) -> PUPDR12_R[src]

Bits 24:25 - Port x configuration bits (y = 0..15)

pub fn pupdr11(&self) -> PUPDR11_R[src]

Bits 22:23 - Port x configuration bits (y = 0..15)

pub fn pupdr10(&self) -> PUPDR10_R[src]

Bits 20:21 - Port x configuration bits (y = 0..15)

pub fn pupdr9(&self) -> PUPDR9_R[src]

Bits 18:19 - Port x configuration bits (y = 0..15)

pub fn pupdr8(&self) -> PUPDR8_R[src]

Bits 16:17 - Port x configuration bits (y = 0..15)

pub fn pupdr7(&self) -> PUPDR7_R[src]

Bits 14:15 - Port x configuration bits (y = 0..15)

pub fn pupdr6(&self) -> PUPDR6_R[src]

Bits 12:13 - Port x configuration bits (y = 0..15)

pub fn pupdr5(&self) -> PUPDR5_R[src]

Bits 10:11 - Port x configuration bits (y = 0..15)

pub fn pupdr4(&self) -> PUPDR4_R[src]

Bits 8:9 - Port x configuration bits (y = 0..15)

pub fn pupdr3(&self) -> PUPDR3_R[src]

Bits 6:7 - Port x configuration bits (y = 0..15)

pub fn pupdr2(&self) -> PUPDR2_R[src]

Bits 4:5 - Port x configuration bits (y = 0..15)

pub fn pupdr1(&self) -> PUPDR1_R[src]

Bits 2:3 - Port x configuration bits (y = 0..15)

pub fn pupdr0(&self) -> PUPDR0_R[src]

Bits 0:1 - Port x configuration bits (y = 0..15)

impl R<bool, IDR15_A>[src]

pub fn variant(&self) -> IDR15_A[src]

Get enumerated values variant

pub fn is_high(&self) -> bool[src]

Checks if the value of the field is HIGH

pub fn is_low(&self) -> bool[src]

Checks if the value of the field is LOW

impl R<u32, Reg<u32, _IDR>>[src]

pub fn idr15(&self) -> IDR15_R[src]

Bit 15 - Port input data (y = 0..15)

pub fn idr14(&self) -> IDR14_R[src]

Bit 14 - Port input data (y = 0..15)

pub fn idr13(&self) -> IDR13_R[src]

Bit 13 - Port input data (y = 0..15)

pub fn idr12(&self) -> IDR12_R[src]

Bit 12 - Port input data (y = 0..15)

pub fn idr11(&self) -> IDR11_R[src]

Bit 11 - Port input data (y = 0..15)

pub fn idr10(&self) -> IDR10_R[src]

Bit 10 - Port input data (y = 0..15)

pub fn idr9(&self) -> IDR9_R[src]

Bit 9 - Port input data (y = 0..15)

pub fn idr8(&self) -> IDR8_R[src]

Bit 8 - Port input data (y = 0..15)

pub fn idr7(&self) -> IDR7_R[src]

Bit 7 - Port input data (y = 0..15)

pub fn idr6(&self) -> IDR6_R[src]

Bit 6 - Port input data (y = 0..15)

pub fn idr5(&self) -> IDR5_R[src]

Bit 5 - Port input data (y = 0..15)

pub fn idr4(&self) -> IDR4_R[src]

Bit 4 - Port input data (y = 0..15)

pub fn idr3(&self) -> IDR3_R[src]

Bit 3 - Port input data (y = 0..15)

pub fn idr2(&self) -> IDR2_R[src]

Bit 2 - Port input data (y = 0..15)

pub fn idr1(&self) -> IDR1_R[src]

Bit 1 - Port input data (y = 0..15)

pub fn idr0(&self) -> IDR0_R[src]

Bit 0 - Port input data (y = 0..15)

impl R<bool, ODR15_A>[src]

pub fn variant(&self) -> ODR15_A[src]

Get enumerated values variant

pub fn is_high(&self) -> bool[src]

Checks if the value of the field is HIGH

pub fn is_low(&self) -> bool[src]

Checks if the value of the field is LOW

impl R<u32, Reg<u32, _ODR>>[src]

pub fn odr15(&self) -> ODR15_R[src]

Bit 15 - Port output data (y = 0..15)

pub fn odr14(&self) -> ODR14_R[src]

Bit 14 - Port output data (y = 0..15)

pub fn odr13(&self) -> ODR13_R[src]

Bit 13 - Port output data (y = 0..15)

pub fn odr12(&self) -> ODR12_R[src]

Bit 12 - Port output data (y = 0..15)

pub fn odr11(&self) -> ODR11_R[src]

Bit 11 - Port output data (y = 0..15)

pub fn odr10(&self) -> ODR10_R[src]

Bit 10 - Port output data (y = 0..15)

pub fn odr9(&self) -> ODR9_R[src]

Bit 9 - Port output data (y = 0..15)

pub fn odr8(&self) -> ODR8_R[src]

Bit 8 - Port output data (y = 0..15)

pub fn odr7(&self) -> ODR7_R[src]

Bit 7 - Port output data (y = 0..15)

pub fn odr6(&self) -> ODR6_R[src]

Bit 6 - Port output data (y = 0..15)

pub fn odr5(&self) -> ODR5_R[src]

Bit 5 - Port output data (y = 0..15)

pub fn odr4(&self) -> ODR4_R[src]

Bit 4 - Port output data (y = 0..15)

pub fn odr3(&self) -> ODR3_R[src]

Bit 3 - Port output data (y = 0..15)

pub fn odr2(&self) -> ODR2_R[src]

Bit 2 - Port output data (y = 0..15)

pub fn odr1(&self) -> ODR1_R[src]

Bit 1 - Port output data (y = 0..15)

pub fn odr0(&self) -> ODR0_R[src]

Bit 0 - Port output data (y = 0..15)

impl R<bool, LCKK_A>[src]

pub fn variant(&self) -> LCKK_A[src]

Get enumerated values variant

pub fn is_not_active(&self) -> bool[src]

Checks if the value of the field is NOTACTIVE

pub fn is_active(&self) -> bool[src]

Checks if the value of the field is ACTIVE

impl R<bool, LCK15_A>[src]

pub fn variant(&self) -> LCK15_A[src]

Get enumerated values variant

pub fn is_unlocked(&self) -> bool[src]

Checks if the value of the field is UNLOCKED

pub fn is_locked(&self) -> bool[src]

Checks if the value of the field is LOCKED

impl R<bool, LCK9_A>[src]

pub fn variant(&self) -> LCK9_A[src]

Get enumerated values variant

pub fn is_unlocked(&self) -> bool[src]

Checks if the value of the field is UNLOCKED

pub fn is_locked(&self) -> bool[src]

Checks if the value of the field is LOCKED

impl R<u32, Reg<u32, _LCKR>>[src]

pub fn lckk(&self) -> LCKK_R[src]

Bit 16 - Lok Key

pub fn lck15(&self) -> LCK15_R[src]

Bit 15 - Port x lock bit y (y= 0..15)

pub fn lck14(&self) -> LCK14_R[src]

Bit 14 - Port x lock bit y (y= 0..15)

pub fn lck13(&self) -> LCK13_R[src]

Bit 13 - Port x lock bit y (y= 0..15)

pub fn lck12(&self) -> LCK12_R[src]

Bit 12 - Port x lock bit y (y= 0..15)

pub fn lck11(&self) -> LCK11_R[src]

Bit 11 - Port x lock bit y (y= 0..15)

pub fn lck10(&self) -> LCK10_R[src]

Bit 10 - Port x lock bit y (y= 0..15)

pub fn lck9(&self) -> LCK9_R[src]

Bit 9 - Port x lock bit y (y= 0..15)

pub fn lck8(&self) -> LCK8_R[src]

Bit 8 - Port x lock bit y (y= 0..15)

pub fn lck7(&self) -> LCK7_R[src]

Bit 7 - Port x lock bit y (y= 0..15)

pub fn lck6(&self) -> LCK6_R[src]

Bit 6 - Port x lock bit y (y= 0..15)

pub fn lck5(&self) -> LCK5_R[src]

Bit 5 - Port x lock bit y (y= 0..15)

pub fn lck4(&self) -> LCK4_R[src]

Bit 4 - Port x lock bit y (y= 0..15)

pub fn lck3(&self) -> LCK3_R[src]

Bit 3 - Port x lock bit y (y= 0..15)

pub fn lck2(&self) -> LCK2_R[src]

Bit 2 - Port x lock bit y (y= 0..15)

pub fn lck1(&self) -> LCK1_R[src]

Bit 1 - Port x lock bit y (y= 0..15)

pub fn lck0(&self) -> LCK0_R[src]

Bit 0 - Port x lock bit y (y= 0..15)

impl R<u8, AFRL7_A>[src]

pub fn variant(&self) -> AFRL7_A[src]

Get enumerated values variant

pub fn is_af0(&self) -> bool[src]

Checks if the value of the field is AF0

pub fn is_af1(&self) -> bool[src]

Checks if the value of the field is AF1

pub fn is_af2(&self) -> bool[src]

Checks if the value of the field is AF2

pub fn is_af3(&self) -> bool[src]

Checks if the value of the field is AF3

pub fn is_af4(&self) -> bool[src]

Checks if the value of the field is AF4

pub fn is_af5(&self) -> bool[src]

Checks if the value of the field is AF5

pub fn is_af6(&self) -> bool[src]

Checks if the value of the field is AF6

pub fn is_af7(&self) -> bool[src]

Checks if the value of the field is AF7

pub fn is_af8(&self) -> bool[src]

Checks if the value of the field is AF8

pub fn is_af9(&self) -> bool[src]

Checks if the value of the field is AF9

pub fn is_af10(&self) -> bool[src]

Checks if the value of the field is AF10

pub fn is_af11(&self) -> bool[src]

Checks if the value of the field is AF11

pub fn is_af12(&self) -> bool[src]

Checks if the value of the field is AF12

pub fn is_af13(&self) -> bool[src]

Checks if the value of the field is AF13

pub fn is_af14(&self) -> bool[src]

Checks if the value of the field is AF14

pub fn is_af15(&self) -> bool[src]

Checks if the value of the field is AF15

impl R<u32, Reg<u32, _AFRL>>[src]

pub fn afrl7(&self) -> AFRL7_R[src]

Bits 28:31 - Alternate function selection for port x bit y (y = 0..7)

pub fn afrl6(&self) -> AFRL6_R[src]

Bits 24:27 - Alternate function selection for port x bit y (y = 0..7)

pub fn afrl5(&self) -> AFRL5_R[src]

Bits 20:23 - Alternate function selection for port x bit y (y = 0..7)

pub fn afrl4(&self) -> AFRL4_R[src]

Bits 16:19 - Alternate function selection for port x bit y (y = 0..7)

pub fn afrl3(&self) -> AFRL3_R[src]

Bits 12:15 - Alternate function selection for port x bit y (y = 0..7)

pub fn afrl2(&self) -> AFRL2_R[src]

Bits 8:11 - Alternate function selection for port x bit y (y = 0..7)

pub fn afrl1(&self) -> AFRL1_R[src]

Bits 4:7 - Alternate function selection for port x bit y (y = 0..7)

pub fn afrl0(&self) -> AFRL0_R[src]

Bits 0:3 - Alternate function selection for port x bit y (y = 0..7)

impl R<u8, AFRH15_A>[src]

pub fn variant(&self) -> AFRH15_A[src]

Get enumerated values variant

pub fn is_af0(&self) -> bool[src]

Checks if the value of the field is AF0

pub fn is_af1(&self) -> bool[src]

Checks if the value of the field is AF1

pub fn is_af2(&self) -> bool[src]

Checks if the value of the field is AF2

pub fn is_af3(&self) -> bool[src]

Checks if the value of the field is AF3

pub fn is_af4(&self) -> bool[src]

Checks if the value of the field is AF4

pub fn is_af5(&self) -> bool[src]

Checks if the value of the field is AF5

pub fn is_af6(&self) -> bool[src]

Checks if the value of the field is AF6

pub fn is_af7(&self) -> bool[src]

Checks if the value of the field is AF7

pub fn is_af8(&self) -> bool[src]

Checks if the value of the field is AF8

pub fn is_af9(&self) -> bool[src]

Checks if the value of the field is AF9

pub fn is_af10(&self) -> bool[src]

Checks if the value of the field is AF10

pub fn is_af11(&self) -> bool[src]

Checks if the value of the field is AF11

pub fn is_af12(&self) -> bool[src]

Checks if the value of the field is AF12

pub fn is_af13(&self) -> bool[src]

Checks if the value of the field is AF13

pub fn is_af14(&self) -> bool[src]

Checks if the value of the field is AF14

pub fn is_af15(&self) -> bool[src]

Checks if the value of the field is AF15

impl R<u32, Reg<u32, _AFRH>>[src]

pub fn afrh15(&self) -> AFRH15_R[src]

Bits 28:31 - Alternate function selection for port x bit y (y = 8..15)

pub fn afrh14(&self) -> AFRH14_R[src]

Bits 24:27 - Alternate function selection for port x bit y (y = 8..15)

pub fn afrh13(&self) -> AFRH13_R[src]

Bits 20:23 - Alternate function selection for port x bit y (y = 8..15)

pub fn afrh12(&self) -> AFRH12_R[src]

Bits 16:19 - Alternate function selection for port x bit y (y = 8..15)

pub fn afrh11(&self) -> AFRH11_R[src]

Bits 12:15 - Alternate function selection for port x bit y (y = 8..15)

pub fn afrh10(&self) -> AFRH10_R[src]

Bits 8:11 - Alternate function selection for port x bit y (y = 8..15)

pub fn afrh9(&self) -> AFRH9_R[src]

Bits 4:7 - Alternate function selection for port x bit y (y = 8..15)

pub fn afrh8(&self) -> AFRH8_R[src]

Bits 0:3 - Alternate function selection for port x bit y (y = 8..15)

impl R<u8, MODER15_A>[src]

pub fn variant(&self) -> MODER15_A[src]

Get enumerated values variant

pub fn is_input(&self) -> bool[src]

Checks if the value of the field is INPUT

pub fn is_output(&self) -> bool[src]

Checks if the value of the field is OUTPUT

pub fn is_alternate(&self) -> bool[src]

Checks if the value of the field is ALTERNATE

pub fn is_analog(&self) -> bool[src]

Checks if the value of the field is ANALOG

impl R<u32, Reg<u32, _MODER>>[src]

pub fn moder15(&self) -> MODER15_R[src]

Bits 30:31 - Port x configuration bits (y = 0..15)

pub fn moder14(&self) -> MODER14_R[src]

Bits 28:29 - Port x configuration bits (y = 0..15)

pub fn moder13(&self) -> MODER13_R[src]

Bits 26:27 - Port x configuration bits (y = 0..15)

pub fn moder12(&self) -> MODER12_R[src]

Bits 24:25 - Port x configuration bits (y = 0..15)

pub fn moder11(&self) -> MODER11_R[src]

Bits 22:23 - Port x configuration bits (y = 0..15)

pub fn moder10(&self) -> MODER10_R[src]

Bits 20:21 - Port x configuration bits (y = 0..15)

pub fn moder9(&self) -> MODER9_R[src]

Bits 18:19 - Port x configuration bits (y = 0..15)

pub fn moder8(&self) -> MODER8_R[src]

Bits 16:17 - Port x configuration bits (y = 0..15)

pub fn moder7(&self) -> MODER7_R[src]

Bits 14:15 - Port x configuration bits (y = 0..15)

pub fn moder6(&self) -> MODER6_R[src]

Bits 12:13 - Port x configuration bits (y = 0..15)

pub fn moder5(&self) -> MODER5_R[src]

Bits 10:11 - Port x configuration bits (y = 0..15)

pub fn moder4(&self) -> MODER4_R[src]

Bits 8:9 - Port x configuration bits (y = 0..15)

pub fn moder3(&self) -> MODER3_R[src]

Bits 6:7 - Port x configuration bits (y = 0..15)

pub fn moder2(&self) -> MODER2_R[src]

Bits 4:5 - Port x configuration bits (y = 0..15)

pub fn moder1(&self) -> MODER1_R[src]

Bits 2:3 - Port x configuration bits (y = 0..15)

pub fn moder0(&self) -> MODER0_R[src]

Bits 0:1 - Port x configuration bits (y = 0..15)

impl R<bool, OT15_A>[src]

pub fn variant(&self) -> OT15_A[src]

Get enumerated values variant

pub fn is_push_pull(&self) -> bool[src]

Checks if the value of the field is PUSHPULL

pub fn is_open_drain(&self) -> bool[src]

Checks if the value of the field is OPENDRAIN

impl R<u32, Reg<u32, _OTYPER>>[src]

pub fn ot15(&self) -> OT15_R[src]

Bit 15 - Port x configuration bit 15

pub fn ot14(&self) -> OT14_R[src]

Bit 14 - Port x configuration bit 14

pub fn ot13(&self) -> OT13_R[src]

Bit 13 - Port x configuration bit 13

pub fn ot12(&self) -> OT12_R[src]

Bit 12 - Port x configuration bit 12

pub fn ot11(&self) -> OT11_R[src]

Bit 11 - Port x configuration bit 11

pub fn ot10(&self) -> OT10_R[src]

Bit 10 - Port x configuration bit 10

pub fn ot9(&self) -> OT9_R[src]

Bit 9 - Port x configuration bit 9

pub fn ot8(&self) -> OT8_R[src]

Bit 8 - Port x configuration bit 8

pub fn ot7(&self) -> OT7_R[src]

Bit 7 - Port x configuration bit 7

pub fn ot6(&self) -> OT6_R[src]

Bit 6 - Port x configuration bit 6

pub fn ot5(&self) -> OT5_R[src]

Bit 5 - Port x configuration bit 5

pub fn ot4(&self) -> OT4_R[src]

Bit 4 - Port x configuration bit 4

pub fn ot3(&self) -> OT3_R[src]

Bit 3 - Port x configuration bit 3

pub fn ot2(&self) -> OT2_R[src]

Bit 2 - Port x configuration bit 2

pub fn ot1(&self) -> OT1_R[src]

Bit 1 - Port x configuration bit 1

pub fn ot0(&self) -> OT0_R[src]

Bit 0 - Port x configuration bit 0

impl R<u8, OSPEEDR15_A>[src]

pub fn variant(&self) -> OSPEEDR15_A[src]

Get enumerated values variant

pub fn is_low_speed(&self) -> bool[src]

Checks if the value of the field is LOWSPEED

pub fn is_medium_speed(&self) -> bool[src]

Checks if the value of the field is MEDIUMSPEED

pub fn is_high_speed(&self) -> bool[src]

Checks if the value of the field is HIGHSPEED

pub fn is_very_high_speed(&self) -> bool[src]

Checks if the value of the field is VERYHIGHSPEED

impl R<u32, Reg<u32, _OSPEEDR>>[src]

pub fn ospeedr15(&self) -> OSPEEDR15_R[src]

Bits 30:31 - Port x configuration bits (y = 0..15)

pub fn ospeedr14(&self) -> OSPEEDR14_R[src]

Bits 28:29 - Port x configuration bits (y = 0..15)

pub fn ospeedr13(&self) -> OSPEEDR13_R[src]

Bits 26:27 - Port x configuration bits (y = 0..15)

pub fn ospeedr12(&self) -> OSPEEDR12_R[src]

Bits 24:25 - Port x configuration bits (y = 0..15)

pub fn ospeedr11(&self) -> OSPEEDR11_R[src]

Bits 22:23 - Port x configuration bits (y = 0..15)

pub fn ospeedr10(&self) -> OSPEEDR10_R[src]

Bits 20:21 - Port x configuration bits (y = 0..15)

pub fn ospeedr9(&self) -> OSPEEDR9_R[src]

Bits 18:19 - Port x configuration bits (y = 0..15)

pub fn ospeedr8(&self) -> OSPEEDR8_R[src]

Bits 16:17 - Port x configuration bits (y = 0..15)

pub fn ospeedr7(&self) -> OSPEEDR7_R[src]

Bits 14:15 - Port x configuration bits (y = 0..15)

pub fn ospeedr6(&self) -> OSPEEDR6_R[src]

Bits 12:13 - Port x configuration bits (y = 0..15)

pub fn ospeedr5(&self) -> OSPEEDR5_R[src]

Bits 10:11 - Port x configuration bits (y = 0..15)

pub fn ospeedr4(&self) -> OSPEEDR4_R[src]

Bits 8:9 - Port x configuration bits (y = 0..15)

pub fn ospeedr3(&self) -> OSPEEDR3_R[src]

Bits 6:7 - Port x configuration bits (y = 0..15)

pub fn ospeedr2(&self) -> OSPEEDR2_R[src]

Bits 4:5 - Port x configuration bits (y = 0..15)

pub fn ospeedr1(&self) -> OSPEEDR1_R[src]

Bits 2:3 - Port x configuration bits (y = 0..15)

pub fn ospeedr0(&self) -> OSPEEDR0_R[src]

Bits 0:1 - Port x configuration bits (y = 0..15)

impl R<u8, PUPDR15_A>[src]

pub fn variant(&self) -> Variant<u8, PUPDR15_A>[src]

Get enumerated values variant

pub fn is_floating(&self) -> bool[src]

Checks if the value of the field is FLOATING

pub fn is_pull_up(&self) -> bool[src]

Checks if the value of the field is PULLUP

pub fn is_pull_down(&self) -> bool[src]

Checks if the value of the field is PULLDOWN

impl R<u32, Reg<u32, _PUPDR>>[src]

pub fn pupdr15(&self) -> PUPDR15_R[src]

Bits 30:31 - Port x configuration bits (y = 0..15)

pub fn pupdr14(&self) -> PUPDR14_R[src]

Bits 28:29 - Port x configuration bits (y = 0..15)

pub fn pupdr13(&self) -> PUPDR13_R[src]

Bits 26:27 - Port x configuration bits (y = 0..15)

pub fn pupdr12(&self) -> PUPDR12_R[src]

Bits 24:25 - Port x configuration bits (y = 0..15)

pub fn pupdr11(&self) -> PUPDR11_R[src]

Bits 22:23 - Port x configuration bits (y = 0..15)

pub fn pupdr10(&self) -> PUPDR10_R[src]

Bits 20:21 - Port x configuration bits (y = 0..15)

pub fn pupdr9(&self) -> PUPDR9_R[src]

Bits 18:19 - Port x configuration bits (y = 0..15)

pub fn pupdr8(&self) -> PUPDR8_R[src]

Bits 16:17 - Port x configuration bits (y = 0..15)

pub fn pupdr7(&self) -> PUPDR7_R[src]

Bits 14:15 - Port x configuration bits (y = 0..15)

pub fn pupdr6(&self) -> PUPDR6_R[src]

Bits 12:13 - Port x configuration bits (y = 0..15)

pub fn pupdr5(&self) -> PUPDR5_R[src]

Bits 10:11 - Port x configuration bits (y = 0..15)

pub fn pupdr4(&self) -> PUPDR4_R[src]

Bits 8:9 - Port x configuration bits (y = 0..15)

pub fn pupdr3(&self) -> PUPDR3_R[src]

Bits 6:7 - Port x configuration bits (y = 0..15)

pub fn pupdr2(&self) -> PUPDR2_R[src]

Bits 4:5 - Port x configuration bits (y = 0..15)

pub fn pupdr1(&self) -> PUPDR1_R[src]

Bits 2:3 - Port x configuration bits (y = 0..15)

pub fn pupdr0(&self) -> PUPDR0_R[src]

Bits 0:1 - Port x configuration bits (y = 0..15)

impl R<bool, IDR15_A>[src]

pub fn variant(&self) -> IDR15_A[src]

Get enumerated values variant

pub fn is_high(&self) -> bool[src]

Checks if the value of the field is HIGH

pub fn is_low(&self) -> bool[src]

Checks if the value of the field is LOW

impl R<u32, Reg<u32, _IDR>>[src]

pub fn idr15(&self) -> IDR15_R[src]

Bit 15 - Port input data (y = 0..15)

pub fn idr14(&self) -> IDR14_R[src]

Bit 14 - Port input data (y = 0..15)

pub fn idr13(&self) -> IDR13_R[src]

Bit 13 - Port input data (y = 0..15)

pub fn idr12(&self) -> IDR12_R[src]

Bit 12 - Port input data (y = 0..15)

pub fn idr11(&self) -> IDR11_R[src]

Bit 11 - Port input data (y = 0..15)

pub fn idr10(&self) -> IDR10_R[src]

Bit 10 - Port input data (y = 0..15)

pub fn idr9(&self) -> IDR9_R[src]

Bit 9 - Port input data (y = 0..15)

pub fn idr8(&self) -> IDR8_R[src]

Bit 8 - Port input data (y = 0..15)

pub fn idr7(&self) -> IDR7_R[src]

Bit 7 - Port input data (y = 0..15)

pub fn idr6(&self) -> IDR6_R[src]

Bit 6 - Port input data (y = 0..15)

pub fn idr5(&self) -> IDR5_R[src]

Bit 5 - Port input data (y = 0..15)

pub fn idr4(&self) -> IDR4_R[src]

Bit 4 - Port input data (y = 0..15)

pub fn idr3(&self) -> IDR3_R[src]

Bit 3 - Port input data (y = 0..15)

pub fn idr2(&self) -> IDR2_R[src]

Bit 2 - Port input data (y = 0..15)

pub fn idr1(&self) -> IDR1_R[src]

Bit 1 - Port input data (y = 0..15)

pub fn idr0(&self) -> IDR0_R[src]

Bit 0 - Port input data (y = 0..15)

impl R<bool, ODR15_A>[src]

pub fn variant(&self) -> ODR15_A[src]

Get enumerated values variant

pub fn is_high(&self) -> bool[src]

Checks if the value of the field is HIGH

pub fn is_low(&self) -> bool[src]

Checks if the value of the field is LOW

impl R<u32, Reg<u32, _ODR>>[src]

pub fn odr15(&self) -> ODR15_R[src]

Bit 15 - Port output data (y = 0..15)

pub fn odr14(&self) -> ODR14_R[src]

Bit 14 - Port output data (y = 0..15)

pub fn odr13(&self) -> ODR13_R[src]

Bit 13 - Port output data (y = 0..15)

pub fn odr12(&self) -> ODR12_R[src]

Bit 12 - Port output data (y = 0..15)

pub fn odr11(&self) -> ODR11_R[src]

Bit 11 - Port output data (y = 0..15)

pub fn odr10(&self) -> ODR10_R[src]

Bit 10 - Port output data (y = 0..15)

pub fn odr9(&self) -> ODR9_R[src]

Bit 9 - Port output data (y = 0..15)

pub fn odr8(&self) -> ODR8_R[src]

Bit 8 - Port output data (y = 0..15)

pub fn odr7(&self) -> ODR7_R[src]

Bit 7 - Port output data (y = 0..15)

pub fn odr6(&self) -> ODR6_R[src]

Bit 6 - Port output data (y = 0..15)

pub fn odr5(&self) -> ODR5_R[src]

Bit 5 - Port output data (y = 0..15)

pub fn odr4(&self) -> ODR4_R[src]

Bit 4 - Port output data (y = 0..15)

pub fn odr3(&self) -> ODR3_R[src]

Bit 3 - Port output data (y = 0..15)

pub fn odr2(&self) -> ODR2_R[src]

Bit 2 - Port output data (y = 0..15)

pub fn odr1(&self) -> ODR1_R[src]

Bit 1 - Port output data (y = 0..15)

pub fn odr0(&self) -> ODR0_R[src]

Bit 0 - Port output data (y = 0..15)

impl R<bool, LCKK_A>[src]

pub fn variant(&self) -> LCKK_A[src]

Get enumerated values variant

pub fn is_not_active(&self) -> bool[src]

Checks if the value of the field is NOTACTIVE

pub fn is_active(&self) -> bool[src]

Checks if the value of the field is ACTIVE

impl R<bool, LCK15_A>[src]

pub fn variant(&self) -> LCK15_A[src]

Get enumerated values variant

pub fn is_unlocked(&self) -> bool[src]

Checks if the value of the field is UNLOCKED

pub fn is_locked(&self) -> bool[src]

Checks if the value of the field is LOCKED

impl R<bool, LCK9_A>[src]

pub fn variant(&self) -> LCK9_A[src]

Get enumerated values variant

pub fn is_unlocked(&self) -> bool[src]

Checks if the value of the field is UNLOCKED

pub fn is_locked(&self) -> bool[src]

Checks if the value of the field is LOCKED

impl R<u32, Reg<u32, _LCKR>>[src]

pub fn lckk(&self) -> LCKK_R[src]

Bit 16 - Lok Key

pub fn lck15(&self) -> LCK15_R[src]

Bit 15 - Port x lock bit y (y= 0..15)

pub fn lck14(&self) -> LCK14_R[src]

Bit 14 - Port x lock bit y (y= 0..15)

pub fn lck13(&self) -> LCK13_R[src]

Bit 13 - Port x lock bit y (y= 0..15)

pub fn lck12(&self) -> LCK12_R[src]

Bit 12 - Port x lock bit y (y= 0..15)

pub fn lck11(&self) -> LCK11_R[src]

Bit 11 - Port x lock bit y (y= 0..15)

pub fn lck10(&self) -> LCK10_R[src]

Bit 10 - Port x lock bit y (y= 0..15)

pub fn lck9(&self) -> LCK9_R[src]

Bit 9 - Port x lock bit y (y= 0..15)

pub fn lck8(&self) -> LCK8_R[src]

Bit 8 - Port x lock bit y (y= 0..15)

pub fn lck7(&self) -> LCK7_R[src]

Bit 7 - Port x lock bit y (y= 0..15)

pub fn lck6(&self) -> LCK6_R[src]

Bit 6 - Port x lock bit y (y= 0..15)

pub fn lck5(&self) -> LCK5_R[src]

Bit 5 - Port x lock bit y (y= 0..15)

pub fn lck4(&self) -> LCK4_R[src]

Bit 4 - Port x lock bit y (y= 0..15)

pub fn lck3(&self) -> LCK3_R[src]

Bit 3 - Port x lock bit y (y= 0..15)

pub fn lck2(&self) -> LCK2_R[src]

Bit 2 - Port x lock bit y (y= 0..15)

pub fn lck1(&self) -> LCK1_R[src]

Bit 1 - Port x lock bit y (y= 0..15)

pub fn lck0(&self) -> LCK0_R[src]

Bit 0 - Port x lock bit y (y= 0..15)

impl R<u8, AFRL7_A>[src]

pub fn variant(&self) -> AFRL7_A[src]

Get enumerated values variant

pub fn is_af0(&self) -> bool[src]

Checks if the value of the field is AF0

pub fn is_af1(&self) -> bool[src]

Checks if the value of the field is AF1

pub fn is_af2(&self) -> bool[src]

Checks if the value of the field is AF2

pub fn is_af3(&self) -> bool[src]

Checks if the value of the field is AF3

pub fn is_af4(&self) -> bool[src]

Checks if the value of the field is AF4

pub fn is_af5(&self) -> bool[src]

Checks if the value of the field is AF5

pub fn is_af6(&self) -> bool[src]

Checks if the value of the field is AF6

pub fn is_af7(&self) -> bool[src]

Checks if the value of the field is AF7

pub fn is_af8(&self) -> bool[src]

Checks if the value of the field is AF8

pub fn is_af9(&self) -> bool[src]

Checks if the value of the field is AF9

pub fn is_af10(&self) -> bool[src]

Checks if the value of the field is AF10

pub fn is_af11(&self) -> bool[src]

Checks if the value of the field is AF11

pub fn is_af12(&self) -> bool[src]

Checks if the value of the field is AF12

pub fn is_af13(&self) -> bool[src]

Checks if the value of the field is AF13

pub fn is_af14(&self) -> bool[src]

Checks if the value of the field is AF14

pub fn is_af15(&self) -> bool[src]

Checks if the value of the field is AF15

impl R<u32, Reg<u32, _AFRL>>[src]

pub fn afrl7(&self) -> AFRL7_R[src]

Bits 28:31 - Alternate function selection for port x bit y (y = 0..7)

pub fn afrl6(&self) -> AFRL6_R[src]

Bits 24:27 - Alternate function selection for port x bit y (y = 0..7)

pub fn afrl5(&self) -> AFRL5_R[src]

Bits 20:23 - Alternate function selection for port x bit y (y = 0..7)

pub fn afrl4(&self) -> AFRL4_R[src]

Bits 16:19 - Alternate function selection for port x bit y (y = 0..7)

pub fn afrl3(&self) -> AFRL3_R[src]

Bits 12:15 - Alternate function selection for port x bit y (y = 0..7)

pub fn afrl2(&self) -> AFRL2_R[src]

Bits 8:11 - Alternate function selection for port x bit y (y = 0..7)

pub fn afrl1(&self) -> AFRL1_R[src]

Bits 4:7 - Alternate function selection for port x bit y (y = 0..7)

pub fn afrl0(&self) -> AFRL0_R[src]

Bits 0:3 - Alternate function selection for port x bit y (y = 0..7)

impl R<u8, AFRH15_A>[src]

pub fn variant(&self) -> AFRH15_A[src]

Get enumerated values variant

pub fn is_af0(&self) -> bool[src]

Checks if the value of the field is AF0

pub fn is_af1(&self) -> bool[src]

Checks if the value of the field is AF1

pub fn is_af2(&self) -> bool[src]

Checks if the value of the field is AF2

pub fn is_af3(&self) -> bool[src]

Checks if the value of the field is AF3

pub fn is_af4(&self) -> bool[src]

Checks if the value of the field is AF4

pub fn is_af5(&self) -> bool[src]

Checks if the value of the field is AF5

pub fn is_af6(&self) -> bool[src]

Checks if the value of the field is AF6

pub fn is_af7(&self) -> bool[src]

Checks if the value of the field is AF7

pub fn is_af8(&self) -> bool[src]

Checks if the value of the field is AF8

pub fn is_af9(&self) -> bool[src]

Checks if the value of the field is AF9

pub fn is_af10(&self) -> bool[src]

Checks if the value of the field is AF10

pub fn is_af11(&self) -> bool[src]

Checks if the value of the field is AF11

pub fn is_af12(&self) -> bool[src]

Checks if the value of the field is AF12

pub fn is_af13(&self) -> bool[src]

Checks if the value of the field is AF13

pub fn is_af14(&self) -> bool[src]

Checks if the value of the field is AF14

pub fn is_af15(&self) -> bool[src]

Checks if the value of the field is AF15

impl R<u32, Reg<u32, _AFRH>>[src]

pub fn afrh15(&self) -> AFRH15_R[src]

Bits 28:31 - Alternate function selection for port x bit y (y = 8..15)

pub fn afrh14(&self) -> AFRH14_R[src]

Bits 24:27 - Alternate function selection for port x bit y (y = 8..15)

pub fn afrh13(&self) -> AFRH13_R[src]

Bits 20:23 - Alternate function selection for port x bit y (y = 8..15)

pub fn afrh12(&self) -> AFRH12_R[src]

Bits 16:19 - Alternate function selection for port x bit y (y = 8..15)

pub fn afrh11(&self) -> AFRH11_R[src]

Bits 12:15 - Alternate function selection for port x bit y (y = 8..15)

pub fn afrh10(&self) -> AFRH10_R[src]

Bits 8:11 - Alternate function selection for port x bit y (y = 8..15)

pub fn afrh9(&self) -> AFRH9_R[src]

Bits 4:7 - Alternate function selection for port x bit y (y = 8..15)

pub fn afrh8(&self) -> AFRH8_R[src]

Bits 0:3 - Alternate function selection for port x bit y (y = 8..15)

impl R<u32, Reg<u32, _CR>>[src]

pub fn ctph(&self) -> CTPH_R[src]

Bits 28:31 - Charge transfer pulse high

pub fn ctpl(&self) -> CTPL_R[src]

Bits 24:27 - Charge transfer pulse low

pub fn ssd(&self) -> SSD_R[src]

Bits 17:23 - Spread spectrum deviation

pub fn sse(&self) -> SSE_R[src]

Bit 16 - Spread spectrum enable

pub fn sspsc(&self) -> SSPSC_R[src]

Bit 15 - Spread spectrum prescaler

pub fn pgpsc(&self) -> PGPSC_R[src]

Bits 12:14 - pulse generator prescaler

pub fn mcv(&self) -> MCV_R[src]

Bits 5:7 - Max count value

pub fn iodef(&self) -> IODEF_R[src]

Bit 4 - I/O Default mode

pub fn syncpol(&self) -> SYNCPOL_R[src]

Bit 3 - Synchronization pin polarity

pub fn am(&self) -> AM_R[src]

Bit 2 - Acquisition mode

pub fn start(&self) -> START_R[src]

Bit 1 - Start a new acquisition

pub fn tsce(&self) -> TSCE_R[src]

Bit 0 - Touch sensing controller enable

impl R<u32, Reg<u32, _IER>>[src]

pub fn mceie(&self) -> MCEIE_R[src]

Bit 1 - Max count error interrupt enable

pub fn eoaie(&self) -> EOAIE_R[src]

Bit 0 - End of acquisition interrupt enable

impl R<u32, Reg<u32, _ICR>>[src]

pub fn mceic(&self) -> MCEIC_R[src]

Bit 1 - Max count error interrupt clear

pub fn eoaic(&self) -> EOAIC_R[src]

Bit 0 - End of acquisition interrupt clear

impl R<u32, Reg<u32, _ISR>>[src]

pub fn mcef(&self) -> MCEF_R[src]

Bit 1 - Max count error flag

pub fn eoaf(&self) -> EOAF_R[src]

Bit 0 - End of acquisition flag

impl R<u32, Reg<u32, _IOHCR>>[src]

pub fn g1_io1(&self) -> G1_IO1_R[src]

Bit 0 - G1_IO1 Schmitt trigger hysteresis mode

pub fn g1_io2(&self) -> G1_IO2_R[src]

Bit 1 - G1_IO2 Schmitt trigger hysteresis mode

pub fn g1_io3(&self) -> G1_IO3_R[src]

Bit 2 - G1_IO3 Schmitt trigger hysteresis mode

pub fn g1_io4(&self) -> G1_IO4_R[src]

Bit 3 - G1_IO4 Schmitt trigger hysteresis mode

pub fn g2_io1(&self) -> G2_IO1_R[src]

Bit 4 - G2_IO1 Schmitt trigger hysteresis mode

pub fn g2_io2(&self) -> G2_IO2_R[src]

Bit 5 - G2_IO2 Schmitt trigger hysteresis mode

pub fn g2_io3(&self) -> G2_IO3_R[src]

Bit 6 - G2_IO3 Schmitt trigger hysteresis mode

pub fn g2_io4(&self) -> G2_IO4_R[src]

Bit 7 - G2_IO4 Schmitt trigger hysteresis mode

pub fn g3_io1(&self) -> G3_IO1_R[src]

Bit 8 - G3_IO1 Schmitt trigger hysteresis mode

pub fn g3_io2(&self) -> G3_IO2_R[src]

Bit 9 - G3_IO2 Schmitt trigger hysteresis mode

pub fn g3_io3(&self) -> G3_IO3_R[src]

Bit 10 - G3_IO3 Schmitt trigger hysteresis mode

pub fn g3_io4(&self) -> G3_IO4_R[src]

Bit 11 - G3_IO4 Schmitt trigger hysteresis mode

pub fn g4_io1(&self) -> G4_IO1_R[src]

Bit 12 - G4_IO1 Schmitt trigger hysteresis mode

pub fn g4_io2(&self) -> G4_IO2_R[src]

Bit 13 - G4_IO2 Schmitt trigger hysteresis mode

pub fn g4_io3(&self) -> G4_IO3_R[src]

Bit 14 - G4_IO3 Schmitt trigger hysteresis mode

pub fn g4_io4(&self) -> G4_IO4_R[src]

Bit 15 - G4_IO4 Schmitt trigger hysteresis mode

pub fn g5_io1(&self) -> G5_IO1_R[src]

Bit 16 - G5_IO1 Schmitt trigger hysteresis mode

pub fn g5_io2(&self) -> G5_IO2_R[src]

Bit 17 - G5_IO2 Schmitt trigger hysteresis mode

pub fn g5_io3(&self) -> G5_IO3_R[src]

Bit 18 - G5_IO3 Schmitt trigger hysteresis mode

pub fn g5_io4(&self) -> G5_IO4_R[src]

Bit 19 - G5_IO4 Schmitt trigger hysteresis mode

pub fn g6_io1(&self) -> G6_IO1_R[src]

Bit 20 - G6_IO1 Schmitt trigger hysteresis mode

pub fn g6_io2(&self) -> G6_IO2_R[src]

Bit 21 - G6_IO2 Schmitt trigger hysteresis mode

pub fn g6_io3(&self) -> G6_IO3_R[src]

Bit 22 - G6_IO3 Schmitt trigger hysteresis mode

pub fn g6_io4(&self) -> G6_IO4_R[src]

Bit 23 - G6_IO4 Schmitt trigger hysteresis mode

pub fn g7_io1(&self) -> G7_IO1_R[src]

Bit 24 - G7_IO1 Schmitt trigger hysteresis mode

pub fn g7_io2(&self) -> G7_IO2_R[src]

Bit 25 - G7_IO2 Schmitt trigger hysteresis mode

pub fn g7_io3(&self) -> G7_IO3_R[src]

Bit 26 - G7_IO3 Schmitt trigger hysteresis mode

pub fn g7_io4(&self) -> G7_IO4_R[src]

Bit 27 - G7_IO4 Schmitt trigger hysteresis mode

pub fn g8_io1(&self) -> G8_IO1_R[src]

Bit 28 - G8_IO1 Schmitt trigger hysteresis mode

pub fn g8_io2(&self) -> G8_IO2_R[src]

Bit 29 - G8_IO2 Schmitt trigger hysteresis mode

pub fn g8_io3(&self) -> G8_IO3_R[src]

Bit 30 - G8_IO3 Schmitt trigger hysteresis mode

pub fn g8_io4(&self) -> G8_IO4_R[src]

Bit 31 - G8_IO4 Schmitt trigger hysteresis mode

impl R<u32, Reg<u32, _IOASCR>>[src]

pub fn g1_io1(&self) -> G1_IO1_R[src]

Bit 0 - G1_IO1 analog switch enable

pub fn g1_io2(&self) -> G1_IO2_R[src]

Bit 1 - G1_IO2 analog switch enable

pub fn g1_io3(&self) -> G1_IO3_R[src]

Bit 2 - G1_IO3 analog switch enable

pub fn g1_io4(&self) -> G1_IO4_R[src]

Bit 3 - G1_IO4 analog switch enable

pub fn g2_io1(&self) -> G2_IO1_R[src]

Bit 4 - G2_IO1 analog switch enable

pub fn g2_io2(&self) -> G2_IO2_R[src]

Bit 5 - G2_IO2 analog switch enable

pub fn g2_io3(&self) -> G2_IO3_R[src]

Bit 6 - G2_IO3 analog switch enable

pub fn g2_io4(&self) -> G2_IO4_R[src]

Bit 7 - G2_IO4 analog switch enable

pub fn g3_io1(&self) -> G3_IO1_R[src]

Bit 8 - G3_IO1 analog switch enable

pub fn g3_io2(&self) -> G3_IO2_R[src]

Bit 9 - G3_IO2 analog switch enable

pub fn g3_io3(&self) -> G3_IO3_R[src]

Bit 10 - G3_IO3 analog switch enable

pub fn g3_io4(&self) -> G3_IO4_R[src]

Bit 11 - G3_IO4 analog switch enable

pub fn g4_io1(&self) -> G4_IO1_R[src]

Bit 12 - G4_IO1 analog switch enable

pub fn g4_io2(&self) -> G4_IO2_R[src]

Bit 13 - G4_IO2 analog switch enable

pub fn g4_io3(&self) -> G4_IO3_R[src]

Bit 14 - G4_IO3 analog switch enable

pub fn g4_io4(&self) -> G4_IO4_R[src]

Bit 15 - G4_IO4 analog switch enable

pub fn g5_io1(&self) -> G5_IO1_R[src]

Bit 16 - G5_IO1 analog switch enable

pub fn g5_io2(&self) -> G5_IO2_R[src]

Bit 17 - G5_IO2 analog switch enable

pub fn g5_io3(&self) -> G5_IO3_R[src]

Bit 18 - G5_IO3 analog switch enable

pub fn g5_io4(&self) -> G5_IO4_R[src]

Bit 19 - G5_IO4 analog switch enable

pub fn g6_io1(&self) -> G6_IO1_R[src]

Bit 20 - G6_IO1 analog switch enable

pub fn g6_io2(&self) -> G6_IO2_R[src]

Bit 21 - G6_IO2 analog switch enable

pub fn g6_io3(&self) -> G6_IO3_R[src]

Bit 22 - G6_IO3 analog switch enable

pub fn g6_io4(&self) -> G6_IO4_R[src]

Bit 23 - G6_IO4 analog switch enable

pub fn g7_io1(&self) -> G7_IO1_R[src]

Bit 24 - G7_IO1 analog switch enable

pub fn g7_io2(&self) -> G7_IO2_R[src]

Bit 25 - G7_IO2 analog switch enable

pub fn g7_io3(&self) -> G7_IO3_R[src]

Bit 26 - G7_IO3 analog switch enable

pub fn g7_io4(&self) -> G7_IO4_R[src]

Bit 27 - G7_IO4 analog switch enable

pub fn g8_io1(&self) -> G8_IO1_R[src]

Bit 28 - G8_IO1 analog switch enable

pub fn g8_io2(&self) -> G8_IO2_R[src]

Bit 29 - G8_IO2 analog switch enable

pub fn g8_io3(&self) -> G8_IO3_R[src]

Bit 30 - G8_IO3 analog switch enable

pub fn g8_io4(&self) -> G8_IO4_R[src]

Bit 31 - G8_IO4 analog switch enable

impl R<u32, Reg<u32, _IOSCR>>[src]

pub fn g1_io1(&self) -> G1_IO1_R[src]

Bit 0 - G1_IO1 sampling mode

pub fn g1_io2(&self) -> G1_IO2_R[src]

Bit 1 - G1_IO2 sampling mode

pub fn g1_io3(&self) -> G1_IO3_R[src]

Bit 2 - G1_IO3 sampling mode

pub fn g1_io4(&self) -> G1_IO4_R[src]

Bit 3 - G1_IO4 sampling mode

pub fn g2_io1(&self) -> G2_IO1_R[src]

Bit 4 - G2_IO1 sampling mode

pub fn g2_io2(&self) -> G2_IO2_R[src]

Bit 5 - G2_IO2 sampling mode

pub fn g2_io3(&self) -> G2_IO3_R[src]

Bit 6 - G2_IO3 sampling mode

pub fn g2_io4(&self) -> G2_IO4_R[src]

Bit 7 - G2_IO4 sampling mode

pub fn g3_io1(&self) -> G3_IO1_R[src]

Bit 8 - G3_IO1 sampling mode

pub fn g3_io2(&self) -> G3_IO2_R[src]

Bit 9 - G3_IO2 sampling mode

pub fn g3_io3(&self) -> G3_IO3_R[src]

Bit 10 - G3_IO3 sampling mode

pub fn g3_io4(&self) -> G3_IO4_R[src]

Bit 11 - G3_IO4 sampling mode

pub fn g4_io1(&self) -> G4_IO1_R[src]

Bit 12 - G4_IO1 sampling mode

pub fn g4_io2(&self) -> G4_IO2_R[src]

Bit 13 - G4_IO2 sampling mode

pub fn g4_io3(&self) -> G4_IO3_R[src]

Bit 14 - G4_IO3 sampling mode

pub fn g4_io4(&self) -> G4_IO4_R[src]

Bit 15 - G4_IO4 sampling mode

pub fn g5_io1(&self) -> G5_IO1_R[src]

Bit 16 - G5_IO1 sampling mode

pub fn g5_io2(&self) -> G5_IO2_R[src]

Bit 17 - G5_IO2 sampling mode

pub fn g5_io3(&self) -> G5_IO3_R[src]

Bit 18 - G5_IO3 sampling mode

pub fn g5_io4(&self) -> G5_IO4_R[src]

Bit 19 - G5_IO4 sampling mode

pub fn g6_io1(&self) -> G6_IO1_R[src]

Bit 20 - G6_IO1 sampling mode

pub fn g6_io2(&self) -> G6_IO2_R[src]

Bit 21 - G6_IO2 sampling mode

pub fn g6_io3(&self) -> G6_IO3_R[src]

Bit 22 - G6_IO3 sampling mode

pub fn g6_io4(&self) -> G6_IO4_R[src]

Bit 23 - G6_IO4 sampling mode

pub fn g7_io1(&self) -> G7_IO1_R[src]

Bit 24 - G7_IO1 sampling mode

pub fn g7_io2(&self) -> G7_IO2_R[src]

Bit 25 - G7_IO2 sampling mode

pub fn g7_io3(&self) -> G7_IO3_R[src]

Bit 26 - G7_IO3 sampling mode

pub fn g7_io4(&self) -> G7_IO4_R[src]

Bit 27 - G7_IO4 sampling mode

pub fn g8_io1(&self) -> G8_IO1_R[src]

Bit 28 - G8_IO1 sampling mode

pub fn g8_io2(&self) -> G8_IO2_R[src]

Bit 29 - G8_IO2 sampling mode

pub fn g8_io3(&self) -> G8_IO3_R[src]

Bit 30 - G8_IO3 sampling mode

pub fn g8_io4(&self) -> G8_IO4_R[src]

Bit 31 - G8_IO4 sampling mode

impl R<u32, Reg<u32, _IOCCR>>[src]

pub fn g1_io1(&self) -> G1_IO1_R[src]

Bit 0 - G1_IO1 channel mode

pub fn g1_io2(&self) -> G1_IO2_R[src]

Bit 1 - G1_IO2 channel mode

pub fn g1_io3(&self) -> G1_IO3_R[src]

Bit 2 - G1_IO3 channel mode

pub fn g1_io4(&self) -> G1_IO4_R[src]

Bit 3 - G1_IO4 channel mode

pub fn g2_io1(&self) -> G2_IO1_R[src]

Bit 4 - G2_IO1 channel mode

pub fn g2_io2(&self) -> G2_IO2_R[src]

Bit 5 - G2_IO2 channel mode

pub fn g2_io3(&self) -> G2_IO3_R[src]

Bit 6 - G2_IO3 channel mode

pub fn g2_io4(&self) -> G2_IO4_R[src]

Bit 7 - G2_IO4 channel mode

pub fn g3_io1(&self) -> G3_IO1_R[src]

Bit 8 - G3_IO1 channel mode

pub fn g3_io2(&self) -> G3_IO2_R[src]

Bit 9 - G3_IO2 channel mode

pub fn g3_io3(&self) -> G3_IO3_R[src]

Bit 10 - G3_IO3 channel mode

pub fn g3_io4(&self) -> G3_IO4_R[src]

Bit 11 - G3_IO4 channel mode

pub fn g4_io1(&self) -> G4_IO1_R[src]

Bit 12 - G4_IO1 channel mode

pub fn g4_io2(&self) -> G4_IO2_R[src]

Bit 13 - G4_IO2 channel mode

pub fn g4_io3(&self) -> G4_IO3_R[src]

Bit 14 - G4_IO3 channel mode

pub fn g4_io4(&self) -> G4_IO4_R[src]

Bit 15 - G4_IO4 channel mode

pub fn g5_io1(&self) -> G5_IO1_R[src]

Bit 16 - G5_IO1 channel mode

pub fn g5_io2(&self) -> G5_IO2_R[src]

Bit 17 - G5_IO2 channel mode

pub fn g5_io3(&self) -> G5_IO3_R[src]

Bit 18 - G5_IO3 channel mode

pub fn g5_io4(&self) -> G5_IO4_R[src]

Bit 19 - G5_IO4 channel mode

pub fn g6_io1(&self) -> G6_IO1_R[src]

Bit 20 - G6_IO1 channel mode

pub fn g6_io2(&self) -> G6_IO2_R[src]

Bit 21 - G6_IO2 channel mode

pub fn g6_io3(&self) -> G6_IO3_R[src]

Bit 22 - G6_IO3 channel mode

pub fn g6_io4(&self) -> G6_IO4_R[src]

Bit 23 - G6_IO4 channel mode

pub fn g7_io1(&self) -> G7_IO1_R[src]

Bit 24 - G7_IO1 channel mode

pub fn g7_io2(&self) -> G7_IO2_R[src]

Bit 25 - G7_IO2 channel mode

pub fn g7_io3(&self) -> G7_IO3_R[src]

Bit 26 - G7_IO3 channel mode

pub fn g7_io4(&self) -> G7_IO4_R[src]

Bit 27 - G7_IO4 channel mode

pub fn g8_io1(&self) -> G8_IO1_R[src]

Bit 28 - G8_IO1 channel mode

pub fn g8_io2(&self) -> G8_IO2_R[src]

Bit 29 - G8_IO2 channel mode

pub fn g8_io3(&self) -> G8_IO3_R[src]

Bit 30 - G8_IO3 channel mode

pub fn g8_io4(&self) -> G8_IO4_R[src]

Bit 31 - G8_IO4 channel mode

impl R<u32, Reg<u32, _IOGCSR>>[src]

pub fn g8s(&self) -> G8S_R[src]

Bit 23 - Analog I/O group x status

pub fn g7s(&self) -> G7S_R[src]

Bit 22 - Analog I/O group x status

pub fn g6s(&self) -> G6S_R[src]

Bit 21 - Analog I/O group x status

pub fn g5s(&self) -> G5S_R[src]

Bit 20 - Analog I/O group x status

pub fn g4s(&self) -> G4S_R[src]

Bit 19 - Analog I/O group x status

pub fn g3s(&self) -> G3S_R[src]

Bit 18 - Analog I/O group x status

pub fn g2s(&self) -> G2S_R[src]

Bit 17 - Analog I/O group x status

pub fn g1s(&self) -> G1S_R[src]

Bit 16 - Analog I/O group x status

pub fn g8e(&self) -> G8E_R[src]

Bit 7 - Analog I/O group x enable

pub fn g7e(&self) -> G7E_R[src]

Bit 6 - Analog I/O group x enable

pub fn g6e(&self) -> G6E_R[src]

Bit 5 - Analog I/O group x enable

pub fn g5e(&self) -> G5E_R[src]

Bit 4 - Analog I/O group x enable

pub fn g4e(&self) -> G4E_R[src]

Bit 3 - Analog I/O group x enable

pub fn g3e(&self) -> G3E_R[src]

Bit 2 - Analog I/O group x enable

pub fn g2e(&self) -> G2E_R[src]

Bit 1 - Analog I/O group x enable

pub fn g1e(&self) -> G1E_R[src]

Bit 0 - Analog I/O group x enable

impl R<u32, Reg<u32, _IOGCR>>[src]

pub fn cnt(&self) -> CNT_R[src]

Bits 0:13 - Counter value

impl R<u32, Reg<u32, _DR>>[src]

pub fn dr(&self) -> DR_R[src]

Bits 0:31 - Data register bits

impl R<u32, Reg<u32, _IDR>>[src]

pub fn idr(&self) -> IDR_R[src]

Bits 0:7 - General-purpose 8-bit data register bits

impl R<bool, RESET_A>[src]

pub fn variant(&self) -> Variant<bool, RESET_A>[src]

Get enumerated values variant

pub fn is_reset(&self) -> bool[src]

Checks if the value of the field is RESET

impl R<u32, Reg<u32, _CR>>[src]

pub fn reset(&self) -> RESET_R[src]

Bit 0 - reset bit

pub fn polysize(&self) -> POLYSIZE_R[src]

Bits 3:4 - Polynomial size

pub fn rev_in(&self) -> REV_IN_R[src]

Bits 5:6 - Reverse input data

pub fn rev_out(&self) -> REV_OUT_R[src]

Bit 7 - Reverse output data

impl R<u32, Reg<u32, _INIT>>[src]

pub fn init(&self) -> INIT_R[src]

Bits 0:31 - Programmable initial CRC value

impl R<u32, Reg<u32, _POL>>[src]

pub fn pol(&self) -> POL_R[src]

Bits 0:31 - Programmable polynomial

impl R<u32, Reg<u32, _ACR>>[src]

pub fn latency(&self) -> LATENCY_R[src]

Bits 0:2 - LATENCY

pub fn prftbe(&self) -> PRFTBE_R[src]

Bit 4 - PRFTBE

pub fn prftbs(&self) -> PRFTBS_R[src]

Bit 5 - PRFTBS

impl R<u32, Reg<u32, _SR>>[src]

pub fn eop(&self) -> EOP_R[src]

Bit 5 - End of operation

pub fn wrprt(&self) -> WRPRT_R[src]

Bit 4 - Write protection error

pub fn pgerr(&self) -> PGERR_R[src]

Bit 2 - Programming error

pub fn bsy(&self) -> BSY_R[src]

Bit 0 - Busy

impl R<u32, Reg<u32, _CR>>[src]

pub fn force_optload(&self) -> FORCE_OPTLOAD_R[src]

Bit 13 - Force option byte loading

pub fn eopie(&self) -> EOPIE_R[src]

Bit 12 - End of operation interrupt enable

pub fn errie(&self) -> ERRIE_R[src]

Bit 10 - Error interrupt enable

pub fn optwre(&self) -> OPTWRE_R[src]

Bit 9 - Option bytes write enable

pub fn lock(&self) -> LOCK_R[src]

Bit 7 - Lock

pub fn strt(&self) -> STRT_R[src]

Bit 6 - Start

pub fn opter(&self) -> OPTER_R[src]

Bit 5 - Option byte erase

pub fn optpg(&self) -> OPTPG_R[src]

Bit 4 - Option byte programming

pub fn mer(&self) -> MER_R[src]

Bit 2 - Mass erase

pub fn per(&self) -> PER_R[src]

Bit 1 - Page erase

pub fn pg(&self) -> PG_R[src]

Bit 0 - Programming

impl R<u32, Reg<u32, _OBR>>[src]

pub fn opterr(&self) -> OPTERR_R[src]

Bit 0 - Option byte error

pub fn level1_prot(&self) -> LEVEL1_PROT_R[src]

Bit 1 - Level 1 protection status

pub fn level2_prot(&self) -> LEVEL2_PROT_R[src]

Bit 2 - Level 2 protection status

pub fn wdg_sw(&self) -> WDG_SW_R[src]

Bit 8 - WDG_SW

pub fn n_rst_stop(&self) -> NRST_STOP_R[src]

Bit 9 - nRST_STOP

pub fn n_rst_stdby(&self) -> NRST_STDBY_R[src]

Bit 10 - nRST_STDBY

pub fn boot1(&self) -> BOOT1_R[src]

Bit 12 - BOOT1

pub fn vdda_monitor(&self) -> VDDA_MONITOR_R[src]

Bit 13 - VDDA_MONITOR

pub fn sram_parity_check(&self) -> SRAM_PARITY_CHECK_R[src]

Bit 14 - SRAM_PARITY_CHECK

pub fn data0(&self) -> DATA0_R[src]

Bits 16:23 - Data0

pub fn data1(&self) -> DATA1_R[src]

Bits 24:31 - Data1

impl R<u32, Reg<u32, _WRPR>>[src]

pub fn wrp(&self) -> WRP_R[src]

Bits 0:31 - Write protect

impl R<bool, HSION_A>[src]

pub fn variant(&self) -> HSION_A[src]

Get enumerated values variant

pub fn is_off(&self) -> bool[src]

Checks if the value of the field is OFF

pub fn is_on(&self) -> bool[src]

Checks if the value of the field is ON

impl R<bool, HSIRDY_A>[src]

pub fn variant(&self) -> HSIRDY_A[src]

Get enumerated values variant

pub fn is_not_ready(&self) -> bool[src]

Checks if the value of the field is NOTREADY

pub fn is_ready(&self) -> bool[src]

Checks if the value of the field is READY

impl R<bool, HSEBYP_A>[src]

pub fn variant(&self) -> HSEBYP_A[src]

Get enumerated values variant

pub fn is_not_bypassed(&self) -> bool[src]

Checks if the value of the field is NOTBYPASSED

pub fn is_bypassed(&self) -> bool[src]

Checks if the value of the field is BYPASSED

impl R<bool, CSSON_A>[src]

pub fn variant(&self) -> CSSON_A[src]

Get enumerated values variant

pub fn is_off(&self) -> bool[src]

Checks if the value of the field is OFF

pub fn is_on(&self) -> bool[src]

Checks if the value of the field is ON

impl R<u32, Reg<u32, _CR>>[src]

pub fn hsion(&self) -> HSION_R[src]

Bit 0 - Internal High Speed clock enable

pub fn hsirdy(&self) -> HSIRDY_R[src]

Bit 1 - Internal High Speed clock ready flag

pub fn hsitrim(&self) -> HSITRIM_R[src]

Bits 3:7 - Internal High Speed clock trimming

pub fn hsical(&self) -> HSICAL_R[src]

Bits 8:15 - Internal High Speed clock Calibration

pub fn hseon(&self) -> HSEON_R[src]

Bit 16 - External High Speed clock enable

pub fn hserdy(&self) -> HSERDY_R[src]

Bit 17 - External High Speed clock ready flag

pub fn hsebyp(&self) -> HSEBYP_R[src]

Bit 18 - External High Speed clock Bypass

pub fn csson(&self) -> CSSON_R[src]

Bit 19 - Clock Security System enable

pub fn pllon(&self) -> PLLON_R[src]

Bit 24 - PLL enable

pub fn pllrdy(&self) -> PLLRDY_R[src]

Bit 25 - PLL clock ready flag

impl R<u8, SW_A>[src]

pub fn variant(&self) -> Variant<u8, SW_A>[src]

Get enumerated values variant

pub fn is_hsi(&self) -> bool[src]

Checks if the value of the field is HSI

pub fn is_hse(&self) -> bool[src]

Checks if the value of the field is HSE

pub fn is_pll(&self) -> bool[src]

Checks if the value of the field is PLL

impl R<u8, SWS_A>[src]

pub fn variant(&self) -> Variant<u8, SWS_A>[src]

Get enumerated values variant

pub fn is_hsi(&self) -> bool[src]

Checks if the value of the field is HSI

pub fn is_hse(&self) -> bool[src]

Checks if the value of the field is HSE

pub fn is_pll(&self) -> bool[src]

Checks if the value of the field is PLL

impl R<u8, HPRE_A>[src]

pub fn variant(&self) -> Variant<u8, HPRE_A>[src]

Get enumerated values variant

pub fn is_div1(&self) -> bool[src]

Checks if the value of the field is DIV1

pub fn is_div2(&self) -> bool[src]

Checks if the value of the field is DIV2

pub fn is_div4(&self) -> bool[src]

Checks if the value of the field is DIV4

pub fn is_div8(&self) -> bool[src]

Checks if the value of the field is DIV8

pub fn is_div16(&self) -> bool[src]

Checks if the value of the field is DIV16

pub fn is_div64(&self) -> bool[src]

Checks if the value of the field is DIV64

pub fn is_div128(&self) -> bool[src]

Checks if the value of the field is DIV128

pub fn is_div256(&self) -> bool[src]

Checks if the value of the field is DIV256

pub fn is_div512(&self) -> bool[src]

Checks if the value of the field is DIV512

impl R<u8, PPRE1_A>[src]

pub fn variant(&self) -> Variant<u8, PPRE1_A>[src]

Get enumerated values variant

pub fn is_div1(&self) -> bool[src]

Checks if the value of the field is DIV1

pub fn is_div2(&self) -> bool[src]

Checks if the value of the field is DIV2

pub fn is_div4(&self) -> bool[src]

Checks if the value of the field is DIV4

pub fn is_div8(&self) -> bool[src]

Checks if the value of the field is DIV8

pub fn is_div16(&self) -> bool[src]

Checks if the value of the field is DIV16

impl R<u8, PLLSRC_A>[src]

pub fn variant(&self) -> Variant<u8, PLLSRC_A>[src]

Get enumerated values variant

pub fn is_hsi_div2(&self) -> bool[src]

Checks if the value of the field is HSI_DIV2

pub fn is_hsi_div_prediv(&self) -> bool[src]

Checks if the value of the field is HSI_DIV_PREDIV

pub fn is_hse_div_prediv(&self) -> bool[src]

Checks if the value of the field is HSE_DIV_PREDIV

impl R<bool, PLLXTPRE_A>[src]

pub fn variant(&self) -> PLLXTPRE_A[src]

Get enumerated values variant

pub fn is_div1(&self) -> bool[src]

Checks if the value of the field is DIV1

pub fn is_div2(&self) -> bool[src]

Checks if the value of the field is DIV2

impl R<u8, PLLMUL_A>[src]

pub fn variant(&self) -> PLLMUL_A[src]

Get enumerated values variant

pub fn is_mul2(&self) -> bool[src]

Checks if the value of the field is MUL2

pub fn is_mul3(&self) -> bool[src]

Checks if the value of the field is MUL3

pub fn is_mul4(&self) -> bool[src]

Checks if the value of the field is MUL4

pub fn is_mul5(&self) -> bool[src]

Checks if the value of the field is MUL5

pub fn is_mul6(&self) -> bool[src]

Checks if the value of the field is MUL6

pub fn is_mul7(&self) -> bool[src]

Checks if the value of the field is MUL7

pub fn is_mul8(&self) -> bool[src]

Checks if the value of the field is MUL8

pub fn is_mul9(&self) -> bool[src]

Checks if the value of the field is MUL9

pub fn is_mul10(&self) -> bool[src]

Checks if the value of the field is MUL10

pub fn is_mul11(&self) -> bool[src]

Checks if the value of the field is MUL11

pub fn is_mul12(&self) -> bool[src]

Checks if the value of the field is MUL12

pub fn is_mul13(&self) -> bool[src]

Checks if the value of the field is MUL13

pub fn is_mul14(&self) -> bool[src]

Checks if the value of the field is MUL14

pub fn is_mul15(&self) -> bool[src]

Checks if the value of the field is MUL15

pub fn is_mul16(&self) -> bool[src]

Checks if the value of the field is MUL16

pub fn is_mul16x(&self) -> bool[src]

Checks if the value of the field is MUL16X

impl R<bool, USBPRE_A>[src]

pub fn variant(&self) -> USBPRE_A[src]

Get enumerated values variant

pub fn is_div1_5(&self) -> bool[src]

Checks if the value of the field is DIV1_5

pub fn is_div1(&self) -> bool[src]

Checks if the value of the field is DIV1

impl R<u8, MCO_A>[src]

pub fn variant(&self) -> Variant<u8, MCO_A>[src]

Get enumerated values variant

pub fn is_no_mco(&self) -> bool[src]

Checks if the value of the field is NOMCO

pub fn is_lsi(&self) -> bool[src]

Checks if the value of the field is LSI

pub fn is_lse(&self) -> bool[src]

Checks if the value of the field is LSE

pub fn is_sysclk(&self) -> bool[src]

Checks if the value of the field is SYSCLK

pub fn is_hsi(&self) -> bool[src]

Checks if the value of the field is HSI

pub fn is_hse(&self) -> bool[src]

Checks if the value of the field is HSE

pub fn is_pll(&self) -> bool[src]

Checks if the value of the field is PLL

impl R<bool, I2SSRC_A>[src]

pub fn variant(&self) -> I2SSRC_A[src]

Get enumerated values variant

pub fn is_sysclk(&self) -> bool[src]

Checks if the value of the field is SYSCLK

pub fn is_ckin(&self) -> bool[src]

Checks if the value of the field is CKIN

impl R<u8, MCOPRE_A>[src]

pub fn variant(&self) -> MCOPRE_A[src]

Get enumerated values variant

pub fn is_div1(&self) -> bool[src]

Checks if the value of the field is DIV1

pub fn is_div2(&self) -> bool[src]

Checks if the value of the field is DIV2

pub fn is_div4(&self) -> bool[src]

Checks if the value of the field is DIV4

pub fn is_div8(&self) -> bool[src]

Checks if the value of the field is DIV8

pub fn is_div16(&self) -> bool[src]

Checks if the value of the field is DIV16

pub fn is_div32(&self) -> bool[src]

Checks if the value of the field is DIV32

pub fn is_div64(&self) -> bool[src]

Checks if the value of the field is DIV64

pub fn is_div128(&self) -> bool[src]

Checks if the value of the field is DIV128

impl R<bool, PLLNODIV_A>[src]

pub fn variant(&self) -> PLLNODIV_A[src]

Get enumerated values variant

pub fn is_div2(&self) -> bool[src]

Checks if the value of the field is DIV2

pub fn is_div1(&self) -> bool[src]

Checks if the value of the field is DIV1

impl R<u32, Reg<u32, _CFGR>>[src]

pub fn sw(&self) -> SW_R[src]

Bits 0:1 - System clock Switch

pub fn sws(&self) -> SWS_R[src]

Bits 2:3 - System Clock Switch Status

pub fn hpre(&self) -> HPRE_R[src]

Bits 4:7 - AHB prescaler

pub fn ppre1(&self) -> PPRE1_R[src]

Bits 8:10 - APB Low speed prescaler (APB1)

pub fn ppre2(&self) -> PPRE2_R[src]

Bits 11:13 - APB high speed prescaler (APB2)

pub fn pllsrc(&self) -> PLLSRC_R[src]

Bits 15:16 - PLL entry clock source

pub fn pllxtpre(&self) -> PLLXTPRE_R[src]

Bit 17 - HSE divider for PLL entry

pub fn pllmul(&self) -> PLLMUL_R[src]

Bits 18:21 - PLL Multiplication Factor

pub fn usbpre(&self) -> USBPRE_R[src]

Bit 22 - USB prescaler

pub fn mco(&self) -> MCO_R[src]

Bits 24:26 - Microcontroller clock output

pub fn i2ssrc(&self) -> I2SSRC_R[src]

Bit 23 - I2S external clock source selection

pub fn mcopre(&self) -> MCOPRE_R[src]

Bits 28:30 - Microcontroller Clock Output Prescaler

pub fn pllnodiv(&self) -> PLLNODIV_R[src]

Bit 31 - Do not divide PLL to MCO

impl R<bool, LSIRDYF_A>[src]

pub fn variant(&self) -> LSIRDYF_A[src]

Get enumerated values variant

pub fn is_not_interrupted(&self) -> bool[src]

Checks if the value of the field is NOTINTERRUPTED

pub fn is_interrupted(&self) -> bool[src]

Checks if the value of the field is INTERRUPTED

impl R<bool, CSSF_A>[src]

pub fn variant(&self) -> CSSF_A[src]

Get enumerated values variant

pub fn is_not_interrupted(&self) -> bool[src]

Checks if the value of the field is NOTINTERRUPTED

pub fn is_interrupted(&self) -> bool[src]

Checks if the value of the field is INTERRUPTED

impl R<bool, LSIRDYIE_A>[src]

pub fn variant(&self) -> LSIRDYIE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u32, Reg<u32, _CIR>>[src]

pub fn lsirdyf(&self) -> LSIRDYF_R[src]

Bit 0 - LSI Ready Interrupt flag

pub fn lserdyf(&self) -> LSERDYF_R[src]

Bit 1 - LSE Ready Interrupt flag

pub fn hsirdyf(&self) -> HSIRDYF_R[src]

Bit 2 - HSI Ready Interrupt flag

pub fn hserdyf(&self) -> HSERDYF_R[src]

Bit 3 - HSE Ready Interrupt flag

pub fn pllrdyf(&self) -> PLLRDYF_R[src]

Bit 4 - PLL Ready Interrupt flag

pub fn cssf(&self) -> CSSF_R[src]

Bit 7 - Clock Security System Interrupt flag

pub fn lsirdyie(&self) -> LSIRDYIE_R[src]

Bit 8 - LSI Ready Interrupt Enable

pub fn lserdyie(&self) -> LSERDYIE_R[src]

Bit 9 - LSE Ready Interrupt Enable

pub fn hsirdyie(&self) -> HSIRDYIE_R[src]

Bit 10 - HSI Ready Interrupt Enable

pub fn hserdyie(&self) -> HSERDYIE_R[src]

Bit 11 - HSE Ready Interrupt Enable

pub fn pllrdyie(&self) -> PLLRDYIE_R[src]

Bit 12 - PLL Ready Interrupt Enable

impl R<bool, SYSCFGRST_A>[src]

pub fn variant(&self) -> Variant<bool, SYSCFGRST_A>[src]

Get enumerated values variant

pub fn is_reset(&self) -> bool[src]

Checks if the value of the field is RESET

impl R<u32, Reg<u32, _APB2RSTR>>[src]

pub fn syscfgrst(&self) -> SYSCFGRST_R[src]

Bit 0 - SYSCFG and COMP reset

pub fn tim1rst(&self) -> TIM1RST_R[src]

Bit 11 - TIM1 timer reset

pub fn spi1rst(&self) -> SPI1RST_R[src]

Bit 12 - SPI 1 reset

pub fn tim8rst(&self) -> TIM8RST_R[src]

Bit 13 - TIM8 timer reset

pub fn usart1rst(&self) -> USART1RST_R[src]

Bit 14 - USART1 reset

pub fn tim15rst(&self) -> TIM15RST_R[src]

Bit 16 - TIM15 timer reset

pub fn tim16rst(&self) -> TIM16RST_R[src]

Bit 17 - TIM16 timer reset

pub fn tim17rst(&self) -> TIM17RST_R[src]

Bit 18 - TIM17 timer reset

pub fn spi4rst(&self) -> SPI4RST_R[src]

Bit 15 - SPI4 reset

pub fn tim20rst(&self) -> TIM20RST_R[src]

Bit 20 - TIM20 timer reset

impl R<bool, TIM2RST_A>[src]

pub fn variant(&self) -> Variant<bool, TIM2RST_A>[src]

Get enumerated values variant

pub fn is_reset(&self) -> bool[src]

Checks if the value of the field is RESET

impl R<u32, Reg<u32, _APB1RSTR>>[src]

pub fn tim2rst(&self) -> TIM2RST_R[src]

Bit 0 - Timer 2 reset

pub fn tim3rst(&self) -> TIM3RST_R[src]

Bit 1 - Timer 3 reset

pub fn tim4rst(&self) -> TIM4RST_R[src]

Bit 2 - Timer 14 reset

pub fn tim6rst(&self) -> TIM6RST_R[src]

Bit 4 - Timer 6 reset

pub fn tim7rst(&self) -> TIM7RST_R[src]

Bit 5 - Timer 7 reset

pub fn wwdgrst(&self) -> WWDGRST_R[src]

Bit 11 - Window watchdog reset

pub fn spi2rst(&self) -> SPI2RST_R[src]

Bit 14 - SPI2 reset

pub fn spi3rst(&self) -> SPI3RST_R[src]

Bit 15 - SPI3 reset

pub fn usart2rst(&self) -> USART2RST_R[src]

Bit 17 - USART 2 reset

pub fn usart3rst(&self) -> USART3RST_R[src]

Bit 18 - USART3 reset

pub fn uart4rst(&self) -> UART4RST_R[src]

Bit 19 - UART 4 reset

pub fn uart5rst(&self) -> UART5RST_R[src]

Bit 20 - UART 5 reset

pub fn i2c1rst(&self) -> I2C1RST_R[src]

Bit 21 - I2C1 reset

pub fn i2c2rst(&self) -> I2C2RST_R[src]

Bit 22 - I2C2 reset

pub fn usbrst(&self) -> USBRST_R[src]

Bit 23 - USB reset

pub fn canrst(&self) -> CANRST_R[src]

Bit 25 - CAN reset

pub fn pwrrst(&self) -> PWRRST_R[src]

Bit 28 - Power interface reset

pub fn dac1rst(&self) -> DAC1RST_R[src]

Bit 29 - DAC interface reset

pub fn i2c3rst(&self) -> I2C3RST_R[src]

Bit 30 - I2C3 reset

pub fn dac2rst(&self) -> DAC2RST_R[src]

Bit 26 - DAC2 interface reset

impl R<bool, DMA1EN_A>[src]

pub fn variant(&self) -> DMA1EN_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u32, Reg<u32, _AHBENR>>[src]

pub fn dma1en(&self) -> DMA1EN_R[src]

Bit 0 - DMA1 clock enable

pub fn dma2en(&self) -> DMA2EN_R[src]

Bit 1 - DMA2 clock enable

pub fn sramen(&self) -> SRAMEN_R[src]

Bit 2 - SRAM interface clock enable

pub fn flitfen(&self) -> FLITFEN_R[src]

Bit 4 - FLITF clock enable

pub fn fmcen(&self) -> FMCEN_R[src]

Bit 5 - FMC clock enable

pub fn crcen(&self) -> CRCEN_R[src]

Bit 6 - CRC clock enable

pub fn iophen(&self) -> IOPHEN_R[src]

Bit 16 - IO port H clock enable

pub fn iopaen(&self) -> IOPAEN_R[src]

Bit 17 - I/O port A clock enable

pub fn iopben(&self) -> IOPBEN_R[src]

Bit 18 - I/O port B clock enable

pub fn iopcen(&self) -> IOPCEN_R[src]

Bit 19 - I/O port C clock enable

pub fn iopden(&self) -> IOPDEN_R[src]

Bit 20 - I/O port D clock enable

pub fn iopeen(&self) -> IOPEEN_R[src]

Bit 21 - I/O port E clock enable

pub fn iopfen(&self) -> IOPFEN_R[src]

Bit 22 - I/O port F clock enable

pub fn iopgen(&self) -> IOPGEN_R[src]

Bit 23 - I/O port G clock enable

pub fn tscen(&self) -> TSCEN_R[src]

Bit 24 - Touch sensing controller clock enable

pub fn adc12en(&self) -> ADC12EN_R[src]

Bit 28 - ADC1 and ADC2 clock enable

pub fn adc34en(&self) -> ADC34EN_R[src]

Bit 29 - ADC3 and ADC4 clock enable

impl R<bool, SYSCFGEN_A>[src]

pub fn variant(&self) -> SYSCFGEN_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u32, Reg<u32, _APB2ENR>>[src]

pub fn syscfgen(&self) -> SYSCFGEN_R[src]

Bit 0 - SYSCFG clock enable

pub fn tim1en(&self) -> TIM1EN_R[src]

Bit 11 - TIM1 Timer clock enable

pub fn spi1en(&self) -> SPI1EN_R[src]

Bit 12 - SPI 1 clock enable

pub fn tim8en(&self) -> TIM8EN_R[src]

Bit 13 - TIM8 Timer clock enable

pub fn usart1en(&self) -> USART1EN_R[src]

Bit 14 - USART1 clock enable

pub fn tim15en(&self) -> TIM15EN_R[src]

Bit 16 - TIM15 timer clock enable

pub fn tim16en(&self) -> TIM16EN_R[src]

Bit 17 - TIM16 timer clock enable

pub fn tim17en(&self) -> TIM17EN_R[src]

Bit 18 - TIM17 timer clock enable

pub fn spi4en(&self) -> SPI4EN_R[src]

Bit 15 - SPI4 clock enable

pub fn tim20en(&self) -> TIM20EN_R[src]

Bit 20 - TIM20 timer clock enable

impl R<bool, TIM2EN_A>[src]

pub fn variant(&self) -> TIM2EN_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u32, Reg<u32, _APB1ENR>>[src]

pub fn tim2en(&self) -> TIM2EN_R[src]

Bit 0 - Timer 2 clock enable

pub fn tim3en(&self) -> TIM3EN_R[src]

Bit 1 - Timer 3 clock enable

pub fn tim4en(&self) -> TIM4EN_R[src]

Bit 2 - Timer 4 clock enable

pub fn tim6en(&self) -> TIM6EN_R[src]

Bit 4 - Timer 6 clock enable

pub fn tim7en(&self) -> TIM7EN_R[src]

Bit 5 - Timer 7 clock enable

pub fn wwdgen(&self) -> WWDGEN_R[src]

Bit 11 - Window watchdog clock enable

pub fn spi2en(&self) -> SPI2EN_R[src]

Bit 14 - SPI 2 clock enable

pub fn spi3en(&self) -> SPI3EN_R[src]

Bit 15 - SPI 3 clock enable

pub fn usart2en(&self) -> USART2EN_R[src]

Bit 17 - USART 2 clock enable

pub fn usart3en(&self) -> USART3EN_R[src]

Bit 18 - USART 3 clock enable

pub fn uart4en(&self) -> UART4EN_R[src]

Bit 19 - USART 4 clock enable

pub fn uart5en(&self) -> UART5EN_R[src]

Bit 20 - USART 5 clock enable

pub fn i2c1en(&self) -> I2C1EN_R[src]

Bit 21 - I2C 1 clock enable

pub fn i2c2en(&self) -> I2C2EN_R[src]

Bit 22 - I2C 2 clock enable

pub fn usben(&self) -> USBEN_R[src]

Bit 23 - USB clock enable

pub fn canen(&self) -> CANEN_R[src]

Bit 25 - CAN clock enable

pub fn dac2en(&self) -> DAC2EN_R[src]

Bit 26 - DAC2 interface clock enable

pub fn pwren(&self) -> PWREN_R[src]

Bit 28 - Power interface clock enable

pub fn dac1en(&self) -> DAC1EN_R[src]

Bit 29 - DAC interface clock enable

pub fn i2c3en(&self) -> I2C3EN_R[src]

Bit 30 - I2C3 clock enable

impl R<bool, LSEON_A>[src]

pub fn variant(&self) -> LSEON_A[src]

Get enumerated values variant

pub fn is_off(&self) -> bool[src]

Checks if the value of the field is OFF

pub fn is_on(&self) -> bool[src]

Checks if the value of the field is ON

impl R<bool, LSERDY_A>[src]

pub fn variant(&self) -> LSERDY_A[src]

Get enumerated values variant

pub fn is_not_ready(&self) -> bool[src]

Checks if the value of the field is NOTREADY

pub fn is_ready(&self) -> bool[src]

Checks if the value of the field is READY

impl R<bool, LSEBYP_A>[src]

pub fn variant(&self) -> LSEBYP_A[src]

Get enumerated values variant

pub fn is_not_bypassed(&self) -> bool[src]

Checks if the value of the field is NOTBYPASSED

pub fn is_bypassed(&self) -> bool[src]

Checks if the value of the field is BYPASSED

impl R<u8, LSEDRV_A>[src]

pub fn variant(&self) -> LSEDRV_A[src]

Get enumerated values variant

pub fn is_low(&self) -> bool[src]

Checks if the value of the field is LOW

pub fn is_medium_high(&self) -> bool[src]

Checks if the value of the field is MEDIUMHIGH

pub fn is_medium_low(&self) -> bool[src]

Checks if the value of the field is MEDIUMLOW

pub fn is_high(&self) -> bool[src]

Checks if the value of the field is HIGH

impl R<u8, RTCSEL_A>[src]

pub fn variant(&self) -> RTCSEL_A[src]

Get enumerated values variant

pub fn is_no_clock(&self) -> bool[src]

Checks if the value of the field is NOCLOCK

pub fn is_lse(&self) -> bool[src]

Checks if the value of the field is LSE

pub fn is_lsi(&self) -> bool[src]

Checks if the value of the field is LSI

pub fn is_hse(&self) -> bool[src]

Checks if the value of the field is HSE

impl R<bool, RTCEN_A>[src]

pub fn variant(&self) -> RTCEN_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, BDRST_A>[src]

pub fn variant(&self) -> BDRST_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u32, Reg<u32, _BDCR>>[src]

pub fn lseon(&self) -> LSEON_R[src]

Bit 0 - External Low Speed oscillator enable

pub fn lserdy(&self) -> LSERDY_R[src]

Bit 1 - External Low Speed oscillator ready

pub fn lsebyp(&self) -> LSEBYP_R[src]

Bit 2 - External Low Speed oscillator bypass

pub fn lsedrv(&self) -> LSEDRV_R[src]

Bits 3:4 - LSE oscillator drive capability

pub fn rtcsel(&self) -> RTCSEL_R[src]

Bits 8:9 - RTC clock source selection

pub fn rtcen(&self) -> RTCEN_R[src]

Bit 15 - RTC clock enable

pub fn bdrst(&self) -> BDRST_R[src]

Bit 16 - Backup domain software reset

impl R<bool, LSION_A>[src]

pub fn variant(&self) -> LSION_A[src]

Get enumerated values variant

pub fn is_off(&self) -> bool[src]

Checks if the value of the field is OFF

pub fn is_on(&self) -> bool[src]

Checks if the value of the field is ON

impl R<bool, LSIRDY_A>[src]

pub fn variant(&self) -> LSIRDY_A[src]

Get enumerated values variant

pub fn is_not_ready(&self) -> bool[src]

Checks if the value of the field is NOTREADY

pub fn is_ready(&self) -> bool[src]

Checks if the value of the field is READY

impl R<bool, RMVF_A>[src]

pub fn variant(&self) -> Variant<bool, RMVF_A>[src]

Get enumerated values variant

pub fn is_clear(&self) -> bool[src]

Checks if the value of the field is CLEAR

impl R<bool, OBLRSTF_A>[src]

pub fn variant(&self) -> OBLRSTF_A[src]

Get enumerated values variant

pub fn is_no_reset(&self) -> bool[src]

Checks if the value of the field is NORESET

pub fn is_reset(&self) -> bool[src]

Checks if the value of the field is RESET

impl R<u32, Reg<u32, _CSR>>[src]

pub fn lsion(&self) -> LSION_R[src]

Bit 0 - Internal low speed oscillator enable

pub fn lsirdy(&self) -> LSIRDY_R[src]

Bit 1 - Internal low speed oscillator ready

pub fn rmvf(&self) -> RMVF_R[src]

Bit 24 - Remove reset flag

pub fn oblrstf(&self) -> OBLRSTF_R[src]

Bit 25 - Option byte loader reset flag

pub fn pinrstf(&self) -> PINRSTF_R[src]

Bit 26 - PIN reset flag

pub fn porrstf(&self) -> PORRSTF_R[src]

Bit 27 - POR/PDR reset flag

pub fn sftrstf(&self) -> SFTRSTF_R[src]

Bit 28 - Software reset flag

pub fn iwdgrstf(&self) -> IWDGRSTF_R[src]

Bit 29 - Independent watchdog reset flag

pub fn wwdgrstf(&self) -> WWDGRSTF_R[src]

Bit 30 - Window watchdog reset flag

pub fn lpwrrstf(&self) -> LPWRRSTF_R[src]

Bit 31 - Low-power reset flag

pub fn v18pwrrstf(&self) -> V18PWRRSTF_R[src]

Bit 23 - Reset flag of the 1.8 V domain

impl R<bool, FMCRST_A>[src]

pub fn variant(&self) -> Variant<bool, FMCRST_A>[src]

Get enumerated values variant

pub fn is_reset(&self) -> bool[src]

Checks if the value of the field is RESET

impl R<u32, Reg<u32, _AHBRSTR>>[src]

pub fn fmcrst(&self) -> FMCRST_R[src]

Bit 5 - FMC reset

pub fn iophrst(&self) -> IOPHRST_R[src]

Bit 16 - I/O port H reset

pub fn ioparst(&self) -> IOPARST_R[src]

Bit 17 - I/O port A reset

pub fn iopbrst(&self) -> IOPBRST_R[src]

Bit 18 - I/O port B reset

pub fn iopcrst(&self) -> IOPCRST_R[src]

Bit 19 - I/O port C reset

pub fn iopdrst(&self) -> IOPDRST_R[src]

Bit 20 - I/O port D reset

pub fn ioperst(&self) -> IOPERST_R[src]

Bit 21 - I/O port E reset

pub fn iopfrst(&self) -> IOPFRST_R[src]

Bit 22 - I/O port F reset

pub fn iopgrst(&self) -> IOPGRST_R[src]

Bit 23 - Touch sensing controller reset

pub fn tscrst(&self) -> TSCRST_R[src]

Bit 24 - Touch sensing controller reset

pub fn adc12rst(&self) -> ADC12RST_R[src]

Bit 28 - ADC1 and ADC2 reset

pub fn adc34rst(&self) -> ADC34RST_R[src]

Bit 29 - ADC3 and ADC4 reset

impl R<u8, PREDIV_A>[src]

pub fn variant(&self) -> PREDIV_A[src]

Get enumerated values variant

pub fn is_div1(&self) -> bool[src]

Checks if the value of the field is DIV1

pub fn is_div2(&self) -> bool[src]

Checks if the value of the field is DIV2

pub fn is_div3(&self) -> bool[src]

Checks if the value of the field is DIV3

pub fn is_div4(&self) -> bool[src]

Checks if the value of the field is DIV4

pub fn is_div5(&self) -> bool[src]

Checks if the value of the field is DIV5

pub fn is_div6(&self) -> bool[src]

Checks if the value of the field is DIV6

pub fn is_div7(&self) -> bool[src]

Checks if the value of the field is DIV7

pub fn is_div8(&self) -> bool[src]

Checks if the value of the field is DIV8

pub fn is_div9(&self) -> bool[src]

Checks if the value of the field is DIV9

pub fn is_div10(&self) -> bool[src]

Checks if the value of the field is DIV10

pub fn is_div11(&self) -> bool[src]

Checks if the value of the field is DIV11

pub fn is_div12(&self) -> bool[src]

Checks if the value of the field is DIV12

pub fn is_div13(&self) -> bool[src]

Checks if the value of the field is DIV13

pub fn is_div14(&self) -> bool[src]

Checks if the value of the field is DIV14

pub fn is_div15(&self) -> bool[src]

Checks if the value of the field is DIV15

pub fn is_div16(&self) -> bool[src]

Checks if the value of the field is DIV16

impl R<u8, ADC12PRES_A>[src]

pub fn variant(&self) -> Variant<u8, ADC12PRES_A>[src]

Get enumerated values variant

pub fn is_no_clock(&self) -> bool[src]

Checks if the value of the field is NOCLOCK

pub fn is_div1(&self) -> bool[src]

Checks if the value of the field is DIV1

pub fn is_div2(&self) -> bool[src]

Checks if the value of the field is DIV2

pub fn is_div4(&self) -> bool[src]

Checks if the value of the field is DIV4

pub fn is_div6(&self) -> bool[src]

Checks if the value of the field is DIV6

pub fn is_div8(&self) -> bool[src]

Checks if the value of the field is DIV8

pub fn is_div10(&self) -> bool[src]

Checks if the value of the field is DIV10

pub fn is_div12(&self) -> bool[src]

Checks if the value of the field is DIV12

pub fn is_div16(&self) -> bool[src]

Checks if the value of the field is DIV16

pub fn is_div32(&self) -> bool[src]

Checks if the value of the field is DIV32

pub fn is_div64(&self) -> bool[src]

Checks if the value of the field is DIV64

pub fn is_div128(&self) -> bool[src]

Checks if the value of the field is DIV128

pub fn is_div256(&self) -> bool[src]

Checks if the value of the field is DIV256

impl R<u32, Reg<u32, _CFGR2>>[src]

pub fn prediv(&self) -> PREDIV_R[src]

Bits 0:3 - PREDIV division factor

pub fn adc12pres(&self) -> ADC12PRES_R[src]

Bits 4:8 - ADC1 and ADC2 prescaler

pub fn adc34pres(&self) -> ADC34PRES_R[src]

Bits 9:13 - ADC3 and ADC4 prescaler

impl R<u8, USART1SW_A>[src]

pub fn variant(&self) -> USART1SW_A[src]

Get enumerated values variant

pub fn is_pclk(&self) -> bool[src]

Checks if the value of the field is PCLK

pub fn is_sysclk(&self) -> bool[src]

Checks if the value of the field is SYSCLK

pub fn is_lse(&self) -> bool[src]

Checks if the value of the field is LSE

pub fn is_hsi(&self) -> bool[src]

Checks if the value of the field is HSI

impl R<bool, I2C1SW_A>[src]

pub fn variant(&self) -> I2C1SW_A[src]

Get enumerated values variant

pub fn is_hsi(&self) -> bool[src]

Checks if the value of the field is HSI

pub fn is_sysclk(&self) -> bool[src]

Checks if the value of the field is SYSCLK

impl R<bool, TIM1SW_A>[src]

pub fn variant(&self) -> TIM1SW_A[src]

Get enumerated values variant

pub fn is_pclk2(&self) -> bool[src]

Checks if the value of the field is PCLK2

pub fn is_pll(&self) -> bool[src]

Checks if the value of the field is PLL

impl R<u32, Reg<u32, _CFGR3>>[src]

pub fn usart1sw(&self) -> USART1SW_R[src]

Bits 0:1 - USART1 clock source selection

pub fn i2c1sw(&self) -> I2C1SW_R[src]

Bit 4 - I2C1 clock source selection

pub fn i2c2sw(&self) -> I2C2SW_R[src]

Bit 5 - I2C2 clock source selection

pub fn i2c3sw(&self) -> I2C3SW_R[src]

Bit 6 - I2C3 clock source selection

pub fn usart2sw(&self) -> USART2SW_R[src]

Bits 16:17 - USART2 clock source selection

pub fn usart3sw(&self) -> USART3SW_R[src]

Bits 18:19 - USART3 clock source selection

pub fn tim1sw(&self) -> TIM1SW_R[src]

Bit 8 - Timer1 clock source selection

pub fn tim8sw(&self) -> TIM8SW_R[src]

Bit 9 - Timer8 clock source selection

pub fn uart4sw(&self) -> UART4SW_R[src]

Bits 20:21 - UART4 clock source selection

pub fn uart5sw(&self) -> UART5SW_R[src]

Bits 22:23 - UART5 clock source selection

pub fn tim20sw(&self) -> TIM20SW_R[src]

Bit 15 - Timer20 clock source selection

pub fn tim15sw(&self) -> TIM15SW_R[src]

Bit 10 - Timer15 clock source selection

pub fn tim16sw(&self) -> TIM16SW_R[src]

Bit 11 - Timer16 clock source selection

pub fn tim17sw(&self) -> TIM17SW_R[src]

Bit 13 - Timer17 clock source selection

pub fn tim2sw(&self) -> TIM2SW_R[src]

Bit 24 - Timer2 clock source selection

pub fn tim34sw(&self) -> TIM34SW_R[src]

Bit 25 - Timer34 clock source selection

impl R<bool, EN_A>[src]

pub fn variant(&self) -> EN_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, TCIE_A>[src]

pub fn variant(&self) -> TCIE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, HTIE_A>[src]

pub fn variant(&self) -> HTIE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, TEIE_A>[src]

pub fn variant(&self) -> TEIE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, DIR_A>[src]

pub fn variant(&self) -> DIR_A[src]

Get enumerated values variant

pub fn is_from_peripheral(&self) -> bool[src]

Checks if the value of the field is FROMPERIPHERAL

pub fn is_from_memory(&self) -> bool[src]

Checks if the value of the field is FROMMEMORY

impl R<bool, CIRC_A>[src]

pub fn variant(&self) -> CIRC_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, PINC_A>[src]

pub fn variant(&self) -> PINC_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u8, PSIZE_A>[src]

pub fn variant(&self) -> Variant<u8, PSIZE_A>[src]

Get enumerated values variant

pub fn is_bits8(&self) -> bool[src]

Checks if the value of the field is BITS8

pub fn is_bits16(&self) -> bool[src]

Checks if the value of the field is BITS16

pub fn is_bits32(&self) -> bool[src]

Checks if the value of the field is BITS32

impl R<u8, PL_A>[src]

pub fn variant(&self) -> PL_A[src]

Get enumerated values variant

pub fn is_low(&self) -> bool[src]

Checks if the value of the field is LOW

pub fn is_medium(&self) -> bool[src]

Checks if the value of the field is MEDIUM

pub fn is_high(&self) -> bool[src]

Checks if the value of the field is HIGH

pub fn is_very_high(&self) -> bool[src]

Checks if the value of the field is VERYHIGH

impl R<bool, MEM2MEM_A>[src]

pub fn variant(&self) -> MEM2MEM_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u32, Reg<u32, _CR>>[src]

pub fn en(&self) -> EN_R[src]

Bit 0 - Channel enable

pub fn tcie(&self) -> TCIE_R[src]

Bit 1 - Transfer complete interrupt enable

pub fn htie(&self) -> HTIE_R[src]

Bit 2 - Half Transfer interrupt enable

pub fn teie(&self) -> TEIE_R[src]

Bit 3 - Transfer error interrupt enable

pub fn dir(&self) -> DIR_R[src]

Bit 4 - Data transfer direction

pub fn circ(&self) -> CIRC_R[src]

Bit 5 - Circular mode

pub fn pinc(&self) -> PINC_R[src]

Bit 6 - Peripheral increment mode

pub fn minc(&self) -> MINC_R[src]

Bit 7 - Memory increment mode

pub fn psize(&self) -> PSIZE_R[src]

Bits 8:9 - Peripheral size

pub fn msize(&self) -> MSIZE_R[src]

Bits 10:11 - Memory size

pub fn pl(&self) -> PL_R[src]

Bits 12:13 - Channel Priority level

pub fn mem2mem(&self) -> MEM2MEM_R[src]

Bit 14 - Memory to memory mode

impl R<u32, Reg<u32, _NDTR>>[src]

pub fn ndt(&self) -> NDT_R[src]

Bits 0:15 - Number of data to transfer

impl R<u32, Reg<u32, _PAR>>[src]

pub fn pa(&self) -> PA_R[src]

Bits 0:31 - Peripheral address

impl R<u32, Reg<u32, _MAR>>[src]

pub fn ma(&self) -> MA_R[src]

Bits 0:31 - Memory address

impl R<bool, GIF1_A>[src]

pub fn variant(&self) -> GIF1_A[src]

Get enumerated values variant

pub fn is_no_event(&self) -> bool[src]

Checks if the value of the field is NOEVENT

pub fn is_event(&self) -> bool[src]

Checks if the value of the field is EVENT

impl R<bool, TCIF1_A>[src]

pub fn variant(&self) -> TCIF1_A[src]

Get enumerated values variant

pub fn is_not_complete(&self) -> bool[src]

Checks if the value of the field is NOTCOMPLETE

pub fn is_complete(&self) -> bool[src]

Checks if the value of the field is COMPLETE

impl R<bool, HTIF1_A>[src]

pub fn variant(&self) -> HTIF1_A[src]

Get enumerated values variant

pub fn is_not_half(&self) -> bool[src]

Checks if the value of the field is NOTHALF

pub fn is_half(&self) -> bool[src]

Checks if the value of the field is HALF

impl R<bool, TEIF1_A>[src]

pub fn variant(&self) -> TEIF1_A[src]

Get enumerated values variant

pub fn is_no_error(&self) -> bool[src]

Checks if the value of the field is NOERROR

pub fn is_error(&self) -> bool[src]

Checks if the value of the field is ERROR

impl R<u32, Reg<u32, _ISR>>[src]

pub fn gif1(&self) -> GIF1_R[src]

Bit 0 - Channel 1 Global interrupt flag

pub fn tcif1(&self) -> TCIF1_R[src]

Bit 1 - Channel 1 Transfer Complete flag

pub fn htif1(&self) -> HTIF1_R[src]

Bit 2 - Channel 1 Half Transfer Complete flag

pub fn teif1(&self) -> TEIF1_R[src]

Bit 3 - Channel 1 Transfer Error flag

pub fn gif2(&self) -> GIF2_R[src]

Bit 4 - Channel 2 Global interrupt flag

pub fn tcif2(&self) -> TCIF2_R[src]

Bit 5 - Channel 2 Transfer Complete flag

pub fn htif2(&self) -> HTIF2_R[src]

Bit 6 - Channel 2 Half Transfer Complete flag

pub fn teif2(&self) -> TEIF2_R[src]

Bit 7 - Channel 2 Transfer Error flag

pub fn gif3(&self) -> GIF3_R[src]

Bit 8 - Channel 3 Global interrupt flag

pub fn tcif3(&self) -> TCIF3_R[src]

Bit 9 - Channel 3 Transfer Complete flag

pub fn htif3(&self) -> HTIF3_R[src]

Bit 10 - Channel 3 Half Transfer Complete flag

pub fn teif3(&self) -> TEIF3_R[src]

Bit 11 - Channel 3 Transfer Error flag

pub fn gif4(&self) -> GIF4_R[src]

Bit 12 - Channel 4 Global interrupt flag

pub fn tcif4(&self) -> TCIF4_R[src]

Bit 13 - Channel 4 Transfer Complete flag

pub fn htif4(&self) -> HTIF4_R[src]

Bit 14 - Channel 4 Half Transfer Complete flag

pub fn teif4(&self) -> TEIF4_R[src]

Bit 15 - Channel 4 Transfer Error flag

pub fn gif5(&self) -> GIF5_R[src]

Bit 16 - Channel 5 Global interrupt flag

pub fn tcif5(&self) -> TCIF5_R[src]

Bit 17 - Channel 5 Transfer Complete flag

pub fn htif5(&self) -> HTIF5_R[src]

Bit 18 - Channel 5 Half Transfer Complete flag

pub fn teif5(&self) -> TEIF5_R[src]

Bit 19 - Channel 5 Transfer Error flag

pub fn gif6(&self) -> GIF6_R[src]

Bit 20 - Channel 6 Global interrupt flag

pub fn tcif6(&self) -> TCIF6_R[src]

Bit 21 - Channel 6 Transfer Complete flag

pub fn htif6(&self) -> HTIF6_R[src]

Bit 22 - Channel 6 Half Transfer Complete flag

pub fn teif6(&self) -> TEIF6_R[src]

Bit 23 - Channel 6 Transfer Error flag

pub fn gif7(&self) -> GIF7_R[src]

Bit 24 - Channel 7 Global interrupt flag

pub fn tcif7(&self) -> TCIF7_R[src]

Bit 25 - Channel 7 Transfer Complete flag

pub fn htif7(&self) -> HTIF7_R[src]

Bit 26 - Channel 7 Half Transfer Complete flag

pub fn teif7(&self) -> TEIF7_R[src]

Bit 27 - Channel 7 Transfer Error flag

impl R<bool, CEN_A>[src]

pub fn variant(&self) -> CEN_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, UDIS_A>[src]

pub fn variant(&self) -> UDIS_A[src]

Get enumerated values variant

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

impl R<bool, URS_A>[src]

pub fn variant(&self) -> URS_A[src]

Get enumerated values variant

pub fn is_any_event(&self) -> bool[src]

Checks if the value of the field is ANYEVENT

pub fn is_counter_only(&self) -> bool[src]

Checks if the value of the field is COUNTERONLY

impl R<bool, OPM_A>[src]

pub fn variant(&self) -> OPM_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, DIR_A>[src]

pub fn variant(&self) -> DIR_A[src]

Get enumerated values variant

pub fn is_up(&self) -> bool[src]

Checks if the value of the field is UP

pub fn is_down(&self) -> bool[src]

Checks if the value of the field is DOWN

impl R<u8, CMS_A>[src]

pub fn variant(&self) -> CMS_A[src]

Get enumerated values variant

pub fn is_edge_aligned(&self) -> bool[src]

Checks if the value of the field is EDGEALIGNED

pub fn is_center_aligned1(&self) -> bool[src]

Checks if the value of the field is CENTERALIGNED1

pub fn is_center_aligned2(&self) -> bool[src]

Checks if the value of the field is CENTERALIGNED2

pub fn is_center_aligned3(&self) -> bool[src]

Checks if the value of the field is CENTERALIGNED3

impl R<bool, ARPE_A>[src]

pub fn variant(&self) -> ARPE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u8, CKD_A>[src]

pub fn variant(&self) -> Variant<u8, CKD_A>[src]

Get enumerated values variant

pub fn is_div1(&self) -> bool[src]

Checks if the value of the field is DIV1

pub fn is_div2(&self) -> bool[src]

Checks if the value of the field is DIV2

pub fn is_div4(&self) -> bool[src]

Checks if the value of the field is DIV4

impl R<u32, Reg<u32, _CR1>>[src]

pub fn cen(&self) -> CEN_R[src]

Bit 0 - Counter enable

pub fn udis(&self) -> UDIS_R[src]

Bit 1 - Update disable

pub fn urs(&self) -> URS_R[src]

Bit 2 - Update request source

pub fn opm(&self) -> OPM_R[src]

Bit 3 - One-pulse mode

pub fn dir(&self) -> DIR_R[src]

Bit 4 - Direction

pub fn cms(&self) -> CMS_R[src]

Bits 5:6 - Center-aligned mode selection

pub fn arpe(&self) -> ARPE_R[src]

Bit 7 - Auto-reload preload enable

pub fn ckd(&self) -> CKD_R[src]

Bits 8:9 - Clock division

pub fn uifremap(&self) -> UIFREMAP_R[src]

Bit 11 - UIF status bit remapping

impl R<bool, TI1S_A>[src]

pub fn variant(&self) -> TI1S_A[src]

Get enumerated values variant

pub fn is_normal(&self) -> bool[src]

Checks if the value of the field is NORMAL

pub fn is_xor(&self) -> bool[src]

Checks if the value of the field is XOR

impl R<u8, MMS_A>[src]

pub fn variant(&self) -> MMS_A[src]

Get enumerated values variant

pub fn is_reset(&self) -> bool[src]

Checks if the value of the field is RESET

pub fn is_enable(&self) -> bool[src]

Checks if the value of the field is ENABLE

pub fn is_update(&self) -> bool[src]

Checks if the value of the field is UPDATE

pub fn is_compare_pulse(&self) -> bool[src]

Checks if the value of the field is COMPAREPULSE

pub fn is_compare_oc1(&self) -> bool[src]

Checks if the value of the field is COMPAREOC1

pub fn is_compare_oc2(&self) -> bool[src]

Checks if the value of the field is COMPAREOC2

pub fn is_compare_oc3(&self) -> bool[src]

Checks if the value of the field is COMPAREOC3

pub fn is_compare_oc4(&self) -> bool[src]

Checks if the value of the field is COMPAREOC4

impl R<bool, CCDS_A>[src]

pub fn variant(&self) -> CCDS_A[src]

Get enumerated values variant

pub fn is_on_compare(&self) -> bool[src]

Checks if the value of the field is ONCOMPARE

pub fn is_on_update(&self) -> bool[src]

Checks if the value of the field is ONUPDATE

impl R<u32, Reg<u32, _CR2>>[src]

pub fn ti1s(&self) -> TI1S_R[src]

Bit 7 - TI1 selection

pub fn mms(&self) -> MMS_R[src]

Bits 4:6 - Master mode selection

pub fn ccds(&self) -> CCDS_R[src]

Bit 3 - Capture/compare DMA selection

impl R<u8, SMS_A>[src]

pub fn variant(&self) -> SMS_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_encoder_mode_1(&self) -> bool[src]

Checks if the value of the field is ENCODER_MODE_1

pub fn is_encoder_mode_2(&self) -> bool[src]

Checks if the value of the field is ENCODER_MODE_2

pub fn is_encoder_mode_3(&self) -> bool[src]

Checks if the value of the field is ENCODER_MODE_3

pub fn is_reset_mode(&self) -> bool[src]

Checks if the value of the field is RESET_MODE

pub fn is_gated_mode(&self) -> bool[src]

Checks if the value of the field is GATED_MODE

pub fn is_trigger_mode(&self) -> bool[src]

Checks if the value of the field is TRIGGER_MODE

pub fn is_ext_clock_mode(&self) -> bool[src]

Checks if the value of the field is EXT_CLOCK_MODE

impl R<u8, TS_A>[src]

pub fn variant(&self) -> Variant<u8, TS_A>[src]

Get enumerated values variant

pub fn is_itr0(&self) -> bool[src]

Checks if the value of the field is ITR0

pub fn is_itr1(&self) -> bool[src]

Checks if the value of the field is ITR1

pub fn is_itr2(&self) -> bool[src]

Checks if the value of the field is ITR2

pub fn is_ti1f_ed(&self) -> bool[src]

Checks if the value of the field is TI1F_ED

pub fn is_ti1fp1(&self) -> bool[src]

Checks if the value of the field is TI1FP1

pub fn is_ti2fp2(&self) -> bool[src]

Checks if the value of the field is TI2FP2

pub fn is_etrf(&self) -> bool[src]

Checks if the value of the field is ETRF

impl R<bool, MSM_A>[src]

pub fn variant(&self) -> MSM_A[src]

Get enumerated values variant

pub fn is_no_sync(&self) -> bool[src]

Checks if the value of the field is NOSYNC

pub fn is_sync(&self) -> bool[src]

Checks if the value of the field is SYNC

impl R<u8, ETF_A>[src]

pub fn variant(&self) -> ETF_A[src]

Get enumerated values variant

pub fn is_no_filter(&self) -> bool[src]

Checks if the value of the field is NOFILTER

pub fn is_fck_int_n2(&self) -> bool[src]

Checks if the value of the field is FCK_INT_N2

pub fn is_fck_int_n4(&self) -> bool[src]

Checks if the value of the field is FCK_INT_N4

pub fn is_fck_int_n8(&self) -> bool[src]

Checks if the value of the field is FCK_INT_N8

pub fn is_fdts_div2_n6(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV2_N6

pub fn is_fdts_div2_n8(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV2_N8

pub fn is_fdts_div4_n6(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV4_N6

pub fn is_fdts_div4_n8(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV4_N8

pub fn is_fdts_div8_n6(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV8_N6

pub fn is_fdts_div8_n8(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV8_N8

pub fn is_fdts_div16_n5(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV16_N5

pub fn is_fdts_div16_n6(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV16_N6

pub fn is_fdts_div16_n8(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV16_N8

pub fn is_fdts_div32_n5(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV32_N5

pub fn is_fdts_div32_n6(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV32_N6

pub fn is_fdts_div32_n8(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV32_N8

impl R<u8, ETPS_A>[src]

pub fn variant(&self) -> ETPS_A[src]

Get enumerated values variant

pub fn is_div1(&self) -> bool[src]

Checks if the value of the field is DIV1

pub fn is_div2(&self) -> bool[src]

Checks if the value of the field is DIV2

pub fn is_div4(&self) -> bool[src]

Checks if the value of the field is DIV4

pub fn is_div8(&self) -> bool[src]

Checks if the value of the field is DIV8

impl R<bool, ECE_A>[src]

pub fn variant(&self) -> ECE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, ETP_A>[src]

pub fn variant(&self) -> ETP_A[src]

Get enumerated values variant

pub fn is_not_inverted(&self) -> bool[src]

Checks if the value of the field is NOTINVERTED

pub fn is_inverted(&self) -> bool[src]

Checks if the value of the field is INVERTED

impl R<u32, Reg<u32, _SMCR>>[src]

pub fn sms(&self) -> SMS_R[src]

Bits 0:2 - Slave mode selection

pub fn occs(&self) -> OCCS_R[src]

Bit 3 - OCREF clear selection

pub fn ts(&self) -> TS_R[src]

Bits 4:6 - Trigger selection

pub fn msm(&self) -> MSM_R[src]

Bit 7 - Master/Slave mode

pub fn etf(&self) -> ETF_R[src]

Bits 8:11 - External trigger filter

pub fn etps(&self) -> ETPS_R[src]

Bits 12:13 - External trigger prescaler

pub fn ece(&self) -> ECE_R[src]

Bit 14 - External clock enable

pub fn etp(&self) -> ETP_R[src]

Bit 15 - External trigger polarity

pub fn sms_3(&self) -> SMS_3_R[src]

Bit 16 - Slave mode selection bit3

impl R<bool, TDE_A>[src]

pub fn variant(&self) -> TDE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, CC4DE_A>[src]

pub fn variant(&self) -> CC4DE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, UDE_A>[src]

pub fn variant(&self) -> UDE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, TIE_A>[src]

pub fn variant(&self) -> TIE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, CC4IE_A>[src]

pub fn variant(&self) -> CC4IE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, UIE_A>[src]

pub fn variant(&self) -> UIE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u32, Reg<u32, _DIER>>[src]

pub fn tde(&self) -> TDE_R[src]

Bit 14 - Trigger DMA request enable

pub fn cc4de(&self) -> CC4DE_R[src]

Bit 12 - Capture/Compare 4 DMA request enable

pub fn cc3de(&self) -> CC3DE_R[src]

Bit 11 - Capture/Compare 3 DMA request enable

pub fn cc2de(&self) -> CC2DE_R[src]

Bit 10 - Capture/Compare 2 DMA request enable

pub fn cc1de(&self) -> CC1DE_R[src]

Bit 9 - Capture/Compare 1 DMA request enable

pub fn ude(&self) -> UDE_R[src]

Bit 8 - Update DMA request enable

pub fn tie(&self) -> TIE_R[src]

Bit 6 - Trigger interrupt enable

pub fn cc4ie(&self) -> CC4IE_R[src]

Bit 4 - Capture/Compare 4 interrupt enable

pub fn cc3ie(&self) -> CC3IE_R[src]

Bit 3 - Capture/Compare 3 interrupt enable

pub fn cc2ie(&self) -> CC2IE_R[src]

Bit 2 - Capture/Compare 2 interrupt enable

pub fn cc1ie(&self) -> CC1IE_R[src]

Bit 1 - Capture/Compare 1 interrupt enable

pub fn uie(&self) -> UIE_R[src]

Bit 0 - Update interrupt enable

impl R<bool, CC4OF_A>[src]

pub fn variant(&self) -> Variant<bool, CC4OF_A>[src]

Get enumerated values variant

pub fn is_overcapture(&self) -> bool[src]

Checks if the value of the field is OVERCAPTURE

impl R<bool, TIF_A>[src]

pub fn variant(&self) -> TIF_A[src]

Get enumerated values variant

pub fn is_no_trigger(&self) -> bool[src]

Checks if the value of the field is NOTRIGGER

pub fn is_trigger(&self) -> bool[src]

Checks if the value of the field is TRIGGER

impl R<bool, CC4IF_A>[src]

pub fn variant(&self) -> Variant<bool, CC4IF_A>[src]

Get enumerated values variant

pub fn is_match_(&self) -> bool[src]

Checks if the value of the field is MATCH

impl R<bool, UIF_A>[src]

pub fn variant(&self) -> UIF_A[src]

Get enumerated values variant

pub fn is_clear(&self) -> bool[src]

Checks if the value of the field is CLEAR

pub fn is_update_pending(&self) -> bool[src]

Checks if the value of the field is UPDATEPENDING

impl R<u32, Reg<u32, _SR>>[src]

pub fn cc4of(&self) -> CC4OF_R[src]

Bit 12 - Capture/Compare 4 overcapture flag

pub fn cc3of(&self) -> CC3OF_R[src]

Bit 11 - Capture/Compare 3 overcapture flag

pub fn cc2of(&self) -> CC2OF_R[src]

Bit 10 - Capture/compare 2 overcapture flag

pub fn cc1of(&self) -> CC1OF_R[src]

Bit 9 - Capture/Compare 1 overcapture flag

pub fn tif(&self) -> TIF_R[src]

Bit 6 - Trigger interrupt flag

pub fn cc4if(&self) -> CC4IF_R[src]

Bit 4 - Capture/Compare 4 interrupt flag

pub fn cc3if(&self) -> CC3IF_R[src]

Bit 3 - Capture/Compare 3 interrupt flag

pub fn cc2if(&self) -> CC2IF_R[src]

Bit 2 - Capture/Compare 2 interrupt flag

pub fn cc1if(&self) -> CC1IF_R[src]

Bit 1 - Capture/compare 1 interrupt flag

pub fn uif(&self) -> UIF_R[src]

Bit 0 - Update interrupt flag

impl R<u8, CC1S_A>[src]

pub fn variant(&self) -> Variant<u8, CC1S_A>[src]

Get enumerated values variant

pub fn is_output(&self) -> bool[src]

Checks if the value of the field is OUTPUT

impl R<bool, OC1PE_A>[src]

pub fn variant(&self) -> OC1PE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u8, OC1M_A>[src]

pub fn variant(&self) -> OC1M_A[src]

Get enumerated values variant

pub fn is_frozen(&self) -> bool[src]

Checks if the value of the field is FROZEN

pub fn is_active_on_match(&self) -> bool[src]

Checks if the value of the field is ACTIVEONMATCH

pub fn is_inactive_on_match(&self) -> bool[src]

Checks if the value of the field is INACTIVEONMATCH

pub fn is_toggle(&self) -> bool[src]

Checks if the value of the field is TOGGLE

pub fn is_force_inactive(&self) -> bool[src]

Checks if the value of the field is FORCEINACTIVE

pub fn is_force_active(&self) -> bool[src]

Checks if the value of the field is FORCEACTIVE

pub fn is_pwm_mode1(&self) -> bool[src]

Checks if the value of the field is PWMMODE1

pub fn is_pwm_mode2(&self) -> bool[src]

Checks if the value of the field is PWMMODE2

impl R<u8, CC2S_A>[src]

pub fn variant(&self) -> Variant<u8, CC2S_A>[src]

Get enumerated values variant

pub fn is_output(&self) -> bool[src]

Checks if the value of the field is OUTPUT

impl R<bool, OC2PE_A>[src]

pub fn variant(&self) -> OC2PE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u32, Reg<u32, _CCMR1_OUTPUT>>[src]

pub fn cc1s(&self) -> CC1S_R[src]

Bits 0:1 - Capture/Compare 1 selection

pub fn oc1fe(&self) -> OC1FE_R[src]

Bit 2 - Output compare 1 fast enable

pub fn oc1pe(&self) -> OC1PE_R[src]

Bit 3 - Output compare 1 preload enable

pub fn oc1m(&self) -> OC1M_R[src]

Bits 4:6 - Output compare 1 mode

pub fn oc1ce(&self) -> OC1CE_R[src]

Bit 7 - Output compare 1 clear enable

pub fn cc2s(&self) -> CC2S_R[src]

Bits 8:9 - Capture/Compare 2 selection

pub fn oc2fe(&self) -> OC2FE_R[src]

Bit 10 - Output compare 2 fast enable

pub fn oc2pe(&self) -> OC2PE_R[src]

Bit 11 - Output compare 2 preload enable

pub fn oc2m(&self) -> OC2M_R[src]

Bits 12:14 - Output compare 2 mode

pub fn oc2ce(&self) -> OC2CE_R[src]

Bit 15 - Output compare 2 clear enable

pub fn oc1m_3(&self) -> OC1M_3_R[src]

Bit 16 - Output compare 1 mode bit 3

pub fn oc2m_3(&self) -> OC2M_3_R[src]

Bit 24 - Output compare 2 mode bit 3

impl R<u8, CC2S_A>[src]

pub fn variant(&self) -> Variant<u8, CC2S_A>[src]

Get enumerated values variant

pub fn is_ti2(&self) -> bool[src]

Checks if the value of the field is TI2

pub fn is_ti1(&self) -> bool[src]

Checks if the value of the field is TI1

pub fn is_trc(&self) -> bool[src]

Checks if the value of the field is TRC

impl R<u8, IC1F_A>[src]

pub fn variant(&self) -> IC1F_A[src]

Get enumerated values variant

pub fn is_no_filter(&self) -> bool[src]

Checks if the value of the field is NOFILTER

pub fn is_fck_int_n2(&self) -> bool[src]

Checks if the value of the field is FCK_INT_N2

pub fn is_fck_int_n4(&self) -> bool[src]

Checks if the value of the field is FCK_INT_N4

pub fn is_fck_int_n8(&self) -> bool[src]

Checks if the value of the field is FCK_INT_N8

pub fn is_fdts_div2_n6(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV2_N6

pub fn is_fdts_div2_n8(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV2_N8

pub fn is_fdts_div4_n6(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV4_N6

pub fn is_fdts_div4_n8(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV4_N8

pub fn is_fdts_div8_n6(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV8_N6

pub fn is_fdts_div8_n8(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV8_N8

pub fn is_fdts_div16_n5(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV16_N5

pub fn is_fdts_div16_n6(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV16_N6

pub fn is_fdts_div16_n8(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV16_N8

pub fn is_fdts_div32_n5(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV32_N5

pub fn is_fdts_div32_n6(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV32_N6

pub fn is_fdts_div32_n8(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV32_N8

impl R<u8, CC1S_A>[src]

pub fn variant(&self) -> Variant<u8, CC1S_A>[src]

Get enumerated values variant

pub fn is_ti1(&self) -> bool[src]

Checks if the value of the field is TI1

pub fn is_ti2(&self) -> bool[src]

Checks if the value of the field is TI2

pub fn is_trc(&self) -> bool[src]

Checks if the value of the field is TRC

impl R<u32, Reg<u32, _CCMR1_INPUT>>[src]

pub fn ic2f(&self) -> IC2F_R[src]

Bits 12:15 - Input capture 2 filter

pub fn ic2psc(&self) -> IC2PSC_R[src]

Bits 10:11 - Input capture 2 prescaler

pub fn cc2s(&self) -> CC2S_R[src]

Bits 8:9 - Capture/compare 2 selection

pub fn ic1f(&self) -> IC1F_R[src]

Bits 4:7 - Input capture 1 filter

pub fn ic1psc(&self) -> IC1PSC_R[src]

Bits 2:3 - Input capture 1 prescaler

pub fn cc1s(&self) -> CC1S_R[src]

Bits 0:1 - Capture/Compare 1 selection

impl R<u8, CC3S_A>[src]

pub fn variant(&self) -> Variant<u8, CC3S_A>[src]

Get enumerated values variant

pub fn is_output(&self) -> bool[src]

Checks if the value of the field is OUTPUT

impl R<bool, OC3PE_A>[src]

pub fn variant(&self) -> OC3PE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u8, OC3M_A>[src]

pub fn variant(&self) -> OC3M_A[src]

Get enumerated values variant

pub fn is_frozen(&self) -> bool[src]

Checks if the value of the field is FROZEN

pub fn is_active_on_match(&self) -> bool[src]

Checks if the value of the field is ACTIVEONMATCH

pub fn is_inactive_on_match(&self) -> bool[src]

Checks if the value of the field is INACTIVEONMATCH

pub fn is_toggle(&self) -> bool[src]

Checks if the value of the field is TOGGLE

pub fn is_force_inactive(&self) -> bool[src]

Checks if the value of the field is FORCEINACTIVE

pub fn is_force_active(&self) -> bool[src]

Checks if the value of the field is FORCEACTIVE

pub fn is_pwm_mode1(&self) -> bool[src]

Checks if the value of the field is PWMMODE1

pub fn is_pwm_mode2(&self) -> bool[src]

Checks if the value of the field is PWMMODE2

impl R<u8, CC4S_A>[src]

pub fn variant(&self) -> Variant<u8, CC4S_A>[src]

Get enumerated values variant

pub fn is_output(&self) -> bool[src]

Checks if the value of the field is OUTPUT

impl R<bool, OC4PE_A>[src]

pub fn variant(&self) -> OC4PE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u32, Reg<u32, _CCMR2_OUTPUT>>[src]

pub fn cc3s(&self) -> CC3S_R[src]

Bits 0:1 - Capture/Compare 3 selection

pub fn oc3fe(&self) -> OC3FE_R[src]

Bit 2 - Output compare 3 fast enable

pub fn oc3pe(&self) -> OC3PE_R[src]

Bit 3 - Output compare 3 preload enable

pub fn oc3m(&self) -> OC3M_R[src]

Bits 4:6 - Output compare 3 mode

pub fn oc3ce(&self) -> OC3CE_R[src]

Bit 7 - Output compare 3 clear enable

pub fn cc4s(&self) -> CC4S_R[src]

Bits 8:9 - Capture/Compare 4 selection

pub fn oc4fe(&self) -> OC4FE_R[src]

Bit 10 - Output compare 4 fast enable

pub fn oc4pe(&self) -> OC4PE_R[src]

Bit 11 - Output compare 4 preload enable

pub fn oc4m(&self) -> OC4M_R[src]

Bits 12:14 - Output compare 4 mode

pub fn oc4ce(&self) -> OC4CE_R[src]

Bit 15 - Output compare 4 clear enable

pub fn oc3m_3(&self) -> OC3M_3_R[src]

Bit 16 - Output compare 3 mode bit3

pub fn oc4m_3(&self) -> OC4M_3_R[src]

Bit 24 - Output compare 4 mode bit3

impl R<u8, CC4S_A>[src]

pub fn variant(&self) -> Variant<u8, CC4S_A>[src]

Get enumerated values variant

pub fn is_ti4(&self) -> bool[src]

Checks if the value of the field is TI4

pub fn is_ti3(&self) -> bool[src]

Checks if the value of the field is TI3

pub fn is_trc(&self) -> bool[src]

Checks if the value of the field is TRC

impl R<u8, CC3S_A>[src]

pub fn variant(&self) -> Variant<u8, CC3S_A>[src]

Get enumerated values variant

pub fn is_ti3(&self) -> bool[src]

Checks if the value of the field is TI3

pub fn is_ti4(&self) -> bool[src]

Checks if the value of the field is TI4

pub fn is_trc(&self) -> bool[src]

Checks if the value of the field is TRC

impl R<u32, Reg<u32, _CCMR2_INPUT>>[src]

pub fn ic4f(&self) -> IC4F_R[src]

Bits 12:15 - Input capture 4 filter

pub fn ic4psc(&self) -> IC4PSC_R[src]

Bits 10:11 - Input capture 4 prescaler

pub fn cc4s(&self) -> CC4S_R[src]

Bits 8:9 - Capture/Compare 4 selection

pub fn ic3f(&self) -> IC3F_R[src]

Bits 4:7 - Input capture 3 filter

pub fn ic3psc(&self) -> IC3PSC_R[src]

Bits 2:3 - Input capture 3 prescaler

pub fn cc3s(&self) -> CC3S_R[src]

Bits 0:1 - Capture/Compare 3 selection

impl R<u32, Reg<u32, _CCER>>[src]

pub fn cc1e(&self) -> CC1E_R[src]

Bit 0 - Capture/Compare 1 output enable

pub fn cc1p(&self) -> CC1P_R[src]

Bit 1 - Capture/Compare 1 output Polarity

pub fn cc1np(&self) -> CC1NP_R[src]

Bit 3 - Capture/Compare 1 output Polarity

pub fn cc2e(&self) -> CC2E_R[src]

Bit 4 - Capture/Compare 2 output enable

pub fn cc2p(&self) -> CC2P_R[src]

Bit 5 - Capture/Compare 2 output Polarity

pub fn cc2np(&self) -> CC2NP_R[src]

Bit 7 - Capture/Compare 2 output Polarity

pub fn cc3e(&self) -> CC3E_R[src]

Bit 8 - Capture/Compare 3 output enable

pub fn cc3p(&self) -> CC3P_R[src]

Bit 9 - Capture/Compare 3 output Polarity

pub fn cc3np(&self) -> CC3NP_R[src]

Bit 11 - Capture/Compare 3 output Polarity

pub fn cc4e(&self) -> CC4E_R[src]

Bit 12 - Capture/Compare 4 output enable

pub fn cc4p(&self) -> CC4P_R[src]

Bit 13 - Capture/Compare 3 output Polarity

pub fn cc4np(&self) -> CC4NP_R[src]

Bit 15 - Capture/Compare 3 output Polarity

impl R<u32, Reg<u32, _CNT>>[src]

pub fn cnt(&self) -> CNT_R[src]

Bits 0:31 - Low counter value

impl R<u32, Reg<u32, _PSC>>[src]

pub fn psc(&self) -> PSC_R[src]

Bits 0:15 - Prescaler value

impl R<u32, Reg<u32, _ARR>>[src]

pub fn arr(&self) -> ARR_R[src]

Bits 0:31 - Low Auto-reload value

impl R<u32, Reg<u32, _CCR>>[src]

pub fn ccr(&self) -> CCR_R[src]

Bits 0:31 - Low Capture/Compare 1 value

impl R<u32, Reg<u32, _DCR>>[src]

pub fn dbl(&self) -> DBL_R[src]

Bits 8:12 - DMA burst length

pub fn dba(&self) -> DBA_R[src]

Bits 0:4 - DMA base address

impl R<u32, Reg<u32, _DMAR>>[src]

pub fn dmab(&self) -> DMAB_R[src]

Bits 0:15 - DMA register for burst accesses

impl R<bool, CEN_A>[src]

pub fn variant(&self) -> CEN_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, UDIS_A>[src]

pub fn variant(&self) -> UDIS_A[src]

Get enumerated values variant

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

impl R<bool, URS_A>[src]

pub fn variant(&self) -> URS_A[src]

Get enumerated values variant

pub fn is_any_event(&self) -> bool[src]

Checks if the value of the field is ANYEVENT

pub fn is_counter_only(&self) -> bool[src]

Checks if the value of the field is COUNTERONLY

impl R<bool, ARPE_A>[src]

pub fn variant(&self) -> ARPE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u8, CKD_A>[src]

pub fn variant(&self) -> Variant<u8, CKD_A>[src]

Get enumerated values variant

pub fn is_div1(&self) -> bool[src]

Checks if the value of the field is DIV1

pub fn is_div2(&self) -> bool[src]

Checks if the value of the field is DIV2

pub fn is_div4(&self) -> bool[src]

Checks if the value of the field is DIV4

impl R<u32, Reg<u32, _CR1>>[src]

pub fn cen(&self) -> CEN_R[src]

Bit 0 - Counter enable

pub fn udis(&self) -> UDIS_R[src]

Bit 1 - Update disable

pub fn urs(&self) -> URS_R[src]

Bit 2 - Update request source

pub fn opm(&self) -> OPM_R[src]

Bit 3 - One-pulse mode

pub fn arpe(&self) -> ARPE_R[src]

Bit 7 - Auto-reload preload enable

pub fn ckd(&self) -> CKD_R[src]

Bits 8:9 - Clock division

pub fn uifremap(&self) -> UIFREMAP_R[src]

Bit 11 - UIF status bit remapping

impl R<u32, Reg<u32, _CR2>>[src]

pub fn ccpc(&self) -> CCPC_R[src]

Bit 0 - Capture/compare preloaded control

pub fn ccus(&self) -> CCUS_R[src]

Bit 2 - Capture/compare control update selection

pub fn ccds(&self) -> CCDS_R[src]

Bit 3 - Capture/compare DMA selection

pub fn mms(&self) -> MMS_R[src]

Bits 4:6 - Master mode selection

pub fn ti1s(&self) -> TI1S_R[src]

Bit 7 - TI1 selection

pub fn ois1(&self) -> OIS1_R[src]

Bit 8 - Output Idle state 1

pub fn ois1n(&self) -> OIS1N_R[src]

Bit 9 - Output Idle state 1

pub fn ois2(&self) -> OIS2_R[src]

Bit 10 - Output Idle state 2

impl R<u32, Reg<u32, _SMCR>>[src]

pub fn sms(&self) -> SMS_R[src]

Bits 0:2 - Slave mode selection

pub fn ts(&self) -> TS_R[src]

Bits 4:6 - Trigger selection

pub fn msm(&self) -> MSM_R[src]

Bit 7 - Master/Slave mode

pub fn sms_3(&self) -> SMS_3_R[src]

Bit 16 - Slave mode selection bit 3

impl R<bool, UIE_A>[src]

pub fn variant(&self) -> UIE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u32, Reg<u32, _DIER>>[src]

pub fn uie(&self) -> UIE_R[src]

Bit 0 - Update interrupt enable

pub fn cc1ie(&self) -> CC1IE_R[src]

Bit 1 - Capture/Compare 1 interrupt enable

pub fn cc2ie(&self) -> CC2IE_R[src]

Bit 2 - Capture/Compare 2 interrupt enable

pub fn comie(&self) -> COMIE_R[src]

Bit 5 - COM interrupt enable

pub fn tie(&self) -> TIE_R[src]

Bit 6 - Trigger interrupt enable

pub fn bie(&self) -> BIE_R[src]

Bit 7 - Break interrupt enable

pub fn ude(&self) -> UDE_R[src]

Bit 8 - Update DMA request enable

pub fn cc1de(&self) -> CC1DE_R[src]

Bit 9 - Capture/Compare 1 DMA request enable

pub fn cc2de(&self) -> CC2DE_R[src]

Bit 10 - Capture/Compare 2 DMA request enable

pub fn comde(&self) -> COMDE_R[src]

Bit 13 - COM DMA request enable

pub fn tde(&self) -> TDE_R[src]

Bit 14 - Trigger DMA request enable

impl R<bool, UIF_A>[src]

pub fn variant(&self) -> UIF_A[src]

Get enumerated values variant

pub fn is_clear(&self) -> bool[src]

Checks if the value of the field is CLEAR

pub fn is_update_pending(&self) -> bool[src]

Checks if the value of the field is UPDATEPENDING

impl R<u32, Reg<u32, _SR>>[src]

pub fn cc2of(&self) -> CC2OF_R[src]

Bit 10 - Capture/compare 2 overcapture flag

pub fn cc1of(&self) -> CC1OF_R[src]

Bit 9 - Capture/Compare 1 overcapture flag

pub fn bif(&self) -> BIF_R[src]

Bit 7 - Break interrupt flag

pub fn tif(&self) -> TIF_R[src]

Bit 6 - Trigger interrupt flag

pub fn comif(&self) -> COMIF_R[src]

Bit 5 - COM interrupt flag

pub fn cc2if(&self) -> CC2IF_R[src]

Bit 2 - Capture/Compare 2 interrupt flag

pub fn cc1if(&self) -> CC1IF_R[src]

Bit 1 - Capture/compare 1 interrupt flag

pub fn uif(&self) -> UIF_R[src]

Bit 0 - Update interrupt flag

impl R<u32, Reg<u32, _CCMR1_OUTPUT>>[src]

pub fn cc1s(&self) -> CC1S_R[src]

Bits 0:1 - Capture/Compare 1 selection

pub fn oc1fe(&self) -> OC1FE_R[src]

Bit 2 - Output Compare 1 fast enable

pub fn oc1pe(&self) -> OC1PE_R[src]

Bit 3 - Output Compare 1 preload enable

pub fn oc1m(&self) -> OC1M_R[src]

Bits 4:6 - Output Compare 1 mode

pub fn cc2s(&self) -> CC2S_R[src]

Bits 8:9 - Capture/Compare 2 selection

pub fn oc2fe(&self) -> OC2FE_R[src]

Bit 10 - Output Compare 2 fast enable

pub fn oc2pe(&self) -> OC2PE_R[src]

Bit 11 - Output Compare 2 preload enable

pub fn oc2m(&self) -> OC2M_R[src]

Bits 12:14 - Output Compare 2 mode

pub fn oc1m_3(&self) -> OC1M_3_R[src]

Bit 16 - Output Compare 1 mode bit 3

pub fn oc2m_3(&self) -> OC2M_3_R[src]

Bit 24 - Output Compare 2 mode bit 3

impl R<u32, Reg<u32, _CCMR1_INPUT>>[src]

pub fn ic2f(&self) -> IC2F_R[src]

Bits 12:15 - Input capture 2 filter

pub fn ic2psc(&self) -> IC2PSC_R[src]

Bits 10:11 - Input capture 2 prescaler

pub fn cc2s(&self) -> CC2S_R[src]

Bits 8:9 - Capture/Compare 2 selection

pub fn ic1f(&self) -> IC1F_R[src]

Bits 4:7 - Input capture 1 filter

pub fn ic1psc(&self) -> IC1PSC_R[src]

Bits 2:3 - Input capture 1 prescaler

pub fn cc1s(&self) -> CC1S_R[src]

Bits 0:1 - Capture/Compare 1 selection

impl R<u32, Reg<u32, _CCER>>[src]

pub fn cc2np(&self) -> CC2NP_R[src]

Bit 7 - Capture/Compare 2 output Polarity

pub fn cc2p(&self) -> CC2P_R[src]

Bit 5 - Capture/Compare 2 output Polarity

pub fn cc2e(&self) -> CC2E_R[src]

Bit 4 - Capture/Compare 2 output enable

pub fn cc1np(&self) -> CC1NP_R[src]

Bit 3 - Capture/Compare 1 output Polarity

pub fn cc1ne(&self) -> CC1NE_R[src]

Bit 2 - Capture/Compare 1 complementary output enable

pub fn cc1p(&self) -> CC1P_R[src]

Bit 1 - Capture/Compare 1 output Polarity

pub fn cc1e(&self) -> CC1E_R[src]

Bit 0 - Capture/Compare 1 output enable

impl R<u32, Reg<u32, _CNT>>[src]

pub fn cnt(&self) -> CNT_R[src]

Bits 0:15 - counter value

pub fn uifcpy(&self) -> UIFCPY_R[src]

Bit 31 - UIF copy

impl R<u32, Reg<u32, _PSC>>[src]

pub fn psc(&self) -> PSC_R[src]

Bits 0:15 - Prescaler value

impl R<u32, Reg<u32, _ARR>>[src]

pub fn arr(&self) -> ARR_R[src]

Bits 0:15 - Auto-reload value

impl R<u32, Reg<u32, _RCR>>[src]

pub fn rep(&self) -> REP_R[src]

Bits 0:7 - Repetition counter value

impl R<u32, Reg<u32, _CCR1>>[src]

pub fn ccr1(&self) -> CCR1_R[src]

Bits 0:15 - Capture/Compare 1 value

impl R<u32, Reg<u32, _CCR2>>[src]

pub fn ccr2(&self) -> CCR2_R[src]

Bits 0:15 - Capture/Compare 2 value

impl R<u32, Reg<u32, _BDTR>>[src]

pub fn moe(&self) -> MOE_R[src]

Bit 15 - Main output enable

pub fn aoe(&self) -> AOE_R[src]

Bit 14 - Automatic output enable

pub fn bkp(&self) -> BKP_R[src]

Bit 13 - Break polarity

pub fn bke(&self) -> BKE_R[src]

Bit 12 - Break enable

pub fn ossr(&self) -> OSSR_R[src]

Bit 11 - Off-state selection for Run mode

pub fn ossi(&self) -> OSSI_R[src]

Bit 10 - Off-state selection for Idle mode

pub fn lock(&self) -> LOCK_R[src]

Bits 8:9 - Lock configuration

pub fn dtg(&self) -> DTG_R[src]

Bits 0:7 - Dead-time generator setup

pub fn bkf(&self) -> BKF_R[src]

Bits 16:19 - Break filter

impl R<u32, Reg<u32, _DCR>>[src]

pub fn dbl(&self) -> DBL_R[src]

Bits 8:12 - DMA burst length

pub fn dba(&self) -> DBA_R[src]

Bits 0:4 - DMA base address

impl R<u32, Reg<u32, _DMAR>>[src]

pub fn dmab(&self) -> DMAB_R[src]

Bits 0:15 - DMA register for burst accesses

impl R<bool, CEN_A>[src]

pub fn variant(&self) -> CEN_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, UDIS_A>[src]

pub fn variant(&self) -> UDIS_A[src]

Get enumerated values variant

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

impl R<bool, URS_A>[src]

pub fn variant(&self) -> URS_A[src]

Get enumerated values variant

pub fn is_any_event(&self) -> bool[src]

Checks if the value of the field is ANYEVENT

pub fn is_counter_only(&self) -> bool[src]

Checks if the value of the field is COUNTERONLY

impl R<bool, OPM_A>[src]

pub fn variant(&self) -> OPM_A[src]

Get enumerated values variant

pub fn is_not_stopped(&self) -> bool[src]

Checks if the value of the field is NOTSTOPPED

pub fn is_stopped(&self) -> bool[src]

Checks if the value of the field is STOPPED

impl R<bool, ARPE_A>[src]

pub fn variant(&self) -> ARPE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u8, CKD_A>[src]

pub fn variant(&self) -> Variant<u8, CKD_A>[src]

Get enumerated values variant

pub fn is_div1(&self) -> bool[src]

Checks if the value of the field is DIV1

pub fn is_div2(&self) -> bool[src]

Checks if the value of the field is DIV2

pub fn is_div4(&self) -> bool[src]

Checks if the value of the field is DIV4

impl R<u32, Reg<u32, _CR1>>[src]

pub fn cen(&self) -> CEN_R[src]

Bit 0 - Counter enable

pub fn udis(&self) -> UDIS_R[src]

Bit 1 - Update disable

pub fn urs(&self) -> URS_R[src]

Bit 2 - Update request source

pub fn opm(&self) -> OPM_R[src]

Bit 3 - One-pulse mode

pub fn arpe(&self) -> ARPE_R[src]

Bit 7 - Auto-reload preload enable

pub fn ckd(&self) -> CKD_R[src]

Bits 8:9 - Clock division

pub fn uifremap(&self) -> UIFREMAP_R[src]

Bit 11 - UIF status bit remapping

impl R<bool, OIS1N_A>[src]

pub fn variant(&self) -> OIS1N_A[src]

Get enumerated values variant

pub fn is_low(&self) -> bool[src]

Checks if the value of the field is LOW

pub fn is_high(&self) -> bool[src]

Checks if the value of the field is HIGH

impl R<bool, OIS1_A>[src]

pub fn variant(&self) -> OIS1_A[src]

Get enumerated values variant

pub fn is_low(&self) -> bool[src]

Checks if the value of the field is LOW

pub fn is_high(&self) -> bool[src]

Checks if the value of the field is HIGH

impl R<bool, CCDS_A>[src]

pub fn variant(&self) -> CCDS_A[src]

Get enumerated values variant

pub fn is_on_compare(&self) -> bool[src]

Checks if the value of the field is ONCOMPARE

pub fn is_on_update(&self) -> bool[src]

Checks if the value of the field is ONUPDATE

impl R<bool, CCUS_A>[src]

pub fn variant(&self) -> CCUS_A[src]

Get enumerated values variant

pub fn is_default(&self) -> bool[src]

Checks if the value of the field is DEFAULT

pub fn is_with_rising_edge(&self) -> bool[src]

Checks if the value of the field is WITHRISINGEDGE

impl R<bool, CCPC_A>[src]

pub fn variant(&self) -> CCPC_A[src]

Get enumerated values variant

pub fn is_not_preloaded(&self) -> bool[src]

Checks if the value of the field is NOTPRELOADED

pub fn is_preloaded(&self) -> bool[src]

Checks if the value of the field is PRELOADED

impl R<u32, Reg<u32, _CR2>>[src]

pub fn ois1n(&self) -> OIS1N_R[src]

Bit 9 - Output Idle state 1

pub fn ois1(&self) -> OIS1_R[src]

Bit 8 - Output Idle state 1

pub fn ccds(&self) -> CCDS_R[src]

Bit 3 - Capture/compare DMA selection

pub fn ccus(&self) -> CCUS_R[src]

Bit 2 - Capture/compare control update selection

pub fn ccpc(&self) -> CCPC_R[src]

Bit 0 - Capture/compare preloaded control

impl R<bool, UIE_A>[src]

pub fn variant(&self) -> UIE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, CC1IE_A>[src]

pub fn variant(&self) -> CC1IE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, COMIE_A>[src]

pub fn variant(&self) -> COMIE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, BIE_A>[src]

pub fn variant(&self) -> BIE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, CC1DE_A>[src]

pub fn variant(&self) -> CC1DE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u32, Reg<u32, _DIER>>[src]

pub fn uie(&self) -> UIE_R[src]

Bit 0 - Update interrupt enable

pub fn cc1ie(&self) -> CC1IE_R[src]

Bit 1 - Capture/Compare 1 interrupt enable

pub fn comie(&self) -> COMIE_R[src]

Bit 5 - COM interrupt enable

pub fn tie(&self) -> TIE_R[src]

Bit 6 - Trigger interrupt enable

pub fn bie(&self) -> BIE_R[src]

Bit 7 - Break interrupt enable

pub fn ude(&self) -> UDE_R[src]

Bit 8 - Update DMA request enable

pub fn cc1de(&self) -> CC1DE_R[src]

Bit 9 - Capture/Compare 1 DMA request enable

pub fn comde(&self) -> COMDE_R[src]

Bit 13 - COM DMA request enable

pub fn tde(&self) -> TDE_R[src]

Bit 14 - Trigger DMA request enable

impl R<bool, UIF_A>[src]

pub fn variant(&self) -> UIF_A[src]

Get enumerated values variant

pub fn is_clear(&self) -> bool[src]

Checks if the value of the field is CLEAR

pub fn is_update_pending(&self) -> bool[src]

Checks if the value of the field is UPDATEPENDING

impl R<u32, Reg<u32, _SR>>[src]

pub fn cc1of(&self) -> CC1OF_R[src]

Bit 9 - Capture/Compare 1 overcapture flag

pub fn bif(&self) -> BIF_R[src]

Bit 7 - Break interrupt flag

pub fn tif(&self) -> TIF_R[src]

Bit 6 - Trigger interrupt flag

pub fn comif(&self) -> COMIF_R[src]

Bit 5 - COM interrupt flag

pub fn cc1if(&self) -> CC1IF_R[src]

Bit 1 - Capture/compare 1 interrupt flag

pub fn uif(&self) -> UIF_R[src]

Bit 0 - Update interrupt flag

impl R<u32, Reg<u32, _CCMR1_OUTPUT>>[src]

pub fn cc1s(&self) -> CC1S_R[src]

Bits 0:1 - Capture/Compare 1 selection

pub fn oc1fe(&self) -> OC1FE_R[src]

Bit 2 - Output Compare 1 fast enable

pub fn oc1pe(&self) -> OC1PE_R[src]

Bit 3 - Output Compare 1 preload enable

pub fn oc1m(&self) -> OC1M_R[src]

Bits 4:6 - Output Compare 1 mode

pub fn oc1m_3(&self) -> OC1M_3_R[src]

Bit 16 - Output Compare 1 mode

impl R<u32, Reg<u32, _CCMR1_INPUT>>[src]

pub fn ic1f(&self) -> IC1F_R[src]

Bits 4:7 - Input capture 1 filter

pub fn ic1psc(&self) -> IC1PSC_R[src]

Bits 2:3 - Input capture 1 prescaler

pub fn cc1s(&self) -> CC1S_R[src]

Bits 0:1 - Capture/Compare 1 selection

impl R<u32, Reg<u32, _CCER>>[src]

pub fn cc1np(&self) -> CC1NP_R[src]

Bit 3 - Capture/Compare 1 output Polarity

pub fn cc1ne(&self) -> CC1NE_R[src]

Bit 2 - Capture/Compare 1 complementary output enable

pub fn cc1p(&self) -> CC1P_R[src]

Bit 1 - Capture/Compare 1 output Polarity

pub fn cc1e(&self) -> CC1E_R[src]

Bit 0 - Capture/Compare 1 output enable

impl R<u32, Reg<u32, _CNT>>[src]

pub fn cnt(&self) -> CNT_R[src]

Bits 0:15 - counter value

pub fn uifcpy(&self) -> UIFCPY_R[src]

Bit 31 - UIF Copy

impl R<u32, Reg<u32, _PSC>>[src]

pub fn psc(&self) -> PSC_R[src]

Bits 0:15 - Prescaler value

impl R<u32, Reg<u32, _ARR>>[src]

pub fn arr(&self) -> ARR_R[src]

Bits 0:15 - Auto-reload value

impl R<u32, Reg<u32, _RCR>>[src]

pub fn rep(&self) -> REP_R[src]

Bits 0:7 - Repetition counter value

impl R<u32, Reg<u32, _CCR1>>[src]

pub fn ccr1(&self) -> CCR1_R[src]

Bits 0:15 - Capture/Compare 1 value

impl R<u32, Reg<u32, _BDTR>>[src]

pub fn dtg(&self) -> DTG_R[src]

Bits 0:7 - Dead-time generator setup

pub fn lock(&self) -> LOCK_R[src]

Bits 8:9 - Lock configuration

pub fn ossi(&self) -> OSSI_R[src]

Bit 10 - Off-state selection for Idle mode

pub fn ossr(&self) -> OSSR_R[src]

Bit 11 - Off-state selection for Run mode

pub fn bke(&self) -> BKE_R[src]

Bit 12 - Break enable

pub fn bkp(&self) -> BKP_R[src]

Bit 13 - Break polarity

pub fn aoe(&self) -> AOE_R[src]

Bit 14 - Automatic output enable

pub fn moe(&self) -> MOE_R[src]

Bit 15 - Main output enable

pub fn bkf(&self) -> BKF_R[src]

Bits 16:19 - Break filter

impl R<u32, Reg<u32, _DCR>>[src]

pub fn dbl(&self) -> DBL_R[src]

Bits 8:12 - DMA burst length

pub fn dba(&self) -> DBA_R[src]

Bits 0:4 - DMA base address

impl R<u32, Reg<u32, _DMAR>>[src]

pub fn dmab(&self) -> DMAB_R[src]

Bits 0:15 - DMA register for burst accesses

impl R<bool, CEN_A>[src]

pub fn variant(&self) -> CEN_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, UDIS_A>[src]

pub fn variant(&self) -> UDIS_A[src]

Get enumerated values variant

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

impl R<bool, URS_A>[src]

pub fn variant(&self) -> URS_A[src]

Get enumerated values variant

pub fn is_any_event(&self) -> bool[src]

Checks if the value of the field is ANYEVENT

pub fn is_counter_only(&self) -> bool[src]

Checks if the value of the field is COUNTERONLY

impl R<bool, ARPE_A>[src]

pub fn variant(&self) -> ARPE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u8, CKD_A>[src]

pub fn variant(&self) -> Variant<u8, CKD_A>[src]

Get enumerated values variant

pub fn is_div1(&self) -> bool[src]

Checks if the value of the field is DIV1

pub fn is_div2(&self) -> bool[src]

Checks if the value of the field is DIV2

pub fn is_div4(&self) -> bool[src]

Checks if the value of the field is DIV4

impl R<u32, Reg<u32, _CR1>>[src]

pub fn cen(&self) -> CEN_R[src]

Bit 0 - Counter enable

pub fn udis(&self) -> UDIS_R[src]

Bit 1 - Update disable

pub fn urs(&self) -> URS_R[src]

Bit 2 - Update request source

pub fn opm(&self) -> OPM_R[src]

Bit 3 - One-pulse mode

pub fn arpe(&self) -> ARPE_R[src]

Bit 7 - Auto-reload preload enable

pub fn ckd(&self) -> CKD_R[src]

Bits 8:9 - Clock division

pub fn uifremap(&self) -> UIFREMAP_R[src]

Bit 11 - UIF status bit remapping

impl R<u32, Reg<u32, _CR2>>[src]

pub fn ois1n(&self) -> OIS1N_R[src]

Bit 9 - Output Idle state 1

pub fn ois1(&self) -> OIS1_R[src]

Bit 8 - Output Idle state 1

pub fn ccds(&self) -> CCDS_R[src]

Bit 3 - Capture/compare DMA selection

pub fn ccus(&self) -> CCUS_R[src]

Bit 2 - Capture/compare control update selection

pub fn ccpc(&self) -> CCPC_R[src]

Bit 0 - Capture/compare preloaded control

impl R<bool, UIE_A>[src]

pub fn variant(&self) -> UIE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u32, Reg<u32, _DIER>>[src]

pub fn uie(&self) -> UIE_R[src]

Bit 0 - Update interrupt enable

pub fn cc1ie(&self) -> CC1IE_R[src]

Bit 1 - Capture/Compare 1 interrupt enable

pub fn comie(&self) -> COMIE_R[src]

Bit 5 - COM interrupt enable

pub fn tie(&self) -> TIE_R[src]

Bit 6 - Trigger interrupt enable

pub fn bie(&self) -> BIE_R[src]

Bit 7 - Break interrupt enable

pub fn ude(&self) -> UDE_R[src]

Bit 8 - Update DMA request enable

pub fn cc1de(&self) -> CC1DE_R[src]

Bit 9 - Capture/Compare 1 DMA request enable

pub fn comde(&self) -> COMDE_R[src]

Bit 13 - COM DMA request enable

pub fn tde(&self) -> TDE_R[src]

Bit 14 - Trigger DMA request enable

impl R<bool, UIF_A>[src]

pub fn variant(&self) -> UIF_A[src]

Get enumerated values variant

pub fn is_clear(&self) -> bool[src]

Checks if the value of the field is CLEAR

pub fn is_update_pending(&self) -> bool[src]

Checks if the value of the field is UPDATEPENDING

impl R<u32, Reg<u32, _SR>>[src]

pub fn cc1of(&self) -> CC1OF_R[src]

Bit 9 - Capture/Compare 1 overcapture flag

pub fn bif(&self) -> BIF_R[src]

Bit 7 - Break interrupt flag

pub fn tif(&self) -> TIF_R[src]

Bit 6 - Trigger interrupt flag

pub fn comif(&self) -> COMIF_R[src]

Bit 5 - COM interrupt flag

pub fn cc1if(&self) -> CC1IF_R[src]

Bit 1 - Capture/compare 1 interrupt flag

pub fn uif(&self) -> UIF_R[src]

Bit 0 - Update interrupt flag

impl R<u32, Reg<u32, _CCMR1_OUTPUT>>[src]

pub fn cc1s(&self) -> CC1S_R[src]

Bits 0:1 - Capture/Compare 1 selection

pub fn oc1fe(&self) -> OC1FE_R[src]

Bit 2 - Output Compare 1 fast enable

pub fn oc1pe(&self) -> OC1PE_R[src]

Bit 3 - Output Compare 1 preload enable

pub fn oc1m(&self) -> OC1M_R[src]

Bits 4:6 - Output Compare 1 mode

pub fn oc1m_3(&self) -> OC1M_3_R[src]

Bit 16 - Output Compare 1 mode

impl R<u32, Reg<u32, _CCMR1_INPUT>>[src]

pub fn ic1f(&self) -> IC1F_R[src]

Bits 4:7 - Input capture 1 filter

pub fn ic1psc(&self) -> IC1PSC_R[src]

Bits 2:3 - Input capture 1 prescaler

pub fn cc1s(&self) -> CC1S_R[src]

Bits 0:1 - Capture/Compare 1 selection

impl R<u32, Reg<u32, _CCER>>[src]

pub fn cc1np(&self) -> CC1NP_R[src]

Bit 3 - Capture/Compare 1 output Polarity

pub fn cc1ne(&self) -> CC1NE_R[src]

Bit 2 - Capture/Compare 1 complementary output enable

pub fn cc1p(&self) -> CC1P_R[src]

Bit 1 - Capture/Compare 1 output Polarity

pub fn cc1e(&self) -> CC1E_R[src]

Bit 0 - Capture/Compare 1 output enable

impl R<u32, Reg<u32, _CNT>>[src]

pub fn cnt(&self) -> CNT_R[src]

Bits 0:15 - counter value

pub fn uifcpy(&self) -> UIFCPY_R[src]

Bit 31 - UIF Copy

impl R<u32, Reg<u32, _PSC>>[src]

pub fn psc(&self) -> PSC_R[src]

Bits 0:15 - Prescaler value

impl R<u32, Reg<u32, _ARR>>[src]

pub fn arr(&self) -> ARR_R[src]

Bits 0:15 - Auto-reload value

impl R<u32, Reg<u32, _RCR>>[src]

pub fn rep(&self) -> REP_R[src]

Bits 0:7 - Repetition counter value

impl R<u32, Reg<u32, _CCR1>>[src]

pub fn ccr1(&self) -> CCR1_R[src]

Bits 0:15 - Capture/Compare 1 value

impl R<u32, Reg<u32, _BDTR>>[src]

pub fn dtg(&self) -> DTG_R[src]

Bits 0:7 - Dead-time generator setup

pub fn lock(&self) -> LOCK_R[src]

Bits 8:9 - Lock configuration

pub fn ossi(&self) -> OSSI_R[src]

Bit 10 - Off-state selection for Idle mode

pub fn ossr(&self) -> OSSR_R[src]

Bit 11 - Off-state selection for Run mode

pub fn bke(&self) -> BKE_R[src]

Bit 12 - Break enable

pub fn bkp(&self) -> BKP_R[src]

Bit 13 - Break polarity

pub fn aoe(&self) -> AOE_R[src]

Bit 14 - Automatic output enable

pub fn moe(&self) -> MOE_R[src]

Bit 15 - Main output enable

pub fn bkf(&self) -> BKF_R[src]

Bits 16:19 - Break filter

impl R<u32, Reg<u32, _DCR>>[src]

pub fn dbl(&self) -> DBL_R[src]

Bits 8:12 - DMA burst length

pub fn dba(&self) -> DBA_R[src]

Bits 0:4 - DMA base address

impl R<u32, Reg<u32, _DMAR>>[src]

pub fn dmab(&self) -> DMAB_R[src]

Bits 0:15 - DMA register for burst accesses

impl R<bool, EOBIE_A>[src]

pub fn variant(&self) -> EOBIE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, RTOIE_A>[src]

pub fn variant(&self) -> RTOIE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, OVER8_A>[src]

pub fn variant(&self) -> OVER8_A[src]

Get enumerated values variant

pub fn is_oversampling16(&self) -> bool[src]

Checks if the value of the field is OVERSAMPLING16

pub fn is_oversampling8(&self) -> bool[src]

Checks if the value of the field is OVERSAMPLING8

impl R<bool, CMIE_A>[src]

pub fn variant(&self) -> CMIE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, MME_A>[src]

pub fn variant(&self) -> MME_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, M_A>[src]

pub fn variant(&self) -> M_A[src]

Get enumerated values variant

pub fn is_bit8(&self) -> bool[src]

Checks if the value of the field is BIT8

pub fn is_bit9(&self) -> bool[src]

Checks if the value of the field is BIT9

impl R<bool, WAKE_A>[src]

pub fn variant(&self) -> WAKE_A[src]

Get enumerated values variant

pub fn is_idle(&self) -> bool[src]

Checks if the value of the field is IDLE

pub fn is_address(&self) -> bool[src]

Checks if the value of the field is ADDRESS

impl R<bool, PCE_A>[src]

pub fn variant(&self) -> PCE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, PS_A>[src]

pub fn variant(&self) -> PS_A[src]

Get enumerated values variant

pub fn is_even(&self) -> bool[src]

Checks if the value of the field is EVEN

pub fn is_odd(&self) -> bool[src]

Checks if the value of the field is ODD

impl R<bool, PEIE_A>[src]

pub fn variant(&self) -> PEIE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, TXEIE_A>[src]

pub fn variant(&self) -> TXEIE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, TCIE_A>[src]

pub fn variant(&self) -> TCIE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, RXNEIE_A>[src]

pub fn variant(&self) -> RXNEIE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, IDLEIE_A>[src]

pub fn variant(&self) -> IDLEIE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, TE_A>[src]

pub fn variant(&self) -> TE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, RE_A>[src]

pub fn variant(&self) -> RE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, UESM_A>[src]

pub fn variant(&self) -> UESM_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, UE_A>[src]

pub fn variant(&self) -> UE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u32, Reg<u32, _CR1>>[src]

pub fn eobie(&self) -> EOBIE_R[src]

Bit 27 - End of Block interrupt enable

pub fn rtoie(&self) -> RTOIE_R[src]

Bit 26 - Receiver timeout interrupt enable

pub fn deat(&self) -> DEAT_R[src]

Bits 21:25 - Driver Enable assertion time

pub fn dedt(&self) -> DEDT_R[src]

Bits 16:20 - Driver Enable deassertion time

pub fn over8(&self) -> OVER8_R[src]

Bit 15 - Oversampling mode

pub fn cmie(&self) -> CMIE_R[src]

Bit 14 - Character match interrupt enable

pub fn mme(&self) -> MME_R[src]

Bit 13 - Mute mode enable

pub fn m(&self) -> M_R[src]

Bit 12 - Word length

pub fn wake(&self) -> WAKE_R[src]

Bit 11 - Receiver wakeup method

pub fn pce(&self) -> PCE_R[src]

Bit 10 - Parity control enable

pub fn ps(&self) -> PS_R[src]

Bit 9 - Parity selection

pub fn peie(&self) -> PEIE_R[src]

Bit 8 - PE interrupt enable

pub fn txeie(&self) -> TXEIE_R[src]

Bit 7 - interrupt enable

pub fn tcie(&self) -> TCIE_R[src]

Bit 6 - Transmission complete interrupt enable

pub fn rxneie(&self) -> RXNEIE_R[src]

Bit 5 - RXNE interrupt enable

pub fn idleie(&self) -> IDLEIE_R[src]

Bit 4 - IDLE interrupt enable

pub fn te(&self) -> TE_R[src]

Bit 3 - Transmitter enable

pub fn re(&self) -> RE_R[src]

Bit 2 - Receiver enable

pub fn uesm(&self) -> UESM_R[src]

Bit 1 - USART enable in Stop mode

pub fn ue(&self) -> UE_R[src]

Bit 0 - USART enable

impl R<bool, RTOEN_A>[src]

pub fn variant(&self) -> RTOEN_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u8, ABRMOD_A>[src]

pub fn variant(&self) -> ABRMOD_A[src]

Get enumerated values variant

pub fn is_start(&self) -> bool[src]

Checks if the value of the field is START

pub fn is_edge(&self) -> bool[src]

Checks if the value of the field is EDGE

pub fn is_frame7f(&self) -> bool[src]

Checks if the value of the field is FRAME7F

pub fn is_frame55(&self) -> bool[src]

Checks if the value of the field is FRAME55

impl R<bool, ABREN_A>[src]

pub fn variant(&self) -> ABREN_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, MSBFIRST_A>[src]

pub fn variant(&self) -> MSBFIRST_A[src]

Get enumerated values variant

pub fn is_lsb(&self) -> bool[src]

Checks if the value of the field is LSB

pub fn is_msb(&self) -> bool[src]

Checks if the value of the field is MSB

impl R<bool, DATAINV_A>[src]

pub fn variant(&self) -> DATAINV_A[src]

Get enumerated values variant

pub fn is_positive(&self) -> bool[src]

Checks if the value of the field is POSITIVE

pub fn is_negative(&self) -> bool[src]

Checks if the value of the field is NEGATIVE

impl R<bool, TXINV_A>[src]

pub fn variant(&self) -> TXINV_A[src]

Get enumerated values variant

pub fn is_standard(&self) -> bool[src]

Checks if the value of the field is STANDARD

pub fn is_inverted(&self) -> bool[src]

Checks if the value of the field is INVERTED

impl R<bool, RXINV_A>[src]

pub fn variant(&self) -> RXINV_A[src]

Get enumerated values variant

pub fn is_standard(&self) -> bool[src]

Checks if the value of the field is STANDARD

pub fn is_inverted(&self) -> bool[src]

Checks if the value of the field is INVERTED

impl R<bool, SWAP_A>[src]

pub fn variant(&self) -> SWAP_A[src]

Get enumerated values variant

pub fn is_standard(&self) -> bool[src]

Checks if the value of the field is STANDARD

pub fn is_swapped(&self) -> bool[src]

Checks if the value of the field is SWAPPED

impl R<bool, LINEN_A>[src]

pub fn variant(&self) -> LINEN_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u8, STOP_A>[src]

pub fn variant(&self) -> STOP_A[src]

Get enumerated values variant

pub fn is_stop1(&self) -> bool[src]

Checks if the value of the field is STOP1

pub fn is_stop0p5(&self) -> bool[src]

Checks if the value of the field is STOP0P5

pub fn is_stop2(&self) -> bool[src]

Checks if the value of the field is STOP2

pub fn is_stop1p5(&self) -> bool[src]

Checks if the value of the field is STOP1P5

impl R<bool, CLKEN_A>[src]

pub fn variant(&self) -> CLKEN_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, CPOL_A>[src]

pub fn variant(&self) -> CPOL_A[src]

Get enumerated values variant

pub fn is_low(&self) -> bool[src]

Checks if the value of the field is LOW

pub fn is_high(&self) -> bool[src]

Checks if the value of the field is HIGH

impl R<bool, CPHA_A>[src]

pub fn variant(&self) -> CPHA_A[src]

Get enumerated values variant

pub fn is_first(&self) -> bool[src]

Checks if the value of the field is FIRST

pub fn is_second(&self) -> bool[src]

Checks if the value of the field is SECOND

impl R<bool, LBCL_A>[src]

pub fn variant(&self) -> LBCL_A[src]

Get enumerated values variant

pub fn is_not_output(&self) -> bool[src]

Checks if the value of the field is NOTOUTPUT

pub fn is_output(&self) -> bool[src]

Checks if the value of the field is OUTPUT

impl R<bool, LBDIE_A>[src]

pub fn variant(&self) -> LBDIE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, LBDL_A>[src]

pub fn variant(&self) -> LBDL_A[src]

Get enumerated values variant

pub fn is_bit10(&self) -> bool[src]

Checks if the value of the field is BIT10

pub fn is_bit11(&self) -> bool[src]

Checks if the value of the field is BIT11

impl R<bool, ADDM7_A>[src]

pub fn variant(&self) -> ADDM7_A[src]

Get enumerated values variant

pub fn is_bit4(&self) -> bool[src]

Checks if the value of the field is BIT4

pub fn is_bit7(&self) -> bool[src]

Checks if the value of the field is BIT7

impl R<u32, Reg<u32, _CR2>>[src]

pub fn rtoen(&self) -> RTOEN_R[src]

Bit 23 - Receiver timeout enable

pub fn abrmod(&self) -> ABRMOD_R[src]

Bits 21:22 - Auto baud rate mode

pub fn abren(&self) -> ABREN_R[src]

Bit 20 - Auto baud rate enable

pub fn msbfirst(&self) -> MSBFIRST_R[src]

Bit 19 - Most significant bit first

pub fn datainv(&self) -> DATAINV_R[src]

Bit 18 - Binary data inversion

pub fn txinv(&self) -> TXINV_R[src]

Bit 17 - TX pin active level inversion

pub fn rxinv(&self) -> RXINV_R[src]

Bit 16 - RX pin active level inversion

pub fn swap(&self) -> SWAP_R[src]

Bit 15 - Swap TX/RX pins

pub fn linen(&self) -> LINEN_R[src]

Bit 14 - LIN mode enable

pub fn stop(&self) -> STOP_R[src]

Bits 12:13 - STOP bits

pub fn clken(&self) -> CLKEN_R[src]

Bit 11 - Clock enable

pub fn cpol(&self) -> CPOL_R[src]

Bit 10 - Clock polarity

pub fn cpha(&self) -> CPHA_R[src]

Bit 9 - Clock phase

pub fn lbcl(&self) -> LBCL_R[src]

Bit 8 - Last bit clock pulse

pub fn lbdie(&self) -> LBDIE_R[src]

Bit 6 - LIN break detection interrupt enable

pub fn lbdl(&self) -> LBDL_R[src]

Bit 5 - LIN break detection length

pub fn addm7(&self) -> ADDM7_R[src]

Bit 4 - 7-bit Address Detection/4-bit Address Detection

pub fn add(&self) -> ADD_R[src]

Bits 24:31 - Address of the USART node

impl R<bool, WUFIE_A>[src]

pub fn variant(&self) -> WUFIE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u8, WUS_A>[src]

pub fn variant(&self) -> Variant<u8, WUS_A>[src]

Get enumerated values variant

pub fn is_address(&self) -> bool[src]

Checks if the value of the field is ADDRESS

pub fn is_start(&self) -> bool[src]

Checks if the value of the field is START

pub fn is_rxne(&self) -> bool[src]

Checks if the value of the field is RXNE

impl R<bool, DEP_A>[src]

pub fn variant(&self) -> DEP_A[src]

Get enumerated values variant

pub fn is_high(&self) -> bool[src]

Checks if the value of the field is HIGH

pub fn is_low(&self) -> bool[src]

Checks if the value of the field is LOW

impl R<bool, DEM_A>[src]

pub fn variant(&self) -> DEM_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, DDRE_A>[src]

pub fn variant(&self) -> DDRE_A[src]

Get enumerated values variant

pub fn is_not_disabled(&self) -> bool[src]

Checks if the value of the field is NOTDISABLED

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

impl R<bool, OVRDIS_A>[src]

pub fn variant(&self) -> OVRDIS_A[src]

Get enumerated values variant

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

impl R<bool, ONEBIT_A>[src]

pub fn variant(&self) -> ONEBIT_A[src]

Get enumerated values variant

pub fn is_sample3(&self) -> bool[src]

Checks if the value of the field is SAMPLE3

pub fn is_sample1(&self) -> bool[src]

Checks if the value of the field is SAMPLE1

impl R<bool, CTSIE_A>[src]

pub fn variant(&self) -> CTSIE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, CTSE_A>[src]

pub fn variant(&self) -> CTSE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, RTSE_A>[src]

pub fn variant(&self) -> RTSE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, DMAT_A>[src]

pub fn variant(&self) -> DMAT_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, DMAR_A>[src]

pub fn variant(&self) -> DMAR_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, SCEN_A>[src]

pub fn variant(&self) -> SCEN_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, NACK_A>[src]

pub fn variant(&self) -> NACK_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, HDSEL_A>[src]

pub fn variant(&self) -> HDSEL_A[src]

Get enumerated values variant

pub fn is_not_selected(&self) -> bool[src]

Checks if the value of the field is NOTSELECTED

pub fn is_selected(&self) -> bool[src]

Checks if the value of the field is SELECTED

impl R<bool, IRLP_A>[src]

pub fn variant(&self) -> IRLP_A[src]

Get enumerated values variant

pub fn is_normal(&self) -> bool[src]

Checks if the value of the field is NORMAL

pub fn is_low_power(&self) -> bool[src]

Checks if the value of the field is LOWPOWER

impl R<bool, IREN_A>[src]

pub fn variant(&self) -> IREN_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, EIE_A>[src]

pub fn variant(&self) -> EIE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u32, Reg<u32, _CR3>>[src]

pub fn wufie(&self) -> WUFIE_R[src]

Bit 22 - Wakeup from Stop mode interrupt enable

pub fn wus(&self) -> WUS_R[src]

Bits 20:21 - Wakeup from Stop mode interrupt flag selection

pub fn scarcnt(&self) -> SCARCNT_R[src]

Bits 17:19 - Smartcard auto-retry count

pub fn dep(&self) -> DEP_R[src]

Bit 15 - Driver enable polarity selection

pub fn dem(&self) -> DEM_R[src]

Bit 14 - Driver enable mode

pub fn ddre(&self) -> DDRE_R[src]

Bit 13 - DMA Disable on Reception Error

pub fn ovrdis(&self) -> OVRDIS_R[src]

Bit 12 - Overrun Disable

pub fn onebit(&self) -> ONEBIT_R[src]

Bit 11 - One sample bit method enable

pub fn ctsie(&self) -> CTSIE_R[src]

Bit 10 - CTS interrupt enable

pub fn ctse(&self) -> CTSE_R[src]

Bit 9 - CTS enable

pub fn rtse(&self) -> RTSE_R[src]

Bit 8 - RTS enable

pub fn dmat(&self) -> DMAT_R[src]

Bit 7 - DMA enable transmitter

pub fn dmar(&self) -> DMAR_R[src]

Bit 6 - DMA enable receiver

pub fn scen(&self) -> SCEN_R[src]

Bit 5 - Smartcard mode enable

pub fn nack(&self) -> NACK_R[src]

Bit 4 - Smartcard NACK enable

pub fn hdsel(&self) -> HDSEL_R[src]

Bit 3 - Half-duplex selection

pub fn irlp(&self) -> IRLP_R[src]

Bit 2 - IrDA low-power

pub fn iren(&self) -> IREN_R[src]

Bit 1 - IrDA mode enable

pub fn eie(&self) -> EIE_R[src]

Bit 0 - Error interrupt enable

impl R<u32, Reg<u32, _BRR>>[src]

pub fn brr(&self) -> BRR_R[src]

Bits 0:15 - mantissa of USARTDIV

impl R<u32, Reg<u32, _GTPR>>[src]

pub fn gt(&self) -> GT_R[src]

Bits 8:15 - Guard time value

pub fn psc(&self) -> PSC_R[src]

Bits 0:7 - Prescaler value

impl R<u32, Reg<u32, _RTOR>>[src]

pub fn blen(&self) -> BLEN_R[src]

Bits 24:31 - Block Length

pub fn rto(&self) -> RTO_R[src]

Bits 0:23 - Receiver timeout value

impl R<bool, TXFRQ_A>[src]

pub fn variant(&self) -> Variant<bool, TXFRQ_A>[src]

Get enumerated values variant

pub fn is_discard(&self) -> bool[src]

Checks if the value of the field is DISCARD

impl R<bool, RXFRQ_A>[src]

pub fn variant(&self) -> Variant<bool, RXFRQ_A>[src]

Get enumerated values variant

pub fn is_discard(&self) -> bool[src]

Checks if the value of the field is DISCARD

impl R<bool, MMRQ_A>[src]

pub fn variant(&self) -> Variant<bool, MMRQ_A>[src]

Get enumerated values variant

pub fn is_mute(&self) -> bool[src]

Checks if the value of the field is MUTE

impl R<bool, SBKRQ_A>[src]

pub fn variant(&self) -> Variant<bool, SBKRQ_A>[src]

Get enumerated values variant

pub fn is_break_(&self) -> bool[src]

Checks if the value of the field is BREAK

impl R<bool, ABRRQ_A>[src]

pub fn variant(&self) -> Variant<bool, ABRRQ_A>[src]

Get enumerated values variant

pub fn is_request(&self) -> bool[src]

Checks if the value of the field is REQUEST

impl R<u32, Reg<u32, _RQR>>[src]

pub fn txfrq(&self) -> TXFRQ_R[src]

Bit 4 - Transmit data flush request

pub fn rxfrq(&self) -> RXFRQ_R[src]

Bit 3 - Receive data flush request

pub fn mmrq(&self) -> MMRQ_R[src]

Bit 2 - Mute mode request

pub fn sbkrq(&self) -> SBKRQ_R[src]

Bit 1 - Send break request

pub fn abrrq(&self) -> ABRRQ_R[src]

Bit 0 - Auto baud rate request

impl R<u32, Reg<u32, _ISR>>[src]

pub fn reack(&self) -> REACK_R[src]

Bit 22 - Receive enable acknowledge flag

pub fn teack(&self) -> TEACK_R[src]

Bit 21 - Transmit enable acknowledge flag

pub fn wuf(&self) -> WUF_R[src]

Bit 20 - Wakeup from Stop mode flag

pub fn rwu(&self) -> RWU_R[src]

Bit 19 - Receiver wakeup from Mute mode

pub fn sbkf(&self) -> SBKF_R[src]

Bit 18 - Send break flag

pub fn cmf(&self) -> CMF_R[src]

Bit 17 - character match flag

pub fn busy(&self) -> BUSY_R[src]

Bit 16 - Busy flag

pub fn abrf(&self) -> ABRF_R[src]

Bit 15 - Auto baud rate flag

pub fn abre(&self) -> ABRE_R[src]

Bit 14 - Auto baud rate error

pub fn eobf(&self) -> EOBF_R[src]

Bit 12 - End of block flag

pub fn rtof(&self) -> RTOF_R[src]

Bit 11 - Receiver timeout

pub fn cts(&self) -> CTS_R[src]

Bit 10 - CTS flag

pub fn ctsif(&self) -> CTSIF_R[src]

Bit 9 - CTS interrupt flag

pub fn lbdf(&self) -> LBDF_R[src]

Bit 8 - LIN break detection flag

pub fn txe(&self) -> TXE_R[src]

Bit 7 - Transmit data register empty

pub fn tc(&self) -> TC_R[src]

Bit 6 - Transmission complete

pub fn rxne(&self) -> RXNE_R[src]

Bit 5 - Read data register not empty

pub fn idle(&self) -> IDLE_R[src]

Bit 4 - Idle line detected

pub fn ore(&self) -> ORE_R[src]

Bit 3 - Overrun error

pub fn nf(&self) -> NF_R[src]

Bit 2 - Noise detected flag

pub fn fe(&self) -> FE_R[src]

Bit 1 - Framing error

pub fn pe(&self) -> PE_R[src]

Bit 0 - Parity error

impl R<bool, WUCF_A>[src]

pub fn variant(&self) -> Variant<bool, WUCF_A>[src]

Get enumerated values variant

pub fn is_clear(&self) -> bool[src]

Checks if the value of the field is CLEAR

impl R<bool, CMCF_A>[src]

pub fn variant(&self) -> Variant<bool, CMCF_A>[src]

Get enumerated values variant

pub fn is_clear(&self) -> bool[src]

Checks if the value of the field is CLEAR

impl R<bool, EOBCF_A>[src]

pub fn variant(&self) -> Variant<bool, EOBCF_A>[src]

Get enumerated values variant

pub fn is_clear(&self) -> bool[src]

Checks if the value of the field is CLEAR

impl R<bool, RTOCF_A>[src]

pub fn variant(&self) -> Variant<bool, RTOCF_A>[src]

Get enumerated values variant

pub fn is_clear(&self) -> bool[src]

Checks if the value of the field is CLEAR

impl R<bool, CTSCF_A>[src]

pub fn variant(&self) -> Variant<bool, CTSCF_A>[src]

Get enumerated values variant

pub fn is_clear(&self) -> bool[src]

Checks if the value of the field is CLEAR

impl R<bool, LBDCF_A>[src]

pub fn variant(&self) -> Variant<bool, LBDCF_A>[src]

Get enumerated values variant

pub fn is_clear(&self) -> bool[src]

Checks if the value of the field is CLEAR

impl R<bool, TCCF_A>[src]

pub fn variant(&self) -> Variant<bool, TCCF_A>[src]

Get enumerated values variant

pub fn is_clear(&self) -> bool[src]

Checks if the value of the field is CLEAR

impl R<bool, IDLECF_A>[src]

pub fn variant(&self) -> Variant<bool, IDLECF_A>[src]

Get enumerated values variant

pub fn is_clear(&self) -> bool[src]

Checks if the value of the field is CLEAR

impl R<bool, ORECF_A>[src]

pub fn variant(&self) -> Variant<bool, ORECF_A>[src]

Get enumerated values variant

pub fn is_clear(&self) -> bool[src]

Checks if the value of the field is CLEAR

impl R<bool, NCF_A>[src]

pub fn variant(&self) -> Variant<bool, NCF_A>[src]

Get enumerated values variant

pub fn is_clear(&self) -> bool[src]

Checks if the value of the field is CLEAR

impl R<bool, FECF_A>[src]

pub fn variant(&self) -> Variant<bool, FECF_A>[src]

Get enumerated values variant

pub fn is_clear(&self) -> bool[src]

Checks if the value of the field is CLEAR

impl R<bool, PECF_A>[src]

pub fn variant(&self) -> Variant<bool, PECF_A>[src]

Get enumerated values variant

pub fn is_clear(&self) -> bool[src]

Checks if the value of the field is CLEAR

impl R<u32, Reg<u32, _ICR>>[src]

pub fn wucf(&self) -> WUCF_R[src]

Bit 20 - Wakeup from Stop mode clear flag

pub fn cmcf(&self) -> CMCF_R[src]

Bit 17 - Character match clear flag

pub fn eobcf(&self) -> EOBCF_R[src]

Bit 12 - End of timeout clear flag

pub fn rtocf(&self) -> RTOCF_R[src]

Bit 11 - Receiver timeout clear flag

pub fn ctscf(&self) -> CTSCF_R[src]

Bit 9 - CTS clear flag

pub fn lbdcf(&self) -> LBDCF_R[src]

Bit 8 - LIN break detection clear flag

pub fn tccf(&self) -> TCCF_R[src]

Bit 6 - Transmission complete clear flag

pub fn idlecf(&self) -> IDLECF_R[src]

Bit 4 - Idle line detected clear flag

pub fn orecf(&self) -> ORECF_R[src]

Bit 3 - Overrun error clear flag

pub fn ncf(&self) -> NCF_R[src]

Bit 2 - Noise detected clear flag

pub fn fecf(&self) -> FECF_R[src]

Bit 1 - Framing error clear flag

pub fn pecf(&self) -> PECF_R[src]

Bit 0 - Parity error clear flag

impl R<u32, Reg<u32, _RDR>>[src]

pub fn rdr(&self) -> RDR_R[src]

Bits 0:8 - Receive data value

impl R<u32, Reg<u32, _TDR>>[src]

pub fn tdr(&self) -> TDR_R[src]

Bits 0:8 - Transmit data value

impl R<bool, BIDIMODE_A>[src]

pub fn variant(&self) -> BIDIMODE_A[src]

Get enumerated values variant

pub fn is_unidirectional(&self) -> bool[src]

Checks if the value of the field is UNIDIRECTIONAL

pub fn is_bidirectional(&self) -> bool[src]

Checks if the value of the field is BIDIRECTIONAL

impl R<bool, BIDIOE_A>[src]

pub fn variant(&self) -> BIDIOE_A[src]

Get enumerated values variant

pub fn is_output_disabled(&self) -> bool[src]

Checks if the value of the field is OUTPUTDISABLED

pub fn is_output_enabled(&self) -> bool[src]

Checks if the value of the field is OUTPUTENABLED

impl R<bool, CRCEN_A>[src]

pub fn variant(&self) -> CRCEN_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, CRCNEXT_A>[src]

pub fn variant(&self) -> CRCNEXT_A[src]

Get enumerated values variant

pub fn is_tx_buffer(&self) -> bool[src]

Checks if the value of the field is TXBUFFER

pub fn is_crc(&self) -> bool[src]

Checks if the value of the field is CRC

impl R<bool, CRCL_A>[src]

pub fn variant(&self) -> CRCL_A[src]

Get enumerated values variant

pub fn is_eight_bit(&self) -> bool[src]

Checks if the value of the field is EIGHTBIT

pub fn is_sixteen_bit(&self) -> bool[src]

Checks if the value of the field is SIXTEENBIT

impl R<bool, RXONLY_A>[src]

pub fn variant(&self) -> RXONLY_A[src]

Get enumerated values variant

pub fn is_full_duplex(&self) -> bool[src]

Checks if the value of the field is FULLDUPLEX

pub fn is_output_disabled(&self) -> bool[src]

Checks if the value of the field is OUTPUTDISABLED

impl R<bool, SSM_A>[src]

pub fn variant(&self) -> SSM_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, SSI_A>[src]

pub fn variant(&self) -> SSI_A[src]

Get enumerated values variant

pub fn is_slave_selected(&self) -> bool[src]

Checks if the value of the field is SLAVESELECTED

pub fn is_slave_not_selected(&self) -> bool[src]

Checks if the value of the field is SLAVENOTSELECTED

impl R<bool, LSBFIRST_A>[src]

pub fn variant(&self) -> LSBFIRST_A[src]

Get enumerated values variant

pub fn is_msbfirst(&self) -> bool[src]

Checks if the value of the field is MSBFIRST

pub fn is_lsbfirst(&self) -> bool[src]

Checks if the value of the field is LSBFIRST

impl R<bool, SPE_A>[src]

pub fn variant(&self) -> SPE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u8, BR_A>[src]

pub fn variant(&self) -> BR_A[src]

Get enumerated values variant

pub fn is_div2(&self) -> bool[src]

Checks if the value of the field is DIV2

pub fn is_div4(&self) -> bool[src]

Checks if the value of the field is DIV4

pub fn is_div8(&self) -> bool[src]

Checks if the value of the field is DIV8

pub fn is_div16(&self) -> bool[src]

Checks if the value of the field is DIV16

pub fn is_div32(&self) -> bool[src]

Checks if the value of the field is DIV32

pub fn is_div64(&self) -> bool[src]

Checks if the value of the field is DIV64

pub fn is_div128(&self) -> bool[src]

Checks if the value of the field is DIV128

pub fn is_div256(&self) -> bool[src]

Checks if the value of the field is DIV256

impl R<bool, MSTR_A>[src]

pub fn variant(&self) -> MSTR_A[src]

Get enumerated values variant

pub fn is_slave(&self) -> bool[src]

Checks if the value of the field is SLAVE

pub fn is_master(&self) -> bool[src]

Checks if the value of the field is MASTER

impl R<bool, CPOL_A>[src]

pub fn variant(&self) -> CPOL_A[src]

Get enumerated values variant

pub fn is_idle_low(&self) -> bool[src]

Checks if the value of the field is IDLELOW

pub fn is_idle_high(&self) -> bool[src]

Checks if the value of the field is IDLEHIGH

impl R<bool, CPHA_A>[src]

pub fn variant(&self) -> CPHA_A[src]

Get enumerated values variant

pub fn is_first_edge(&self) -> bool[src]

Checks if the value of the field is FIRSTEDGE

pub fn is_second_edge(&self) -> bool[src]

Checks if the value of the field is SECONDEDGE

impl R<u32, Reg<u32, _CR1>>[src]

pub fn bidimode(&self) -> BIDIMODE_R[src]

Bit 15 - Bidirectional data mode enable

pub fn bidioe(&self) -> BIDIOE_R[src]

Bit 14 - Output enable in bidirectional mode

pub fn crcen(&self) -> CRCEN_R[src]

Bit 13 - Hardware CRC calculation enable

pub fn crcnext(&self) -> CRCNEXT_R[src]

Bit 12 - CRC transfer next

pub fn crcl(&self) -> CRCL_R[src]

Bit 11 - CRC length

pub fn rxonly(&self) -> RXONLY_R[src]

Bit 10 - Receive only

pub fn ssm(&self) -> SSM_R[src]

Bit 9 - Software slave management

pub fn ssi(&self) -> SSI_R[src]

Bit 8 - Internal slave select

pub fn lsbfirst(&self) -> LSBFIRST_R[src]

Bit 7 - Frame format

pub fn spe(&self) -> SPE_R[src]

Bit 6 - SPI enable

pub fn br(&self) -> BR_R[src]

Bits 3:5 - Baud rate control

pub fn mstr(&self) -> MSTR_R[src]

Bit 2 - Master selection

pub fn cpol(&self) -> CPOL_R[src]

Bit 1 - Clock polarity

pub fn cpha(&self) -> CPHA_R[src]

Bit 0 - Clock phase

impl R<bool, RXDMAEN_A>[src]

pub fn variant(&self) -> RXDMAEN_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, TXDMAEN_A>[src]

pub fn variant(&self) -> TXDMAEN_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, SSOE_A>[src]

pub fn variant(&self) -> SSOE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, NSSP_A>[src]

pub fn variant(&self) -> NSSP_A[src]

Get enumerated values variant

pub fn is_no_pulse(&self) -> bool[src]

Checks if the value of the field is NOPULSE

pub fn is_pulse_generated(&self) -> bool[src]

Checks if the value of the field is PULSEGENERATED

impl R<bool, FRF_A>[src]

pub fn variant(&self) -> FRF_A[src]

Get enumerated values variant

pub fn is_motorola(&self) -> bool[src]

Checks if the value of the field is MOTOROLA

pub fn is_ti(&self) -> bool[src]

Checks if the value of the field is TI

impl R<bool, ERRIE_A>[src]

pub fn variant(&self) -> ERRIE_A[src]

Get enumerated values variant

pub fn is_masked(&self) -> bool[src]

Checks if the value of the field is MASKED

pub fn is_not_masked(&self) -> bool[src]

Checks if the value of the field is NOTMASKED

impl R<bool, RXNEIE_A>[src]

pub fn variant(&self) -> RXNEIE_A[src]

Get enumerated values variant

pub fn is_masked(&self) -> bool[src]

Checks if the value of the field is MASKED

pub fn is_not_masked(&self) -> bool[src]

Checks if the value of the field is NOTMASKED

impl R<bool, TXEIE_A>[src]

pub fn variant(&self) -> TXEIE_A[src]

Get enumerated values variant

pub fn is_masked(&self) -> bool[src]

Checks if the value of the field is MASKED

pub fn is_not_masked(&self) -> bool[src]

Checks if the value of the field is NOTMASKED

impl R<u8, DS_A>[src]

pub fn variant(&self) -> Variant<u8, DS_A>[src]

Get enumerated values variant

pub fn is_four_bit(&self) -> bool[src]

Checks if the value of the field is FOURBIT

pub fn is_five_bit(&self) -> bool[src]

Checks if the value of the field is FIVEBIT

pub fn is_six_bit(&self) -> bool[src]

Checks if the value of the field is SIXBIT

pub fn is_seven_bit(&self) -> bool[src]

Checks if the value of the field is SEVENBIT

pub fn is_eight_bit(&self) -> bool[src]

Checks if the value of the field is EIGHTBIT

pub fn is_nine_bit(&self) -> bool[src]

Checks if the value of the field is NINEBIT

pub fn is_ten_bit(&self) -> bool[src]

Checks if the value of the field is TENBIT

pub fn is_eleven_bit(&self) -> bool[src]

Checks if the value of the field is ELEVENBIT

pub fn is_twelve_bit(&self) -> bool[src]

Checks if the value of the field is TWELVEBIT

pub fn is_thirteen_bit(&self) -> bool[src]

Checks if the value of the field is THIRTEENBIT

pub fn is_fourteen_bit(&self) -> bool[src]

Checks if the value of the field is FOURTEENBIT

pub fn is_fifteen_bit(&self) -> bool[src]

Checks if the value of the field is FIFTEENBIT

pub fn is_sixteen_bit(&self) -> bool[src]

Checks if the value of the field is SIXTEENBIT

impl R<bool, FRXTH_A>[src]

pub fn variant(&self) -> FRXTH_A[src]

Get enumerated values variant

pub fn is_half(&self) -> bool[src]

Checks if the value of the field is HALF

pub fn is_quarter(&self) -> bool[src]

Checks if the value of the field is QUARTER

impl R<bool, LDMA_RX_A>[src]

pub fn variant(&self) -> LDMA_RX_A[src]

Get enumerated values variant

pub fn is_even(&self) -> bool[src]

Checks if the value of the field is EVEN

pub fn is_odd(&self) -> bool[src]

Checks if the value of the field is ODD

impl R<bool, LDMA_TX_A>[src]

pub fn variant(&self) -> LDMA_TX_A[src]

Get enumerated values variant

pub fn is_even(&self) -> bool[src]

Checks if the value of the field is EVEN

pub fn is_odd(&self) -> bool[src]

Checks if the value of the field is ODD

impl R<u32, Reg<u32, _CR2>>[src]

pub fn rxdmaen(&self) -> RXDMAEN_R[src]

Bit 0 - Rx buffer DMA enable

pub fn txdmaen(&self) -> TXDMAEN_R[src]

Bit 1 - Tx buffer DMA enable

pub fn ssoe(&self) -> SSOE_R[src]

Bit 2 - SS output enable

pub fn nssp(&self) -> NSSP_R[src]

Bit 3 - NSS pulse management

pub fn frf(&self) -> FRF_R[src]

Bit 4 - Frame format

pub fn errie(&self) -> ERRIE_R[src]

Bit 5 - Error interrupt enable

pub fn rxneie(&self) -> RXNEIE_R[src]

Bit 6 - RX buffer not empty interrupt enable

pub fn txeie(&self) -> TXEIE_R[src]

Bit 7 - Tx buffer empty interrupt enable

pub fn ds(&self) -> DS_R[src]

Bits 8:11 - Data size

pub fn frxth(&self) -> FRXTH_R[src]

Bit 12 - FIFO reception threshold

pub fn ldma_rx(&self) -> LDMA_RX_R[src]

Bit 13 - Last DMA transfer for reception

pub fn ldma_tx(&self) -> LDMA_TX_R[src]

Bit 14 - Last DMA transfer for transmission

impl R<bool, RXNE_A>[src]

pub fn variant(&self) -> RXNE_A[src]

Get enumerated values variant

pub fn is_empty(&self) -> bool[src]

Checks if the value of the field is EMPTY

pub fn is_not_empty(&self) -> bool[src]

Checks if the value of the field is NOTEMPTY

impl R<bool, TXE_A>[src]

pub fn variant(&self) -> TXE_A[src]

Get enumerated values variant

pub fn is_not_empty(&self) -> bool[src]

Checks if the value of the field is NOTEMPTY

pub fn is_empty(&self) -> bool[src]

Checks if the value of the field is EMPTY

impl R<bool, CHSIDE_A>[src]

pub fn variant(&self) -> CHSIDE_A[src]

Get enumerated values variant

pub fn is_left(&self) -> bool[src]

Checks if the value of the field is LEFT

pub fn is_right(&self) -> bool[src]

Checks if the value of the field is RIGHT

impl R<bool, UDR_A>[src]

pub fn variant(&self) -> UDR_A[src]

Get enumerated values variant

pub fn is_no_underrun(&self) -> bool[src]

Checks if the value of the field is NOUNDERRUN

pub fn is_underrun(&self) -> bool[src]

Checks if the value of the field is UNDERRUN

impl R<bool, CRCERR_A>[src]

pub fn variant(&self) -> CRCERR_A[src]

Get enumerated values variant

pub fn is_match_(&self) -> bool[src]

Checks if the value of the field is MATCH

pub fn is_no_match(&self) -> bool[src]

Checks if the value of the field is NOMATCH

impl R<bool, MODF_A>[src]

pub fn variant(&self) -> MODF_A[src]

Get enumerated values variant

pub fn is_no_fault(&self) -> bool[src]

Checks if the value of the field is NOFAULT

pub fn is_fault(&self) -> bool[src]

Checks if the value of the field is FAULT

impl R<bool, OVR_A>[src]

pub fn variant(&self) -> OVR_A[src]

Get enumerated values variant

pub fn is_no_overrun(&self) -> bool[src]

Checks if the value of the field is NOOVERRUN

pub fn is_overrun(&self) -> bool[src]

Checks if the value of the field is OVERRUN

impl R<bool, BSY_A>[src]

pub fn variant(&self) -> BSY_A[src]

Get enumerated values variant

pub fn is_not_busy(&self) -> bool[src]

Checks if the value of the field is NOTBUSY

pub fn is_busy(&self) -> bool[src]

Checks if the value of the field is BUSY

impl R<bool, FRE_A>[src]

pub fn variant(&self) -> FRE_A[src]

Get enumerated values variant

pub fn is_no_error(&self) -> bool[src]

Checks if the value of the field is NOERROR

pub fn is_error(&self) -> bool[src]

Checks if the value of the field is ERROR

impl R<u8, FRLVL_A>[src]

pub fn variant(&self) -> FRLVL_A[src]

Get enumerated values variant

pub fn is_empty(&self) -> bool[src]

Checks if the value of the field is EMPTY

pub fn is_quarter(&self) -> bool[src]

Checks if the value of the field is QUARTER

pub fn is_half(&self) -> bool[src]

Checks if the value of the field is HALF

pub fn is_full(&self) -> bool[src]

Checks if the value of the field is FULL

impl R<u8, FTLVL_A>[src]

pub fn variant(&self) -> FTLVL_A[src]

Get enumerated values variant

pub fn is_empty(&self) -> bool[src]

Checks if the value of the field is EMPTY

pub fn is_quarter(&self) -> bool[src]

Checks if the value of the field is QUARTER

pub fn is_half(&self) -> bool[src]

Checks if the value of the field is HALF

pub fn is_full(&self) -> bool[src]

Checks if the value of the field is FULL

impl R<u32, Reg<u32, _SR>>[src]

pub fn rxne(&self) -> RXNE_R[src]

Bit 0 - Receive buffer not empty

pub fn txe(&self) -> TXE_R[src]

Bit 1 - Transmit buffer empty

pub fn chside(&self) -> CHSIDE_R[src]

Bit 2 - Channel side

pub fn udr(&self) -> UDR_R[src]

Bit 3 - Underrun flag

pub fn crcerr(&self) -> CRCERR_R[src]

Bit 4 - CRC error flag

pub fn modf(&self) -> MODF_R[src]

Bit 5 - Mode fault

pub fn ovr(&self) -> OVR_R[src]

Bit 6 - Overrun flag

pub fn bsy(&self) -> BSY_R[src]

Bit 7 - Busy flag

pub fn fre(&self) -> FRE_R[src]

Bit 8 - TI frame format error

pub fn frlvl(&self) -> FRLVL_R[src]

Bits 9:10 - FIFO reception level

pub fn ftlvl(&self) -> FTLVL_R[src]

Bits 11:12 - FIFO transmission level

impl R<u32, Reg<u32, _DR>>[src]

pub fn dr(&self) -> DR_R[src]

Bits 0:15 - Data register

impl R<u32, Reg<u32, _CRCPR>>[src]

pub fn crcpoly(&self) -> CRCPOLY_R[src]

Bits 0:15 - CRC polynomial register

impl R<u32, Reg<u32, _RXCRCR>>[src]

pub fn rx_crc(&self) -> RXCRC_R[src]

Bits 0:15 - Rx CRC register

impl R<u32, Reg<u32, _TXCRCR>>[src]

pub fn tx_crc(&self) -> TXCRC_R[src]

Bits 0:15 - Tx CRC register

impl R<bool, I2SMOD_A>[src]

pub fn variant(&self) -> I2SMOD_A[src]

Get enumerated values variant

pub fn is_spimode(&self) -> bool[src]

Checks if the value of the field is SPIMODE

pub fn is_i2smode(&self) -> bool[src]

Checks if the value of the field is I2SMODE

impl R<bool, I2SE_A>[src]

pub fn variant(&self) -> I2SE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u8, I2SCFG_A>[src]

pub fn variant(&self) -> I2SCFG_A[src]

Get enumerated values variant

pub fn is_slave_tx(&self) -> bool[src]

Checks if the value of the field is SLAVETX

pub fn is_slave_rx(&self) -> bool[src]

Checks if the value of the field is SLAVERX

pub fn is_master_tx(&self) -> bool[src]

Checks if the value of the field is MASTERTX

pub fn is_master_rx(&self) -> bool[src]

Checks if the value of the field is MASTERRX

impl R<bool, PCMSYNC_A>[src]

pub fn variant(&self) -> PCMSYNC_A[src]

Get enumerated values variant

pub fn is_short(&self) -> bool[src]

Checks if the value of the field is SHORT

pub fn is_long(&self) -> bool[src]

Checks if the value of the field is LONG

impl R<u8, I2SSTD_A>[src]

pub fn variant(&self) -> I2SSTD_A[src]

Get enumerated values variant

pub fn is_philips(&self) -> bool[src]

Checks if the value of the field is PHILIPS

pub fn is_msb(&self) -> bool[src]

Checks if the value of the field is MSB

pub fn is_lsb(&self) -> bool[src]

Checks if the value of the field is LSB

pub fn is_pcm(&self) -> bool[src]

Checks if the value of the field is PCM

impl R<bool, CKPOL_A>[src]

pub fn variant(&self) -> CKPOL_A[src]

Get enumerated values variant

pub fn is_idle_low(&self) -> bool[src]

Checks if the value of the field is IDLELOW

pub fn is_idle_high(&self) -> bool[src]

Checks if the value of the field is IDLEHIGH

impl R<u8, DATLEN_A>[src]

pub fn variant(&self) -> Variant<u8, DATLEN_A>[src]

Get enumerated values variant

pub fn is_sixteen_bit(&self) -> bool[src]

Checks if the value of the field is SIXTEENBIT

pub fn is_twenty_four_bit(&self) -> bool[src]

Checks if the value of the field is TWENTYFOURBIT

pub fn is_thirty_two_bit(&self) -> bool[src]

Checks if the value of the field is THIRTYTWOBIT

impl R<bool, CHLEN_A>[src]

pub fn variant(&self) -> CHLEN_A[src]

Get enumerated values variant

pub fn is_sixteen_bit(&self) -> bool[src]

Checks if the value of the field is SIXTEENBIT

pub fn is_thirty_two_bit(&self) -> bool[src]

Checks if the value of the field is THIRTYTWOBIT

impl R<u32, Reg<u32, _I2SCFGR>>[src]

pub fn i2smod(&self) -> I2SMOD_R[src]

Bit 11 - I2S mode selection

pub fn i2se(&self) -> I2SE_R[src]

Bit 10 - I2S Enable

pub fn i2scfg(&self) -> I2SCFG_R[src]

Bits 8:9 - I2S configuration mode

pub fn pcmsync(&self) -> PCMSYNC_R[src]

Bit 7 - PCM frame synchronization

pub fn i2sstd(&self) -> I2SSTD_R[src]

Bits 4:5 - I2S standard selection

pub fn ckpol(&self) -> CKPOL_R[src]

Bit 3 - Steady state clock polarity

pub fn datlen(&self) -> DATLEN_R[src]

Bits 1:2 - Data length to be transferred

pub fn chlen(&self) -> CHLEN_R[src]

Bit 0 - Channel length (number of bits per audio channel)

impl R<bool, MCKOE_A>[src]

pub fn variant(&self) -> MCKOE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, ODD_A>[src]

pub fn variant(&self) -> ODD_A[src]

Get enumerated values variant

pub fn is_even(&self) -> bool[src]

Checks if the value of the field is EVEN

pub fn is_odd(&self) -> bool[src]

Checks if the value of the field is ODD

impl R<u32, Reg<u32, _I2SPR>>[src]

pub fn mckoe(&self) -> MCKOE_R[src]

Bit 9 - Master clock output enable

pub fn odd(&self) -> ODD_R[src]

Bit 8 - Odd factor for the prescaler

pub fn i2sdiv(&self) -> I2SDIV_R[src]

Bits 0:7 - I2S Linear prescaler

impl R<bool, MR0_A>[src]

pub fn variant(&self) -> MR0_A[src]

Get enumerated values variant

pub fn is_masked(&self) -> bool[src]

Checks if the value of the field is MASKED

pub fn is_unmasked(&self) -> bool[src]

Checks if the value of the field is UNMASKED

impl R<u32, Reg<u32, _IMR1>>[src]

pub fn mr0(&self) -> MR0_R[src]

Bit 0 - Interrupt Mask on line 0

pub fn mr1(&self) -> MR1_R[src]

Bit 1 - Interrupt Mask on line 1

pub fn mr2(&self) -> MR2_R[src]

Bit 2 - Interrupt Mask on line 2

pub fn mr3(&self) -> MR3_R[src]

Bit 3 - Interrupt Mask on line 3

pub fn mr4(&self) -> MR4_R[src]

Bit 4 - Interrupt Mask on line 4

pub fn mr5(&self) -> MR5_R[src]

Bit 5 - Interrupt Mask on line 5

pub fn mr6(&self) -> MR6_R[src]

Bit 6 - Interrupt Mask on line 6

pub fn mr7(&self) -> MR7_R[src]

Bit 7 - Interrupt Mask on line 7

pub fn mr8(&self) -> MR8_R[src]

Bit 8 - Interrupt Mask on line 8

pub fn mr9(&self) -> MR9_R[src]

Bit 9 - Interrupt Mask on line 9

pub fn mr10(&self) -> MR10_R[src]

Bit 10 - Interrupt Mask on line 10

pub fn mr11(&self) -> MR11_R[src]

Bit 11 - Interrupt Mask on line 11

pub fn mr12(&self) -> MR12_R[src]

Bit 12 - Interrupt Mask on line 12

pub fn mr13(&self) -> MR13_R[src]

Bit 13 - Interrupt Mask on line 13

pub fn mr14(&self) -> MR14_R[src]

Bit 14 - Interrupt Mask on line 14

pub fn mr15(&self) -> MR15_R[src]

Bit 15 - Interrupt Mask on line 15

pub fn mr16(&self) -> MR16_R[src]

Bit 16 - Interrupt Mask on line 16

pub fn mr17(&self) -> MR17_R[src]

Bit 17 - Interrupt Mask on line 17

pub fn mr18(&self) -> MR18_R[src]

Bit 18 - Interrupt Mask on line 18

pub fn mr19(&self) -> MR19_R[src]

Bit 19 - Interrupt Mask on line 19

pub fn mr20(&self) -> MR20_R[src]

Bit 20 - Interrupt Mask on line 20

pub fn mr21(&self) -> MR21_R[src]

Bit 21 - Interrupt Mask on line 21

pub fn mr22(&self) -> MR22_R[src]

Bit 22 - Interrupt Mask on line 22

pub fn mr23(&self) -> MR23_R[src]

Bit 23 - Interrupt Mask on line 23

pub fn mr24(&self) -> MR24_R[src]

Bit 24 - Interrupt Mask on line 24

pub fn mr25(&self) -> MR25_R[src]

Bit 25 - Interrupt Mask on line 25

pub fn mr26(&self) -> MR26_R[src]

Bit 26 - Interrupt Mask on line 26

pub fn mr27(&self) -> MR27_R[src]

Bit 27 - Interrupt Mask on line 27

pub fn mr28(&self) -> MR28_R[src]

Bit 28 - Interrupt Mask on line 28

pub fn mr29(&self) -> MR29_R[src]

Bit 29 - Interrupt Mask on line 29

pub fn mr30(&self) -> MR30_R[src]

Bit 30 - Interrupt Mask on line 30

pub fn mr31(&self) -> MR31_R[src]

Bit 31 - Interrupt Mask on line 31

impl R<bool, MR0_A>[src]

pub fn variant(&self) -> MR0_A[src]

Get enumerated values variant

pub fn is_masked(&self) -> bool[src]

Checks if the value of the field is MASKED

pub fn is_unmasked(&self) -> bool[src]

Checks if the value of the field is UNMASKED

impl R<u32, Reg<u32, _EMR1>>[src]

pub fn mr0(&self) -> MR0_R[src]

Bit 0 - Event Mask on line 0

pub fn mr1(&self) -> MR1_R[src]

Bit 1 - Event Mask on line 1

pub fn mr2(&self) -> MR2_R[src]

Bit 2 - Event Mask on line 2

pub fn mr3(&self) -> MR3_R[src]

Bit 3 - Event Mask on line 3

pub fn mr4(&self) -> MR4_R[src]

Bit 4 - Event Mask on line 4

pub fn mr5(&self) -> MR5_R[src]

Bit 5 - Event Mask on line 5

pub fn mr6(&self) -> MR6_R[src]

Bit 6 - Event Mask on line 6

pub fn mr7(&self) -> MR7_R[src]

Bit 7 - Event Mask on line 7

pub fn mr8(&self) -> MR8_R[src]

Bit 8 - Event Mask on line 8

pub fn mr9(&self) -> MR9_R[src]

Bit 9 - Event Mask on line 9

pub fn mr10(&self) -> MR10_R[src]

Bit 10 - Event Mask on line 10

pub fn mr11(&self) -> MR11_R[src]

Bit 11 - Event Mask on line 11

pub fn mr12(&self) -> MR12_R[src]

Bit 12 - Event Mask on line 12

pub fn mr13(&self) -> MR13_R[src]

Bit 13 - Event Mask on line 13

pub fn mr14(&self) -> MR14_R[src]

Bit 14 - Event Mask on line 14

pub fn mr15(&self) -> MR15_R[src]

Bit 15 - Event Mask on line 15

pub fn mr16(&self) -> MR16_R[src]

Bit 16 - Event Mask on line 16

pub fn mr17(&self) -> MR17_R[src]

Bit 17 - Event Mask on line 17

pub fn mr18(&self) -> MR18_R[src]

Bit 18 - Event Mask on line 18

pub fn mr19(&self) -> MR19_R[src]

Bit 19 - Event Mask on line 19

pub fn mr20(&self) -> MR20_R[src]

Bit 20 - Event Mask on line 20

pub fn mr21(&self) -> MR21_R[src]

Bit 21 - Event Mask on line 21

pub fn mr22(&self) -> MR22_R[src]

Bit 22 - Event Mask on line 22

pub fn mr23(&self) -> MR23_R[src]

Bit 23 - Event Mask on line 23

pub fn mr24(&self) -> MR24_R[src]

Bit 24 - Event Mask on line 24

pub fn mr25(&self) -> MR25_R[src]

Bit 25 - Event Mask on line 25

pub fn mr26(&self) -> MR26_R[src]

Bit 26 - Event Mask on line 26

pub fn mr27(&self) -> MR27_R[src]

Bit 27 - Event Mask on line 27

pub fn mr28(&self) -> MR28_R[src]

Bit 28 - Event Mask on line 28

pub fn mr29(&self) -> MR29_R[src]

Bit 29 - Event Mask on line 29

pub fn mr30(&self) -> MR30_R[src]

Bit 30 - Event Mask on line 30

pub fn mr31(&self) -> MR31_R[src]

Bit 31 - Event Mask on line 31

impl R<bool, TR0_A>[src]

pub fn variant(&self) -> TR0_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u32, Reg<u32, _RTSR1>>[src]

pub fn tr0(&self) -> TR0_R[src]

Bit 0 - Rising trigger event configuration of line 0

pub fn tr1(&self) -> TR1_R[src]

Bit 1 - Rising trigger event configuration of line 1

pub fn tr2(&self) -> TR2_R[src]

Bit 2 - Rising trigger event configuration of line 2

pub fn tr3(&self) -> TR3_R[src]

Bit 3 - Rising trigger event configuration of line 3

pub fn tr4(&self) -> TR4_R[src]

Bit 4 - Rising trigger event configuration of line 4

pub fn tr5(&self) -> TR5_R[src]

Bit 5 - Rising trigger event configuration of line 5

pub fn tr6(&self) -> TR6_R[src]

Bit 6 - Rising trigger event configuration of line 6

pub fn tr7(&self) -> TR7_R[src]

Bit 7 - Rising trigger event configuration of line 7

pub fn tr8(&self) -> TR8_R[src]

Bit 8 - Rising trigger event configuration of line 8

pub fn tr9(&self) -> TR9_R[src]

Bit 9 - Rising trigger event configuration of line 9

pub fn tr10(&self) -> TR10_R[src]

Bit 10 - Rising trigger event configuration of line 10

pub fn tr11(&self) -> TR11_R[src]

Bit 11 - Rising trigger event configuration of line 11

pub fn tr12(&self) -> TR12_R[src]

Bit 12 - Rising trigger event configuration of line 12

pub fn tr13(&self) -> TR13_R[src]

Bit 13 - Rising trigger event configuration of line 13

pub fn tr14(&self) -> TR14_R[src]

Bit 14 - Rising trigger event configuration of line 14

pub fn tr15(&self) -> TR15_R[src]

Bit 15 - Rising trigger event configuration of line 15

pub fn tr16(&self) -> TR16_R[src]

Bit 16 - Rising trigger event configuration of line 16

pub fn tr17(&self) -> TR17_R[src]

Bit 17 - Rising trigger event configuration of line 17

pub fn tr18(&self) -> TR18_R[src]

Bit 18 - Rising trigger event configuration of line 18

pub fn tr19(&self) -> TR19_R[src]

Bit 19 - Rising trigger event configuration of line 19

pub fn tr20(&self) -> TR20_R[src]

Bit 20 - Rising trigger event configuration of line 20

pub fn tr21(&self) -> TR21_R[src]

Bit 21 - Rising trigger event configuration of line 21

pub fn tr22(&self) -> TR22_R[src]

Bit 22 - Rising trigger event configuration of line 22

pub fn tr29(&self) -> TR29_R[src]

Bit 29 - Rising trigger event configuration of line 29

pub fn tr30(&self) -> TR30_R[src]

Bit 30 - Rising trigger event configuration of line 30

pub fn tr31(&self) -> TR31_R[src]

Bit 31 - Rising trigger event configuration of line 31

impl R<bool, TR0_A>[src]

pub fn variant(&self) -> TR0_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u32, Reg<u32, _FTSR1>>[src]

pub fn tr0(&self) -> TR0_R[src]

Bit 0 - Falling trigger event configuration of line 0

pub fn tr1(&self) -> TR1_R[src]

Bit 1 - Falling trigger event configuration of line 1

pub fn tr2(&self) -> TR2_R[src]

Bit 2 - Falling trigger event configuration of line 2

pub fn tr3(&self) -> TR3_R[src]

Bit 3 - Falling trigger event configuration of line 3

pub fn tr4(&self) -> TR4_R[src]

Bit 4 - Falling trigger event configuration of line 4

pub fn tr5(&self) -> TR5_R[src]

Bit 5 - Falling trigger event configuration of line 5

pub fn tr6(&self) -> TR6_R[src]

Bit 6 - Falling trigger event configuration of line 6

pub fn tr7(&self) -> TR7_R[src]

Bit 7 - Falling trigger event configuration of line 7

pub fn tr8(&self) -> TR8_R[src]

Bit 8 - Falling trigger event configuration of line 8

pub fn tr9(&self) -> TR9_R[src]

Bit 9 - Falling trigger event configuration of line 9

pub fn tr10(&self) -> TR10_R[src]

Bit 10 - Falling trigger event configuration of line 10

pub fn tr11(&self) -> TR11_R[src]

Bit 11 - Falling trigger event configuration of line 11

pub fn tr12(&self) -> TR12_R[src]

Bit 12 - Falling trigger event configuration of line 12

pub fn tr13(&self) -> TR13_R[src]

Bit 13 - Falling trigger event configuration of line 13

pub fn tr14(&self) -> TR14_R[src]

Bit 14 - Falling trigger event configuration of line 14

pub fn tr15(&self) -> TR15_R[src]

Bit 15 - Falling trigger event configuration of line 15

pub fn tr16(&self) -> TR16_R[src]

Bit 16 - Falling trigger event configuration of line 16

pub fn tr17(&self) -> TR17_R[src]

Bit 17 - Falling trigger event configuration of line 17

pub fn tr18(&self) -> TR18_R[src]

Bit 18 - Falling trigger event configuration of line 18

pub fn tr19(&self) -> TR19_R[src]

Bit 19 - Falling trigger event configuration of line 19

pub fn tr20(&self) -> TR20_R[src]

Bit 20 - Falling trigger event configuration of line 20

pub fn tr21(&self) -> TR21_R[src]

Bit 21 - Falling trigger event configuration of line 21

pub fn tr22(&self) -> TR22_R[src]

Bit 22 - Falling trigger event configuration of line 22

pub fn tr29(&self) -> TR29_R[src]

Bit 29 - Falling trigger event configuration of line 29

pub fn tr30(&self) -> TR30_R[src]

Bit 30 - Falling trigger event configuration of line 30.

pub fn tr31(&self) -> TR31_R[src]

Bit 31 - Falling trigger event configuration of line 31

impl R<bool, SWIER0_A>[src]

pub fn variant(&self) -> Variant<bool, SWIER0_A>[src]

Get enumerated values variant

pub fn is_pend(&self) -> bool[src]

Checks if the value of the field is PEND

impl R<u32, Reg<u32, _SWIER1>>[src]

pub fn swier0(&self) -> SWIER0_R[src]

Bit 0 - Software Interrupt on line 0

pub fn swier1(&self) -> SWIER1_R[src]

Bit 1 - Software Interrupt on line 1

pub fn swier2(&self) -> SWIER2_R[src]

Bit 2 - Software Interrupt on line 2

pub fn swier3(&self) -> SWIER3_R[src]

Bit 3 - Software Interrupt on line 3

pub fn swier4(&self) -> SWIER4_R[src]

Bit 4 - Software Interrupt on line 4

pub fn swier5(&self) -> SWIER5_R[src]

Bit 5 - Software Interrupt on line 5

pub fn swier6(&self) -> SWIER6_R[src]

Bit 6 - Software Interrupt on line 6

pub fn swier7(&self) -> SWIER7_R[src]

Bit 7 - Software Interrupt on line 7

pub fn swier8(&self) -> SWIER8_R[src]

Bit 8 - Software Interrupt on line 8

pub fn swier9(&self) -> SWIER9_R[src]

Bit 9 - Software Interrupt on line 9

pub fn swier10(&self) -> SWIER10_R[src]

Bit 10 - Software Interrupt on line 10

pub fn swier11(&self) -> SWIER11_R[src]

Bit 11 - Software Interrupt on line 11

pub fn swier12(&self) -> SWIER12_R[src]

Bit 12 - Software Interrupt on line 12

pub fn swier13(&self) -> SWIER13_R[src]

Bit 13 - Software Interrupt on line 13

pub fn swier14(&self) -> SWIER14_R[src]

Bit 14 - Software Interrupt on line 14

pub fn swier15(&self) -> SWIER15_R[src]

Bit 15 - Software Interrupt on line 15

pub fn swier16(&self) -> SWIER16_R[src]

Bit 16 - Software Interrupt on line 16

pub fn swier17(&self) -> SWIER17_R[src]

Bit 17 - Software Interrupt on line 17

pub fn swier18(&self) -> SWIER18_R[src]

Bit 18 - Software Interrupt on line 18

pub fn swier19(&self) -> SWIER19_R[src]

Bit 19 - Software Interrupt on line 19

pub fn swier20(&self) -> SWIER20_R[src]

Bit 20 - Software Interrupt on line 20

pub fn swier21(&self) -> SWIER21_R[src]

Bit 21 - Software Interrupt on line 21

pub fn swier22(&self) -> SWIER22_R[src]

Bit 22 - Software Interrupt on line 22

pub fn swier29(&self) -> SWIER29_R[src]

Bit 29 - Software Interrupt on line 29

pub fn swier30(&self) -> SWIER30_R[src]

Bit 30 - Software Interrupt on line 309

pub fn swier31(&self) -> SWIER31_R[src]

Bit 31 - Software Interrupt on line 319

impl R<bool, PR0_A>[src]

pub fn variant(&self) -> PR0_A[src]

Get enumerated values variant

pub fn is_not_pending(&self) -> bool[src]

Checks if the value of the field is NOTPENDING

pub fn is_pending(&self) -> bool[src]

Checks if the value of the field is PENDING

impl R<u32, Reg<u32, _PR1>>[src]

pub fn pr0(&self) -> PR0_R[src]

Bit 0 - Pending bit 0

pub fn pr1(&self) -> PR1_R[src]

Bit 1 - Pending bit 1

pub fn pr2(&self) -> PR2_R[src]

Bit 2 - Pending bit 2

pub fn pr3(&self) -> PR3_R[src]

Bit 3 - Pending bit 3

pub fn pr4(&self) -> PR4_R[src]

Bit 4 - Pending bit 4

pub fn pr5(&self) -> PR5_R[src]

Bit 5 - Pending bit 5

pub fn pr6(&self) -> PR6_R[src]

Bit 6 - Pending bit 6

pub fn pr7(&self) -> PR7_R[src]

Bit 7 - Pending bit 7

pub fn pr8(&self) -> PR8_R[src]

Bit 8 - Pending bit 8

pub fn pr9(&self) -> PR9_R[src]

Bit 9 - Pending bit 9

pub fn pr10(&self) -> PR10_R[src]

Bit 10 - Pending bit 10

pub fn pr11(&self) -> PR11_R[src]

Bit 11 - Pending bit 11

pub fn pr12(&self) -> PR12_R[src]

Bit 12 - Pending bit 12

pub fn pr13(&self) -> PR13_R[src]

Bit 13 - Pending bit 13

pub fn pr14(&self) -> PR14_R[src]

Bit 14 - Pending bit 14

pub fn pr15(&self) -> PR15_R[src]

Bit 15 - Pending bit 15

pub fn pr16(&self) -> PR16_R[src]

Bit 16 - Pending bit 16

pub fn pr17(&self) -> PR17_R[src]

Bit 17 - Pending bit 17

pub fn pr18(&self) -> PR18_R[src]

Bit 18 - Pending bit 18

pub fn pr19(&self) -> PR19_R[src]

Bit 19 - Pending bit 19

pub fn pr20(&self) -> PR20_R[src]

Bit 20 - Pending bit 20

pub fn pr21(&self) -> PR21_R[src]

Bit 21 - Pending bit 21

pub fn pr22(&self) -> PR22_R[src]

Bit 22 - Pending bit 22

pub fn pr29(&self) -> PR29_R[src]

Bit 29 - Pending bit 29

pub fn pr30(&self) -> PR30_R[src]

Bit 30 - Pending bit 30

pub fn pr31(&self) -> PR31_R[src]

Bit 31 - Pending bit 31

impl R<bool, MR32_A>[src]

pub fn variant(&self) -> MR32_A[src]

Get enumerated values variant

pub fn is_masked(&self) -> bool[src]

Checks if the value of the field is MASKED

pub fn is_unmasked(&self) -> bool[src]

Checks if the value of the field is UNMASKED

impl R<u32, Reg<u32, _IMR2>>[src]

pub fn mr32(&self) -> MR32_R[src]

Bit 0 - Interrupt Mask on external/internal line 32

pub fn mr33(&self) -> MR33_R[src]

Bit 1 - Interrupt Mask on external/internal line 33

pub fn mr34(&self) -> MR34_R[src]

Bit 2 - Interrupt Mask on external/internal line 34

pub fn mr35(&self) -> MR35_R[src]

Bit 3 - Interrupt Mask on external/internal line 35

impl R<bool, MR32_A>[src]

pub fn variant(&self) -> MR32_A[src]

Get enumerated values variant

pub fn is_masked(&self) -> bool[src]

Checks if the value of the field is MASKED

pub fn is_unmasked(&self) -> bool[src]

Checks if the value of the field is UNMASKED

impl R<u32, Reg<u32, _EMR2>>[src]

pub fn mr32(&self) -> MR32_R[src]

Bit 0 - Event mask on external/internal line 32

pub fn mr33(&self) -> MR33_R[src]

Bit 1 - Event mask on external/internal line 33

pub fn mr34(&self) -> MR34_R[src]

Bit 2 - Event mask on external/internal line 34

pub fn mr35(&self) -> MR35_R[src]

Bit 3 - Event mask on external/internal line 35

impl R<bool, TR32_A>[src]

pub fn variant(&self) -> TR32_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u32, Reg<u32, _RTSR2>>[src]

pub fn tr32(&self) -> TR32_R[src]

Bit 0 - Rising trigger event configuration bit of line 32

pub fn tr33(&self) -> TR33_R[src]

Bit 1 - Rising trigger event configuration bit of line 33

impl R<bool, TR32_A>[src]

pub fn variant(&self) -> TR32_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u32, Reg<u32, _FTSR2>>[src]

pub fn tr32(&self) -> TR32_R[src]

Bit 0 - Falling trigger event configuration bit of line 32

pub fn tr33(&self) -> TR33_R[src]

Bit 1 - Falling trigger event configuration bit of line 33

impl R<bool, SWIER32_A>[src]

pub fn variant(&self) -> Variant<bool, SWIER32_A>[src]

Get enumerated values variant

pub fn is_pend(&self) -> bool[src]

Checks if the value of the field is PEND

impl R<u32, Reg<u32, _SWIER2>>[src]

pub fn swier32(&self) -> SWIER32_R[src]

Bit 0 - Software interrupt on line 32

pub fn swier33(&self) -> SWIER33_R[src]

Bit 1 - Software interrupt on line 33

impl R<bool, PR32_A>[src]

pub fn variant(&self) -> PR32_A[src]

Get enumerated values variant

pub fn is_not_pending(&self) -> bool[src]

Checks if the value of the field is NOTPENDING

pub fn is_pending(&self) -> bool[src]

Checks if the value of the field is PENDING

impl R<u32, Reg<u32, _PR2>>[src]

pub fn pr32(&self) -> PR32_R[src]

Bit 0 - Pending bit on line 32

pub fn pr33(&self) -> PR33_R[src]

Bit 1 - Pending bit on line 33

impl R<u32, Reg<u32, _CR>>[src]

pub fn lpds(&self) -> LPDS_R[src]

Bit 0 - Low-power deep sleep

pub fn pdds(&self) -> PDDS_R[src]

Bit 1 - Power down deepsleep

pub fn cwuf(&self) -> CWUF_R[src]

Bit 2 - Clear wakeup flag

pub fn csbf(&self) -> CSBF_R[src]

Bit 3 - Clear standby flag

pub fn pvde(&self) -> PVDE_R[src]

Bit 4 - Power voltage detector enable

pub fn pls(&self) -> PLS_R[src]

Bits 5:7 - PVD level selection

pub fn dbp(&self) -> DBP_R[src]

Bit 8 - Disable backup domain write protection

impl R<u32, Reg<u32, _CSR>>[src]

pub fn wuf(&self) -> WUF_R[src]

Bit 0 - Wakeup flag

pub fn sbf(&self) -> SBF_R[src]

Bit 1 - Standby flag

pub fn pvdo(&self) -> PVDO_R[src]

Bit 2 - PVD output

pub fn ewup1(&self) -> EWUP1_R[src]

Bit 8 - Enable WKUP1 pin

pub fn ewup2(&self) -> EWUP2_R[src]

Bit 9 - Enable WKUP2 pin

impl R<bool, IDE_A>[src]

pub fn variant(&self) -> IDE_A[src]

Get enumerated values variant

pub fn is_standard(&self) -> bool[src]

Checks if the value of the field is STANDARD

pub fn is_extended(&self) -> bool[src]

Checks if the value of the field is EXTENDED

impl R<bool, RTR_A>[src]

pub fn variant(&self) -> RTR_A[src]

Get enumerated values variant

pub fn is_data(&self) -> bool[src]

Checks if the value of the field is DATA

pub fn is_remote(&self) -> bool[src]

Checks if the value of the field is REMOTE

impl R<u32, Reg<u32, _TIR>>[src]

pub fn stid(&self) -> STID_R[src]

Bits 21:31 - STID

pub fn exid(&self) -> EXID_R[src]

Bits 3:20 - EXID

pub fn ide(&self) -> IDE_R[src]

Bit 2 - IDE

pub fn rtr(&self) -> RTR_R[src]

Bit 1 - RTR

pub fn txrq(&self) -> TXRQ_R[src]

Bit 0 - TXRQ

impl R<u32, Reg<u32, _TDTR>>[src]

pub fn time(&self) -> TIME_R[src]

Bits 16:31 - TIME

pub fn tgt(&self) -> TGT_R[src]

Bit 8 - TGT

pub fn dlc(&self) -> DLC_R[src]

Bits 0:3 - DLC

impl R<u32, Reg<u32, _TDLR>>[src]

pub fn data3(&self) -> DATA3_R[src]

Bits 24:31 - DATA3

pub fn data2(&self) -> DATA2_R[src]

Bits 16:23 - DATA2

pub fn data1(&self) -> DATA1_R[src]

Bits 8:15 - DATA1

pub fn data0(&self) -> DATA0_R[src]

Bits 0:7 - DATA0

impl R<u32, Reg<u32, _TDHR>>[src]

pub fn data7(&self) -> DATA7_R[src]

Bits 24:31 - DATA7

pub fn data6(&self) -> DATA6_R[src]

Bits 16:23 - DATA6

pub fn data5(&self) -> DATA5_R[src]

Bits 8:15 - DATA5

pub fn data4(&self) -> DATA4_R[src]

Bits 0:7 - DATA4

impl R<bool, IDE_A>[src]

pub fn variant(&self) -> IDE_A[src]

Get enumerated values variant

pub fn is_standard(&self) -> bool[src]

Checks if the value of the field is STANDARD

pub fn is_extended(&self) -> bool[src]

Checks if the value of the field is EXTENDED

impl R<bool, RTR_A>[src]

pub fn variant(&self) -> RTR_A[src]

Get enumerated values variant

pub fn is_data(&self) -> bool[src]

Checks if the value of the field is DATA

pub fn is_remote(&self) -> bool[src]

Checks if the value of the field is REMOTE

impl R<u32, Reg<u32, _RIR>>[src]

pub fn stid(&self) -> STID_R[src]

Bits 21:31 - STID

pub fn exid(&self) -> EXID_R[src]

Bits 3:20 - EXID

pub fn ide(&self) -> IDE_R[src]

Bit 2 - IDE

pub fn rtr(&self) -> RTR_R[src]

Bit 1 - RTR

impl R<u32, Reg<u32, _RDTR>>[src]

pub fn time(&self) -> TIME_R[src]

Bits 16:31 - TIME

pub fn fmi(&self) -> FMI_R[src]

Bits 8:15 - FMI

pub fn dlc(&self) -> DLC_R[src]

Bits 0:3 - DLC

impl R<u32, Reg<u32, _RDLR>>[src]

pub fn data3(&self) -> DATA3_R[src]

Bits 24:31 - DATA3

pub fn data2(&self) -> DATA2_R[src]

Bits 16:23 - DATA2

pub fn data1(&self) -> DATA1_R[src]

Bits 8:15 - DATA1

pub fn data0(&self) -> DATA0_R[src]

Bits 0:7 - DATA0

impl R<u32, Reg<u32, _RDHR>>[src]

pub fn data7(&self) -> DATA7_R[src]

Bits 24:31 - DATA7

pub fn data6(&self) -> DATA6_R[src]

Bits 16:23 - DATA6

pub fn data5(&self) -> DATA5_R[src]

Bits 8:15 - DATA5

pub fn data4(&self) -> DATA4_R[src]

Bits 0:7 - DATA4

impl R<u32, Reg<u32, _FR1>>[src]

pub fn fb0(&self) -> FB0_R[src]

Bit 0 - Filter bits

pub fn fb1(&self) -> FB1_R[src]

Bit 1 - Filter bits

pub fn fb2(&self) -> FB2_R[src]

Bit 2 - Filter bits

pub fn fb3(&self) -> FB3_R[src]

Bit 3 - Filter bits

pub fn fb4(&self) -> FB4_R[src]

Bit 4 - Filter bits

pub fn fb5(&self) -> FB5_R[src]

Bit 5 - Filter bits

pub fn fb6(&self) -> FB6_R[src]

Bit 6 - Filter bits

pub fn fb7(&self) -> FB7_R[src]

Bit 7 - Filter bits

pub fn fb8(&self) -> FB8_R[src]

Bit 8 - Filter bits

pub fn fb9(&self) -> FB9_R[src]

Bit 9 - Filter bits

pub fn fb10(&self) -> FB10_R[src]

Bit 10 - Filter bits

pub fn fb11(&self) -> FB11_R[src]

Bit 11 - Filter bits

pub fn fb12(&self) -> FB12_R[src]

Bit 12 - Filter bits

pub fn fb13(&self) -> FB13_R[src]

Bit 13 - Filter bits

pub fn fb14(&self) -> FB14_R[src]

Bit 14 - Filter bits

pub fn fb15(&self) -> FB15_R[src]

Bit 15 - Filter bits

pub fn fb16(&self) -> FB16_R[src]

Bit 16 - Filter bits

pub fn fb17(&self) -> FB17_R[src]

Bit 17 - Filter bits

pub fn fb18(&self) -> FB18_R[src]

Bit 18 - Filter bits

pub fn fb19(&self) -> FB19_R[src]

Bit 19 - Filter bits

pub fn fb20(&self) -> FB20_R[src]

Bit 20 - Filter bits

pub fn fb21(&self) -> FB21_R[src]

Bit 21 - Filter bits

pub fn fb22(&self) -> FB22_R[src]

Bit 22 - Filter bits

pub fn fb23(&self) -> FB23_R[src]

Bit 23 - Filter bits

pub fn fb24(&self) -> FB24_R[src]

Bit 24 - Filter bits

pub fn fb25(&self) -> FB25_R[src]

Bit 25 - Filter bits

pub fn fb26(&self) -> FB26_R[src]

Bit 26 - Filter bits

pub fn fb27(&self) -> FB27_R[src]

Bit 27 - Filter bits

pub fn fb28(&self) -> FB28_R[src]

Bit 28 - Filter bits

pub fn fb29(&self) -> FB29_R[src]

Bit 29 - Filter bits

pub fn fb30(&self) -> FB30_R[src]

Bit 30 - Filter bits

pub fn fb31(&self) -> FB31_R[src]

Bit 31 - Filter bits

impl R<u32, Reg<u32, _FR2>>[src]

pub fn fb0(&self) -> FB0_R[src]

Bit 0 - Filter bits

pub fn fb1(&self) -> FB1_R[src]

Bit 1 - Filter bits

pub fn fb2(&self) -> FB2_R[src]

Bit 2 - Filter bits

pub fn fb3(&self) -> FB3_R[src]

Bit 3 - Filter bits

pub fn fb4(&self) -> FB4_R[src]

Bit 4 - Filter bits

pub fn fb5(&self) -> FB5_R[src]

Bit 5 - Filter bits

pub fn fb6(&self) -> FB6_R[src]

Bit 6 - Filter bits

pub fn fb7(&self) -> FB7_R[src]

Bit 7 - Filter bits

pub fn fb8(&self) -> FB8_R[src]

Bit 8 - Filter bits

pub fn fb9(&self) -> FB9_R[src]

Bit 9 - Filter bits

pub fn fb10(&self) -> FB10_R[src]

Bit 10 - Filter bits

pub fn fb11(&self) -> FB11_R[src]

Bit 11 - Filter bits

pub fn fb12(&self) -> FB12_R[src]

Bit 12 - Filter bits

pub fn fb13(&self) -> FB13_R[src]

Bit 13 - Filter bits

pub fn fb14(&self) -> FB14_R[src]

Bit 14 - Filter bits

pub fn fb15(&self) -> FB15_R[src]

Bit 15 - Filter bits

pub fn fb16(&self) -> FB16_R[src]

Bit 16 - Filter bits

pub fn fb17(&self) -> FB17_R[src]

Bit 17 - Filter bits

pub fn fb18(&self) -> FB18_R[src]

Bit 18 - Filter bits

pub fn fb19(&self) -> FB19_R[src]

Bit 19 - Filter bits

pub fn fb20(&self) -> FB20_R[src]

Bit 20 - Filter bits

pub fn fb21(&self) -> FB21_R[src]

Bit 21 - Filter bits

pub fn fb22(&self) -> FB22_R[src]

Bit 22 - Filter bits

pub fn fb23(&self) -> FB23_R[src]

Bit 23 - Filter bits

pub fn fb24(&self) -> FB24_R[src]

Bit 24 - Filter bits

pub fn fb25(&self) -> FB25_R[src]

Bit 25 - Filter bits

pub fn fb26(&self) -> FB26_R[src]

Bit 26 - Filter bits

pub fn fb27(&self) -> FB27_R[src]

Bit 27 - Filter bits

pub fn fb28(&self) -> FB28_R[src]

Bit 28 - Filter bits

pub fn fb29(&self) -> FB29_R[src]

Bit 29 - Filter bits

pub fn fb30(&self) -> FB30_R[src]

Bit 30 - Filter bits

pub fn fb31(&self) -> FB31_R[src]

Bit 31 - Filter bits

impl R<u32, Reg<u32, _MCR>>[src]

pub fn dbf(&self) -> DBF_R[src]

Bit 16 - DBF

pub fn reset(&self) -> RESET_R[src]

Bit 15 - RESET

pub fn ttcm(&self) -> TTCM_R[src]

Bit 7 - TTCM

pub fn abom(&self) -> ABOM_R[src]

Bit 6 - ABOM

pub fn awum(&self) -> AWUM_R[src]

Bit 5 - AWUM

pub fn nart(&self) -> NART_R[src]

Bit 4 - NART

pub fn rflm(&self) -> RFLM_R[src]

Bit 3 - RFLM

pub fn txfp(&self) -> TXFP_R[src]

Bit 2 - TXFP

pub fn sleep(&self) -> SLEEP_R[src]

Bit 1 - SLEEP

pub fn inrq(&self) -> INRQ_R[src]

Bit 0 - INRQ

impl R<u32, Reg<u32, _MSR>>[src]

pub fn rx(&self) -> RX_R[src]

Bit 11 - RX

pub fn samp(&self) -> SAMP_R[src]

Bit 10 - SAMP

pub fn rxm(&self) -> RXM_R[src]

Bit 9 - RXM

pub fn txm(&self) -> TXM_R[src]

Bit 8 - TXM

pub fn slaki(&self) -> SLAKI_R[src]

Bit 4 - SLAKI

pub fn wkui(&self) -> WKUI_R[src]

Bit 3 - WKUI

pub fn erri(&self) -> ERRI_R[src]

Bit 2 - ERRI

pub fn slak(&self) -> SLAK_R[src]

Bit 1 - SLAK

pub fn inak(&self) -> INAK_R[src]

Bit 0 - INAK

impl R<u32, Reg<u32, _TSR>>[src]

pub fn low2(&self) -> LOW2_R[src]

Bit 31 - Lowest priority flag for mailbox 2

pub fn low1(&self) -> LOW1_R[src]

Bit 30 - Lowest priority flag for mailbox 1

pub fn low0(&self) -> LOW0_R[src]

Bit 29 - Lowest priority flag for mailbox 0

pub fn tme2(&self) -> TME2_R[src]

Bit 28 - Lowest priority flag for mailbox 2

pub fn tme1(&self) -> TME1_R[src]

Bit 27 - Lowest priority flag for mailbox 1

pub fn tme0(&self) -> TME0_R[src]

Bit 26 - Lowest priority flag for mailbox 0

pub fn code(&self) -> CODE_R[src]

Bits 24:25 - CODE

pub fn abrq2(&self) -> ABRQ2_R[src]

Bit 23 - ABRQ2

pub fn terr2(&self) -> TERR2_R[src]

Bit 19 - TERR2

pub fn alst2(&self) -> ALST2_R[src]

Bit 18 - ALST2

pub fn txok2(&self) -> TXOK2_R[src]

Bit 17 - TXOK2

pub fn rqcp2(&self) -> RQCP2_R[src]

Bit 16 - RQCP2

pub fn abrq1(&self) -> ABRQ1_R[src]

Bit 15 - ABRQ1

pub fn terr1(&self) -> TERR1_R[src]

Bit 11 - TERR1

pub fn alst1(&self) -> ALST1_R[src]

Bit 10 - ALST1

pub fn txok1(&self) -> TXOK1_R[src]

Bit 9 - TXOK1

pub fn rqcp1(&self) -> RQCP1_R[src]

Bit 8 - RQCP1

pub fn abrq0(&self) -> ABRQ0_R[src]

Bit 7 - ABRQ0

pub fn terr0(&self) -> TERR0_R[src]

Bit 3 - TERR0

pub fn alst0(&self) -> ALST0_R[src]

Bit 2 - ALST0

pub fn txok0(&self) -> TXOK0_R[src]

Bit 1 - TXOK0

pub fn rqcp0(&self) -> RQCP0_R[src]

Bit 0 - RQCP0

impl R<bool, RFOM_A>[src]

pub fn variant(&self) -> Variant<bool, RFOM_A>[src]

Get enumerated values variant

pub fn is_release(&self) -> bool[src]

Checks if the value of the field is RELEASE

impl R<bool, FOVR_A>[src]

pub fn variant(&self) -> FOVR_A[src]

Get enumerated values variant

pub fn is_no_overrun(&self) -> bool[src]

Checks if the value of the field is NOOVERRUN

pub fn is_overrun(&self) -> bool[src]

Checks if the value of the field is OVERRUN

impl R<bool, FULL_A>[src]

pub fn variant(&self) -> FULL_A[src]

Get enumerated values variant

pub fn is_not_full(&self) -> bool[src]

Checks if the value of the field is NOTFULL

pub fn is_full(&self) -> bool[src]

Checks if the value of the field is FULL

impl R<u32, Reg<u32, _RFR>>[src]

pub fn rfom(&self) -> RFOM_R[src]

Bit 5 - RFOM0

pub fn fovr(&self) -> FOVR_R[src]

Bit 4 - FOVR0

pub fn full(&self) -> FULL_R[src]

Bit 3 - FULL0

pub fn fmp(&self) -> FMP_R[src]

Bits 0:1 - FMP0

impl R<bool, SLKIE_A>[src]

pub fn variant(&self) -> SLKIE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, WKUIE_A>[src]

pub fn variant(&self) -> WKUIE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, ERRIE_A>[src]

pub fn variant(&self) -> ERRIE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, LECIE_A>[src]

pub fn variant(&self) -> LECIE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, BOFIE_A>[src]

pub fn variant(&self) -> BOFIE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, EPVIE_A>[src]

pub fn variant(&self) -> EPVIE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, EWGIE_A>[src]

pub fn variant(&self) -> EWGIE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, FOVIE1_A>[src]

pub fn variant(&self) -> FOVIE1_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, FFIE1_A>[src]

pub fn variant(&self) -> FFIE1_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, FMPIE1_A>[src]

pub fn variant(&self) -> FMPIE1_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, FOVIE0_A>[src]

pub fn variant(&self) -> FOVIE0_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, FFIE0_A>[src]

pub fn variant(&self) -> FFIE0_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, FMPIE0_A>[src]

pub fn variant(&self) -> FMPIE0_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, TMEIE_A>[src]

pub fn variant(&self) -> TMEIE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u32, Reg<u32, _IER>>[src]

pub fn slkie(&self) -> SLKIE_R[src]

Bit 17 - SLKIE

pub fn wkuie(&self) -> WKUIE_R[src]

Bit 16 - WKUIE

pub fn errie(&self) -> ERRIE_R[src]

Bit 15 - ERRIE

pub fn lecie(&self) -> LECIE_R[src]

Bit 11 - LECIE

pub fn bofie(&self) -> BOFIE_R[src]

Bit 10 - BOFIE

pub fn epvie(&self) -> EPVIE_R[src]

Bit 9 - EPVIE

pub fn ewgie(&self) -> EWGIE_R[src]

Bit 8 - EWGIE

pub fn fovie1(&self) -> FOVIE1_R[src]

Bit 6 - FOVIE1

pub fn ffie1(&self) -> FFIE1_R[src]

Bit 5 - FFIE1

pub fn fmpie1(&self) -> FMPIE1_R[src]

Bit 4 - FMPIE1

pub fn fovie0(&self) -> FOVIE0_R[src]

Bit 3 - FOVIE0

pub fn ffie0(&self) -> FFIE0_R[src]

Bit 2 - FFIE0

pub fn fmpie0(&self) -> FMPIE0_R[src]

Bit 1 - FMPIE0

pub fn tmeie(&self) -> TMEIE_R[src]

Bit 0 - TMEIE

impl R<u8, LEC_A>[src]

pub fn variant(&self) -> LEC_A[src]

Get enumerated values variant

pub fn is_no_error(&self) -> bool[src]

Checks if the value of the field is NOERROR

pub fn is_stuff(&self) -> bool[src]

Checks if the value of the field is STUFF

pub fn is_form(&self) -> bool[src]

Checks if the value of the field is FORM

pub fn is_ack(&self) -> bool[src]

Checks if the value of the field is ACK

pub fn is_bit_recessive(&self) -> bool[src]

Checks if the value of the field is BITRECESSIVE

pub fn is_bit_dominant(&self) -> bool[src]

Checks if the value of the field is BITDOMINANT

pub fn is_crc(&self) -> bool[src]

Checks if the value of the field is CRC

pub fn is_custom(&self) -> bool[src]

Checks if the value of the field is CUSTOM

impl R<u32, Reg<u32, _ESR>>[src]

pub fn rec(&self) -> REC_R[src]

Bits 24:31 - REC

pub fn tec(&self) -> TEC_R[src]

Bits 16:23 - TEC

pub fn lec(&self) -> LEC_R[src]

Bits 4:6 - LEC

pub fn boff(&self) -> BOFF_R[src]

Bit 2 - BOFF

pub fn epvf(&self) -> EPVF_R[src]

Bit 1 - EPVF

pub fn ewgf(&self) -> EWGF_R[src]

Bit 0 - EWGF

impl R<bool, SILM_A>[src]

pub fn variant(&self) -> SILM_A[src]

Get enumerated values variant

pub fn is_normal(&self) -> bool[src]

Checks if the value of the field is NORMAL

pub fn is_silent(&self) -> bool[src]

Checks if the value of the field is SILENT

impl R<bool, LBKM_A>[src]

pub fn variant(&self) -> LBKM_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u32, Reg<u32, _BTR>>[src]

pub fn silm(&self) -> SILM_R[src]

Bit 31 - SILM

pub fn lbkm(&self) -> LBKM_R[src]

Bit 30 - LBKM

pub fn sjw(&self) -> SJW_R[src]

Bits 24:25 - SJW

pub fn ts2(&self) -> TS2_R[src]

Bits 20:22 - TS2

pub fn ts1(&self) -> TS1_R[src]

Bits 16:19 - TS1

pub fn brp(&self) -> BRP_R[src]

Bits 0:9 - BRP

impl R<u32, Reg<u32, _FMR>>[src]

pub fn can2sb(&self) -> CAN2SB_R[src]

Bits 8:13 - CAN2 start bank

pub fn finit(&self) -> FINIT_R[src]

Bit 0 - Filter init mode

impl R<u32, Reg<u32, _FM1R>>[src]

pub fn fbm0(&self) -> FBM0_R[src]

Bit 0 - Filter mode

pub fn fbm1(&self) -> FBM1_R[src]

Bit 1 - Filter mode

pub fn fbm2(&self) -> FBM2_R[src]

Bit 2 - Filter mode

pub fn fbm3(&self) -> FBM3_R[src]

Bit 3 - Filter mode

pub fn fbm4(&self) -> FBM4_R[src]

Bit 4 - Filter mode

pub fn fbm5(&self) -> FBM5_R[src]

Bit 5 - Filter mode

pub fn fbm6(&self) -> FBM6_R[src]

Bit 6 - Filter mode

pub fn fbm7(&self) -> FBM7_R[src]

Bit 7 - Filter mode

pub fn fbm8(&self) -> FBM8_R[src]

Bit 8 - Filter mode

pub fn fbm9(&self) -> FBM9_R[src]

Bit 9 - Filter mode

pub fn fbm10(&self) -> FBM10_R[src]

Bit 10 - Filter mode

pub fn fbm11(&self) -> FBM11_R[src]

Bit 11 - Filter mode

pub fn fbm12(&self) -> FBM12_R[src]

Bit 12 - Filter mode

pub fn fbm13(&self) -> FBM13_R[src]

Bit 13 - Filter mode

pub fn fbm14(&self) -> FBM14_R[src]

Bit 14 - Filter mode

pub fn fbm15(&self) -> FBM15_R[src]

Bit 15 - Filter mode

pub fn fbm16(&self) -> FBM16_R[src]

Bit 16 - Filter mode

pub fn fbm17(&self) -> FBM17_R[src]

Bit 17 - Filter mode

pub fn fbm18(&self) -> FBM18_R[src]

Bit 18 - Filter mode

pub fn fbm19(&self) -> FBM19_R[src]

Bit 19 - Filter mode

pub fn fbm20(&self) -> FBM20_R[src]

Bit 20 - Filter mode

pub fn fbm21(&self) -> FBM21_R[src]

Bit 21 - Filter mode

pub fn fbm22(&self) -> FBM22_R[src]

Bit 22 - Filter mode

pub fn fbm23(&self) -> FBM23_R[src]

Bit 23 - Filter mode

pub fn fbm24(&self) -> FBM24_R[src]

Bit 24 - Filter mode

pub fn fbm25(&self) -> FBM25_R[src]

Bit 25 - Filter mode

pub fn fbm26(&self) -> FBM26_R[src]

Bit 26 - Filter mode

pub fn fbm27(&self) -> FBM27_R[src]

Bit 27 - Filter mode

impl R<u32, Reg<u32, _FS1R>>[src]

pub fn fsc0(&self) -> FSC0_R[src]

Bit 0 - Filter scale configuration

pub fn fsc1(&self) -> FSC1_R[src]

Bit 1 - Filter scale configuration

pub fn fsc2(&self) -> FSC2_R[src]

Bit 2 - Filter scale configuration

pub fn fsc3(&self) -> FSC3_R[src]

Bit 3 - Filter scale configuration

pub fn fsc4(&self) -> FSC4_R[src]

Bit 4 - Filter scale configuration

pub fn fsc5(&self) -> FSC5_R[src]

Bit 5 - Filter scale configuration

pub fn fsc6(&self) -> FSC6_R[src]

Bit 6 - Filter scale configuration

pub fn fsc7(&self) -> FSC7_R[src]

Bit 7 - Filter scale configuration

pub fn fsc8(&self) -> FSC8_R[src]

Bit 8 - Filter scale configuration

pub fn fsc9(&self) -> FSC9_R[src]

Bit 9 - Filter scale configuration

pub fn fsc10(&self) -> FSC10_R[src]

Bit 10 - Filter scale configuration

pub fn fsc11(&self) -> FSC11_R[src]

Bit 11 - Filter scale configuration

pub fn fsc12(&self) -> FSC12_R[src]

Bit 12 - Filter scale configuration

pub fn fsc13(&self) -> FSC13_R[src]

Bit 13 - Filter scale configuration

pub fn fsc14(&self) -> FSC14_R[src]

Bit 14 - Filter scale configuration

pub fn fsc15(&self) -> FSC15_R[src]

Bit 15 - Filter scale configuration

pub fn fsc16(&self) -> FSC16_R[src]

Bit 16 - Filter scale configuration

pub fn fsc17(&self) -> FSC17_R[src]

Bit 17 - Filter scale configuration

pub fn fsc18(&self) -> FSC18_R[src]

Bit 18 - Filter scale configuration

pub fn fsc19(&self) -> FSC19_R[src]

Bit 19 - Filter scale configuration

pub fn fsc20(&self) -> FSC20_R[src]

Bit 20 - Filter scale configuration

pub fn fsc21(&self) -> FSC21_R[src]

Bit 21 - Filter scale configuration

pub fn fsc22(&self) -> FSC22_R[src]

Bit 22 - Filter scale configuration

pub fn fsc23(&self) -> FSC23_R[src]

Bit 23 - Filter scale configuration

pub fn fsc24(&self) -> FSC24_R[src]

Bit 24 - Filter scale configuration

pub fn fsc25(&self) -> FSC25_R[src]

Bit 25 - Filter scale configuration

pub fn fsc26(&self) -> FSC26_R[src]

Bit 26 - Filter scale configuration

pub fn fsc27(&self) -> FSC27_R[src]

Bit 27 - Filter scale configuration

impl R<u32, Reg<u32, _FFA1R>>[src]

pub fn ffa0(&self) -> FFA0_R[src]

Bit 0 - Filter FIFO assignment for filter 0

pub fn ffa1(&self) -> FFA1_R[src]

Bit 1 - Filter FIFO assignment for filter 1

pub fn ffa2(&self) -> FFA2_R[src]

Bit 2 - Filter FIFO assignment for filter 2

pub fn ffa3(&self) -> FFA3_R[src]

Bit 3 - Filter FIFO assignment for filter 3

pub fn ffa4(&self) -> FFA4_R[src]

Bit 4 - Filter FIFO assignment for filter 4

pub fn ffa5(&self) -> FFA5_R[src]

Bit 5 - Filter FIFO assignment for filter 5

pub fn ffa6(&self) -> FFA6_R[src]

Bit 6 - Filter FIFO assignment for filter 6

pub fn ffa7(&self) -> FFA7_R[src]

Bit 7 - Filter FIFO assignment for filter 7

pub fn ffa8(&self) -> FFA8_R[src]

Bit 8 - Filter FIFO assignment for filter 8

pub fn ffa9(&self) -> FFA9_R[src]

Bit 9 - Filter FIFO assignment for filter 9

pub fn ffa10(&self) -> FFA10_R[src]

Bit 10 - Filter FIFO assignment for filter 10

pub fn ffa11(&self) -> FFA11_R[src]

Bit 11 - Filter FIFO assignment for filter 11

pub fn ffa12(&self) -> FFA12_R[src]

Bit 12 - Filter FIFO assignment for filter 12

pub fn ffa13(&self) -> FFA13_R[src]

Bit 13 - Filter FIFO assignment for filter 13

pub fn ffa14(&self) -> FFA14_R[src]

Bit 14 - Filter FIFO assignment for filter 14

pub fn ffa15(&self) -> FFA15_R[src]

Bit 15 - Filter FIFO assignment for filter 15

pub fn ffa16(&self) -> FFA16_R[src]

Bit 16 - Filter FIFO assignment for filter 16

pub fn ffa17(&self) -> FFA17_R[src]

Bit 17 - Filter FIFO assignment for filter 17

pub fn ffa18(&self) -> FFA18_R[src]

Bit 18 - Filter FIFO assignment for filter 18

pub fn ffa19(&self) -> FFA19_R[src]

Bit 19 - Filter FIFO assignment for filter 19

pub fn ffa20(&self) -> FFA20_R[src]

Bit 20 - Filter FIFO assignment for filter 20

pub fn ffa21(&self) -> FFA21_R[src]

Bit 21 - Filter FIFO assignment for filter 21

pub fn ffa22(&self) -> FFA22_R[src]

Bit 22 - Filter FIFO assignment for filter 22

pub fn ffa23(&self) -> FFA23_R[src]

Bit 23 - Filter FIFO assignment for filter 23

pub fn ffa24(&self) -> FFA24_R[src]

Bit 24 - Filter FIFO assignment for filter 24

pub fn ffa25(&self) -> FFA25_R[src]

Bit 25 - Filter FIFO assignment for filter 25

pub fn ffa26(&self) -> FFA26_R[src]

Bit 26 - Filter FIFO assignment for filter 26

pub fn ffa27(&self) -> FFA27_R[src]

Bit 27 - Filter FIFO assignment for filter 27

impl R<u32, Reg<u32, _FA1R>>[src]

pub fn fact0(&self) -> FACT0_R[src]

Bit 0 - Filter active

pub fn fact1(&self) -> FACT1_R[src]

Bit 1 - Filter active

pub fn fact2(&self) -> FACT2_R[src]

Bit 2 - Filter active

pub fn fact3(&self) -> FACT3_R[src]

Bit 3 - Filter active

pub fn fact4(&self) -> FACT4_R[src]

Bit 4 - Filter active

pub fn fact5(&self) -> FACT5_R[src]

Bit 5 - Filter active

pub fn fact6(&self) -> FACT6_R[src]

Bit 6 - Filter active

pub fn fact7(&self) -> FACT7_R[src]

Bit 7 - Filter active

pub fn fact8(&self) -> FACT8_R[src]

Bit 8 - Filter active

pub fn fact9(&self) -> FACT9_R[src]

Bit 9 - Filter active

pub fn fact10(&self) -> FACT10_R[src]

Bit 10 - Filter active

pub fn fact11(&self) -> FACT11_R[src]

Bit 11 - Filter active

pub fn fact12(&self) -> FACT12_R[src]

Bit 12 - Filter active

pub fn fact13(&self) -> FACT13_R[src]

Bit 13 - Filter active

pub fn fact14(&self) -> FACT14_R[src]

Bit 14 - Filter active

pub fn fact15(&self) -> FACT15_R[src]

Bit 15 - Filter active

pub fn fact16(&self) -> FACT16_R[src]

Bit 16 - Filter active

pub fn fact17(&self) -> FACT17_R[src]

Bit 17 - Filter active

pub fn fact18(&self) -> FACT18_R[src]

Bit 18 - Filter active

pub fn fact19(&self) -> FACT19_R[src]

Bit 19 - Filter active

pub fn fact20(&self) -> FACT20_R[src]

Bit 20 - Filter active

pub fn fact21(&self) -> FACT21_R[src]

Bit 21 - Filter active

pub fn fact22(&self) -> FACT22_R[src]

Bit 22 - Filter active

pub fn fact23(&self) -> FACT23_R[src]

Bit 23 - Filter active

pub fn fact24(&self) -> FACT24_R[src]

Bit 24 - Filter active

pub fn fact25(&self) -> FACT25_R[src]

Bit 25 - Filter active

pub fn fact26(&self) -> FACT26_R[src]

Bit 26 - Filter active

pub fn fact27(&self) -> FACT27_R[src]

Bit 27 - Filter active

impl R<u8, STAT_TX_A>[src]

pub fn variant(&self) -> STAT_TX_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_stall(&self) -> bool[src]

Checks if the value of the field is STALL

pub fn is_nak(&self) -> bool[src]

Checks if the value of the field is NAK

pub fn is_valid(&self) -> bool[src]

Checks if the value of the field is VALID

impl R<u8, EP_TYPE_A>[src]

pub fn variant(&self) -> EP_TYPE_A[src]

Get enumerated values variant

pub fn is_bulk(&self) -> bool[src]

Checks if the value of the field is BULK

pub fn is_control(&self) -> bool[src]

Checks if the value of the field is CONTROL

pub fn is_iso(&self) -> bool[src]

Checks if the value of the field is ISO

pub fn is_interrupt(&self) -> bool[src]

Checks if the value of the field is INTERRUPT

impl R<u8, STAT_RX_A>[src]

pub fn variant(&self) -> STAT_RX_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_stall(&self) -> bool[src]

Checks if the value of the field is STALL

pub fn is_nak(&self) -> bool[src]

Checks if the value of the field is NAK

pub fn is_valid(&self) -> bool[src]

Checks if the value of the field is VALID

impl R<u32, Reg<u32, _EP0R>>[src]

pub fn ea(&self) -> EA_R[src]

Bits 0:3 - Endpoint address

pub fn stat_tx(&self) -> STAT_TX_R[src]

Bits 4:5 - Status bits, for transmission transfers

pub fn dtog_tx(&self) -> DTOG_TX_R[src]

Bit 6 - Data Toggle, for transmission transfers

pub fn ctr_tx(&self) -> CTR_TX_R[src]

Bit 7 - Correct Transfer for transmission

pub fn ep_kind(&self) -> EP_KIND_R[src]

Bit 8 - Endpoint kind

pub fn ep_type(&self) -> EP_TYPE_R[src]

Bits 9:10 - Endpoint type

pub fn setup(&self) -> SETUP_R[src]

Bit 11 - Setup transaction completed

pub fn stat_rx(&self) -> STAT_RX_R[src]

Bits 12:13 - Status bits, for reception transfers

pub fn dtog_rx(&self) -> DTOG_RX_R[src]

Bit 14 - Data Toggle, for reception transfers

pub fn ctr_rx(&self) -> CTR_RX_R[src]

Bit 15 - Correct transfer for reception

impl R<u8, STAT_TX_A>[src]

pub fn variant(&self) -> STAT_TX_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_stall(&self) -> bool[src]

Checks if the value of the field is STALL

pub fn is_nak(&self) -> bool[src]

Checks if the value of the field is NAK

pub fn is_valid(&self) -> bool[src]

Checks if the value of the field is VALID

impl R<u8, EP_TYPE_A>[src]

pub fn variant(&self) -> EP_TYPE_A[src]

Get enumerated values variant

pub fn is_bulk(&self) -> bool[src]

Checks if the value of the field is BULK

pub fn is_control(&self) -> bool[src]

Checks if the value of the field is CONTROL

pub fn is_iso(&self) -> bool[src]

Checks if the value of the field is ISO

pub fn is_interrupt(&self) -> bool[src]

Checks if the value of the field is INTERRUPT

impl R<u8, STAT_RX_A>[src]

pub fn variant(&self) -> STAT_RX_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_stall(&self) -> bool[src]

Checks if the value of the field is STALL

pub fn is_nak(&self) -> bool[src]

Checks if the value of the field is NAK

pub fn is_valid(&self) -> bool[src]

Checks if the value of the field is VALID

impl R<u32, Reg<u32, _EP1R>>[src]

pub fn ea(&self) -> EA_R[src]

Bits 0:3 - Endpoint address

pub fn stat_tx(&self) -> STAT_TX_R[src]

Bits 4:5 - Status bits, for transmission transfers

pub fn dtog_tx(&self) -> DTOG_TX_R[src]

Bit 6 - Data Toggle, for transmission transfers

pub fn ctr_tx(&self) -> CTR_TX_R[src]

Bit 7 - Correct Transfer for transmission

pub fn ep_kind(&self) -> EP_KIND_R[src]

Bit 8 - Endpoint kind

pub fn ep_type(&self) -> EP_TYPE_R[src]

Bits 9:10 - Endpoint type

pub fn setup(&self) -> SETUP_R[src]

Bit 11 - Setup transaction completed

pub fn stat_rx(&self) -> STAT_RX_R[src]

Bits 12:13 - Status bits, for reception transfers

pub fn dtog_rx(&self) -> DTOG_RX_R[src]

Bit 14 - Data Toggle, for reception transfers

pub fn ctr_rx(&self) -> CTR_RX_R[src]

Bit 15 - Correct transfer for reception

impl R<u8, STAT_TX_A>[src]

pub fn variant(&self) -> STAT_TX_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_stall(&self) -> bool[src]

Checks if the value of the field is STALL

pub fn is_nak(&self) -> bool[src]

Checks if the value of the field is NAK

pub fn is_valid(&self) -> bool[src]

Checks if the value of the field is VALID

impl R<u8, EP_TYPE_A>[src]

pub fn variant(&self) -> EP_TYPE_A[src]

Get enumerated values variant

pub fn is_bulk(&self) -> bool[src]

Checks if the value of the field is BULK

pub fn is_control(&self) -> bool[src]

Checks if the value of the field is CONTROL

pub fn is_iso(&self) -> bool[src]

Checks if the value of the field is ISO

pub fn is_interrupt(&self) -> bool[src]

Checks if the value of the field is INTERRUPT

impl R<u8, STAT_RX_A>[src]

pub fn variant(&self) -> STAT_RX_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_stall(&self) -> bool[src]

Checks if the value of the field is STALL

pub fn is_nak(&self) -> bool[src]

Checks if the value of the field is NAK

pub fn is_valid(&self) -> bool[src]

Checks if the value of the field is VALID

impl R<u32, Reg<u32, _EP2R>>[src]

pub fn ea(&self) -> EA_R[src]

Bits 0:3 - Endpoint address

pub fn stat_tx(&self) -> STAT_TX_R[src]

Bits 4:5 - Status bits, for transmission transfers

pub fn dtog_tx(&self) -> DTOG_TX_R[src]

Bit 6 - Data Toggle, for transmission transfers

pub fn ctr_tx(&self) -> CTR_TX_R[src]

Bit 7 - Correct Transfer for transmission

pub fn ep_kind(&self) -> EP_KIND_R[src]

Bit 8 - Endpoint kind

pub fn ep_type(&self) -> EP_TYPE_R[src]

Bits 9:10 - Endpoint type

pub fn setup(&self) -> SETUP_R[src]

Bit 11 - Setup transaction completed

pub fn stat_rx(&self) -> STAT_RX_R[src]

Bits 12:13 - Status bits, for reception transfers

pub fn dtog_rx(&self) -> DTOG_RX_R[src]

Bit 14 - Data Toggle, for reception transfers

pub fn ctr_rx(&self) -> CTR_RX_R[src]

Bit 15 - Correct transfer for reception

impl R<u8, STAT_TX_A>[src]

pub fn variant(&self) -> STAT_TX_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_stall(&self) -> bool[src]

Checks if the value of the field is STALL

pub fn is_nak(&self) -> bool[src]

Checks if the value of the field is NAK

pub fn is_valid(&self) -> bool[src]

Checks if the value of the field is VALID

impl R<u8, EP_TYPE_A>[src]

pub fn variant(&self) -> EP_TYPE_A[src]

Get enumerated values variant

pub fn is_bulk(&self) -> bool[src]

Checks if the value of the field is BULK

pub fn is_control(&self) -> bool[src]

Checks if the value of the field is CONTROL

pub fn is_iso(&self) -> bool[src]

Checks if the value of the field is ISO

pub fn is_interrupt(&self) -> bool[src]

Checks if the value of the field is INTERRUPT

impl R<u8, STAT_RX_A>[src]

pub fn variant(&self) -> STAT_RX_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_stall(&self) -> bool[src]

Checks if the value of the field is STALL

pub fn is_nak(&self) -> bool[src]

Checks if the value of the field is NAK

pub fn is_valid(&self) -> bool[src]

Checks if the value of the field is VALID

impl R<u32, Reg<u32, _EP3R>>[src]

pub fn ea(&self) -> EA_R[src]

Bits 0:3 - Endpoint address

pub fn stat_tx(&self) -> STAT_TX_R[src]

Bits 4:5 - Status bits, for transmission transfers

pub fn dtog_tx(&self) -> DTOG_TX_R[src]

Bit 6 - Data Toggle, for transmission transfers

pub fn ctr_tx(&self) -> CTR_TX_R[src]

Bit 7 - Correct Transfer for transmission

pub fn ep_kind(&self) -> EP_KIND_R[src]

Bit 8 - Endpoint kind

pub fn ep_type(&self) -> EP_TYPE_R[src]

Bits 9:10 - Endpoint type

pub fn setup(&self) -> SETUP_R[src]

Bit 11 - Setup transaction completed

pub fn stat_rx(&self) -> STAT_RX_R[src]

Bits 12:13 - Status bits, for reception transfers

pub fn dtog_rx(&self) -> DTOG_RX_R[src]

Bit 14 - Data Toggle, for reception transfers

pub fn ctr_rx(&self) -> CTR_RX_R[src]

Bit 15 - Correct transfer for reception

impl R<u8, STAT_TX_A>[src]

pub fn variant(&self) -> STAT_TX_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_stall(&self) -> bool[src]

Checks if the value of the field is STALL

pub fn is_nak(&self) -> bool[src]

Checks if the value of the field is NAK

pub fn is_valid(&self) -> bool[src]

Checks if the value of the field is VALID

impl R<u8, EP_TYPE_A>[src]

pub fn variant(&self) -> EP_TYPE_A[src]

Get enumerated values variant

pub fn is_bulk(&self) -> bool[src]

Checks if the value of the field is BULK

pub fn is_control(&self) -> bool[src]

Checks if the value of the field is CONTROL

pub fn is_iso(&self) -> bool[src]

Checks if the value of the field is ISO

pub fn is_interrupt(&self) -> bool[src]

Checks if the value of the field is INTERRUPT

impl R<u8, STAT_RX_A>[src]

pub fn variant(&self) -> STAT_RX_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_stall(&self) -> bool[src]

Checks if the value of the field is STALL

pub fn is_nak(&self) -> bool[src]

Checks if the value of the field is NAK

pub fn is_valid(&self) -> bool[src]

Checks if the value of the field is VALID

impl R<u32, Reg<u32, _EP4R>>[src]

pub fn ea(&self) -> EA_R[src]

Bits 0:3 - Endpoint address

pub fn stat_tx(&self) -> STAT_TX_R[src]

Bits 4:5 - Status bits, for transmission transfers

pub fn dtog_tx(&self) -> DTOG_TX_R[src]

Bit 6 - Data Toggle, for transmission transfers

pub fn ctr_tx(&self) -> CTR_TX_R[src]

Bit 7 - Correct Transfer for transmission

pub fn ep_kind(&self) -> EP_KIND_R[src]

Bit 8 - Endpoint kind

pub fn ep_type(&self) -> EP_TYPE_R[src]

Bits 9:10 - Endpoint type

pub fn setup(&self) -> SETUP_R[src]

Bit 11 - Setup transaction completed

pub fn stat_rx(&self) -> STAT_RX_R[src]

Bits 12:13 - Status bits, for reception transfers

pub fn dtog_rx(&self) -> DTOG_RX_R[src]

Bit 14 - Data Toggle, for reception transfers

pub fn ctr_rx(&self) -> CTR_RX_R[src]

Bit 15 - Correct transfer for reception

impl R<u8, STAT_TX_A>[src]

pub fn variant(&self) -> STAT_TX_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_stall(&self) -> bool[src]

Checks if the value of the field is STALL

pub fn is_nak(&self) -> bool[src]

Checks if the value of the field is NAK

pub fn is_valid(&self) -> bool[src]

Checks if the value of the field is VALID

impl R<u8, EP_TYPE_A>[src]

pub fn variant(&self) -> EP_TYPE_A[src]

Get enumerated values variant

pub fn is_bulk(&self) -> bool[src]

Checks if the value of the field is BULK

pub fn is_control(&self) -> bool[src]

Checks if the value of the field is CONTROL

pub fn is_iso(&self) -> bool[src]

Checks if the value of the field is ISO

pub fn is_interrupt(&self) -> bool[src]

Checks if the value of the field is INTERRUPT

impl R<u8, STAT_RX_A>[src]

pub fn variant(&self) -> STAT_RX_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_stall(&self) -> bool[src]

Checks if the value of the field is STALL

pub fn is_nak(&self) -> bool[src]

Checks if the value of the field is NAK

pub fn is_valid(&self) -> bool[src]

Checks if the value of the field is VALID

impl R<u32, Reg<u32, _EP5R>>[src]

pub fn ea(&self) -> EA_R[src]

Bits 0:3 - Endpoint address

pub fn stat_tx(&self) -> STAT_TX_R[src]

Bits 4:5 - Status bits, for transmission transfers

pub fn dtog_tx(&self) -> DTOG_TX_R[src]

Bit 6 - Data Toggle, for transmission transfers

pub fn ctr_tx(&self) -> CTR_TX_R[src]

Bit 7 - Correct Transfer for transmission

pub fn ep_kind(&self) -> EP_KIND_R[src]

Bit 8 - Endpoint kind

pub fn ep_type(&self) -> EP_TYPE_R[src]

Bits 9:10 - Endpoint type

pub fn setup(&self) -> SETUP_R[src]

Bit 11 - Setup transaction completed

pub fn stat_rx(&self) -> STAT_RX_R[src]

Bits 12:13 - Status bits, for reception transfers

pub fn dtog_rx(&self) -> DTOG_RX_R[src]

Bit 14 - Data Toggle, for reception transfers

pub fn ctr_rx(&self) -> CTR_RX_R[src]

Bit 15 - Correct transfer for reception

impl R<u8, STAT_TX_A>[src]

pub fn variant(&self) -> STAT_TX_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_stall(&self) -> bool[src]

Checks if the value of the field is STALL

pub fn is_nak(&self) -> bool[src]

Checks if the value of the field is NAK

pub fn is_valid(&self) -> bool[src]

Checks if the value of the field is VALID

impl R<u8, EP_TYPE_A>[src]

pub fn variant(&self) -> EP_TYPE_A[src]

Get enumerated values variant

pub fn is_bulk(&self) -> bool[src]

Checks if the value of the field is BULK

pub fn is_control(&self) -> bool[src]

Checks if the value of the field is CONTROL

pub fn is_iso(&self) -> bool[src]

Checks if the value of the field is ISO

pub fn is_interrupt(&self) -> bool[src]

Checks if the value of the field is INTERRUPT

impl R<u8, STAT_RX_A>[src]

pub fn variant(&self) -> STAT_RX_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_stall(&self) -> bool[src]

Checks if the value of the field is STALL

pub fn is_nak(&self) -> bool[src]

Checks if the value of the field is NAK

pub fn is_valid(&self) -> bool[src]

Checks if the value of the field is VALID

impl R<u32, Reg<u32, _EP6R>>[src]

pub fn ea(&self) -> EA_R[src]

Bits 0:3 - Endpoint address

pub fn stat_tx(&self) -> STAT_TX_R[src]

Bits 4:5 - Status bits, for transmission transfers

pub fn dtog_tx(&self) -> DTOG_TX_R[src]

Bit 6 - Data Toggle, for transmission transfers

pub fn ctr_tx(&self) -> CTR_TX_R[src]

Bit 7 - Correct Transfer for transmission

pub fn ep_kind(&self) -> EP_KIND_R[src]

Bit 8 - Endpoint kind

pub fn ep_type(&self) -> EP_TYPE_R[src]

Bits 9:10 - Endpoint type

pub fn setup(&self) -> SETUP_R[src]

Bit 11 - Setup transaction completed

pub fn stat_rx(&self) -> STAT_RX_R[src]

Bits 12:13 - Status bits, for reception transfers

pub fn dtog_rx(&self) -> DTOG_RX_R[src]

Bit 14 - Data Toggle, for reception transfers

pub fn ctr_rx(&self) -> CTR_RX_R[src]

Bit 15 - Correct transfer for reception

impl R<u8, STAT_TX_A>[src]

pub fn variant(&self) -> STAT_TX_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_stall(&self) -> bool[src]

Checks if the value of the field is STALL

pub fn is_nak(&self) -> bool[src]

Checks if the value of the field is NAK

pub fn is_valid(&self) -> bool[src]

Checks if the value of the field is VALID

impl R<u8, EP_TYPE_A>[src]

pub fn variant(&self) -> EP_TYPE_A[src]

Get enumerated values variant

pub fn is_bulk(&self) -> bool[src]

Checks if the value of the field is BULK

pub fn is_control(&self) -> bool[src]

Checks if the value of the field is CONTROL

pub fn is_iso(&self) -> bool[src]

Checks if the value of the field is ISO

pub fn is_interrupt(&self) -> bool[src]

Checks if the value of the field is INTERRUPT

impl R<u8, STAT_RX_A>[src]

pub fn variant(&self) -> STAT_RX_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_stall(&self) -> bool[src]

Checks if the value of the field is STALL

pub fn is_nak(&self) -> bool[src]

Checks if the value of the field is NAK

pub fn is_valid(&self) -> bool[src]

Checks if the value of the field is VALID

impl R<u32, Reg<u32, _EP7R>>[src]

pub fn ea(&self) -> EA_R[src]

Bits 0:3 - Endpoint address

pub fn stat_tx(&self) -> STAT_TX_R[src]

Bits 4:5 - Status bits, for transmission transfers

pub fn dtog_tx(&self) -> DTOG_TX_R[src]

Bit 6 - Data Toggle, for transmission transfers

pub fn ctr_tx(&self) -> CTR_TX_R[src]

Bit 7 - Correct Transfer for transmission

pub fn ep_kind(&self) -> EP_KIND_R[src]

Bit 8 - Endpoint kind

pub fn ep_type(&self) -> EP_TYPE_R[src]

Bits 9:10 - Endpoint type

pub fn setup(&self) -> SETUP_R[src]

Bit 11 - Setup transaction completed

pub fn stat_rx(&self) -> STAT_RX_R[src]

Bits 12:13 - Status bits, for reception transfers

pub fn dtog_rx(&self) -> DTOG_RX_R[src]

Bit 14 - Data Toggle, for reception transfers

pub fn ctr_rx(&self) -> CTR_RX_R[src]

Bit 15 - Correct transfer for reception

impl R<bool, FRES_A>[src]

pub fn variant(&self) -> FRES_A[src]

Get enumerated values variant

pub fn is_no_reset(&self) -> bool[src]

Checks if the value of the field is NORESET

pub fn is_reset(&self) -> bool[src]

Checks if the value of the field is RESET

impl R<bool, PDWN_A>[src]

pub fn variant(&self) -> PDWN_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, LPMODE_A>[src]

pub fn variant(&self) -> LPMODE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, FSUSP_A>[src]

pub fn variant(&self) -> FSUSP_A[src]

Get enumerated values variant

pub fn is_no_effect(&self) -> bool[src]

Checks if the value of the field is NOEFFECT

pub fn is_suspend(&self) -> bool[src]

Checks if the value of the field is SUSPEND

impl R<bool, RESUME_A>[src]

pub fn variant(&self) -> Variant<bool, RESUME_A>[src]

Get enumerated values variant

pub fn is_requested(&self) -> bool[src]

Checks if the value of the field is REQUESTED

impl R<bool, ESOFM_A>[src]

pub fn variant(&self) -> ESOFM_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, SOFM_A>[src]

pub fn variant(&self) -> SOFM_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, RESETM_A>[src]

pub fn variant(&self) -> RESETM_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, SUSPM_A>[src]

pub fn variant(&self) -> SUSPM_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, WKUPM_A>[src]

pub fn variant(&self) -> WKUPM_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, ERRM_A>[src]

pub fn variant(&self) -> ERRM_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, PMAOVRM_A>[src]

pub fn variant(&self) -> PMAOVRM_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, CTRM_A>[src]

pub fn variant(&self) -> CTRM_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u32, Reg<u32, _CNTR>>[src]

pub fn fres(&self) -> FRES_R[src]

Bit 0 - Force USB Reset

pub fn pdwn(&self) -> PDWN_R[src]

Bit 1 - Power down

pub fn lpmode(&self) -> LPMODE_R[src]

Bit 2 - Low-power mode

pub fn fsusp(&self) -> FSUSP_R[src]

Bit 3 - Force suspend

pub fn resume(&self) -> RESUME_R[src]

Bit 4 - Resume request

pub fn esofm(&self) -> ESOFM_R[src]

Bit 8 - Expected start of frame interrupt mask

pub fn sofm(&self) -> SOFM_R[src]

Bit 9 - Start of frame interrupt mask

pub fn resetm(&self) -> RESETM_R[src]

Bit 10 - USB reset interrupt mask

pub fn suspm(&self) -> SUSPM_R[src]

Bit 11 - Suspend mode interrupt mask

pub fn wkupm(&self) -> WKUPM_R[src]

Bit 12 - Wakeup interrupt mask

pub fn errm(&self) -> ERRM_R[src]

Bit 13 - Error interrupt mask

pub fn pmaovrm(&self) -> PMAOVRM_R[src]

Bit 14 - Packet memory area over / underrun interrupt mask

pub fn ctrm(&self) -> CTRM_R[src]

Bit 15 - Correct transfer interrupt mask

impl R<bool, DIR_A>[src]

pub fn variant(&self) -> DIR_A[src]

Get enumerated values variant

pub fn is_to(&self) -> bool[src]

Checks if the value of the field is TO

pub fn is_from(&self) -> bool[src]

Checks if the value of the field is FROM

impl R<bool, ESOF_A>[src]

pub fn variant(&self) -> Variant<bool, ESOF_A>[src]

Get enumerated values variant

pub fn is_expected_start_of_frame(&self) -> bool[src]

Checks if the value of the field is EXPECTEDSTARTOFFRAME

impl R<bool, SOF_A>[src]

pub fn variant(&self) -> Variant<bool, SOF_A>[src]

Get enumerated values variant

pub fn is_start_of_frame(&self) -> bool[src]

Checks if the value of the field is STARTOFFRAME

impl R<bool, RESET_A>[src]

pub fn variant(&self) -> Variant<bool, RESET_A>[src]

Get enumerated values variant

pub fn is_reset(&self) -> bool[src]

Checks if the value of the field is RESET

impl R<bool, SUSP_A>[src]

pub fn variant(&self) -> Variant<bool, SUSP_A>[src]

Get enumerated values variant

pub fn is_suspend(&self) -> bool[src]

Checks if the value of the field is SUSPEND

impl R<bool, WKUP_A>[src]

pub fn variant(&self) -> Variant<bool, WKUP_A>[src]

Get enumerated values variant

pub fn is_wakeup(&self) -> bool[src]

Checks if the value of the field is WAKEUP

impl R<bool, ERR_A>[src]

pub fn variant(&self) -> Variant<bool, ERR_A>[src]

Get enumerated values variant

pub fn is_error(&self) -> bool[src]

Checks if the value of the field is ERROR

impl R<bool, PMAOVR_A>[src]

pub fn variant(&self) -> Variant<bool, PMAOVR_A>[src]

Get enumerated values variant

pub fn is_overrun(&self) -> bool[src]

Checks if the value of the field is OVERRUN

impl R<bool, CTR_A>[src]

pub fn variant(&self) -> Variant<bool, CTR_A>[src]

Get enumerated values variant

pub fn is_completed(&self) -> bool[src]

Checks if the value of the field is COMPLETED

impl R<u32, Reg<u32, _ISTR>>[src]

pub fn ep_id(&self) -> EP_ID_R[src]

Bits 0:3 - Endpoint Identifier

pub fn dir(&self) -> DIR_R[src]

Bit 4 - Direction of transaction

pub fn esof(&self) -> ESOF_R[src]

Bit 8 - Expected start frame

pub fn sof(&self) -> SOF_R[src]

Bit 9 - start of frame

pub fn reset(&self) -> RESET_R[src]

Bit 10 - reset request

pub fn susp(&self) -> SUSP_R[src]

Bit 11 - Suspend mode request

pub fn wkup(&self) -> WKUP_R[src]

Bit 12 - Wakeup

pub fn err(&self) -> ERR_R[src]

Bit 13 - Error

pub fn pmaovr(&self) -> PMAOVR_R[src]

Bit 14 - Packet memory area over / underrun

pub fn ctr(&self) -> CTR_R[src]

Bit 15 - Correct transfer

impl R<bool, LCK_A>[src]

pub fn variant(&self) -> Variant<bool, LCK_A>[src]

Get enumerated values variant

pub fn is_locked(&self) -> bool[src]

Checks if the value of the field is LOCKED

impl R<bool, RXDM_A>[src]

pub fn variant(&self) -> Variant<bool, RXDM_A>[src]

Get enumerated values variant

pub fn is_received(&self) -> bool[src]

Checks if the value of the field is RECEIVED

impl R<bool, RXDP_A>[src]

pub fn variant(&self) -> Variant<bool, RXDP_A>[src]

Get enumerated values variant

pub fn is_received(&self) -> bool[src]

Checks if the value of the field is RECEIVED

impl R<u32, Reg<u32, _FNR>>[src]

pub fn fn_(&self) -> FN_R[src]

Bits 0:10 - Frame number

pub fn lsof(&self) -> LSOF_R[src]

Bits 11:12 - Lost SOF

pub fn lck(&self) -> LCK_R[src]

Bit 13 - Locked

pub fn rxdm(&self) -> RXDM_R[src]

Bit 14 - Receive data - line status

pub fn rxdp(&self) -> RXDP_R[src]

Bit 15 - Receive data + line status

impl R<bool, EF_A>[src]

pub fn variant(&self) -> EF_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u32, Reg<u32, _DADDR>>[src]

pub fn add(&self) -> ADD_R[src]

Bit 0 - Device address

pub fn add1(&self) -> ADD1_R[src]

Bit 1 - Device address

pub fn add2(&self) -> ADD2_R[src]

Bit 2 - Device address

pub fn add3(&self) -> ADD3_R[src]

Bit 3 - Device address

pub fn add4(&self) -> ADD4_R[src]

Bit 4 - Device address

pub fn add5(&self) -> ADD5_R[src]

Bit 5 - Device address

pub fn add6(&self) -> ADD6_R[src]

Bit 6 - Device address

pub fn ef(&self) -> EF_R[src]

Bit 7 - Enable function

impl R<u32, Reg<u32, _BTABLE>>[src]

pub fn btable(&self) -> BTABLE_R[src]

Bits 3:15 - Buffer table

impl R<bool, PE_A>[src]

pub fn variant(&self) -> PE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, TXIE_A>[src]

pub fn variant(&self) -> TXIE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, RXIE_A>[src]

pub fn variant(&self) -> RXIE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, ADDRIE_A>[src]

pub fn variant(&self) -> ADDRIE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, NACKIE_A>[src]

pub fn variant(&self) -> NACKIE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, STOPIE_A>[src]

pub fn variant(&self) -> STOPIE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, TCIE_A>[src]

pub fn variant(&self) -> TCIE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, ERRIE_A>[src]

pub fn variant(&self) -> ERRIE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u8, DNF_A>[src]

pub fn variant(&self) -> DNF_A[src]

Get enumerated values variant

pub fn is_no_filter(&self) -> bool[src]

Checks if the value of the field is NOFILTER

pub fn is_filter1(&self) -> bool[src]

Checks if the value of the field is FILTER1

pub fn is_filter2(&self) -> bool[src]

Checks if the value of the field is FILTER2

pub fn is_filter3(&self) -> bool[src]

Checks if the value of the field is FILTER3

pub fn is_filter4(&self) -> bool[src]

Checks if the value of the field is FILTER4

pub fn is_filter5(&self) -> bool[src]

Checks if the value of the field is FILTER5

pub fn is_filter6(&self) -> bool[src]

Checks if the value of the field is FILTER6

pub fn is_filter7(&self) -> bool[src]

Checks if the value of the field is FILTER7

pub fn is_filter8(&self) -> bool[src]

Checks if the value of the field is FILTER8

pub fn is_filter9(&self) -> bool[src]

Checks if the value of the field is FILTER9

pub fn is_filter10(&self) -> bool[src]

Checks if the value of the field is FILTER10

pub fn is_filter11(&self) -> bool[src]

Checks if the value of the field is FILTER11

pub fn is_filter12(&self) -> bool[src]

Checks if the value of the field is FILTER12

pub fn is_filter13(&self) -> bool[src]

Checks if the value of the field is FILTER13

pub fn is_filter14(&self) -> bool[src]

Checks if the value of the field is FILTER14

pub fn is_filter15(&self) -> bool[src]

Checks if the value of the field is FILTER15

impl R<bool, ANFOFF_A>[src]

pub fn variant(&self) -> ANFOFF_A[src]

Get enumerated values variant

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

impl R<bool, TXDMAEN_A>[src]

pub fn variant(&self) -> TXDMAEN_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, RXDMAEN_A>[src]

pub fn variant(&self) -> RXDMAEN_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, SBC_A>[src]

pub fn variant(&self) -> SBC_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, NOSTRETCH_A>[src]

pub fn variant(&self) -> NOSTRETCH_A[src]

Get enumerated values variant

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

impl R<bool, WUPEN_A>[src]

pub fn variant(&self) -> WUPEN_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, GCEN_A>[src]

pub fn variant(&self) -> GCEN_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, SMBHEN_A>[src]

pub fn variant(&self) -> SMBHEN_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, SMBDEN_A>[src]

pub fn variant(&self) -> SMBDEN_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, ALERTEN_A>[src]

pub fn variant(&self) -> ALERTEN_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, PECEN_A>[src]

pub fn variant(&self) -> PECEN_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u32, Reg<u32, _CR1>>[src]

pub fn pe(&self) -> PE_R[src]

Bit 0 - Peripheral enable

pub fn txie(&self) -> TXIE_R[src]

Bit 1 - TX Interrupt enable

pub fn rxie(&self) -> RXIE_R[src]

Bit 2 - RX Interrupt enable

pub fn addrie(&self) -> ADDRIE_R[src]

Bit 3 - Address match interrupt enable (slave only)

pub fn nackie(&self) -> NACKIE_R[src]

Bit 4 - Not acknowledge received interrupt enable

pub fn stopie(&self) -> STOPIE_R[src]

Bit 5 - STOP detection Interrupt enable

pub fn tcie(&self) -> TCIE_R[src]

Bit 6 - Transfer Complete interrupt enable

pub fn errie(&self) -> ERRIE_R[src]

Bit 7 - Error interrupts enable

pub fn dnf(&self) -> DNF_R[src]

Bits 8:11 - Digital noise filter

pub fn anfoff(&self) -> ANFOFF_R[src]

Bit 12 - Analog noise filter OFF

pub fn txdmaen(&self) -> TXDMAEN_R[src]

Bit 14 - DMA transmission requests enable

pub fn rxdmaen(&self) -> RXDMAEN_R[src]

Bit 15 - DMA reception requests enable

pub fn sbc(&self) -> SBC_R[src]

Bit 16 - Slave byte control

pub fn nostretch(&self) -> NOSTRETCH_R[src]

Bit 17 - Clock stretching disable

pub fn wupen(&self) -> WUPEN_R[src]

Bit 18 - Wakeup from STOP enable

pub fn gcen(&self) -> GCEN_R[src]

Bit 19 - General call enable

pub fn smbhen(&self) -> SMBHEN_R[src]

Bit 20 - SMBus Host address enable

pub fn smbden(&self) -> SMBDEN_R[src]

Bit 21 - SMBus Device Default address enable

pub fn alerten(&self) -> ALERTEN_R[src]

Bit 22 - SMBUS alert enable

pub fn pecen(&self) -> PECEN_R[src]

Bit 23 - PEC enable

impl R<bool, PECBYTE_A>[src]

pub fn variant(&self) -> PECBYTE_A[src]

Get enumerated values variant

pub fn is_no_pec(&self) -> bool[src]

Checks if the value of the field is NOPEC

pub fn is_pec(&self) -> bool[src]

Checks if the value of the field is PEC

impl R<bool, AUTOEND_A>[src]

pub fn variant(&self) -> AUTOEND_A[src]

Get enumerated values variant

pub fn is_software(&self) -> bool[src]

Checks if the value of the field is SOFTWARE

pub fn is_automatic(&self) -> bool[src]

Checks if the value of the field is AUTOMATIC

impl R<bool, RELOAD_A>[src]

pub fn variant(&self) -> RELOAD_A[src]

Get enumerated values variant

pub fn is_completed(&self) -> bool[src]

Checks if the value of the field is COMPLETED

pub fn is_not_competed(&self) -> bool[src]

Checks if the value of the field is NOTCOMPETED

impl R<bool, NACK_A>[src]

pub fn variant(&self) -> NACK_A[src]

Get enumerated values variant

pub fn is_ack(&self) -> bool[src]

Checks if the value of the field is ACK

pub fn is_nack(&self) -> bool[src]

Checks if the value of the field is NACK

impl R<bool, STOP_A>[src]

pub fn variant(&self) -> STOP_A[src]

Get enumerated values variant

pub fn is_no_stop(&self) -> bool[src]

Checks if the value of the field is NOSTOP

pub fn is_stop(&self) -> bool[src]

Checks if the value of the field is STOP

impl R<bool, START_A>[src]

pub fn variant(&self) -> START_A[src]

Get enumerated values variant

pub fn is_no_start(&self) -> bool[src]

Checks if the value of the field is NOSTART

pub fn is_start(&self) -> bool[src]

Checks if the value of the field is START

impl R<bool, HEAD10R_A>[src]

pub fn variant(&self) -> HEAD10R_A[src]

Get enumerated values variant

pub fn is_complete(&self) -> bool[src]

Checks if the value of the field is COMPLETE

pub fn is_partial(&self) -> bool[src]

Checks if the value of the field is PARTIAL

impl R<bool, ADD10_A>[src]

pub fn variant(&self) -> ADD10_A[src]

Get enumerated values variant

pub fn is_bit7(&self) -> bool[src]

Checks if the value of the field is BIT7

pub fn is_bit10(&self) -> bool[src]

Checks if the value of the field is BIT10

impl R<bool, RD_WRN_A>[src]

pub fn variant(&self) -> RD_WRN_A[src]

Get enumerated values variant

pub fn is_write(&self) -> bool[src]

Checks if the value of the field is WRITE

pub fn is_read(&self) -> bool[src]

Checks if the value of the field is READ

impl R<u32, Reg<u32, _CR2>>[src]

pub fn pecbyte(&self) -> PECBYTE_R[src]

Bit 26 - Packet error checking byte

pub fn autoend(&self) -> AUTOEND_R[src]

Bit 25 - Automatic end mode (master mode)

pub fn reload(&self) -> RELOAD_R[src]

Bit 24 - NBYTES reload mode

pub fn nbytes(&self) -> NBYTES_R[src]

Bits 16:23 - Number of bytes

pub fn nack(&self) -> NACK_R[src]

Bit 15 - NACK generation (slave mode)

pub fn stop(&self) -> STOP_R[src]

Bit 14 - Stop generation (master mode)

pub fn start(&self) -> START_R[src]

Bit 13 - Start generation

pub fn head10r(&self) -> HEAD10R_R[src]

Bit 12 - 10-bit address header only read direction (master receiver mode)

pub fn add10(&self) -> ADD10_R[src]

Bit 11 - 10-bit addressing mode (master mode)

pub fn rd_wrn(&self) -> RD_WRN_R[src]

Bit 10 - Transfer direction (master mode)

pub fn sadd(&self) -> SADD_R[src]

Bits 0:9 - Slave address bit 9:8 (master mode)

impl R<bool, OA1MODE_A>[src]

pub fn variant(&self) -> OA1MODE_A[src]

Get enumerated values variant

pub fn is_bit7(&self) -> bool[src]

Checks if the value of the field is BIT7

pub fn is_bit10(&self) -> bool[src]

Checks if the value of the field is BIT10

impl R<bool, OA1EN_A>[src]

pub fn variant(&self) -> OA1EN_A[src]

Get enumerated values variant

pub fn is_diasbled(&self) -> bool[src]

Checks if the value of the field is DIASBLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u32, Reg<u32, _OAR1>>[src]

pub fn oa1mode(&self) -> OA1MODE_R[src]

Bit 10 - Own Address 1 10-bit mode

pub fn oa1en(&self) -> OA1EN_R[src]

Bit 15 - Own Address 1 enable

pub fn oa1(&self) -> OA1_R[src]

Bits 0:9 - Interface address

impl R<u8, OA2MSK_A>[src]

pub fn variant(&self) -> OA2MSK_A[src]

Get enumerated values variant

pub fn is_no_mask(&self) -> bool[src]

Checks if the value of the field is NOMASK

pub fn is_mask1(&self) -> bool[src]

Checks if the value of the field is MASK1

pub fn is_mask2(&self) -> bool[src]

Checks if the value of the field is MASK2

pub fn is_mask3(&self) -> bool[src]

Checks if the value of the field is MASK3

pub fn is_mask4(&self) -> bool[src]

Checks if the value of the field is MASK4

pub fn is_mask5(&self) -> bool[src]

Checks if the value of the field is MASK5

pub fn is_mask6(&self) -> bool[src]

Checks if the value of the field is MASK6

pub fn is_mask7(&self) -> bool[src]

Checks if the value of the field is MASK7

impl R<bool, OA2EN_A>[src]

pub fn variant(&self) -> OA2EN_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u32, Reg<u32, _OAR2>>[src]

pub fn oa2(&self) -> OA2_R[src]

Bits 1:7 - Interface address

pub fn oa2msk(&self) -> OA2MSK_R[src]

Bits 8:10 - Own Address 2 masks

pub fn oa2en(&self) -> OA2EN_R[src]

Bit 15 - Own Address 2 enable

impl R<u32, Reg<u32, _TIMINGR>>[src]

pub fn scll(&self) -> SCLL_R[src]

Bits 0:7 - SCL low period (master mode)

pub fn sclh(&self) -> SCLH_R[src]

Bits 8:15 - SCL high period (master mode)

pub fn sdadel(&self) -> SDADEL_R[src]

Bits 16:19 - Data hold time

pub fn scldel(&self) -> SCLDEL_R[src]

Bits 20:23 - Data setup time

pub fn presc(&self) -> PRESC_R[src]

Bits 28:31 - Timing prescaler

impl R<bool, TIDLE_A>[src]

pub fn variant(&self) -> TIDLE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, TIMOUTEN_A>[src]

pub fn variant(&self) -> TIMOUTEN_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, TEXTEN_A>[src]

pub fn variant(&self) -> TEXTEN_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u32, Reg<u32, _TIMEOUTR>>[src]

pub fn timeouta(&self) -> TIMEOUTA_R[src]

Bits 0:11 - Bus timeout A

pub fn tidle(&self) -> TIDLE_R[src]

Bit 12 - Idle clock timeout detection

pub fn timouten(&self) -> TIMOUTEN_R[src]

Bit 15 - Clock timeout enable

pub fn timeoutb(&self) -> TIMEOUTB_R[src]

Bits 16:27 - Bus timeout B

pub fn texten(&self) -> TEXTEN_R[src]

Bit 31 - Extended clock timeout enable

impl R<bool, DIR_A>[src]

pub fn variant(&self) -> DIR_A[src]

Get enumerated values variant

pub fn is_write(&self) -> bool[src]

Checks if the value of the field is WRITE

pub fn is_read(&self) -> bool[src]

Checks if the value of the field is READ

impl R<bool, BUSY_A>[src]

pub fn variant(&self) -> BUSY_A[src]

Get enumerated values variant

pub fn is_not_busy(&self) -> bool[src]

Checks if the value of the field is NOTBUSY

pub fn is_busy(&self) -> bool[src]

Checks if the value of the field is BUSY

impl R<bool, ALERT_A>[src]

pub fn variant(&self) -> ALERT_A[src]

Get enumerated values variant

pub fn is_no_alert(&self) -> bool[src]

Checks if the value of the field is NOALERT

pub fn is_alert(&self) -> bool[src]

Checks if the value of the field is ALERT

impl R<bool, TIMEOUT_A>[src]

pub fn variant(&self) -> TIMEOUT_A[src]

Get enumerated values variant

pub fn is_no_timeout(&self) -> bool[src]

Checks if the value of the field is NOTIMEOUT

pub fn is_timeout(&self) -> bool[src]

Checks if the value of the field is TIMEOUT

impl R<bool, PECERR_A>[src]

pub fn variant(&self) -> PECERR_A[src]

Get enumerated values variant

pub fn is_match_(&self) -> bool[src]

Checks if the value of the field is MATCH

pub fn is_no_match(&self) -> bool[src]

Checks if the value of the field is NOMATCH

impl R<bool, OVR_A>[src]

pub fn variant(&self) -> OVR_A[src]

Get enumerated values variant

pub fn is_no_overrun(&self) -> bool[src]

Checks if the value of the field is NOOVERRUN

pub fn is_overrun(&self) -> bool[src]

Checks if the value of the field is OVERRUN

impl R<bool, ARLO_A>[src]

pub fn variant(&self) -> ARLO_A[src]

Get enumerated values variant

pub fn is_not_lost(&self) -> bool[src]

Checks if the value of the field is NOTLOST

pub fn is_lost(&self) -> bool[src]

Checks if the value of the field is LOST

impl R<bool, BERR_A>[src]

pub fn variant(&self) -> BERR_A[src]

Get enumerated values variant

pub fn is_no_error(&self) -> bool[src]

Checks if the value of the field is NOERROR

pub fn is_error(&self) -> bool[src]

Checks if the value of the field is ERROR

impl R<bool, TCR_A>[src]

pub fn variant(&self) -> TCR_A[src]

Get enumerated values variant

pub fn is_not_complete(&self) -> bool[src]

Checks if the value of the field is NOTCOMPLETE

pub fn is_complete(&self) -> bool[src]

Checks if the value of the field is COMPLETE

impl R<bool, TC_A>[src]

pub fn variant(&self) -> TC_A[src]

Get enumerated values variant

pub fn is_not_complete(&self) -> bool[src]

Checks if the value of the field is NOTCOMPLETE

pub fn is_complete(&self) -> bool[src]

Checks if the value of the field is COMPLETE

impl R<bool, STOPF_A>[src]

pub fn variant(&self) -> STOPF_A[src]

Get enumerated values variant

pub fn is_no_stop(&self) -> bool[src]

Checks if the value of the field is NOSTOP

pub fn is_stop(&self) -> bool[src]

Checks if the value of the field is STOP

impl R<bool, NACKF_A>[src]

pub fn variant(&self) -> NACKF_A[src]

Get enumerated values variant

pub fn is_no_nack(&self) -> bool[src]

Checks if the value of the field is NONACK

pub fn is_nack(&self) -> bool[src]

Checks if the value of the field is NACK

impl R<bool, ADDR_A>[src]

pub fn variant(&self) -> ADDR_A[src]

Get enumerated values variant

pub fn is_not_match(&self) -> bool[src]

Checks if the value of the field is NOTMATCH

pub fn is_match_(&self) -> bool[src]

Checks if the value of the field is MATCH

impl R<bool, RXNE_A>[src]

pub fn variant(&self) -> RXNE_A[src]

Get enumerated values variant

pub fn is_empty(&self) -> bool[src]

Checks if the value of the field is EMPTY

pub fn is_not_empty(&self) -> bool[src]

Checks if the value of the field is NOTEMPTY

impl R<bool, TXIS_A>[src]

pub fn variant(&self) -> TXIS_A[src]

Get enumerated values variant

pub fn is_not_empty(&self) -> bool[src]

Checks if the value of the field is NOTEMPTY

pub fn is_empty(&self) -> bool[src]

Checks if the value of the field is EMPTY

impl R<bool, TXE_A>[src]

pub fn variant(&self) -> TXE_A[src]

Get enumerated values variant

pub fn is_not_empty(&self) -> bool[src]

Checks if the value of the field is NOTEMPTY

pub fn is_empty(&self) -> bool[src]

Checks if the value of the field is EMPTY

impl R<u32, Reg<u32, _ISR>>[src]

pub fn addcode(&self) -> ADDCODE_R[src]

Bits 17:23 - Address match code (Slave mode)

pub fn dir(&self) -> DIR_R[src]

Bit 16 - Transfer direction (Slave mode)

pub fn busy(&self) -> BUSY_R[src]

Bit 15 - Bus busy

pub fn alert(&self) -> ALERT_R[src]

Bit 13 - SMBus alert

pub fn timeout(&self) -> TIMEOUT_R[src]

Bit 12 - Timeout or t_low detection flag

pub fn pecerr(&self) -> PECERR_R[src]

Bit 11 - PEC Error in reception

pub fn ovr(&self) -> OVR_R[src]

Bit 10 - Overrun/Underrun (slave mode)

pub fn arlo(&self) -> ARLO_R[src]

Bit 9 - Arbitration lost

pub fn berr(&self) -> BERR_R[src]

Bit 8 - Bus error

pub fn tcr(&self) -> TCR_R[src]

Bit 7 - Transfer Complete Reload

pub fn tc(&self) -> TC_R[src]

Bit 6 - Transfer Complete (master mode)

pub fn stopf(&self) -> STOPF_R[src]

Bit 5 - Stop detection flag

pub fn nackf(&self) -> NACKF_R[src]

Bit 4 - Not acknowledge received flag

pub fn addr(&self) -> ADDR_R[src]

Bit 3 - Address matched (slave mode)

pub fn rxne(&self) -> RXNE_R[src]

Bit 2 - Receive data register not empty (receivers)

pub fn txis(&self) -> TXIS_R[src]

Bit 1 - Transmit interrupt status (transmitters)

pub fn txe(&self) -> TXE_R[src]

Bit 0 - Transmit data register empty (transmitters)

impl R<u32, Reg<u32, _PECR>>[src]

pub fn pec(&self) -> PEC_R[src]

Bits 0:7 - Packet error checking register

impl R<u32, Reg<u32, _RXDR>>[src]

pub fn rxdata(&self) -> RXDATA_R[src]

Bits 0:7 - 8-bit receive data

impl R<u32, Reg<u32, _TXDR>>[src]

pub fn txdata(&self) -> TXDATA_R[src]

Bits 0:7 - 8-bit transmit data

impl R<u8, PR_A>[src]

pub fn variant(&self) -> PR_A[src]

Get enumerated values variant

pub fn is_divide_by4(&self) -> bool[src]

Checks if the value of the field is DIVIDEBY4

pub fn is_divide_by8(&self) -> bool[src]

Checks if the value of the field is DIVIDEBY8

pub fn is_divide_by16(&self) -> bool[src]

Checks if the value of the field is DIVIDEBY16

pub fn is_divide_by32(&self) -> bool[src]

Checks if the value of the field is DIVIDEBY32

pub fn is_divide_by64(&self) -> bool[src]

Checks if the value of the field is DIVIDEBY64

pub fn is_divide_by128(&self) -> bool[src]

Checks if the value of the field is DIVIDEBY128

pub fn is_divide_by256(&self) -> bool[src]

Checks if the value of the field is DIVIDEBY256

pub fn is_divide_by256bis(&self) -> bool[src]

Checks if the value of the field is DIVIDEBY256BIS

impl R<u32, Reg<u32, _PR>>[src]

pub fn pr(&self) -> PR_R[src]

Bits 0:2 - Prescaler divider

impl R<u32, Reg<u32, _RLR>>[src]

pub fn rl(&self) -> RL_R[src]

Bits 0:11 - Watchdog counter reload value

impl R<u32, Reg<u32, _SR>>[src]

pub fn pvu(&self) -> PVU_R[src]

Bit 0 - Watchdog prescaler value update

pub fn rvu(&self) -> RVU_R[src]

Bit 1 - Watchdog counter reload value update

pub fn wvu(&self) -> WVU_R[src]

Bit 2 - Watchdog counter window value update

impl R<u32, Reg<u32, _WINR>>[src]

pub fn win(&self) -> WIN_R[src]

Bits 0:11 - Watchdog counter window value

impl R<bool, WDGA_A>[src]

pub fn variant(&self) -> WDGA_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u32, Reg<u32, _CR>>[src]

pub fn t(&self) -> T_R[src]

Bits 0:6 - 7-bit counter

pub fn wdga(&self) -> WDGA_R[src]

Bit 7 - Activation bit

impl R<bool, EWI_A>[src]

pub fn variant(&self) -> Variant<bool, EWI_A>[src]

Get enumerated values variant

pub fn is_enable(&self) -> bool[src]

Checks if the value of the field is ENABLE

impl R<u8, WDGTB_A>[src]

pub fn variant(&self) -> WDGTB_A[src]

Get enumerated values variant

pub fn is_div1(&self) -> bool[src]

Checks if the value of the field is DIV1

pub fn is_div2(&self) -> bool[src]

Checks if the value of the field is DIV2

pub fn is_div4(&self) -> bool[src]

Checks if the value of the field is DIV4

pub fn is_div8(&self) -> bool[src]

Checks if the value of the field is DIV8

impl R<u32, Reg<u32, _CFR>>[src]

pub fn ewi(&self) -> EWI_R[src]

Bit 9 - Early wakeup interrupt

pub fn w(&self) -> W_R[src]

Bits 0:6 - 7-bit window value

pub fn wdgtb(&self) -> WDGTB_R[src]

Bits 7:8 - Timer base

impl R<bool, EWIF_A>[src]

pub fn variant(&self) -> EWIF_A[src]

Get enumerated values variant

pub fn is_pending(&self) -> bool[src]

Checks if the value of the field is PENDING

pub fn is_finished(&self) -> bool[src]

Checks if the value of the field is FINISHED

impl R<u32, Reg<u32, _SR>>[src]

pub fn ewif(&self) -> EWIF_R[src]

Bit 0 - Early wakeup interrupt flag

impl R<u32, Reg<u32, _TR>>[src]

pub fn pm(&self) -> PM_R[src]

Bit 22 - AM/PM notation

pub fn ht(&self) -> HT_R[src]

Bits 20:21 - Hour tens in BCD format

pub fn hu(&self) -> HU_R[src]

Bits 16:19 - Hour units in BCD format

pub fn mnt(&self) -> MNT_R[src]

Bits 12:14 - Minute tens in BCD format

pub fn mnu(&self) -> MNU_R[src]

Bits 8:11 - Minute units in BCD format

pub fn st(&self) -> ST_R[src]

Bits 4:6 - Second tens in BCD format

pub fn su(&self) -> SU_R[src]

Bits 0:3 - Second units in BCD format

impl R<u32, Reg<u32, _DR>>[src]

pub fn yt(&self) -> YT_R[src]

Bits 20:23 - Year tens in BCD format

pub fn yu(&self) -> YU_R[src]

Bits 16:19 - Year units in BCD format

pub fn wdu(&self) -> WDU_R[src]

Bits 13:15 - Week day units

pub fn mt(&self) -> MT_R[src]

Bit 12 - Month tens in BCD format

pub fn mu(&self) -> MU_R[src]

Bits 8:11 - Month units in BCD format

pub fn dt(&self) -> DT_R[src]

Bits 4:5 - Date tens in BCD format

pub fn du(&self) -> DU_R[src]

Bits 0:3 - Date units in BCD format

impl R<u32, Reg<u32, _CR>>[src]

pub fn wcksel(&self) -> WCKSEL_R[src]

Bits 0:2 - Wakeup clock selection

pub fn tsedge(&self) -> TSEDGE_R[src]

Bit 3 - Time-stamp event active edge

pub fn refckon(&self) -> REFCKON_R[src]

Bit 4 - Reference clock detection enable (50 or 60 Hz)

pub fn bypshad(&self) -> BYPSHAD_R[src]

Bit 5 - Bypass the shadow registers

pub fn fmt(&self) -> FMT_R[src]

Bit 6 - Hour format

pub fn alrae(&self) -> ALRAE_R[src]

Bit 8 - Alarm A enable

pub fn alrbe(&self) -> ALRBE_R[src]

Bit 9 - Alarm B enable

pub fn wute(&self) -> WUTE_R[src]

Bit 10 - Wakeup timer enable

pub fn tse(&self) -> TSE_R[src]

Bit 11 - Time stamp enable

pub fn alraie(&self) -> ALRAIE_R[src]

Bit 12 - Alarm A interrupt enable

pub fn alrbie(&self) -> ALRBIE_R[src]

Bit 13 - Alarm B interrupt enable

pub fn wutie(&self) -> WUTIE_R[src]

Bit 14 - Wakeup timer interrupt enable

pub fn tsie(&self) -> TSIE_R[src]

Bit 15 - Time-stamp interrupt enable

pub fn add1h(&self) -> ADD1H_R[src]

Bit 16 - Add 1 hour (summer time change)

pub fn sub1h(&self) -> SUB1H_R[src]

Bit 17 - Subtract 1 hour (winter time change)

pub fn bkp(&self) -> BKP_R[src]

Bit 18 - Backup

pub fn cosel(&self) -> COSEL_R[src]

Bit 19 - Calibration output selection

pub fn pol(&self) -> POL_R[src]

Bit 20 - Output polarity

pub fn osel(&self) -> OSEL_R[src]

Bits 21:22 - Output selection

pub fn coe(&self) -> COE_R[src]

Bit 23 - Calibration output enable

impl R<u32, Reg<u32, _ISR>>[src]

pub fn alrawf(&self) -> ALRAWF_R[src]

Bit 0 - Alarm A write flag

pub fn alrbwf(&self) -> ALRBWF_R[src]

Bit 1 - Alarm B write flag

pub fn wutwf(&self) -> WUTWF_R[src]

Bit 2 - Wakeup timer write flag

pub fn shpf(&self) -> SHPF_R[src]

Bit 3 - Shift operation pending

pub fn inits(&self) -> INITS_R[src]

Bit 4 - Initialization status flag

pub fn rsf(&self) -> RSF_R[src]

Bit 5 - Registers synchronization flag

pub fn initf(&self) -> INITF_R[src]

Bit 6 - Initialization flag

pub fn init(&self) -> INIT_R[src]

Bit 7 - Initialization mode

pub fn alraf(&self) -> ALRAF_R[src]

Bit 8 - Alarm A flag

pub fn alrbf(&self) -> ALRBF_R[src]

Bit 9 - Alarm B flag

pub fn wutf(&self) -> WUTF_R[src]

Bit 10 - Wakeup timer flag

pub fn tsf(&self) -> TSF_R[src]

Bit 11 - Time-stamp flag

pub fn tsovf(&self) -> TSOVF_R[src]

Bit 12 - Time-stamp overflow flag

pub fn tamp1f(&self) -> TAMP1F_R[src]

Bit 13 - Tamper detection flag

pub fn tamp2f(&self) -> TAMP2F_R[src]

Bit 14 - RTC_TAMP2 detection flag

pub fn tamp3f(&self) -> TAMP3F_R[src]

Bit 15 - RTC_TAMP3 detection flag

pub fn recalpf(&self) -> RECALPF_R[src]

Bit 16 - Recalibration pending Flag

impl R<u32, Reg<u32, _PRER>>[src]

pub fn prediv_a(&self) -> PREDIV_A_R[src]

Bits 16:22 - Asynchronous prescaler factor

pub fn prediv_s(&self) -> PREDIV_S_R[src]

Bits 0:14 - Synchronous prescaler factor

impl R<u32, Reg<u32, _WUTR>>[src]

pub fn wut(&self) -> WUT_R[src]

Bits 0:15 - Wakeup auto-reload value bits

impl R<u32, Reg<u32, _ALRMAR>>[src]

pub fn msk4(&self) -> MSK4_R[src]

Bit 31 - Alarm A date mask

pub fn wdsel(&self) -> WDSEL_R[src]

Bit 30 - Week day selection

pub fn dt(&self) -> DT_R[src]

Bits 28:29 - Date tens in BCD format

pub fn du(&self) -> DU_R[src]

Bits 24:27 - Date units or day in BCD format

pub fn msk3(&self) -> MSK3_R[src]

Bit 23 - Alarm A hours mask

pub fn pm(&self) -> PM_R[src]

Bit 22 - AM/PM notation

pub fn ht(&self) -> HT_R[src]

Bits 20:21 - Hour tens in BCD format

pub fn hu(&self) -> HU_R[src]

Bits 16:19 - Hour units in BCD format

pub fn msk2(&self) -> MSK2_R[src]

Bit 15 - Alarm A minutes mask

pub fn mnt(&self) -> MNT_R[src]

Bits 12:14 - Minute tens in BCD format

pub fn mnu(&self) -> MNU_R[src]

Bits 8:11 - Minute units in BCD format

pub fn msk1(&self) -> MSK1_R[src]

Bit 7 - Alarm A seconds mask

pub fn st(&self) -> ST_R[src]

Bits 4:6 - Second tens in BCD format

pub fn su(&self) -> SU_R[src]

Bits 0:3 - Second units in BCD format

impl R<u32, Reg<u32, _ALRMBR>>[src]

pub fn msk4(&self) -> MSK4_R[src]

Bit 31 - Alarm B date mask

pub fn wdsel(&self) -> WDSEL_R[src]

Bit 30 - Week day selection

pub fn dt(&self) -> DT_R[src]

Bits 28:29 - Date tens in BCD format

pub fn du(&self) -> DU_R[src]

Bits 24:27 - Date units or day in BCD format

pub fn msk3(&self) -> MSK3_R[src]

Bit 23 - Alarm B hours mask

pub fn pm(&self) -> PM_R[src]

Bit 22 - AM/PM notation

pub fn ht(&self) -> HT_R[src]

Bits 20:21 - Hour tens in BCD format

pub fn hu(&self) -> HU_R[src]

Bits 16:19 - Hour units in BCD format

pub fn msk2(&self) -> MSK2_R[src]

Bit 15 - Alarm B minutes mask

pub fn mnt(&self) -> MNT_R[src]

Bits 12:14 - Minute tens in BCD format

pub fn mnu(&self) -> MNU_R[src]

Bits 8:11 - Minute units in BCD format

pub fn msk1(&self) -> MSK1_R[src]

Bit 7 - Alarm B seconds mask

pub fn st(&self) -> ST_R[src]

Bits 4:6 - Second tens in BCD format

pub fn su(&self) -> SU_R[src]

Bits 0:3 - Second units in BCD format

impl R<u32, Reg<u32, _SSR>>[src]

pub fn ss(&self) -> SS_R[src]

Bits 0:15 - Sub second value

impl R<u32, Reg<u32, _TSTR>>[src]

pub fn su(&self) -> SU_R[src]

Bits 0:3 - Second units in BCD format

pub fn st(&self) -> ST_R[src]

Bits 4:6 - Second tens in BCD format

pub fn mnu(&self) -> MNU_R[src]

Bits 8:11 - Minute units in BCD format

pub fn mnt(&self) -> MNT_R[src]

Bits 12:14 - Minute tens in BCD format

pub fn hu(&self) -> HU_R[src]

Bits 16:19 - Hour units in BCD format

pub fn ht(&self) -> HT_R[src]

Bits 20:21 - Hour tens in BCD format

pub fn pm(&self) -> PM_R[src]

Bit 22 - AM/PM notation

impl R<u32, Reg<u32, _TSDR>>[src]

pub fn wdu(&self) -> WDU_R[src]

Bits 13:15 - Week day units

pub fn mt(&self) -> MT_R[src]

Bit 12 - Month tens in BCD format

pub fn mu(&self) -> MU_R[src]

Bits 8:11 - Month units in BCD format

pub fn dt(&self) -> DT_R[src]

Bits 4:5 - Date tens in BCD format

pub fn du(&self) -> DU_R[src]

Bits 0:3 - Date units in BCD format

impl R<u32, Reg<u32, _TSSSR>>[src]

pub fn ss(&self) -> SS_R[src]

Bits 0:15 - Sub second value

impl R<u32, Reg<u32, _CALR>>[src]

pub fn calp(&self) -> CALP_R[src]

Bit 15 - Increase frequency of RTC by 488.5 ppm

pub fn calw8(&self) -> CALW8_R[src]

Bit 14 - Use an 8-second calibration cycle period

pub fn calw16(&self) -> CALW16_R[src]

Bit 13 - Use a 16-second calibration cycle period

pub fn calm(&self) -> CALM_R[src]

Bits 0:8 - Calibration minus

impl R<u32, Reg<u32, _TAFCR>>[src]

pub fn tamp1e(&self) -> TAMP1E_R[src]

Bit 0 - Tamper 1 detection enable

pub fn tamp1trg(&self) -> TAMP1TRG_R[src]

Bit 1 - Active level for tamper 1

pub fn tampie(&self) -> TAMPIE_R[src]

Bit 2 - Tamper interrupt enable

pub fn tamp2e(&self) -> TAMP2E_R[src]

Bit 3 - Tamper 2 detection enable

pub fn tamp2trg(&self) -> TAMP2TRG_R[src]

Bit 4 - Active level for tamper 2

pub fn tamp3e(&self) -> TAMP3E_R[src]

Bit 5 - Tamper 3 detection enable

pub fn tamp3trg(&self) -> TAMP3TRG_R[src]

Bit 6 - Active level for tamper 3

pub fn tampts(&self) -> TAMPTS_R[src]

Bit 7 - Activate timestamp on tamper detection event

pub fn tampfreq(&self) -> TAMPFREQ_R[src]

Bits 8:10 - Tamper sampling frequency

pub fn tampflt(&self) -> TAMPFLT_R[src]

Bits 11:12 - Tamper filter count

pub fn tampprch(&self) -> TAMPPRCH_R[src]

Bits 13:14 - Tamper precharge duration

pub fn tamppudis(&self) -> TAMPPUDIS_R[src]

Bit 15 - TAMPER pull-up disable

pub fn pc13value(&self) -> PC13VALUE_R[src]

Bit 18 - PC13 value

pub fn pc13mode(&self) -> PC13MODE_R[src]

Bit 19 - PC13 mode

pub fn pc14value(&self) -> PC14VALUE_R[src]

Bit 20 - PC14 value

pub fn pc14mode(&self) -> PC14MODE_R[src]

Bit 21 - PC 14 mode

pub fn pc15value(&self) -> PC15VALUE_R[src]

Bit 22 - PC15 value

pub fn pc15mode(&self) -> PC15MODE_R[src]

Bit 23 - PC15 mode

impl R<u32, Reg<u32, _ALRMASSR>>[src]

pub fn maskss(&self) -> MASKSS_R[src]

Bits 24:27 - Mask the most-significant bits starting at this bit

pub fn ss(&self) -> SS_R[src]

Bits 0:14 - Sub seconds value

impl R<u32, Reg<u32, _ALRMBSSR>>[src]

pub fn maskss(&self) -> MASKSS_R[src]

Bits 24:27 - Mask the most-significant bits starting at this bit

pub fn ss(&self) -> SS_R[src]

Bits 0:14 - Sub seconds value

impl R<u32, Reg<u32, _BKPR>>[src]

pub fn bkp(&self) -> BKP_R[src]

Bits 0:31 - BKP

impl R<bool, CEN_A>[src]

pub fn variant(&self) -> CEN_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, UDIS_A>[src]

pub fn variant(&self) -> UDIS_A[src]

Get enumerated values variant

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

impl R<bool, URS_A>[src]

pub fn variant(&self) -> URS_A[src]

Get enumerated values variant

pub fn is_any_event(&self) -> bool[src]

Checks if the value of the field is ANYEVENT

pub fn is_counter_only(&self) -> bool[src]

Checks if the value of the field is COUNTERONLY

impl R<bool, OPM_A>[src]

pub fn variant(&self) -> OPM_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, ARPE_A>[src]

pub fn variant(&self) -> ARPE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u32, Reg<u32, _CR1>>[src]

pub fn cen(&self) -> CEN_R[src]

Bit 0 - Counter enable

pub fn udis(&self) -> UDIS_R[src]

Bit 1 - Update disable

pub fn urs(&self) -> URS_R[src]

Bit 2 - Update request source

pub fn opm(&self) -> OPM_R[src]

Bit 3 - One-pulse mode

pub fn arpe(&self) -> ARPE_R[src]

Bit 7 - Auto-reload preload enable

pub fn uifremap(&self) -> UIFREMAP_R[src]

Bit 11 - UIF status bit remapping

impl R<u8, MMS_A>[src]

pub fn variant(&self) -> Variant<u8, MMS_A>[src]

Get enumerated values variant

pub fn is_reset(&self) -> bool[src]

Checks if the value of the field is RESET

pub fn is_enable(&self) -> bool[src]

Checks if the value of the field is ENABLE

pub fn is_update(&self) -> bool[src]

Checks if the value of the field is UPDATE

impl R<u32, Reg<u32, _CR2>>[src]

pub fn mms(&self) -> MMS_R[src]

Bits 4:6 - Master mode selection

impl R<bool, UDE_A>[src]

pub fn variant(&self) -> UDE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, UIE_A>[src]

pub fn variant(&self) -> UIE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u32, Reg<u32, _DIER>>[src]

pub fn ude(&self) -> UDE_R[src]

Bit 8 - Update DMA request enable

pub fn uie(&self) -> UIE_R[src]

Bit 0 - Update interrupt enable

impl R<bool, UIF_A>[src]

pub fn variant(&self) -> UIF_A[src]

Get enumerated values variant

pub fn is_clear(&self) -> bool[src]

Checks if the value of the field is CLEAR

pub fn is_update_pending(&self) -> bool[src]

Checks if the value of the field is UPDATEPENDING

impl R<u32, Reg<u32, _SR>>[src]

pub fn uif(&self) -> UIF_R[src]

Bit 0 - Update interrupt flag

impl R<u32, Reg<u32, _CNT>>[src]

pub fn cnt(&self) -> CNT_R[src]

Bits 0:15 - Low counter value

pub fn uifcpy(&self) -> UIFCPY_R[src]

Bit 31 - UIF Copy

impl R<u32, Reg<u32, _PSC>>[src]

pub fn psc(&self) -> PSC_R[src]

Bits 0:15 - Prescaler value

impl R<u32, Reg<u32, _ARR>>[src]

pub fn arr(&self) -> ARR_R[src]

Bits 0:15 - Low Auto-reload value

impl R<bool, DMAUDRIE2_A>[src]

pub fn variant(&self) -> DMAUDRIE2_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, DMAEN2_A>[src]

pub fn variant(&self) -> DMAEN2_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u8, WAVE2_A>[src]

pub fn variant(&self) -> Variant<u8, WAVE2_A>[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_noise(&self) -> bool[src]

Checks if the value of the field is NOISE

pub fn is_triangle(&self) -> bool[src]

Checks if the value of the field is TRIANGLE

impl R<u8, TSEL2_A>[src]

pub fn variant(&self) -> TSEL2_A[src]

Get enumerated values variant

pub fn is_tim6_trgo(&self) -> bool[src]

Checks if the value of the field is TIM6_TRGO

pub fn is_tim8_trgo(&self) -> bool[src]

Checks if the value of the field is TIM8_TRGO

pub fn is_tim7_trgo(&self) -> bool[src]

Checks if the value of the field is TIM7_TRGO

pub fn is_tim5_trgo(&self) -> bool[src]

Checks if the value of the field is TIM5_TRGO

pub fn is_tim2_trgo(&self) -> bool[src]

Checks if the value of the field is TIM2_TRGO

pub fn is_tim4_trgo(&self) -> bool[src]

Checks if the value of the field is TIM4_TRGO

pub fn is_exti9(&self) -> bool[src]

Checks if the value of the field is EXTI9

pub fn is_software(&self) -> bool[src]

Checks if the value of the field is SOFTWARE

impl R<bool, TEN2_A>[src]

pub fn variant(&self) -> TEN2_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, BOFF2_A>[src]

pub fn variant(&self) -> BOFF2_A[src]

Get enumerated values variant

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

impl R<bool, EN2_A>[src]

pub fn variant(&self) -> EN2_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u8, WAVE1_A>[src]

pub fn variant(&self) -> Variant<u8, WAVE1_A>[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_noise(&self) -> bool[src]

Checks if the value of the field is NOISE

pub fn is_triangle(&self) -> bool[src]

Checks if the value of the field is TRIANGLE

impl R<u8, TSEL1_A>[src]

pub fn variant(&self) -> Variant<u8, TSEL1_A>[src]

Get enumerated values variant

pub fn is_tim6_trgo(&self) -> bool[src]

Checks if the value of the field is TIM6_TRGO

pub fn is_tim3_trgo(&self) -> bool[src]

Checks if the value of the field is TIM3_TRGO

pub fn is_tim7_trgo(&self) -> bool[src]

Checks if the value of the field is TIM7_TRGO

pub fn is_tim15_trgo(&self) -> bool[src]

Checks if the value of the field is TIM15_TRGO

pub fn is_tim2_trgo(&self) -> bool[src]

Checks if the value of the field is TIM2_TRGO

pub fn is_exti9(&self) -> bool[src]

Checks if the value of the field is EXTI9

pub fn is_software(&self) -> bool[src]

Checks if the value of the field is SOFTWARE

impl R<u32, Reg<u32, _CR>>[src]

pub fn dmaudrie2(&self) -> DMAUDRIE2_R[src]

Bit 29 - DAC channel2 DMA underrun interrupt enable

pub fn dmaen2(&self) -> DMAEN2_R[src]

Bit 28 - DAC channel2 DMA enable

pub fn mamp2(&self) -> MAMP2_R[src]

Bits 24:27 - DAC channel2 mask/amplitude selector

pub fn wave2(&self) -> WAVE2_R[src]

Bits 22:23 - DAC channel2 noise/triangle wave generation enable

pub fn tsel2(&self) -> TSEL2_R[src]

Bits 19:21 - DAC channel2 trigger selection

pub fn ten2(&self) -> TEN2_R[src]

Bit 18 - DAC channel2 trigger enable

pub fn boff2(&self) -> BOFF2_R[src]

Bit 17 - DAC channel2 output buffer disable

pub fn en2(&self) -> EN2_R[src]

Bit 16 - DAC channel2 enable

pub fn dmaudrie1(&self) -> DMAUDRIE1_R[src]

Bit 13 - DAC channel1 DMA Underrun Interrupt enable

pub fn dmaen1(&self) -> DMAEN1_R[src]

Bit 12 - DAC channel1 DMA enable

pub fn mamp1(&self) -> MAMP1_R[src]

Bits 8:11 - DAC channel1 mask/amplitude selector

pub fn wave1(&self) -> WAVE1_R[src]

Bits 6:7 - DAC channel1 noise/triangle wave generation enable

pub fn tsel1(&self) -> TSEL1_R[src]

Bits 3:5 - DAC channel1 trigger selection

pub fn ten1(&self) -> TEN1_R[src]

Bit 2 - DAC channel1 trigger enable

pub fn boff1(&self) -> BOFF1_R[src]

Bit 1 - DAC channel1 output buffer disable

pub fn en1(&self) -> EN1_R[src]

Bit 0 - DAC channel1 enable

impl R<u32, Reg<u32, _DHR12R1>>[src]

pub fn dacc1dhr(&self) -> DACC1DHR_R[src]

Bits 0:11 - DAC channel1 12-bit right-aligned data

impl R<u32, Reg<u32, _DHR12L1>>[src]

pub fn dacc1dhr(&self) -> DACC1DHR_R[src]

Bits 4:15 - DAC channel1 12-bit left-aligned data

impl R<u32, Reg<u32, _DHR8R1>>[src]

pub fn dacc1dhr(&self) -> DACC1DHR_R[src]

Bits 0:7 - DAC channel1 8-bit right-aligned data

impl R<u32, Reg<u32, _DHR12R2>>[src]

pub fn dacc2dhr(&self) -> DACC2DHR_R[src]

Bits 0:11 - DAC channel2 12-bit right-aligned data

impl R<u32, Reg<u32, _DHR12L2>>[src]

pub fn dacc2dhr(&self) -> DACC2DHR_R[src]

Bits 4:15 - DAC channel2 12-bit left-aligned data

impl R<u32, Reg<u32, _DHR8R2>>[src]

pub fn dacc2dhr(&self) -> DACC2DHR_R[src]

Bits 0:7 - DAC channel2 8-bit right-aligned data

impl R<u32, Reg<u32, _DHR12RD>>[src]

pub fn dacc2dhr(&self) -> DACC2DHR_R[src]

Bits 16:27 - DAC channel2 12-bit right-aligned data

pub fn dacc1dhr(&self) -> DACC1DHR_R[src]

Bits 0:11 - DAC channel1 12-bit right-aligned data

impl R<u32, Reg<u32, _DHR12LD>>[src]

pub fn dacc2dhr(&self) -> DACC2DHR_R[src]

Bits 20:31 - DAC channel2 12-bit left-aligned data

pub fn dacc1dhr(&self) -> DACC1DHR_R[src]

Bits 4:15 - DAC channel1 12-bit left-aligned data

impl R<u32, Reg<u32, _DHR8RD>>[src]

pub fn dacc2dhr(&self) -> DACC2DHR_R[src]

Bits 8:15 - DAC channel2 8-bit right-aligned data

pub fn dacc1dhr(&self) -> DACC1DHR_R[src]

Bits 0:7 - DAC channel1 8-bit right-aligned data

impl R<u32, Reg<u32, _DOR1>>[src]

pub fn dacc1dor(&self) -> DACC1DOR_R[src]

Bits 0:11 - DAC channel1 data output

impl R<u32, Reg<u32, _DOR2>>[src]

pub fn dacc2dor(&self) -> DACC2DOR_R[src]

Bits 0:11 - DAC channel2 data output

impl R<bool, DMAUDR2_A>[src]

pub fn variant(&self) -> DMAUDR2_A[src]

Get enumerated values variant

pub fn is_no_underrun(&self) -> bool[src]

Checks if the value of the field is NOUNDERRUN

pub fn is_underrun(&self) -> bool[src]

Checks if the value of the field is UNDERRUN

impl R<u32, Reg<u32, _SR>>[src]

pub fn dmaudr2(&self) -> DMAUDR2_R[src]

Bit 29 - DAC channel2 DMA underrun flag

pub fn dmaudr1(&self) -> DMAUDR1_R[src]

Bit 13 - DAC channel1 DMA underrun flag

impl R<u32, Reg<u32, _IDCODE>>[src]

pub fn dev_id(&self) -> DEV_ID_R[src]

Bits 0:11 - Device Identifier

pub fn rev_id(&self) -> REV_ID_R[src]

Bits 16:31 - Revision Identifier

impl R<u32, Reg<u32, _CR>>[src]

pub fn dbg_sleep(&self) -> DBG_SLEEP_R[src]

Bit 0 - Debug Sleep mode

pub fn dbg_stop(&self) -> DBG_STOP_R[src]

Bit 1 - Debug Stop Mode

pub fn dbg_standby(&self) -> DBG_STANDBY_R[src]

Bit 2 - Debug Standby Mode

pub fn trace_ioen(&self) -> TRACE_IOEN_R[src]

Bit 5 - Trace pin assignment control

pub fn trace_mode(&self) -> TRACE_MODE_R[src]

Bits 6:7 - Trace pin assignment control

impl R<u32, Reg<u32, _APB1_FZ>>[src]

pub fn dbg_tim2_stop(&self) -> DBG_TIM2_STOP_R[src]

Bit 0 - Debug Timer 2 stopped when Core is halted

pub fn dbg_tim3_stop(&self) -> DBG_TIM3_STOP_R[src]

Bit 1 - Debug Timer 3 stopped when Core is halted

pub fn dbg_tim4_stop(&self) -> DBG_TIM4_STOP_R[src]

Bit 2 - Debug Timer 4 stopped when Core is halted

pub fn dbg_tim5_stop(&self) -> DBG_TIM5_STOP_R[src]

Bit 3 - Debug Timer 5 stopped when Core is halted

pub fn dbg_tim6_stop(&self) -> DBG_TIM6_STOP_R[src]

Bit 4 - Debug Timer 6 stopped when Core is halted

pub fn dbg_tim7_stop(&self) -> DBG_TIM7_STOP_R[src]

Bit 5 - Debug Timer 7 stopped when Core is halted

pub fn dbg_tim12_stop(&self) -> DBG_TIM12_STOP_R[src]

Bit 6 - Debug Timer 12 stopped when Core is halted

pub fn dbg_tim13_stop(&self) -> DBG_TIM13_STOP_R[src]

Bit 7 - Debug Timer 13 stopped when Core is halted

pub fn dbg_timer14_stop(&self) -> DBG_TIMER14_STOP_R[src]

Bit 8 - Debug Timer 14 stopped when Core is halted

pub fn dbg_tim18_stop(&self) -> DBG_TIM18_STOP_R[src]

Bit 9 - Debug Timer 18 stopped when Core is halted

pub fn dbg_rtc_stop(&self) -> DBG_RTC_STOP_R[src]

Bit 10 - Debug RTC stopped when Core is halted

pub fn dbg_wwdg_stop(&self) -> DBG_WWDG_STOP_R[src]

Bit 11 - Debug Window Wachdog stopped when Core is halted

pub fn dbg_iwdg_stop(&self) -> DBG_IWDG_STOP_R[src]

Bit 12 - Debug Independent Wachdog stopped when Core is halted

pub fn i2c1_smbus_timeout(&self) -> I2C1_SMBUS_TIMEOUT_R[src]

Bit 21 - SMBUS timeout mode stopped when Core is halted

pub fn i2c2_smbus_timeout(&self) -> I2C2_SMBUS_TIMEOUT_R[src]

Bit 22 - SMBUS timeout mode stopped when Core is halted

pub fn dbg_can_stop(&self) -> DBG_CAN_STOP_R[src]

Bit 25 - Debug CAN stopped when core is halted

impl R<u32, Reg<u32, _APB2FZ>>[src]

pub fn dbg_tim15_stop(&self) -> DBG_TIM15_STOP_R[src]

Bit 2 - Debug Timer 15 stopped when Core is halted

pub fn dbg_tim16_stop(&self) -> DBG_TIM16_STOP_R[src]

Bit 3 - Debug Timer 16 stopped when Core is halted

pub fn dbg_tim17_sto(&self) -> DBG_TIM17_STO_R[src]

Bit 4 - Debug Timer 17 stopped when Core is halted

pub fn dbg_tim19_stop(&self) -> DBG_TIM19_STOP_R[src]

Bit 5 - Debug Timer 19 stopped when Core is halted

impl R<bool, CEN_A>[src]

pub fn variant(&self) -> CEN_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, UDIS_A>[src]

pub fn variant(&self) -> UDIS_A[src]

Get enumerated values variant

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

impl R<bool, URS_A>[src]

pub fn variant(&self) -> URS_A[src]

Get enumerated values variant

pub fn is_any_event(&self) -> bool[src]

Checks if the value of the field is ANYEVENT

pub fn is_counter_only(&self) -> bool[src]

Checks if the value of the field is COUNTERONLY

impl R<bool, OPM_A>[src]

pub fn variant(&self) -> OPM_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, DIR_A>[src]

pub fn variant(&self) -> DIR_A[src]

Get enumerated values variant

pub fn is_up(&self) -> bool[src]

Checks if the value of the field is UP

pub fn is_down(&self) -> bool[src]

Checks if the value of the field is DOWN

impl R<u8, CMS_A>[src]

pub fn variant(&self) -> CMS_A[src]

Get enumerated values variant

pub fn is_edge_aligned(&self) -> bool[src]

Checks if the value of the field is EDGEALIGNED

pub fn is_center_aligned1(&self) -> bool[src]

Checks if the value of the field is CENTERALIGNED1

pub fn is_center_aligned2(&self) -> bool[src]

Checks if the value of the field is CENTERALIGNED2

pub fn is_center_aligned3(&self) -> bool[src]

Checks if the value of the field is CENTERALIGNED3

impl R<bool, ARPE_A>[src]

pub fn variant(&self) -> ARPE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u8, CKD_A>[src]

pub fn variant(&self) -> Variant<u8, CKD_A>[src]

Get enumerated values variant

pub fn is_div1(&self) -> bool[src]

Checks if the value of the field is DIV1

pub fn is_div2(&self) -> bool[src]

Checks if the value of the field is DIV2

pub fn is_div4(&self) -> bool[src]

Checks if the value of the field is DIV4

impl R<u32, Reg<u32, _CR1>>[src]

pub fn cen(&self) -> CEN_R[src]

Bit 0 - Counter enable

pub fn udis(&self) -> UDIS_R[src]

Bit 1 - Update disable

pub fn urs(&self) -> URS_R[src]

Bit 2 - Update request source

pub fn opm(&self) -> OPM_R[src]

Bit 3 - One-pulse mode

pub fn dir(&self) -> DIR_R[src]

Bit 4 - Direction

pub fn cms(&self) -> CMS_R[src]

Bits 5:6 - Center-aligned mode selection

pub fn arpe(&self) -> ARPE_R[src]

Bit 7 - Auto-reload preload enable

pub fn ckd(&self) -> CKD_R[src]

Bits 8:9 - Clock division

pub fn uifremap(&self) -> UIFREMAP_R[src]

Bit 11 - UIF status bit remapping

impl R<bool, CCDS_A>[src]

pub fn variant(&self) -> CCDS_A[src]

Get enumerated values variant

pub fn is_on_compare(&self) -> bool[src]

Checks if the value of the field is ONCOMPARE

pub fn is_on_update(&self) -> bool[src]

Checks if the value of the field is ONUPDATE

impl R<u8, MMS_A>[src]

pub fn variant(&self) -> MMS_A[src]

Get enumerated values variant

pub fn is_reset(&self) -> bool[src]

Checks if the value of the field is RESET

pub fn is_enable(&self) -> bool[src]

Checks if the value of the field is ENABLE

pub fn is_update(&self) -> bool[src]

Checks if the value of the field is UPDATE

pub fn is_compare_pulse(&self) -> bool[src]

Checks if the value of the field is COMPAREPULSE

pub fn is_compare_oc1(&self) -> bool[src]

Checks if the value of the field is COMPAREOC1

pub fn is_compare_oc2(&self) -> bool[src]

Checks if the value of the field is COMPAREOC2

pub fn is_compare_oc3(&self) -> bool[src]

Checks if the value of the field is COMPAREOC3

pub fn is_compare_oc4(&self) -> bool[src]

Checks if the value of the field is COMPAREOC4

impl R<bool, TI1S_A>[src]

pub fn variant(&self) -> TI1S_A[src]

Get enumerated values variant

pub fn is_normal(&self) -> bool[src]

Checks if the value of the field is NORMAL

pub fn is_xor(&self) -> bool[src]

Checks if the value of the field is XOR

impl R<u32, Reg<u32, _CR2>>[src]

pub fn ccpc(&self) -> CCPC_R[src]

Bit 0 - Capture/compare preloaded control

pub fn ccus(&self) -> CCUS_R[src]

Bit 2 - Capture/compare control update selection

pub fn ccds(&self) -> CCDS_R[src]

Bit 3 - Capture/compare DMA selection

pub fn mms(&self) -> MMS_R[src]

Bits 4:6 - Master mode selection

pub fn ti1s(&self) -> TI1S_R[src]

Bit 7 - TI1 selection

pub fn ois1(&self) -> OIS1_R[src]

Bit 8 - Output Idle state 1

pub fn ois1n(&self) -> OIS1N_R[src]

Bit 9 - Output Idle state 1

pub fn ois2(&self) -> OIS2_R[src]

Bit 10 - Output Idle state 2

pub fn ois2n(&self) -> OIS2N_R[src]

Bit 11 - Output Idle state 2

pub fn ois3(&self) -> OIS3_R[src]

Bit 12 - Output Idle state 3

pub fn ois3n(&self) -> OIS3N_R[src]

Bit 13 - Output Idle state 3

pub fn ois4(&self) -> OIS4_R[src]

Bit 14 - Output Idle state 4

pub fn ois5(&self) -> OIS5_R[src]

Bit 16 - Output Idle state 5

pub fn ois6(&self) -> OIS6_R[src]

Bit 18 - Output Idle state 6

pub fn mms2(&self) -> MMS2_R[src]

Bits 20:23 - Master mode selection 2

impl R<u8, SMS_A>[src]

pub fn variant(&self) -> SMS_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_encoder_mode_1(&self) -> bool[src]

Checks if the value of the field is ENCODER_MODE_1

pub fn is_encoder_mode_2(&self) -> bool[src]

Checks if the value of the field is ENCODER_MODE_2

pub fn is_encoder_mode_3(&self) -> bool[src]

Checks if the value of the field is ENCODER_MODE_3

pub fn is_reset_mode(&self) -> bool[src]

Checks if the value of the field is RESET_MODE

pub fn is_gated_mode(&self) -> bool[src]

Checks if the value of the field is GATED_MODE

pub fn is_trigger_mode(&self) -> bool[src]

Checks if the value of the field is TRIGGER_MODE

pub fn is_ext_clock_mode(&self) -> bool[src]

Checks if the value of the field is EXT_CLOCK_MODE

impl R<u8, TS_A>[src]

pub fn variant(&self) -> Variant<u8, TS_A>[src]

Get enumerated values variant

pub fn is_itr0(&self) -> bool[src]

Checks if the value of the field is ITR0

pub fn is_itr1(&self) -> bool[src]

Checks if the value of the field is ITR1

pub fn is_itr2(&self) -> bool[src]

Checks if the value of the field is ITR2

pub fn is_ti1f_ed(&self) -> bool[src]

Checks if the value of the field is TI1F_ED

pub fn is_ti1fp1(&self) -> bool[src]

Checks if the value of the field is TI1FP1

pub fn is_ti2fp2(&self) -> bool[src]

Checks if the value of the field is TI2FP2

pub fn is_etrf(&self) -> bool[src]

Checks if the value of the field is ETRF

impl R<bool, MSM_A>[src]

pub fn variant(&self) -> MSM_A[src]

Get enumerated values variant

pub fn is_no_sync(&self) -> bool[src]

Checks if the value of the field is NOSYNC

pub fn is_sync(&self) -> bool[src]

Checks if the value of the field is SYNC

impl R<u8, ETF_A>[src]

pub fn variant(&self) -> ETF_A[src]

Get enumerated values variant

pub fn is_no_filter(&self) -> bool[src]

Checks if the value of the field is NOFILTER

pub fn is_fck_int_n2(&self) -> bool[src]

Checks if the value of the field is FCK_INT_N2

pub fn is_fck_int_n4(&self) -> bool[src]

Checks if the value of the field is FCK_INT_N4

pub fn is_fck_int_n8(&self) -> bool[src]

Checks if the value of the field is FCK_INT_N8

pub fn is_fdts_div2_n6(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV2_N6

pub fn is_fdts_div2_n8(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV2_N8

pub fn is_fdts_div4_n6(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV4_N6

pub fn is_fdts_div4_n8(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV4_N8

pub fn is_fdts_div8_n6(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV8_N6

pub fn is_fdts_div8_n8(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV8_N8

pub fn is_fdts_div16_n5(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV16_N5

pub fn is_fdts_div16_n6(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV16_N6

pub fn is_fdts_div16_n8(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV16_N8

pub fn is_fdts_div32_n5(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV32_N5

pub fn is_fdts_div32_n6(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV32_N6

pub fn is_fdts_div32_n8(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV32_N8

impl R<u8, ETPS_A>[src]

pub fn variant(&self) -> ETPS_A[src]

Get enumerated values variant

pub fn is_div1(&self) -> bool[src]

Checks if the value of the field is DIV1

pub fn is_div2(&self) -> bool[src]

Checks if the value of the field is DIV2

pub fn is_div4(&self) -> bool[src]

Checks if the value of the field is DIV4

pub fn is_div8(&self) -> bool[src]

Checks if the value of the field is DIV8

impl R<bool, ECE_A>[src]

pub fn variant(&self) -> ECE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, ETP_A>[src]

pub fn variant(&self) -> ETP_A[src]

Get enumerated values variant

pub fn is_not_inverted(&self) -> bool[src]

Checks if the value of the field is NOTINVERTED

pub fn is_inverted(&self) -> bool[src]

Checks if the value of the field is INVERTED

impl R<u32, Reg<u32, _SMCR>>[src]

pub fn sms(&self) -> SMS_R[src]

Bits 0:2 - Slave mode selection

pub fn occs(&self) -> OCCS_R[src]

Bit 3 - OCREF clear selection

pub fn ts(&self) -> TS_R[src]

Bits 4:6 - Trigger selection

pub fn msm(&self) -> MSM_R[src]

Bit 7 - Master/Slave mode

pub fn etf(&self) -> ETF_R[src]

Bits 8:11 - External trigger filter

pub fn etps(&self) -> ETPS_R[src]

Bits 12:13 - External trigger prescaler

pub fn ece(&self) -> ECE_R[src]

Bit 14 - External clock enable

pub fn etp(&self) -> ETP_R[src]

Bit 15 - External trigger polarity

pub fn sms3(&self) -> SMS3_R[src]

Bit 16 - Slave mode selection bit 3

impl R<bool, TDE_A>[src]

pub fn variant(&self) -> TDE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, CC4DE_A>[src]

pub fn variant(&self) -> CC4DE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, UDE_A>[src]

pub fn variant(&self) -> UDE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, TIE_A>[src]

pub fn variant(&self) -> TIE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, CC4IE_A>[src]

pub fn variant(&self) -> CC4IE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, UIE_A>[src]

pub fn variant(&self) -> UIE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u32, Reg<u32, _DIER>>[src]

pub fn tde(&self) -> TDE_R[src]

Bit 14 - Trigger DMA request enable

pub fn comde(&self) -> COMDE_R[src]

Bit 13 - COM DMA request enable

pub fn cc4de(&self) -> CC4DE_R[src]

Bit 12 - Capture/Compare 4 DMA request enable

pub fn cc3de(&self) -> CC3DE_R[src]

Bit 11 - Capture/Compare 3 DMA request enable

pub fn cc2de(&self) -> CC2DE_R[src]

Bit 10 - Capture/Compare 2 DMA request enable

pub fn cc1de(&self) -> CC1DE_R[src]

Bit 9 - Capture/Compare 1 DMA request enable

pub fn ude(&self) -> UDE_R[src]

Bit 8 - Update DMA request enable

pub fn bie(&self) -> BIE_R[src]

Bit 7 - Break interrupt enable

pub fn tie(&self) -> TIE_R[src]

Bit 6 - Trigger interrupt enable

pub fn comie(&self) -> COMIE_R[src]

Bit 5 - COM interrupt enable

pub fn cc4ie(&self) -> CC4IE_R[src]

Bit 4 - Capture/Compare 4 interrupt enable

pub fn cc3ie(&self) -> CC3IE_R[src]

Bit 3 - Capture/Compare 3 interrupt enable

pub fn cc2ie(&self) -> CC2IE_R[src]

Bit 2 - Capture/Compare 2 interrupt enable

pub fn cc1ie(&self) -> CC1IE_R[src]

Bit 1 - Capture/Compare 1 interrupt enable

pub fn uie(&self) -> UIE_R[src]

Bit 0 - Update interrupt enable

impl R<bool, UIF_A>[src]

pub fn variant(&self) -> UIF_A[src]

Get enumerated values variant

pub fn is_clear(&self) -> bool[src]

Checks if the value of the field is CLEAR

pub fn is_update_pending(&self) -> bool[src]

Checks if the value of the field is UPDATEPENDING

impl R<bool, CC1IF_A>[src]

pub fn variant(&self) -> Variant<bool, CC1IF_A>[src]

Get enumerated values variant

pub fn is_match_(&self) -> bool[src]

Checks if the value of the field is MATCH

impl R<bool, TIF_A>[src]

pub fn variant(&self) -> TIF_A[src]

Get enumerated values variant

pub fn is_no_trigger(&self) -> bool[src]

Checks if the value of the field is NOTRIGGER

pub fn is_trigger(&self) -> bool[src]

Checks if the value of the field is TRIGGER

impl R<bool, CC1OF_A>[src]

pub fn variant(&self) -> Variant<bool, CC1OF_A>[src]

Get enumerated values variant

pub fn is_overcapture(&self) -> bool[src]

Checks if the value of the field is OVERCAPTURE

impl R<u32, Reg<u32, _SR>>[src]

pub fn uif(&self) -> UIF_R[src]

Bit 0 - Update interrupt flag

pub fn cc1if(&self) -> CC1IF_R[src]

Bit 1 - Capture/compare 1 interrupt flag

pub fn cc2if(&self) -> CC2IF_R[src]

Bit 2 - Capture/Compare 2 interrupt flag

pub fn cc3if(&self) -> CC3IF_R[src]

Bit 3 - Capture/Compare 3 interrupt flag

pub fn cc4if(&self) -> CC4IF_R[src]

Bit 4 - Capture/Compare 4 interrupt flag

pub fn comif(&self) -> COMIF_R[src]

Bit 5 - COM interrupt flag

pub fn tif(&self) -> TIF_R[src]

Bit 6 - Trigger interrupt flag

pub fn bif(&self) -> BIF_R[src]

Bit 7 - Break interrupt flag

pub fn b2if(&self) -> B2IF_R[src]

Bit 8 - Break 2 interrupt flag

pub fn cc1of(&self) -> CC1OF_R[src]

Bit 9 - Capture/Compare 1 overcapture flag

pub fn cc2of(&self) -> CC2OF_R[src]

Bit 10 - Capture/compare 2 overcapture flag

pub fn cc3of(&self) -> CC3OF_R[src]

Bit 11 - Capture/Compare 3 overcapture flag

pub fn cc4of(&self) -> CC4OF_R[src]

Bit 12 - Capture/Compare 4 overcapture flag

pub fn c5if(&self) -> C5IF_R[src]

Bit 16 - Capture/Compare 5 interrupt flag

pub fn c6if(&self) -> C6IF_R[src]

Bit 17 - Capture/Compare 6 interrupt flag

impl R<u8, OC2M_A>[src]

pub fn variant(&self) -> OC2M_A[src]

Get enumerated values variant

pub fn is_frozen(&self) -> bool[src]

Checks if the value of the field is FROZEN

pub fn is_active_on_match(&self) -> bool[src]

Checks if the value of the field is ACTIVEONMATCH

pub fn is_inactive_on_match(&self) -> bool[src]

Checks if the value of the field is INACTIVEONMATCH

pub fn is_toggle(&self) -> bool[src]

Checks if the value of the field is TOGGLE

pub fn is_force_inactive(&self) -> bool[src]

Checks if the value of the field is FORCEINACTIVE

pub fn is_force_active(&self) -> bool[src]

Checks if the value of the field is FORCEACTIVE

pub fn is_pwm_mode1(&self) -> bool[src]

Checks if the value of the field is PWMMODE1

pub fn is_pwm_mode2(&self) -> bool[src]

Checks if the value of the field is PWMMODE2

impl R<bool, OC2PE_A>[src]

pub fn variant(&self) -> OC2PE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u8, CC2S_A>[src]

pub fn variant(&self) -> Variant<u8, CC2S_A>[src]

Get enumerated values variant

pub fn is_output(&self) -> bool[src]

Checks if the value of the field is OUTPUT

impl R<bool, OC1PE_A>[src]

pub fn variant(&self) -> OC1PE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u8, CC1S_A>[src]

pub fn variant(&self) -> Variant<u8, CC1S_A>[src]

Get enumerated values variant

pub fn is_output(&self) -> bool[src]

Checks if the value of the field is OUTPUT

impl R<u32, Reg<u32, _CCMR1_OUTPUT>>[src]

pub fn oc2ce(&self) -> OC2CE_R[src]

Bit 15 - Output Compare 2 clear enable

pub fn oc2m(&self) -> OC2M_R[src]

Bits 12:14 - Output Compare 2 mode

pub fn oc2pe(&self) -> OC2PE_R[src]

Bit 11 - Output Compare 2 preload enable

pub fn oc2fe(&self) -> OC2FE_R[src]

Bit 10 - Output Compare 2 fast enable

pub fn cc2s(&self) -> CC2S_R[src]

Bits 8:9 - Capture/Compare 2 selection

pub fn oc1ce(&self) -> OC1CE_R[src]

Bit 7 - Output Compare 1 clear enable

pub fn oc1m(&self) -> OC1M_R[src]

Bits 4:6 - Output Compare 1 mode

pub fn oc1pe(&self) -> OC1PE_R[src]

Bit 3 - Output Compare 1 preload enable

pub fn oc1fe(&self) -> OC1FE_R[src]

Bit 2 - Output Compare 1 fast enable

pub fn cc1s(&self) -> CC1S_R[src]

Bits 0:1 - Capture/Compare 1 selection

pub fn oc1m_3(&self) -> OC1M_3_R[src]

Bit 16 - Output Compare 1 mode bit 3

pub fn oc2m_3(&self) -> OC2M_3_R[src]

Bit 24 - Output Compare 2 mode bit 3

impl R<u8, CC2S_A>[src]

pub fn variant(&self) -> Variant<u8, CC2S_A>[src]

Get enumerated values variant

pub fn is_ti2(&self) -> bool[src]

Checks if the value of the field is TI2

pub fn is_ti1(&self) -> bool[src]

Checks if the value of the field is TI1

pub fn is_trc(&self) -> bool[src]

Checks if the value of the field is TRC

impl R<u8, IC1F_A>[src]

pub fn variant(&self) -> IC1F_A[src]

Get enumerated values variant

pub fn is_no_filter(&self) -> bool[src]

Checks if the value of the field is NOFILTER

pub fn is_fck_int_n2(&self) -> bool[src]

Checks if the value of the field is FCK_INT_N2

pub fn is_fck_int_n4(&self) -> bool[src]

Checks if the value of the field is FCK_INT_N4

pub fn is_fck_int_n8(&self) -> bool[src]

Checks if the value of the field is FCK_INT_N8

pub fn is_fdts_div2_n6(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV2_N6

pub fn is_fdts_div2_n8(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV2_N8

pub fn is_fdts_div4_n6(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV4_N6

pub fn is_fdts_div4_n8(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV4_N8

pub fn is_fdts_div8_n6(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV8_N6

pub fn is_fdts_div8_n8(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV8_N8

pub fn is_fdts_div16_n5(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV16_N5

pub fn is_fdts_div16_n6(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV16_N6

pub fn is_fdts_div16_n8(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV16_N8

pub fn is_fdts_div32_n5(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV32_N5

pub fn is_fdts_div32_n6(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV32_N6

pub fn is_fdts_div32_n8(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV32_N8

impl R<u8, CC1S_A>[src]

pub fn variant(&self) -> Variant<u8, CC1S_A>[src]

Get enumerated values variant

pub fn is_ti1(&self) -> bool[src]

Checks if the value of the field is TI1

pub fn is_ti2(&self) -> bool[src]

Checks if the value of the field is TI2

pub fn is_trc(&self) -> bool[src]

Checks if the value of the field is TRC

impl R<u32, Reg<u32, _CCMR1_INPUT>>[src]

pub fn ic2f(&self) -> IC2F_R[src]

Bits 12:15 - Input capture 2 filter

pub fn ic2psc(&self) -> IC2PSC_R[src]

Bits 10:11 - Input capture 2 prescaler

pub fn cc2s(&self) -> CC2S_R[src]

Bits 8:9 - Capture/Compare 2 selection

pub fn ic1f(&self) -> IC1F_R[src]

Bits 4:7 - Input capture 1 filter

pub fn ic1psc(&self) -> IC1PSC_R[src]

Bits 2:3 - Input capture 1 prescaler

pub fn cc1s(&self) -> CC1S_R[src]

Bits 0:1 - Capture/Compare 1 selection

impl R<u8, OC4M_A>[src]

pub fn variant(&self) -> OC4M_A[src]

Get enumerated values variant

pub fn is_frozen(&self) -> bool[src]

Checks if the value of the field is FROZEN

pub fn is_active_on_match(&self) -> bool[src]

Checks if the value of the field is ACTIVEONMATCH

pub fn is_inactive_on_match(&self) -> bool[src]

Checks if the value of the field is INACTIVEONMATCH

pub fn is_toggle(&self) -> bool[src]

Checks if the value of the field is TOGGLE

pub fn is_force_inactive(&self) -> bool[src]

Checks if the value of the field is FORCEINACTIVE

pub fn is_force_active(&self) -> bool[src]

Checks if the value of the field is FORCEACTIVE

pub fn is_pwm_mode1(&self) -> bool[src]

Checks if the value of the field is PWMMODE1

pub fn is_pwm_mode2(&self) -> bool[src]

Checks if the value of the field is PWMMODE2

impl R<bool, OC4PE_A>[src]

pub fn variant(&self) -> OC4PE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u8, CC4S_A>[src]

pub fn variant(&self) -> Variant<u8, CC4S_A>[src]

Get enumerated values variant

pub fn is_output(&self) -> bool[src]

Checks if the value of the field is OUTPUT

impl R<bool, OC3PE_A>[src]

pub fn variant(&self) -> OC3PE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u8, CC3S_A>[src]

pub fn variant(&self) -> Variant<u8, CC3S_A>[src]

Get enumerated values variant

pub fn is_output(&self) -> bool[src]

Checks if the value of the field is OUTPUT

impl R<u32, Reg<u32, _CCMR2_OUTPUT>>[src]

pub fn oc4ce(&self) -> OC4CE_R[src]

Bit 15 - Output compare 4 clear enable

pub fn oc4m(&self) -> OC4M_R[src]

Bits 12:14 - Output compare 4 mode

pub fn oc4pe(&self) -> OC4PE_R[src]

Bit 11 - Output compare 4 preload enable

pub fn oc4fe(&self) -> OC4FE_R[src]

Bit 10 - Output compare 4 fast enable

pub fn cc4s(&self) -> CC4S_R[src]

Bits 8:9 - Capture/Compare 4 selection

pub fn oc3ce(&self) -> OC3CE_R[src]

Bit 7 - Output compare 3 clear enable

pub fn oc3m(&self) -> OC3M_R[src]

Bits 4:6 - Output compare 3 mode

pub fn oc3pe(&self) -> OC3PE_R[src]

Bit 3 - Output compare 3 preload enable

pub fn oc3fe(&self) -> OC3FE_R[src]

Bit 2 - Output compare 3 fast enable

pub fn cc3s(&self) -> CC3S_R[src]

Bits 0:1 - Capture/Compare 3 selection

pub fn oc3m_3(&self) -> OC3M_3_R[src]

Bit 16 - Output Compare 3 mode bit 3

pub fn oc4m_3(&self) -> OC4M_3_R[src]

Bit 24 - Output Compare 4 mode bit 3

impl R<u8, CC4S_A>[src]

pub fn variant(&self) -> Variant<u8, CC4S_A>[src]

Get enumerated values variant

pub fn is_ti4(&self) -> bool[src]

Checks if the value of the field is TI4

pub fn is_ti3(&self) -> bool[src]

Checks if the value of the field is TI3

pub fn is_trc(&self) -> bool[src]

Checks if the value of the field is TRC

impl R<u8, CC3S_A>[src]

pub fn variant(&self) -> Variant<u8, CC3S_A>[src]

Get enumerated values variant

pub fn is_ti3(&self) -> bool[src]

Checks if the value of the field is TI3

pub fn is_ti4(&self) -> bool[src]

Checks if the value of the field is TI4

pub fn is_trc(&self) -> bool[src]

Checks if the value of the field is TRC

impl R<u32, Reg<u32, _CCMR2_INPUT>>[src]

pub fn ic4f(&self) -> IC4F_R[src]

Bits 12:15 - Input capture 4 filter

pub fn ic4psc(&self) -> IC4PSC_R[src]

Bits 10:11 - Input capture 4 prescaler

pub fn cc4s(&self) -> CC4S_R[src]

Bits 8:9 - Capture/Compare 4 selection

pub fn ic3f(&self) -> IC3F_R[src]

Bits 4:7 - Input capture 3 filter

pub fn ic3psc(&self) -> IC3PSC_R[src]

Bits 2:3 - Input capture 3 prescaler

pub fn cc3s(&self) -> CC3S_R[src]

Bits 0:1 - Capture/compare 3 selection

impl R<u32, Reg<u32, _CCER>>[src]

pub fn cc1e(&self) -> CC1E_R[src]

Bit 0 - Capture/Compare 1 output enable

pub fn cc1p(&self) -> CC1P_R[src]

Bit 1 - Capture/Compare 1 output Polarity

pub fn cc1ne(&self) -> CC1NE_R[src]

Bit 2 - Capture/Compare 1 complementary output enable

pub fn cc1np(&self) -> CC1NP_R[src]

Bit 3 - Capture/Compare 1 output Polarity

pub fn cc2e(&self) -> CC2E_R[src]

Bit 4 - Capture/Compare 2 output enable

pub fn cc2p(&self) -> CC2P_R[src]

Bit 5 - Capture/Compare 2 output Polarity

pub fn cc2ne(&self) -> CC2NE_R[src]

Bit 6 - Capture/Compare 2 complementary output enable

pub fn cc2np(&self) -> CC2NP_R[src]

Bit 7 - Capture/Compare 2 output Polarity

pub fn cc3e(&self) -> CC3E_R[src]

Bit 8 - Capture/Compare 3 output enable

pub fn cc3p(&self) -> CC3P_R[src]

Bit 9 - Capture/Compare 3 output Polarity

pub fn cc3ne(&self) -> CC3NE_R[src]

Bit 10 - Capture/Compare 3 complementary output enable

pub fn cc3np(&self) -> CC3NP_R[src]

Bit 11 - Capture/Compare 3 output Polarity

pub fn cc4e(&self) -> CC4E_R[src]

Bit 12 - Capture/Compare 4 output enable

pub fn cc4p(&self) -> CC4P_R[src]

Bit 13 - Capture/Compare 3 output Polarity

pub fn cc4np(&self) -> CC4NP_R[src]

Bit 15 - Capture/Compare 4 output Polarity

pub fn cc5e(&self) -> CC5E_R[src]

Bit 16 - Capture/Compare 5 output enable

pub fn cc5p(&self) -> CC5P_R[src]

Bit 17 - Capture/Compare 5 output Polarity

pub fn cc6e(&self) -> CC6E_R[src]

Bit 20 - Capture/Compare 6 output enable

pub fn cc6p(&self) -> CC6P_R[src]

Bit 21 - Capture/Compare 6 output Polarity

impl R<u32, Reg<u32, _CNT>>[src]

pub fn cnt(&self) -> CNT_R[src]

Bits 0:15 - counter value

pub fn uifcpy(&self) -> UIFCPY_R[src]

Bit 31 - UIF copy

impl R<u32, Reg<u32, _PSC>>[src]

pub fn psc(&self) -> PSC_R[src]

Bits 0:15 - Prescaler value

impl R<u32, Reg<u32, _ARR>>[src]

pub fn arr(&self) -> ARR_R[src]

Bits 0:15 - Auto-reload value

impl R<u32, Reg<u32, _RCR>>[src]

pub fn rep(&self) -> REP_R[src]

Bits 0:15 - Repetition counter value

impl R<u32, Reg<u32, _CCR>>[src]

pub fn ccr(&self) -> CCR_R[src]

Bits 0:15 - Capture/Compare 1 value

impl R<bool, OSSI_A>[src]

pub fn variant(&self) -> OSSI_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_idle_level(&self) -> bool[src]

Checks if the value of the field is IDLELEVEL

impl R<bool, OSSR_A>[src]

pub fn variant(&self) -> OSSR_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_idle_level(&self) -> bool[src]

Checks if the value of the field is IDLELEVEL

impl R<bool, MOE_A>[src]

pub fn variant(&self) -> MOE_A[src]

Get enumerated values variant

pub fn is_disabled_idle(&self) -> bool[src]

Checks if the value of the field is DISABLEDIDLE

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u32, Reg<u32, _BDTR>>[src]

pub fn dtg(&self) -> DTG_R[src]

Bits 0:7 - Dead-time generator setup

pub fn lock(&self) -> LOCK_R[src]

Bits 8:9 - Lock configuration

pub fn ossi(&self) -> OSSI_R[src]

Bit 10 - Off-state selection for Idle mode

pub fn ossr(&self) -> OSSR_R[src]

Bit 11 - Off-state selection for Run mode

pub fn bke(&self) -> BKE_R[src]

Bit 12 - Break enable

pub fn bkp(&self) -> BKP_R[src]

Bit 13 - Break polarity

pub fn aoe(&self) -> AOE_R[src]

Bit 14 - Automatic output enable

pub fn moe(&self) -> MOE_R[src]

Bit 15 - Main output enable

pub fn bkf(&self) -> BKF_R[src]

Bits 16:19 - Break filter

pub fn bk2f(&self) -> BK2F_R[src]

Bits 20:23 - Break 2 filter

pub fn bk2e(&self) -> BK2E_R[src]

Bit 24 - Break 2 enable

pub fn bk2p(&self) -> BK2P_R[src]

Bit 25 - Break 2 polarity

impl R<u32, Reg<u32, _DCR>>[src]

pub fn dbl(&self) -> DBL_R[src]

Bits 8:12 - DMA burst length

pub fn dba(&self) -> DBA_R[src]

Bits 0:4 - DMA base address

impl R<u32, Reg<u32, _DMAR>>[src]

pub fn dmab(&self) -> DMAB_R[src]

Bits 0:15 - DMA register for burst accesses

impl R<u32, Reg<u32, _CCMR3_OUTPUT>>[src]

pub fn oc5fe(&self) -> OC5FE_R[src]

Bit 2 - Output compare 5 fast enable

pub fn oc5pe(&self) -> OC5PE_R[src]

Bit 3 - Output compare 5 preload enable

pub fn oc5m(&self) -> OC5M_R[src]

Bits 4:6 - Output compare 5 mode

pub fn oc5ce(&self) -> OC5CE_R[src]

Bit 7 - Output compare 5 clear enable

pub fn oc6fe(&self) -> OC6FE_R[src]

Bit 10 - Output compare 6 fast enable

pub fn oc6pe(&self) -> OC6PE_R[src]

Bit 11 - Output compare 6 preload enable

pub fn oc6m(&self) -> OC6M_R[src]

Bits 12:14 - Output compare 6 mode

pub fn oc6ce(&self) -> OC6CE_R[src]

Bit 15 - Output compare 6 clear enable

pub fn oc5m_3(&self) -> OC5M_3_R[src]

Bit 16 - Outout Compare 5 mode bit 3

pub fn oc6m_3(&self) -> OC6M_3_R[src]

Bit 24 - Outout Compare 6 mode bit 3

impl R<u32, Reg<u32, _CCR5>>[src]

pub fn ccr(&self) -> CCR_R[src]

Bits 0:15 - Capture/Compare 5 value

pub fn gc5c1(&self) -> GC5C1_R[src]

Bit 29 - Group Channel 5 and Channel 1

pub fn gc5c2(&self) -> GC5C2_R[src]

Bit 30 - Group Channel 5 and Channel 2

pub fn gc5c3(&self) -> GC5C3_R[src]

Bit 31 - Group Channel 5 and Channel 3

impl R<u32, Reg<u32, _CCR6>>[src]

pub fn ccr(&self) -> CCR_R[src]

Bits 0:15 - Capture/Compare 6 value

impl R<u32, Reg<u32, _OR>>[src]

pub fn tim1_etr_adc1_rmp(&self) -> TIM1_ETR_ADC1_RMP_R[src]

Bits 0:1 - TIM1_ETR_ADC1 remapping capability

pub fn tim1_etr_adc4_rmp(&self) -> TIM1_ETR_ADC4_RMP_R[src]

Bits 2:3 - TIM1_ETR_ADC4 remapping capability

impl R<bool, CEN_A>[src]

pub fn variant(&self) -> CEN_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, UDIS_A>[src]

pub fn variant(&self) -> UDIS_A[src]

Get enumerated values variant

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

impl R<bool, URS_A>[src]

pub fn variant(&self) -> URS_A[src]

Get enumerated values variant

pub fn is_any_event(&self) -> bool[src]

Checks if the value of the field is ANYEVENT

pub fn is_counter_only(&self) -> bool[src]

Checks if the value of the field is COUNTERONLY

impl R<bool, OPM_A>[src]

pub fn variant(&self) -> OPM_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, DIR_A>[src]

pub fn variant(&self) -> DIR_A[src]

Get enumerated values variant

pub fn is_up(&self) -> bool[src]

Checks if the value of the field is UP

pub fn is_down(&self) -> bool[src]

Checks if the value of the field is DOWN

impl R<u8, CMS_A>[src]

pub fn variant(&self) -> CMS_A[src]

Get enumerated values variant

pub fn is_edge_aligned(&self) -> bool[src]

Checks if the value of the field is EDGEALIGNED

pub fn is_center_aligned1(&self) -> bool[src]

Checks if the value of the field is CENTERALIGNED1

pub fn is_center_aligned2(&self) -> bool[src]

Checks if the value of the field is CENTERALIGNED2

pub fn is_center_aligned3(&self) -> bool[src]

Checks if the value of the field is CENTERALIGNED3

impl R<bool, ARPE_A>[src]

pub fn variant(&self) -> ARPE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u8, CKD_A>[src]

pub fn variant(&self) -> Variant<u8, CKD_A>[src]

Get enumerated values variant

pub fn is_div1(&self) -> bool[src]

Checks if the value of the field is DIV1

pub fn is_div2(&self) -> bool[src]

Checks if the value of the field is DIV2

pub fn is_div4(&self) -> bool[src]

Checks if the value of the field is DIV4

impl R<u32, Reg<u32, _CR1>>[src]

pub fn cen(&self) -> CEN_R[src]

Bit 0 - Counter enable

pub fn udis(&self) -> UDIS_R[src]

Bit 1 - Update disable

pub fn urs(&self) -> URS_R[src]

Bit 2 - Update request source

pub fn opm(&self) -> OPM_R[src]

Bit 3 - One-pulse mode

pub fn dir(&self) -> DIR_R[src]

Bit 4 - Direction

pub fn cms(&self) -> CMS_R[src]

Bits 5:6 - Center-aligned mode selection

pub fn arpe(&self) -> ARPE_R[src]

Bit 7 - Auto-reload preload enable

pub fn ckd(&self) -> CKD_R[src]

Bits 8:9 - Clock division

pub fn uifremap(&self) -> UIFREMAP_R[src]

Bit 11 - UIF status bit remapping

impl R<bool, CCDS_A>[src]

pub fn variant(&self) -> CCDS_A[src]

Get enumerated values variant

pub fn is_on_compare(&self) -> bool[src]

Checks if the value of the field is ONCOMPARE

pub fn is_on_update(&self) -> bool[src]

Checks if the value of the field is ONUPDATE

impl R<u8, MMS_A>[src]

pub fn variant(&self) -> MMS_A[src]

Get enumerated values variant

pub fn is_reset(&self) -> bool[src]

Checks if the value of the field is RESET

pub fn is_enable(&self) -> bool[src]

Checks if the value of the field is ENABLE

pub fn is_update(&self) -> bool[src]

Checks if the value of the field is UPDATE

pub fn is_compare_pulse(&self) -> bool[src]

Checks if the value of the field is COMPAREPULSE

pub fn is_compare_oc1(&self) -> bool[src]

Checks if the value of the field is COMPAREOC1

pub fn is_compare_oc2(&self) -> bool[src]

Checks if the value of the field is COMPAREOC2

pub fn is_compare_oc3(&self) -> bool[src]

Checks if the value of the field is COMPAREOC3

pub fn is_compare_oc4(&self) -> bool[src]

Checks if the value of the field is COMPAREOC4

impl R<bool, TI1S_A>[src]

pub fn variant(&self) -> TI1S_A[src]

Get enumerated values variant

pub fn is_normal(&self) -> bool[src]

Checks if the value of the field is NORMAL

pub fn is_xor(&self) -> bool[src]

Checks if the value of the field is XOR

impl R<u32, Reg<u32, _CR2>>[src]

pub fn ccpc(&self) -> CCPC_R[src]

Bit 0 - Capture/compare preloaded control

pub fn ccus(&self) -> CCUS_R[src]

Bit 2 - Capture/compare control update selection

pub fn ccds(&self) -> CCDS_R[src]

Bit 3 - Capture/compare DMA selection

pub fn mms(&self) -> MMS_R[src]

Bits 4:6 - Master mode selection

pub fn ti1s(&self) -> TI1S_R[src]

Bit 7 - TI1 selection

pub fn ois1(&self) -> OIS1_R[src]

Bit 8 - Output Idle state 1

pub fn ois1n(&self) -> OIS1N_R[src]

Bit 9 - Output Idle state 1

pub fn ois2(&self) -> OIS2_R[src]

Bit 10 - Output Idle state 2

pub fn ois2n(&self) -> OIS2N_R[src]

Bit 11 - Output Idle state 2

pub fn ois3(&self) -> OIS3_R[src]

Bit 12 - Output Idle state 3

pub fn ois3n(&self) -> OIS3N_R[src]

Bit 13 - Output Idle state 3

pub fn ois4(&self) -> OIS4_R[src]

Bit 14 - Output Idle state 4

pub fn ois5(&self) -> OIS5_R[src]

Bit 16 - Output Idle state 5

pub fn ois6(&self) -> OIS6_R[src]

Bit 18 - Output Idle state 6

pub fn mms2(&self) -> MMS2_R[src]

Bits 20:23 - Master mode selection 2

impl R<u8, SMS_A>[src]

pub fn variant(&self) -> SMS_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_encoder_mode_1(&self) -> bool[src]

Checks if the value of the field is ENCODER_MODE_1

pub fn is_encoder_mode_2(&self) -> bool[src]

Checks if the value of the field is ENCODER_MODE_2

pub fn is_encoder_mode_3(&self) -> bool[src]

Checks if the value of the field is ENCODER_MODE_3

pub fn is_reset_mode(&self) -> bool[src]

Checks if the value of the field is RESET_MODE

pub fn is_gated_mode(&self) -> bool[src]

Checks if the value of the field is GATED_MODE

pub fn is_trigger_mode(&self) -> bool[src]

Checks if the value of the field is TRIGGER_MODE

pub fn is_ext_clock_mode(&self) -> bool[src]

Checks if the value of the field is EXT_CLOCK_MODE

impl R<u8, TS_A>[src]

pub fn variant(&self) -> Variant<u8, TS_A>[src]

Get enumerated values variant

pub fn is_itr0(&self) -> bool[src]

Checks if the value of the field is ITR0

pub fn is_itr1(&self) -> bool[src]

Checks if the value of the field is ITR1

pub fn is_itr2(&self) -> bool[src]

Checks if the value of the field is ITR2

pub fn is_ti1f_ed(&self) -> bool[src]

Checks if the value of the field is TI1F_ED

pub fn is_ti1fp1(&self) -> bool[src]

Checks if the value of the field is TI1FP1

pub fn is_ti2fp2(&self) -> bool[src]

Checks if the value of the field is TI2FP2

pub fn is_etrf(&self) -> bool[src]

Checks if the value of the field is ETRF

impl R<bool, MSM_A>[src]

pub fn variant(&self) -> MSM_A[src]

Get enumerated values variant

pub fn is_no_sync(&self) -> bool[src]

Checks if the value of the field is NOSYNC

pub fn is_sync(&self) -> bool[src]

Checks if the value of the field is SYNC

impl R<u8, ETF_A>[src]

pub fn variant(&self) -> ETF_A[src]

Get enumerated values variant

pub fn is_no_filter(&self) -> bool[src]

Checks if the value of the field is NOFILTER

pub fn is_fck_int_n2(&self) -> bool[src]

Checks if the value of the field is FCK_INT_N2

pub fn is_fck_int_n4(&self) -> bool[src]

Checks if the value of the field is FCK_INT_N4

pub fn is_fck_int_n8(&self) -> bool[src]

Checks if the value of the field is FCK_INT_N8

pub fn is_fdts_div2_n6(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV2_N6

pub fn is_fdts_div2_n8(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV2_N8

pub fn is_fdts_div4_n6(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV4_N6

pub fn is_fdts_div4_n8(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV4_N8

pub fn is_fdts_div8_n6(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV8_N6

pub fn is_fdts_div8_n8(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV8_N8

pub fn is_fdts_div16_n5(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV16_N5

pub fn is_fdts_div16_n6(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV16_N6

pub fn is_fdts_div16_n8(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV16_N8

pub fn is_fdts_div32_n5(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV32_N5

pub fn is_fdts_div32_n6(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV32_N6

pub fn is_fdts_div32_n8(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV32_N8

impl R<u8, ETPS_A>[src]

pub fn variant(&self) -> ETPS_A[src]

Get enumerated values variant

pub fn is_div1(&self) -> bool[src]

Checks if the value of the field is DIV1

pub fn is_div2(&self) -> bool[src]

Checks if the value of the field is DIV2

pub fn is_div4(&self) -> bool[src]

Checks if the value of the field is DIV4

pub fn is_div8(&self) -> bool[src]

Checks if the value of the field is DIV8

impl R<bool, ECE_A>[src]

pub fn variant(&self) -> ECE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, ETP_A>[src]

pub fn variant(&self) -> ETP_A[src]

Get enumerated values variant

pub fn is_not_inverted(&self) -> bool[src]

Checks if the value of the field is NOTINVERTED

pub fn is_inverted(&self) -> bool[src]

Checks if the value of the field is INVERTED

impl R<u32, Reg<u32, _SMCR>>[src]

pub fn sms(&self) -> SMS_R[src]

Bits 0:2 - Slave mode selection

pub fn occs(&self) -> OCCS_R[src]

Bit 3 - OCREF clear selection

pub fn ts(&self) -> TS_R[src]

Bits 4:6 - Trigger selection

pub fn msm(&self) -> MSM_R[src]

Bit 7 - Master/Slave mode

pub fn etf(&self) -> ETF_R[src]

Bits 8:11 - External trigger filter

pub fn etps(&self) -> ETPS_R[src]

Bits 12:13 - External trigger prescaler

pub fn ece(&self) -> ECE_R[src]

Bit 14 - External clock enable

pub fn etp(&self) -> ETP_R[src]

Bit 15 - External trigger polarity

pub fn sms3(&self) -> SMS3_R[src]

Bit 16 - Slave mode selection bit 3

impl R<bool, TDE_A>[src]

pub fn variant(&self) -> TDE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, CC4DE_A>[src]

pub fn variant(&self) -> CC4DE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, UDE_A>[src]

pub fn variant(&self) -> UDE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, TIE_A>[src]

pub fn variant(&self) -> TIE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, CC4IE_A>[src]

pub fn variant(&self) -> CC4IE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, UIE_A>[src]

pub fn variant(&self) -> UIE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u32, Reg<u32, _DIER>>[src]

pub fn tde(&self) -> TDE_R[src]

Bit 14 - Trigger DMA request enable

pub fn comde(&self) -> COMDE_R[src]

Bit 13 - COM DMA request enable

pub fn cc4de(&self) -> CC4DE_R[src]

Bit 12 - Capture/Compare 4 DMA request enable

pub fn cc3de(&self) -> CC3DE_R[src]

Bit 11 - Capture/Compare 3 DMA request enable

pub fn cc2de(&self) -> CC2DE_R[src]

Bit 10 - Capture/Compare 2 DMA request enable

pub fn cc1de(&self) -> CC1DE_R[src]

Bit 9 - Capture/Compare 1 DMA request enable

pub fn ude(&self) -> UDE_R[src]

Bit 8 - Update DMA request enable

pub fn bie(&self) -> BIE_R[src]

Bit 7 - Break interrupt enable

pub fn tie(&self) -> TIE_R[src]

Bit 6 - Trigger interrupt enable

pub fn comie(&self) -> COMIE_R[src]

Bit 5 - COM interrupt enable

pub fn cc4ie(&self) -> CC4IE_R[src]

Bit 4 - Capture/Compare 4 interrupt enable

pub fn cc3ie(&self) -> CC3IE_R[src]

Bit 3 - Capture/Compare 3 interrupt enable

pub fn cc2ie(&self) -> CC2IE_R[src]

Bit 2 - Capture/Compare 2 interrupt enable

pub fn cc1ie(&self) -> CC1IE_R[src]

Bit 1 - Capture/Compare 1 interrupt enable

pub fn uie(&self) -> UIE_R[src]

Bit 0 - Update interrupt enable

impl R<bool, UIF_A>[src]

pub fn variant(&self) -> UIF_A[src]

Get enumerated values variant

pub fn is_clear(&self) -> bool[src]

Checks if the value of the field is CLEAR

pub fn is_update_pending(&self) -> bool[src]

Checks if the value of the field is UPDATEPENDING

impl R<bool, CC1IF_A>[src]

pub fn variant(&self) -> Variant<bool, CC1IF_A>[src]

Get enumerated values variant

pub fn is_match_(&self) -> bool[src]

Checks if the value of the field is MATCH

impl R<bool, TIF_A>[src]

pub fn variant(&self) -> TIF_A[src]

Get enumerated values variant

pub fn is_no_trigger(&self) -> bool[src]

Checks if the value of the field is NOTRIGGER

pub fn is_trigger(&self) -> bool[src]

Checks if the value of the field is TRIGGER

impl R<bool, CC1OF_A>[src]

pub fn variant(&self) -> Variant<bool, CC1OF_A>[src]

Get enumerated values variant

pub fn is_overcapture(&self) -> bool[src]

Checks if the value of the field is OVERCAPTURE

impl R<u32, Reg<u32, _SR>>[src]

pub fn uif(&self) -> UIF_R[src]

Bit 0 - Update interrupt flag

pub fn cc1if(&self) -> CC1IF_R[src]

Bit 1 - Capture/compare 1 interrupt flag

pub fn cc2if(&self) -> CC2IF_R[src]

Bit 2 - Capture/Compare 2 interrupt flag

pub fn cc3if(&self) -> CC3IF_R[src]

Bit 3 - Capture/Compare 3 interrupt flag

pub fn cc4if(&self) -> CC4IF_R[src]

Bit 4 - Capture/Compare 4 interrupt flag

pub fn comif(&self) -> COMIF_R[src]

Bit 5 - COM interrupt flag

pub fn tif(&self) -> TIF_R[src]

Bit 6 - Trigger interrupt flag

pub fn bif(&self) -> BIF_R[src]

Bit 7 - Break interrupt flag

pub fn b2if(&self) -> B2IF_R[src]

Bit 8 - Break 2 interrupt flag

pub fn cc1of(&self) -> CC1OF_R[src]

Bit 9 - Capture/Compare 1 overcapture flag

pub fn cc2of(&self) -> CC2OF_R[src]

Bit 10 - Capture/compare 2 overcapture flag

pub fn cc3of(&self) -> CC3OF_R[src]

Bit 11 - Capture/Compare 3 overcapture flag

pub fn cc4of(&self) -> CC4OF_R[src]

Bit 12 - Capture/Compare 4 overcapture flag

pub fn c5if(&self) -> C5IF_R[src]

Bit 16 - Capture/Compare 5 interrupt flag

pub fn c6if(&self) -> C6IF_R[src]

Bit 17 - Capture/Compare 6 interrupt flag

impl R<u8, OC2M_A>[src]

pub fn variant(&self) -> OC2M_A[src]

Get enumerated values variant

pub fn is_frozen(&self) -> bool[src]

Checks if the value of the field is FROZEN

pub fn is_active_on_match(&self) -> bool[src]

Checks if the value of the field is ACTIVEONMATCH

pub fn is_inactive_on_match(&self) -> bool[src]

Checks if the value of the field is INACTIVEONMATCH

pub fn is_toggle(&self) -> bool[src]

Checks if the value of the field is TOGGLE

pub fn is_force_inactive(&self) -> bool[src]

Checks if the value of the field is FORCEINACTIVE

pub fn is_force_active(&self) -> bool[src]

Checks if the value of the field is FORCEACTIVE

pub fn is_pwm_mode1(&self) -> bool[src]

Checks if the value of the field is PWMMODE1

pub fn is_pwm_mode2(&self) -> bool[src]

Checks if the value of the field is PWMMODE2

impl R<bool, OC2PE_A>[src]

pub fn variant(&self) -> OC2PE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u8, CC2S_A>[src]

pub fn variant(&self) -> Variant<u8, CC2S_A>[src]

Get enumerated values variant

pub fn is_output(&self) -> bool[src]

Checks if the value of the field is OUTPUT

impl R<bool, OC1PE_A>[src]

pub fn variant(&self) -> OC1PE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u8, CC1S_A>[src]

pub fn variant(&self) -> Variant<u8, CC1S_A>[src]

Get enumerated values variant

pub fn is_output(&self) -> bool[src]

Checks if the value of the field is OUTPUT

impl R<u32, Reg<u32, _CCMR1_OUTPUT>>[src]

pub fn oc2ce(&self) -> OC2CE_R[src]

Bit 15 - Output Compare 2 clear enable

pub fn oc2m(&self) -> OC2M_R[src]

Bits 12:14 - Output Compare 2 mode

pub fn oc2pe(&self) -> OC2PE_R[src]

Bit 11 - Output Compare 2 preload enable

pub fn oc2fe(&self) -> OC2FE_R[src]

Bit 10 - Output Compare 2 fast enable

pub fn cc2s(&self) -> CC2S_R[src]

Bits 8:9 - Capture/Compare 2 selection

pub fn oc1ce(&self) -> OC1CE_R[src]

Bit 7 - Output Compare 1 clear enable

pub fn oc1m(&self) -> OC1M_R[src]

Bits 4:6 - Output Compare 1 mode

pub fn oc1pe(&self) -> OC1PE_R[src]

Bit 3 - Output Compare 1 preload enable

pub fn oc1fe(&self) -> OC1FE_R[src]

Bit 2 - Output Compare 1 fast enable

pub fn cc1s(&self) -> CC1S_R[src]

Bits 0:1 - Capture/Compare 1 selection

pub fn oc1m_3(&self) -> OC1M_3_R[src]

Bit 16 - Output Compare 1 mode bit 3

pub fn oc2m_3(&self) -> OC2M_3_R[src]

Bit 24 - Output Compare 2 mode bit 3

impl R<u8, CC2S_A>[src]

pub fn variant(&self) -> Variant<u8, CC2S_A>[src]

Get enumerated values variant

pub fn is_ti2(&self) -> bool[src]

Checks if the value of the field is TI2

pub fn is_ti1(&self) -> bool[src]

Checks if the value of the field is TI1

pub fn is_trc(&self) -> bool[src]

Checks if the value of the field is TRC

impl R<u8, IC1F_A>[src]

pub fn variant(&self) -> IC1F_A[src]

Get enumerated values variant

pub fn is_no_filter(&self) -> bool[src]

Checks if the value of the field is NOFILTER

pub fn is_fck_int_n2(&self) -> bool[src]

Checks if the value of the field is FCK_INT_N2

pub fn is_fck_int_n4(&self) -> bool[src]

Checks if the value of the field is FCK_INT_N4

pub fn is_fck_int_n8(&self) -> bool[src]

Checks if the value of the field is FCK_INT_N8

pub fn is_fdts_div2_n6(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV2_N6

pub fn is_fdts_div2_n8(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV2_N8

pub fn is_fdts_div4_n6(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV4_N6

pub fn is_fdts_div4_n8(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV4_N8

pub fn is_fdts_div8_n6(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV8_N6

pub fn is_fdts_div8_n8(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV8_N8

pub fn is_fdts_div16_n5(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV16_N5

pub fn is_fdts_div16_n6(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV16_N6

pub fn is_fdts_div16_n8(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV16_N8

pub fn is_fdts_div32_n5(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV32_N5

pub fn is_fdts_div32_n6(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV32_N6

pub fn is_fdts_div32_n8(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV32_N8

impl R<u8, CC1S_A>[src]

pub fn variant(&self) -> Variant<u8, CC1S_A>[src]

Get enumerated values variant

pub fn is_ti1(&self) -> bool[src]

Checks if the value of the field is TI1

pub fn is_ti2(&self) -> bool[src]

Checks if the value of the field is TI2

pub fn is_trc(&self) -> bool[src]

Checks if the value of the field is TRC

impl R<u32, Reg<u32, _CCMR1_INPUT>>[src]

pub fn ic2f(&self) -> IC2F_R[src]

Bits 12:15 - Input capture 2 filter

pub fn ic2psc(&self) -> IC2PSC_R[src]

Bits 10:11 - Input capture 2 prescaler

pub fn cc2s(&self) -> CC2S_R[src]

Bits 8:9 - Capture/Compare 2 selection

pub fn ic1f(&self) -> IC1F_R[src]

Bits 4:7 - Input capture 1 filter

pub fn ic1psc(&self) -> IC1PSC_R[src]

Bits 2:3 - Input capture 1 prescaler

pub fn cc1s(&self) -> CC1S_R[src]

Bits 0:1 - Capture/Compare 1 selection

impl R<u8, OC4M_A>[src]

pub fn variant(&self) -> OC4M_A[src]

Get enumerated values variant

pub fn is_frozen(&self) -> bool[src]

Checks if the value of the field is FROZEN

pub fn is_active_on_match(&self) -> bool[src]

Checks if the value of the field is ACTIVEONMATCH

pub fn is_inactive_on_match(&self) -> bool[src]

Checks if the value of the field is INACTIVEONMATCH

pub fn is_toggle(&self) -> bool[src]

Checks if the value of the field is TOGGLE

pub fn is_force_inactive(&self) -> bool[src]

Checks if the value of the field is FORCEINACTIVE

pub fn is_force_active(&self) -> bool[src]

Checks if the value of the field is FORCEACTIVE

pub fn is_pwm_mode1(&self) -> bool[src]

Checks if the value of the field is PWMMODE1

pub fn is_pwm_mode2(&self) -> bool[src]

Checks if the value of the field is PWMMODE2

impl R<bool, OC4PE_A>[src]

pub fn variant(&self) -> OC4PE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u8, CC4S_A>[src]

pub fn variant(&self) -> Variant<u8, CC4S_A>[src]

Get enumerated values variant

pub fn is_output(&self) -> bool[src]

Checks if the value of the field is OUTPUT

impl R<bool, OC3PE_A>[src]

pub fn variant(&self) -> OC3PE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u8, CC3S_A>[src]

pub fn variant(&self) -> Variant<u8, CC3S_A>[src]

Get enumerated values variant

pub fn is_output(&self) -> bool[src]

Checks if the value of the field is OUTPUT

impl R<u32, Reg<u32, _CCMR2_OUTPUT>>[src]

pub fn oc4ce(&self) -> OC4CE_R[src]

Bit 15 - Output compare 4 clear enable

pub fn oc4m(&self) -> OC4M_R[src]

Bits 12:14 - Output compare 4 mode

pub fn oc4pe(&self) -> OC4PE_R[src]

Bit 11 - Output compare 4 preload enable

pub fn oc4fe(&self) -> OC4FE_R[src]

Bit 10 - Output compare 4 fast enable

pub fn cc4s(&self) -> CC4S_R[src]

Bits 8:9 - Capture/Compare 4 selection

pub fn oc3ce(&self) -> OC3CE_R[src]

Bit 7 - Output compare 3 clear enable

pub fn oc3m(&self) -> OC3M_R[src]

Bits 4:6 - Output compare 3 mode

pub fn oc3pe(&self) -> OC3PE_R[src]

Bit 3 - Output compare 3 preload enable

pub fn oc3fe(&self) -> OC3FE_R[src]

Bit 2 - Output compare 3 fast enable

pub fn cc3s(&self) -> CC3S_R[src]

Bits 0:1 - Capture/Compare 3 selection

pub fn oc3m_3(&self) -> OC3M_3_R[src]

Bit 16 - Output Compare 3 mode bit 3

pub fn oc4m_3(&self) -> OC4M_3_R[src]

Bit 24 - Output Compare 4 mode bit 3

impl R<u8, CC4S_A>[src]

pub fn variant(&self) -> Variant<u8, CC4S_A>[src]

Get enumerated values variant

pub fn is_ti4(&self) -> bool[src]

Checks if the value of the field is TI4

pub fn is_ti3(&self) -> bool[src]

Checks if the value of the field is TI3

pub fn is_trc(&self) -> bool[src]

Checks if the value of the field is TRC

impl R<u8, CC3S_A>[src]

pub fn variant(&self) -> Variant<u8, CC3S_A>[src]

Get enumerated values variant

pub fn is_ti3(&self) -> bool[src]

Checks if the value of the field is TI3

pub fn is_ti4(&self) -> bool[src]

Checks if the value of the field is TI4

pub fn is_trc(&self) -> bool[src]

Checks if the value of the field is TRC

impl R<u32, Reg<u32, _CCMR2_INPUT>>[src]

pub fn ic4f(&self) -> IC4F_R[src]

Bits 12:15 - Input capture 4 filter

pub fn ic4psc(&self) -> IC4PSC_R[src]

Bits 10:11 - Input capture 4 prescaler

pub fn cc4s(&self) -> CC4S_R[src]

Bits 8:9 - Capture/Compare 4 selection

pub fn ic3f(&self) -> IC3F_R[src]

Bits 4:7 - Input capture 3 filter

pub fn ic3psc(&self) -> IC3PSC_R[src]

Bits 2:3 - Input capture 3 prescaler

pub fn cc3s(&self) -> CC3S_R[src]

Bits 0:1 - Capture/compare 3 selection

impl R<u32, Reg<u32, _CCER>>[src]

pub fn cc1e(&self) -> CC1E_R[src]

Bit 0 - Capture/Compare 1 output enable

pub fn cc1p(&self) -> CC1P_R[src]

Bit 1 - Capture/Compare 1 output Polarity

pub fn cc1ne(&self) -> CC1NE_R[src]

Bit 2 - Capture/Compare 1 complementary output enable

pub fn cc1np(&self) -> CC1NP_R[src]

Bit 3 - Capture/Compare 1 output Polarity

pub fn cc2e(&self) -> CC2E_R[src]

Bit 4 - Capture/Compare 2 output enable

pub fn cc2p(&self) -> CC2P_R[src]

Bit 5 - Capture/Compare 2 output Polarity

pub fn cc2ne(&self) -> CC2NE_R[src]

Bit 6 - Capture/Compare 2 complementary output enable

pub fn cc2np(&self) -> CC2NP_R[src]

Bit 7 - Capture/Compare 2 output Polarity

pub fn cc3e(&self) -> CC3E_R[src]

Bit 8 - Capture/Compare 3 output enable

pub fn cc3p(&self) -> CC3P_R[src]

Bit 9 - Capture/Compare 3 output Polarity

pub fn cc3ne(&self) -> CC3NE_R[src]

Bit 10 - Capture/Compare 3 complementary output enable

pub fn cc3np(&self) -> CC3NP_R[src]

Bit 11 - Capture/Compare 3 output Polarity

pub fn cc4e(&self) -> CC4E_R[src]

Bit 12 - Capture/Compare 4 output enable

pub fn cc4p(&self) -> CC4P_R[src]

Bit 13 - Capture/Compare 3 output Polarity

pub fn cc4np(&self) -> CC4NP_R[src]

Bit 15 - Capture/Compare 4 output Polarity

pub fn cc5e(&self) -> CC5E_R[src]

Bit 16 - Capture/Compare 5 output enable

pub fn cc5p(&self) -> CC5P_R[src]

Bit 17 - Capture/Compare 5 output Polarity

pub fn cc6e(&self) -> CC6E_R[src]

Bit 20 - Capture/Compare 6 output enable

pub fn cc6p(&self) -> CC6P_R[src]

Bit 21 - Capture/Compare 6 output Polarity

impl R<u32, Reg<u32, _CNT>>[src]

pub fn cnt(&self) -> CNT_R[src]

Bits 0:15 - counter value

pub fn uifcpy(&self) -> UIFCPY_R[src]

Bit 31 - UIF copy

impl R<u32, Reg<u32, _PSC>>[src]

pub fn psc(&self) -> PSC_R[src]

Bits 0:15 - Prescaler value

impl R<u32, Reg<u32, _ARR>>[src]

pub fn arr(&self) -> ARR_R[src]

Bits 0:15 - Auto-reload value

impl R<u32, Reg<u32, _RCR>>[src]

pub fn rep(&self) -> REP_R[src]

Bits 0:15 - Repetition counter value

impl R<u32, Reg<u32, _CCR>>[src]

pub fn ccr(&self) -> CCR_R[src]

Bits 0:15 - Capture/Compare 1 value

impl R<bool, OSSI_A>[src]

pub fn variant(&self) -> OSSI_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_idle_level(&self) -> bool[src]

Checks if the value of the field is IDLELEVEL

impl R<bool, OSSR_A>[src]

pub fn variant(&self) -> OSSR_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_idle_level(&self) -> bool[src]

Checks if the value of the field is IDLELEVEL

impl R<bool, MOE_A>[src]

pub fn variant(&self) -> MOE_A[src]

Get enumerated values variant

pub fn is_disabled_idle(&self) -> bool[src]

Checks if the value of the field is DISABLEDIDLE

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u32, Reg<u32, _BDTR>>[src]

pub fn dtg(&self) -> DTG_R[src]

Bits 0:7 - Dead-time generator setup

pub fn lock(&self) -> LOCK_R[src]

Bits 8:9 - Lock configuration

pub fn ossi(&self) -> OSSI_R[src]

Bit 10 - Off-state selection for Idle mode

pub fn ossr(&self) -> OSSR_R[src]

Bit 11 - Off-state selection for Run mode

pub fn bke(&self) -> BKE_R[src]

Bit 12 - Break enable

pub fn bkp(&self) -> BKP_R[src]

Bit 13 - Break polarity

pub fn aoe(&self) -> AOE_R[src]

Bit 14 - Automatic output enable

pub fn moe(&self) -> MOE_R[src]

Bit 15 - Main output enable

pub fn bkf(&self) -> BKF_R[src]

Bits 16:19 - Break filter

pub fn bk2f(&self) -> BK2F_R[src]

Bits 20:23 - Break 2 filter

pub fn bk2e(&self) -> BK2E_R[src]

Bit 24 - Break 2 enable

pub fn bk2p(&self) -> BK2P_R[src]

Bit 25 - Break 2 polarity

impl R<u32, Reg<u32, _DCR>>[src]

pub fn dbl(&self) -> DBL_R[src]

Bits 8:12 - DMA burst length

pub fn dba(&self) -> DBA_R[src]

Bits 0:4 - DMA base address

impl R<u32, Reg<u32, _DMAR>>[src]

pub fn dmab(&self) -> DMAB_R[src]

Bits 0:15 - DMA register for burst accesses

impl R<u32, Reg<u32, _CCMR3_OUTPUT>>[src]

pub fn oc5fe(&self) -> OC5FE_R[src]

Bit 2 - Output compare 5 fast enable

pub fn oc5pe(&self) -> OC5PE_R[src]

Bit 3 - Output compare 5 preload enable

pub fn oc5m(&self) -> OC5M_R[src]

Bits 4:6 - Output compare 5 mode

pub fn oc5ce(&self) -> OC5CE_R[src]

Bit 7 - Output compare 5 clear enable

pub fn oc6fe(&self) -> OC6FE_R[src]

Bit 10 - Output compare 6 fast enable

pub fn oc6pe(&self) -> OC6PE_R[src]

Bit 11 - Output compare 6 preload enable

pub fn oc6m(&self) -> OC6M_R[src]

Bits 12:14 - Output compare 6 mode

pub fn oc6ce(&self) -> OC6CE_R[src]

Bit 15 - Output compare 6 clear enable

pub fn oc5m_3(&self) -> OC5M_3_R[src]

Bit 16 - Outout Compare 5 mode bit 3

pub fn oc6m_3(&self) -> OC6M_3_R[src]

Bit 24 - Outout Compare 6 mode bit 3

impl R<u32, Reg<u32, _CCR5>>[src]

pub fn ccr(&self) -> CCR_R[src]

Bits 0:15 - Capture/Compare 5 value

pub fn gc5c1(&self) -> GC5C1_R[src]

Bit 29 - Group Channel 5 and Channel 1

pub fn gc5c2(&self) -> GC5C2_R[src]

Bit 30 - Group Channel 5 and Channel 2

pub fn gc5c3(&self) -> GC5C3_R[src]

Bit 31 - Group Channel 5 and Channel 3

impl R<u32, Reg<u32, _CCR6>>[src]

pub fn ccr(&self) -> CCR_R[src]

Bits 0:15 - Capture/Compare 6 value

impl R<u32, Reg<u32, _OR>>[src]

pub fn tim8_etr_adc2_rmp(&self) -> TIM8_ETR_ADC2_RMP_R[src]

Bits 0:1 - TIM8_ETR_ADC2 remapping capability

pub fn tim8_etr_adc3_rmp(&self) -> TIM8_ETR_ADC3_RMP_R[src]

Bits 2:3 - TIM8_ETR_ADC3 remapping capability

impl R<bool, JQOVF_A>[src]

pub fn variant(&self) -> JQOVF_A[src]

Get enumerated values variant

pub fn is_no_overflow(&self) -> bool[src]

Checks if the value of the field is NOOVERFLOW

pub fn is_overflow(&self) -> bool[src]

Checks if the value of the field is OVERFLOW

impl R<bool, AWD3_A>[src]

pub fn variant(&self) -> AWD3_A[src]

Get enumerated values variant

pub fn is_no_event(&self) -> bool[src]

Checks if the value of the field is NOEVENT

pub fn is_event(&self) -> bool[src]

Checks if the value of the field is EVENT

impl R<bool, JEOS_A>[src]

pub fn variant(&self) -> JEOS_A[src]

Get enumerated values variant

pub fn is_not_complete(&self) -> bool[src]

Checks if the value of the field is NOTCOMPLETE

pub fn is_complete(&self) -> bool[src]

Checks if the value of the field is COMPLETE

impl R<bool, JEOC_A>[src]

pub fn variant(&self) -> JEOC_A[src]

Get enumerated values variant

pub fn is_not_complete(&self) -> bool[src]

Checks if the value of the field is NOTCOMPLETE

pub fn is_complete(&self) -> bool[src]

Checks if the value of the field is COMPLETE

impl R<bool, OVR_A>[src]

pub fn variant(&self) -> OVR_A[src]

Get enumerated values variant

pub fn is_no_overrun(&self) -> bool[src]

Checks if the value of the field is NOOVERRUN

pub fn is_overrun(&self) -> bool[src]

Checks if the value of the field is OVERRUN

impl R<bool, EOS_A>[src]

pub fn variant(&self) -> EOS_A[src]

Get enumerated values variant

pub fn is_not_complete(&self) -> bool[src]

Checks if the value of the field is NOTCOMPLETE

pub fn is_complete(&self) -> bool[src]

Checks if the value of the field is COMPLETE

impl R<bool, EOC_A>[src]

pub fn variant(&self) -> EOC_A[src]

Get enumerated values variant

pub fn is_not_complete(&self) -> bool[src]

Checks if the value of the field is NOTCOMPLETE

pub fn is_complete(&self) -> bool[src]

Checks if the value of the field is COMPLETE

impl R<bool, EOSMP_A>[src]

pub fn variant(&self) -> EOSMP_A[src]

Get enumerated values variant

pub fn is_not_ended(&self) -> bool[src]

Checks if the value of the field is NOTENDED

pub fn is_ended(&self) -> bool[src]

Checks if the value of the field is ENDED

impl R<bool, ADRDY_A>[src]

pub fn variant(&self) -> ADRDY_A[src]

Get enumerated values variant

pub fn is_not_ready(&self) -> bool[src]

Checks if the value of the field is NOTREADY

pub fn is_ready(&self) -> bool[src]

Checks if the value of the field is READY

impl R<u32, Reg<u32, _ISR>>[src]

pub fn jqovf(&self) -> JQOVF_R[src]

Bit 10 - JQOVF

pub fn awd3(&self) -> AWD3_R[src]

Bit 9 - AWD3

pub fn awd2(&self) -> AWD2_R[src]

Bit 8 - AWD2

pub fn awd1(&self) -> AWD1_R[src]

Bit 7 - AWD1

pub fn jeos(&self) -> JEOS_R[src]

Bit 6 - JEOS

pub fn jeoc(&self) -> JEOC_R[src]

Bit 5 - JEOC

pub fn ovr(&self) -> OVR_R[src]

Bit 4 - OVR

pub fn eos(&self) -> EOS_R[src]

Bit 3 - EOS

pub fn eoc(&self) -> EOC_R[src]

Bit 2 - EOC

pub fn eosmp(&self) -> EOSMP_R[src]

Bit 1 - EOSMP

pub fn adrdy(&self) -> ADRDY_R[src]

Bit 0 - ADRDY

impl R<bool, JQOVFIE_A>[src]

pub fn variant(&self) -> JQOVFIE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, AWD3IE_A>[src]

pub fn variant(&self) -> AWD3IE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, JEOSIE_A>[src]

pub fn variant(&self) -> JEOSIE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, JEOCIE_A>[src]

pub fn variant(&self) -> JEOCIE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, OVRIE_A>[src]

pub fn variant(&self) -> OVRIE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, EOSIE_A>[src]

pub fn variant(&self) -> EOSIE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, EOCIE_A>[src]

pub fn variant(&self) -> EOCIE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, EOSMPIE_A>[src]

pub fn variant(&self) -> EOSMPIE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, ADRDYIE_A>[src]

pub fn variant(&self) -> ADRDYIE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u32, Reg<u32, _IER>>[src]

pub fn jqovfie(&self) -> JQOVFIE_R[src]

Bit 10 - JQOVFIE

pub fn awd3ie(&self) -> AWD3IE_R[src]

Bit 9 - AWD3IE

pub fn awd2ie(&self) -> AWD2IE_R[src]

Bit 8 - AWD2IE

pub fn awd1ie(&self) -> AWD1IE_R[src]

Bit 7 - AWD1IE

pub fn jeosie(&self) -> JEOSIE_R[src]

Bit 6 - JEOSIE

pub fn jeocie(&self) -> JEOCIE_R[src]

Bit 5 - JEOCIE

pub fn ovrie(&self) -> OVRIE_R[src]

Bit 4 - OVRIE

pub fn eosie(&self) -> EOSIE_R[src]

Bit 3 - EOSIE

pub fn eocie(&self) -> EOCIE_R[src]

Bit 2 - EOCIE

pub fn eosmpie(&self) -> EOSMPIE_R[src]

Bit 1 - EOSMPIE

pub fn adrdyie(&self) -> ADRDYIE_R[src]

Bit 0 - ADRDYIE

impl R<bool, ADCAL_A>[src]

pub fn variant(&self) -> ADCAL_A[src]

Get enumerated values variant

pub fn is_complete(&self) -> bool[src]

Checks if the value of the field is COMPLETE

pub fn is_calibration(&self) -> bool[src]

Checks if the value of the field is CALIBRATION

impl R<bool, ADCALDIF_A>[src]

pub fn variant(&self) -> ADCALDIF_A[src]

Get enumerated values variant

pub fn is_single_ended(&self) -> bool[src]

Checks if the value of the field is SINGLEENDED

pub fn is_differential(&self) -> bool[src]

Checks if the value of the field is DIFFERENTIAL

impl R<u8, ADVREGEN_A>[src]

pub fn variant(&self) -> Variant<u8, ADVREGEN_A>[src]

Get enumerated values variant

pub fn is_intermediate(&self) -> bool[src]

Checks if the value of the field is INTERMEDIATE

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

impl R<bool, JADSTP_A>[src]

pub fn variant(&self) -> Variant<bool, JADSTP_A>[src]

Get enumerated values variant

pub fn is_stop(&self) -> bool[src]

Checks if the value of the field is STOP

impl R<bool, JADSTART_A>[src]

pub fn variant(&self) -> Variant<bool, JADSTART_A>[src]

Get enumerated values variant

pub fn is_start(&self) -> bool[src]

Checks if the value of the field is START

impl R<bool, ADDIS_A>[src]

pub fn variant(&self) -> Variant<bool, ADDIS_A>[src]

Get enumerated values variant

pub fn is_disable(&self) -> bool[src]

Checks if the value of the field is DISABLE

impl R<bool, ADEN_A>[src]

pub fn variant(&self) -> Variant<bool, ADEN_A>[src]

Get enumerated values variant

pub fn is_enable(&self) -> bool[src]

Checks if the value of the field is ENABLE

impl R<u32, Reg<u32, _CR>>[src]

pub fn adcal(&self) -> ADCAL_R[src]

Bit 31 - ADCAL

pub fn adcaldif(&self) -> ADCALDIF_R[src]

Bit 30 - ADCALDIF

pub fn advregen(&self) -> ADVREGEN_R[src]

Bits 28:29 - ADVREGEN

pub fn jadstp(&self) -> JADSTP_R[src]

Bit 5 - JADSTP

pub fn adstp(&self) -> ADSTP_R[src]

Bit 4 - ADSTP

pub fn jadstart(&self) -> JADSTART_R[src]

Bit 3 - JADSTART

pub fn adstart(&self) -> ADSTART_R[src]

Bit 2 - ADSTART

pub fn addis(&self) -> ADDIS_R[src]

Bit 1 - ADDIS

pub fn aden(&self) -> ADEN_R[src]

Bit 0 - ADEN

impl R<bool, JAUTO_A>[src]

pub fn variant(&self) -> JAUTO_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, JAWD1EN_A>[src]

pub fn variant(&self) -> JAWD1EN_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, AWD1EN_A>[src]

pub fn variant(&self) -> AWD1EN_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, AWD1SGL_A>[src]

pub fn variant(&self) -> AWD1SGL_A[src]

Get enumerated values variant

pub fn is_all(&self) -> bool[src]

Checks if the value of the field is ALL

pub fn is_single(&self) -> bool[src]

Checks if the value of the field is SINGLE

impl R<bool, JQM_A>[src]

pub fn variant(&self) -> JQM_A[src]

Get enumerated values variant

pub fn is_mode0(&self) -> bool[src]

Checks if the value of the field is MODE0

pub fn is_mode1(&self) -> bool[src]

Checks if the value of the field is MODE1

impl R<bool, JDISCEN_A>[src]

pub fn variant(&self) -> JDISCEN_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, DISCEN_A>[src]

pub fn variant(&self) -> DISCEN_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, AUTDLY_A>[src]

pub fn variant(&self) -> AUTDLY_A[src]

Get enumerated values variant

pub fn is_off(&self) -> bool[src]

Checks if the value of the field is OFF

pub fn is_on(&self) -> bool[src]

Checks if the value of the field is ON

impl R<bool, CONT_A>[src]

pub fn variant(&self) -> CONT_A[src]

Get enumerated values variant

pub fn is_single(&self) -> bool[src]

Checks if the value of the field is SINGLE

pub fn is_continuous(&self) -> bool[src]

Checks if the value of the field is CONTINUOUS

impl R<bool, OVRMOD_A>[src]

pub fn variant(&self) -> OVRMOD_A[src]

Get enumerated values variant

pub fn is_preserve(&self) -> bool[src]

Checks if the value of the field is PRESERVE

pub fn is_overwrite(&self) -> bool[src]

Checks if the value of the field is OVERWRITE

impl R<u8, EXTEN_A>[src]

pub fn variant(&self) -> EXTEN_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_rising_edge(&self) -> bool[src]

Checks if the value of the field is RISINGEDGE

pub fn is_falling_edge(&self) -> bool[src]

Checks if the value of the field is FALLINGEDGE

pub fn is_both_edges(&self) -> bool[src]

Checks if the value of the field is BOTHEDGES

impl R<u8, EXTSEL_A>[src]

pub fn variant(&self) -> Variant<u8, EXTSEL_A>[src]

Get enumerated values variant

pub fn is_hrtim_adctrg1(&self) -> bool[src]

Checks if the value of the field is HRTIM_ADCTRG1

pub fn is_hrtim_adctrg3(&self) -> bool[src]

Checks if the value of the field is HRTIM_ADCTRG3

pub fn is_tim1_cc1(&self) -> bool[src]

Checks if the value of the field is TIM1_CC1

pub fn is_tim1_cc2(&self) -> bool[src]

Checks if the value of the field is TIM1_CC2

pub fn is_tim1_cc3(&self) -> bool[src]

Checks if the value of the field is TIM1_CC3

pub fn is_tim2_cc2(&self) -> bool[src]

Checks if the value of the field is TIM2_CC2

pub fn is_tim3_trgo(&self) -> bool[src]

Checks if the value of the field is TIM3_TRGO

pub fn is_exti11(&self) -> bool[src]

Checks if the value of the field is EXTI11

pub fn is_tim1_trgo(&self) -> bool[src]

Checks if the value of the field is TIM1_TRGO

pub fn is_tim1_trgo2(&self) -> bool[src]

Checks if the value of the field is TIM1_TRGO2

pub fn is_tim2_trgo(&self) -> bool[src]

Checks if the value of the field is TIM2_TRGO

pub fn is_tim6_trgo(&self) -> bool[src]

Checks if the value of the field is TIM6_TRGO

pub fn is_tim15_trgo(&self) -> bool[src]

Checks if the value of the field is TIM15_TRGO

pub fn is_tim3_cc4(&self) -> bool[src]

Checks if the value of the field is TIM3_CC4

impl R<bool, ALIGN_A>[src]

pub fn variant(&self) -> ALIGN_A[src]

Get enumerated values variant

pub fn is_right(&self) -> bool[src]

Checks if the value of the field is RIGHT

pub fn is_left(&self) -> bool[src]

Checks if the value of the field is LEFT

impl R<u8, RES_A>[src]

pub fn variant(&self) -> RES_A[src]

Get enumerated values variant

pub fn is_bits12(&self) -> bool[src]

Checks if the value of the field is BITS12

pub fn is_bits10(&self) -> bool[src]

Checks if the value of the field is BITS10

pub fn is_bits8(&self) -> bool[src]

Checks if the value of the field is BITS8

pub fn is_bits6(&self) -> bool[src]

Checks if the value of the field is BITS6

impl R<bool, DMACFG_A>[src]

pub fn variant(&self) -> DMACFG_A[src]

Get enumerated values variant

pub fn is_one_shot(&self) -> bool[src]

Checks if the value of the field is ONESHOT

pub fn is_circular(&self) -> bool[src]

Checks if the value of the field is CIRCULAR

impl R<bool, DMAEN_A>[src]

pub fn variant(&self) -> DMAEN_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u32, Reg<u32, _CFGR>>[src]

pub fn awd1ch(&self) -> AWD1CH_R[src]

Bits 26:30 - AWDCH1CH

pub fn jauto(&self) -> JAUTO_R[src]

Bit 25 - JAUTO

pub fn jawd1en(&self) -> JAWD1EN_R[src]

Bit 24 - JAWD1EN

pub fn awd1en(&self) -> AWD1EN_R[src]

Bit 23 - AWD1EN

pub fn awd1sgl(&self) -> AWD1SGL_R[src]

Bit 22 - AWD1SGL

pub fn jqm(&self) -> JQM_R[src]

Bit 21 - JQM

pub fn jdiscen(&self) -> JDISCEN_R[src]

Bit 20 - JDISCEN

pub fn discnum(&self) -> DISCNUM_R[src]

Bits 17:19 - DISCNUM

pub fn discen(&self) -> DISCEN_R[src]

Bit 16 - DISCEN

pub fn autdly(&self) -> AUTDLY_R[src]

Bit 14 - AUTDLY

pub fn cont(&self) -> CONT_R[src]

Bit 13 - CONT

pub fn ovrmod(&self) -> OVRMOD_R[src]

Bit 12 - OVRMOD

pub fn exten(&self) -> EXTEN_R[src]

Bits 10:11 - EXTEN

pub fn extsel(&self) -> EXTSEL_R[src]

Bits 6:9 - EXTSEL

pub fn align(&self) -> ALIGN_R[src]

Bit 5 - ALIGN

pub fn res(&self) -> RES_R[src]

Bits 3:4 - RES

pub fn dmacfg(&self) -> DMACFG_R[src]

Bit 1 - DMACFG

pub fn dmaen(&self) -> DMAEN_R[src]

Bit 0 - DMAEN

impl R<u8, SMP9_A>[src]

pub fn variant(&self) -> SMP9_A[src]

Get enumerated values variant

pub fn is_cycles1_5(&self) -> bool[src]

Checks if the value of the field is CYCLES1_5

pub fn is_cycles2_5(&self) -> bool[src]

Checks if the value of the field is CYCLES2_5

pub fn is_cycles4_5(&self) -> bool[src]

Checks if the value of the field is CYCLES4_5

pub fn is_cycles7_5(&self) -> bool[src]

Checks if the value of the field is CYCLES7_5

pub fn is_cycles19_5(&self) -> bool[src]

Checks if the value of the field is CYCLES19_5

pub fn is_cycles61_5(&self) -> bool[src]

Checks if the value of the field is CYCLES61_5

pub fn is_cycles181_5(&self) -> bool[src]

Checks if the value of the field is CYCLES181_5

pub fn is_cycles601_5(&self) -> bool[src]

Checks if the value of the field is CYCLES601_5

impl R<u32, Reg<u32, _SMPR1>>[src]

pub fn smp9(&self) -> SMP9_R[src]

Bits 27:29 - SMP9

pub fn smp8(&self) -> SMP8_R[src]

Bits 24:26 - SMP8

pub fn smp7(&self) -> SMP7_R[src]

Bits 21:23 - SMP7

pub fn smp6(&self) -> SMP6_R[src]

Bits 18:20 - SMP6

pub fn smp5(&self) -> SMP5_R[src]

Bits 15:17 - SMP5

pub fn smp4(&self) -> SMP4_R[src]

Bits 12:14 - SMP4

pub fn smp3(&self) -> SMP3_R[src]

Bits 9:11 - SMP3

pub fn smp2(&self) -> SMP2_R[src]

Bits 6:8 - SMP2

pub fn smp1(&self) -> SMP1_R[src]

Bits 3:5 - SMP1

impl R<u8, SMP18_A>[src]

pub fn variant(&self) -> SMP18_A[src]

Get enumerated values variant

pub fn is_cycles1_5(&self) -> bool[src]

Checks if the value of the field is CYCLES1_5

pub fn is_cycles2_5(&self) -> bool[src]

Checks if the value of the field is CYCLES2_5

pub fn is_cycles4_5(&self) -> bool[src]

Checks if the value of the field is CYCLES4_5

pub fn is_cycles7_5(&self) -> bool[src]

Checks if the value of the field is CYCLES7_5

pub fn is_cycles19_5(&self) -> bool[src]

Checks if the value of the field is CYCLES19_5

pub fn is_cycles61_5(&self) -> bool[src]

Checks if the value of the field is CYCLES61_5

pub fn is_cycles181_5(&self) -> bool[src]

Checks if the value of the field is CYCLES181_5

pub fn is_cycles601_5(&self) -> bool[src]

Checks if the value of the field is CYCLES601_5

impl R<u32, Reg<u32, _SMPR2>>[src]

pub fn smp18(&self) -> SMP18_R[src]

Bits 24:26 - SMP18

pub fn smp17(&self) -> SMP17_R[src]

Bits 21:23 - SMP17

pub fn smp16(&self) -> SMP16_R[src]

Bits 18:20 - SMP16

pub fn smp15(&self) -> SMP15_R[src]

Bits 15:17 - SMP15

pub fn smp14(&self) -> SMP14_R[src]

Bits 12:14 - SMP14

pub fn smp13(&self) -> SMP13_R[src]

Bits 9:11 - SMP13

pub fn smp12(&self) -> SMP12_R[src]

Bits 6:8 - SMP12

pub fn smp11(&self) -> SMP11_R[src]

Bits 3:5 - SMP11

pub fn smp10(&self) -> SMP10_R[src]

Bits 0:2 - SMP10

impl R<u32, Reg<u32, _TR1>>[src]

pub fn ht1(&self) -> HT1_R[src]

Bits 16:27 - HT1

pub fn lt1(&self) -> LT1_R[src]

Bits 0:11 - LT1

impl R<u32, Reg<u32, _TR2>>[src]

pub fn ht2(&self) -> HT2_R[src]

Bits 16:23 - HT2

pub fn lt2(&self) -> LT2_R[src]

Bits 0:7 - LT2

impl R<u32, Reg<u32, _TR3>>[src]

pub fn ht3(&self) -> HT3_R[src]

Bits 16:23 - HT3

pub fn lt3(&self) -> LT3_R[src]

Bits 0:7 - LT3

impl R<u32, Reg<u32, _SQR1>>[src]

pub fn sq4(&self) -> SQ4_R[src]

Bits 24:28 - SQ4

pub fn sq3(&self) -> SQ3_R[src]

Bits 18:22 - SQ3

pub fn sq2(&self) -> SQ2_R[src]

Bits 12:16 - SQ2

pub fn sq1(&self) -> SQ1_R[src]

Bits 6:10 - SQ1

pub fn l(&self) -> L_R[src]

Bits 0:3 - L3

impl R<u32, Reg<u32, _SQR2>>[src]

pub fn sq9(&self) -> SQ9_R[src]

Bits 24:28 - SQ9

pub fn sq8(&self) -> SQ8_R[src]

Bits 18:22 - SQ8

pub fn sq7(&self) -> SQ7_R[src]

Bits 12:16 - SQ7

pub fn sq6(&self) -> SQ6_R[src]

Bits 6:10 - SQ6

pub fn sq5(&self) -> SQ5_R[src]

Bits 0:4 - SQ5

impl R<u32, Reg<u32, _SQR3>>[src]

pub fn sq14(&self) -> SQ14_R[src]

Bits 24:28 - SQ14

pub fn sq13(&self) -> SQ13_R[src]

Bits 18:22 - SQ13

pub fn sq12(&self) -> SQ12_R[src]

Bits 12:16 - SQ12

pub fn sq11(&self) -> SQ11_R[src]

Bits 6:10 - SQ11

pub fn sq10(&self) -> SQ10_R[src]

Bits 0:4 - SQ10

impl R<u32, Reg<u32, _SQR4>>[src]

pub fn sq16(&self) -> SQ16_R[src]

Bits 6:10 - SQ16

pub fn sq15(&self) -> SQ15_R[src]

Bits 0:4 - SQ15

impl R<u32, Reg<u32, _DR>>[src]

pub fn rdata(&self) -> RDATA_R[src]

Bits 0:15 - regularDATA

impl R<u8, JEXTEN_A>[src]

pub fn variant(&self) -> JEXTEN_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_rising_edge(&self) -> bool[src]

Checks if the value of the field is RISINGEDGE

pub fn is_falling_edge(&self) -> bool[src]

Checks if the value of the field is FALLINGEDGE

pub fn is_both_edges(&self) -> bool[src]

Checks if the value of the field is BOTHEDGES

impl R<u8, JEXTSEL_A>[src]

pub fn variant(&self) -> Variant<u8, JEXTSEL_A>[src]

Get enumerated values variant

pub fn is_hrtim_adctrg2(&self) -> bool[src]

Checks if the value of the field is HRTIM_ADCTRG2

pub fn is_hrtim_adctrg4(&self) -> bool[src]

Checks if the value of the field is HRTIM_ADCTRG4

impl R<u32, Reg<u32, _JSQR>>[src]

pub fn jsq4(&self) -> JSQ4_R[src]

Bits 26:30 - JSQ4

pub fn jsq3(&self) -> JSQ3_R[src]

Bits 20:24 - JSQ3

pub fn jsq2(&self) -> JSQ2_R[src]

Bits 14:18 - JSQ2

pub fn jsq1(&self) -> JSQ1_R[src]

Bits 8:12 - JSQ1

pub fn jexten(&self) -> JEXTEN_R[src]

Bits 6:7 - JEXTEN

pub fn jextsel(&self) -> JEXTSEL_R[src]

Bits 2:5 - JEXTSEL

pub fn jl(&self) -> JL_R[src]

Bits 0:1 - JL

impl R<bool, OFFSET1_EN_A>[src]

pub fn variant(&self) -> OFFSET1_EN_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u32, Reg<u32, _OFR1>>[src]

pub fn offset1_en(&self) -> OFFSET1_EN_R[src]

Bit 31 - OFFSET1_EN

pub fn offset1_ch(&self) -> OFFSET1_CH_R[src]

Bits 26:30 - OFFSET1_CH

pub fn offset1(&self) -> OFFSET1_R[src]

Bits 0:11 - OFFSET1

impl R<bool, OFFSET2_EN_A>[src]

pub fn variant(&self) -> OFFSET2_EN_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u32, Reg<u32, _OFR2>>[src]

pub fn offset2_en(&self) -> OFFSET2_EN_R[src]

Bit 31 - OFFSET2_EN

pub fn offset2_ch(&self) -> OFFSET2_CH_R[src]

Bits 26:30 - OFFSET2_CH

pub fn offset2(&self) -> OFFSET2_R[src]

Bits 0:11 - OFFSET2

impl R<bool, OFFSET3_EN_A>[src]

pub fn variant(&self) -> OFFSET3_EN_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u32, Reg<u32, _OFR3>>[src]

pub fn offset3_en(&self) -> OFFSET3_EN_R[src]

Bit 31 - OFFSET3_EN

pub fn offset3_ch(&self) -> OFFSET3_CH_R[src]

Bits 26:30 - OFFSET3_CH

pub fn offset3(&self) -> OFFSET3_R[src]

Bits 0:11 - OFFSET3

impl R<bool, OFFSET4_EN_A>[src]

pub fn variant(&self) -> OFFSET4_EN_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u32, Reg<u32, _OFR4>>[src]

pub fn offset4_en(&self) -> OFFSET4_EN_R[src]

Bit 31 - OFFSET4_EN

pub fn offset4_ch(&self) -> OFFSET4_CH_R[src]

Bits 26:30 - OFFSET4_CH

pub fn offset4(&self) -> OFFSET4_R[src]

Bits 0:11 - OFFSET4

impl R<u32, Reg<u32, _JDR1>>[src]

pub fn jdata1(&self) -> JDATA1_R[src]

Bits 0:15 - JDATA1

impl R<u32, Reg<u32, _JDR2>>[src]

pub fn jdata2(&self) -> JDATA2_R[src]

Bits 0:15 - JDATA2

impl R<u32, Reg<u32, _JDR3>>[src]

pub fn jdata3(&self) -> JDATA3_R[src]

Bits 0:15 - JDATA3

impl R<u32, Reg<u32, _JDR4>>[src]

pub fn jdata4(&self) -> JDATA4_R[src]

Bits 0:15 - JDATA4

impl R<bool, AWD2CH0_A>[src]

pub fn variant(&self) -> AWD2CH0_A[src]

Get enumerated values variant

pub fn is_not_monitored(&self) -> bool[src]

Checks if the value of the field is NOTMONITORED

pub fn is_monitored(&self) -> bool[src]

Checks if the value of the field is MONITORED

impl R<u32, Reg<u32, _AWD2CR>>[src]

pub fn awd2ch0(&self) -> AWD2CH0_R[src]

Bit 0 - AWD2CH

pub fn awd2ch1(&self) -> AWD2CH1_R[src]

Bit 1 - AWD2CH

pub fn awd2ch2(&self) -> AWD2CH2_R[src]

Bit 2 - AWD2CH

pub fn awd2ch3(&self) -> AWD2CH3_R[src]

Bit 3 - AWD2CH

pub fn awd2ch4(&self) -> AWD2CH4_R[src]

Bit 4 - AWD2CH

pub fn awd2ch5(&self) -> AWD2CH5_R[src]

Bit 5 - AWD2CH

pub fn awd2ch6(&self) -> AWD2CH6_R[src]

Bit 6 - AWD2CH

pub fn awd2ch7(&self) -> AWD2CH7_R[src]

Bit 7 - AWD2CH

pub fn awd2ch8(&self) -> AWD2CH8_R[src]

Bit 8 - AWD2CH

pub fn awd2ch9(&self) -> AWD2CH9_R[src]

Bit 9 - AWD2CH

pub fn awd2ch10(&self) -> AWD2CH10_R[src]

Bit 10 - AWD2CH

pub fn awd2ch11(&self) -> AWD2CH11_R[src]

Bit 11 - AWD2CH

pub fn awd2ch12(&self) -> AWD2CH12_R[src]

Bit 12 - AWD2CH

pub fn awd2ch13(&self) -> AWD2CH13_R[src]

Bit 13 - AWD2CH

pub fn awd2ch14(&self) -> AWD2CH14_R[src]

Bit 14 - AWD2CH

pub fn awd2ch15(&self) -> AWD2CH15_R[src]

Bit 15 - AWD2CH

pub fn awd2ch16(&self) -> AWD2CH16_R[src]

Bit 16 - AWD2CH

pub fn awd2ch17(&self) -> AWD2CH17_R[src]

Bit 17 - AWD2CH

impl R<bool, AWD3CH0_A>[src]

pub fn variant(&self) -> AWD3CH0_A[src]

Get enumerated values variant

pub fn is_not_monitored(&self) -> bool[src]

Checks if the value of the field is NOTMONITORED

pub fn is_monitored(&self) -> bool[src]

Checks if the value of the field is MONITORED

impl R<u32, Reg<u32, _AWD3CR>>[src]

pub fn awd3ch0(&self) -> AWD3CH0_R[src]

Bit 0 - AWD3CH

pub fn awd3ch1(&self) -> AWD3CH1_R[src]

Bit 1 - AWD3CH

pub fn awd3ch2(&self) -> AWD3CH2_R[src]

Bit 2 - AWD3CH

pub fn awd3ch3(&self) -> AWD3CH3_R[src]

Bit 3 - AWD3CH

pub fn awd3ch4(&self) -> AWD3CH4_R[src]

Bit 4 - AWD3CH

pub fn awd3ch5(&self) -> AWD3CH5_R[src]

Bit 5 - AWD3CH

pub fn awd3ch6(&self) -> AWD3CH6_R[src]

Bit 6 - AWD3CH

pub fn awd3ch7(&self) -> AWD3CH7_R[src]

Bit 7 - AWD3CH

pub fn awd3ch8(&self) -> AWD3CH8_R[src]

Bit 8 - AWD3CH

pub fn awd3ch9(&self) -> AWD3CH9_R[src]

Bit 9 - AWD3CH

pub fn awd3ch10(&self) -> AWD3CH10_R[src]

Bit 10 - AWD3CH

pub fn awd3ch11(&self) -> AWD3CH11_R[src]

Bit 11 - AWD3CH

pub fn awd3ch12(&self) -> AWD3CH12_R[src]

Bit 12 - AWD3CH

pub fn awd3ch13(&self) -> AWD3CH13_R[src]

Bit 13 - AWD3CH

pub fn awd3ch14(&self) -> AWD3CH14_R[src]

Bit 14 - AWD3CH

pub fn awd3ch15(&self) -> AWD3CH15_R[src]

Bit 15 - AWD3CH

pub fn awd3ch16(&self) -> AWD3CH16_R[src]

Bit 16 - AWD3CH

pub fn awd3ch17(&self) -> AWD3CH17_R[src]

Bit 17 - AWD3CH

impl R<bool, DIFSEL_10_A>[src]

pub fn variant(&self) -> DIFSEL_10_A[src]

Get enumerated values variant

pub fn is_single_ended(&self) -> bool[src]

Checks if the value of the field is SINGLEENDED

pub fn is_differential(&self) -> bool[src]

Checks if the value of the field is DIFFERENTIAL

impl R<u32, Reg<u32, _DIFSEL>>[src]

pub fn difsel_10(&self) -> DIFSEL_10_R[src]

Bit 0 - Differential mode for channels 15 to 1

pub fn difsel_11(&self) -> DIFSEL_11_R[src]

Bit 1 - Differential mode for channels 15 to 1

pub fn difsel_12(&self) -> DIFSEL_12_R[src]

Bit 2 - Differential mode for channels 15 to 1

pub fn difsel_13(&self) -> DIFSEL_13_R[src]

Bit 3 - Differential mode for channels 15 to 1

pub fn difsel_14(&self) -> DIFSEL_14_R[src]

Bit 4 - Differential mode for channels 15 to 1

pub fn difsel_15(&self) -> DIFSEL_15_R[src]

Bit 5 - Differential mode for channels 15 to 1

pub fn difsel_16(&self) -> DIFSEL_16_R[src]

Bit 6 - Differential mode for channels 15 to 1

pub fn difsel_17(&self) -> DIFSEL_17_R[src]

Bit 7 - Differential mode for channels 15 to 1

pub fn difsel_18(&self) -> DIFSEL_18_R[src]

Bit 8 - Differential mode for channels 15 to 1

pub fn difsel_19(&self) -> DIFSEL_19_R[src]

Bit 9 - Differential mode for channels 15 to 1

pub fn difsel_110(&self) -> DIFSEL_110_R[src]

Bit 10 - Differential mode for channels 15 to 1

pub fn difsel_111(&self) -> DIFSEL_111_R[src]

Bit 11 - Differential mode for channels 15 to 1

pub fn difsel_112(&self) -> DIFSEL_112_R[src]

Bit 12 - Differential mode for channels 15 to 1

pub fn difsel_113(&self) -> DIFSEL_113_R[src]

Bit 13 - Differential mode for channels 15 to 1

pub fn difsel_114(&self) -> DIFSEL_114_R[src]

Bit 14 - Differential mode for channels 15 to 1

pub fn difsel_115(&self) -> DIFSEL_115_R[src]

Bit 15 - Differential mode for channels 15 to 1

pub fn difsel_116(&self) -> DIFSEL_116_R[src]

Bit 16 - Differential mode for channels 15 to 1

pub fn difsel_117(&self) -> DIFSEL_117_R[src]

Bit 17 - Differential mode for channels 15 to 1

impl R<u32, Reg<u32, _CALFACT>>[src]

pub fn calfact_d(&self) -> CALFACT_D_R[src]

Bits 16:22 - CALFACT_D

pub fn calfact_s(&self) -> CALFACT_S_R[src]

Bits 0:6 - CALFACT_S

impl R<bool, EOSMP_MST_A>[src]

pub fn variant(&self) -> EOSMP_MST_A[src]

Get enumerated values variant

pub fn is_not_ended(&self) -> bool[src]

Checks if the value of the field is NOTENDED

pub fn is_ended(&self) -> bool[src]

Checks if the value of the field is ENDED

impl R<bool, EOC_MST_A>[src]

pub fn variant(&self) -> EOC_MST_A[src]

Get enumerated values variant

pub fn is_not_complete(&self) -> bool[src]

Checks if the value of the field is NOTCOMPLETE

pub fn is_complete(&self) -> bool[src]

Checks if the value of the field is COMPLETE

impl R<bool, EOS_MST_A>[src]

pub fn variant(&self) -> EOS_MST_A[src]

Get enumerated values variant

pub fn is_not_complete(&self) -> bool[src]

Checks if the value of the field is NOTCOMPLETE

pub fn is_complete(&self) -> bool[src]

Checks if the value of the field is COMPLETE

impl R<bool, OVR_MST_A>[src]

pub fn variant(&self) -> OVR_MST_A[src]

Get enumerated values variant

pub fn is_no_overrun(&self) -> bool[src]

Checks if the value of the field is NOOVERRUN

pub fn is_overrun(&self) -> bool[src]

Checks if the value of the field is OVERRUN

impl R<bool, JEOC_MST_A>[src]

pub fn variant(&self) -> JEOC_MST_A[src]

Get enumerated values variant

pub fn is_not_complete(&self) -> bool[src]

Checks if the value of the field is NOTCOMPLETE

pub fn is_complete(&self) -> bool[src]

Checks if the value of the field is COMPLETE

impl R<bool, JEOS_MST_A>[src]

pub fn variant(&self) -> JEOS_MST_A[src]

Get enumerated values variant

pub fn is_not_complete(&self) -> bool[src]

Checks if the value of the field is NOTCOMPLETE

pub fn is_complete(&self) -> bool[src]

Checks if the value of the field is COMPLETE

impl R<bool, AWD1_MST_A>[src]

pub fn variant(&self) -> AWD1_MST_A[src]

Get enumerated values variant

pub fn is_no_event(&self) -> bool[src]

Checks if the value of the field is NOEVENT

pub fn is_event(&self) -> bool[src]

Checks if the value of the field is EVENT

impl R<bool, JQOVF_MST_A>[src]

pub fn variant(&self) -> JQOVF_MST_A[src]

Get enumerated values variant

pub fn is_no_overflow(&self) -> bool[src]

Checks if the value of the field is NOOVERFLOW

pub fn is_overflow(&self) -> bool[src]

Checks if the value of the field is OVERFLOW

impl R<bool, ADRDY_SLV_A>[src]

pub fn variant(&self) -> ADRDY_SLV_A[src]

Get enumerated values variant

pub fn is_not_ready(&self) -> bool[src]

Checks if the value of the field is NOTREADY

pub fn is_ready(&self) -> bool[src]

Checks if the value of the field is READY

impl R<u32, Reg<u32, _CSR>>[src]

pub fn addrdy_mst(&self) -> ADDRDY_MST_R[src]

Bit 0 - ADDRDY_MST

pub fn eosmp_mst(&self) -> EOSMP_MST_R[src]

Bit 1 - EOSMP_MST

pub fn eoc_mst(&self) -> EOC_MST_R[src]

Bit 2 - EOC_MST

pub fn eos_mst(&self) -> EOS_MST_R[src]

Bit 3 - EOS_MST

pub fn ovr_mst(&self) -> OVR_MST_R[src]

Bit 4 - OVR_MST

pub fn jeoc_mst(&self) -> JEOC_MST_R[src]

Bit 5 - JEOC_MST

pub fn jeos_mst(&self) -> JEOS_MST_R[src]

Bit 6 - JEOS_MST

pub fn awd1_mst(&self) -> AWD1_MST_R[src]

Bit 7 - AWD1_MST

pub fn awd2_mst(&self) -> AWD2_MST_R[src]

Bit 8 - AWD2_MST

pub fn awd3_mst(&self) -> AWD3_MST_R[src]

Bit 9 - AWD3_MST

pub fn jqovf_mst(&self) -> JQOVF_MST_R[src]

Bit 10 - JQOVF_MST

pub fn adrdy_slv(&self) -> ADRDY_SLV_R[src]

Bit 16 - ADRDY_SLV

pub fn eosmp_slv(&self) -> EOSMP_SLV_R[src]

Bit 17 - EOSMP_SLV

pub fn eoc_slv(&self) -> EOC_SLV_R[src]

Bit 18 - End of regular conversion of the slave ADC

pub fn eos_slv(&self) -> EOS_SLV_R[src]

Bit 19 - End of regular sequence flag of the slave ADC

pub fn ovr_slv(&self) -> OVR_SLV_R[src]

Bit 20 - Overrun flag of the slave ADC

pub fn jeoc_slv(&self) -> JEOC_SLV_R[src]

Bit 21 - End of injected conversion flag of the slave ADC

pub fn jeos_slv(&self) -> JEOS_SLV_R[src]

Bit 22 - End of injected sequence flag of the slave ADC

pub fn awd1_slv(&self) -> AWD1_SLV_R[src]

Bit 23 - Analog watchdog 1 flag of the slave ADC

pub fn awd2_slv(&self) -> AWD2_SLV_R[src]

Bit 24 - Analog watchdog 2 flag of the slave ADC

pub fn awd3_slv(&self) -> AWD3_SLV_R[src]

Bit 25 - Analog watchdog 3 flag of the slave ADC

pub fn jqovf_slv(&self) -> JQOVF_SLV_R[src]

Bit 26 - Injected Context Queue Overflow flag of the slave ADC

impl R<u8, DUAL_A>[src]

pub fn variant(&self) -> Variant<u8, DUAL_A>[src]

Get enumerated values variant

pub fn is_independent(&self) -> bool[src]

Checks if the value of the field is INDEPENDENT

pub fn is_dual_rj(&self) -> bool[src]

Checks if the value of the field is DUALRJ

pub fn is_dual_ra(&self) -> bool[src]

Checks if the value of the field is DUALRA

pub fn is_dual_ij(&self) -> bool[src]

Checks if the value of the field is DUALIJ

pub fn is_dual_j(&self) -> bool[src]

Checks if the value of the field is DUALJ

pub fn is_dual_r(&self) -> bool[src]

Checks if the value of the field is DUALR

pub fn is_dual_i(&self) -> bool[src]

Checks if the value of the field is DUALI

pub fn is_dual_a(&self) -> bool[src]

Checks if the value of the field is DUALA

impl R<bool, DMACFG_A>[src]

pub fn variant(&self) -> DMACFG_A[src]

Get enumerated values variant

pub fn is_one_shot(&self) -> bool[src]

Checks if the value of the field is ONESHOT

pub fn is_circulator(&self) -> bool[src]

Checks if the value of the field is CIRCULATOR

impl R<u8, MDMA_A>[src]

pub fn variant(&self) -> Variant<u8, MDMA_A>[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_bits12_10(&self) -> bool[src]

Checks if the value of the field is BITS12_10

pub fn is_bits8_6(&self) -> bool[src]

Checks if the value of the field is BITS8_6

impl R<u8, CKMODE_A>[src]

pub fn variant(&self) -> CKMODE_A[src]

Get enumerated values variant

pub fn is_asynchronous(&self) -> bool[src]

Checks if the value of the field is ASYNCHRONOUS

pub fn is_sync_div1(&self) -> bool[src]

Checks if the value of the field is SYNCDIV1

pub fn is_sync_div2(&self) -> bool[src]

Checks if the value of the field is SYNCDIV2

pub fn is_sync_div4(&self) -> bool[src]

Checks if the value of the field is SYNCDIV4

impl R<bool, VREFEN_A>[src]

pub fn variant(&self) -> VREFEN_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, TSEN_A>[src]

pub fn variant(&self) -> TSEN_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, VBATEN_A>[src]

pub fn variant(&self) -> VBATEN_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u32, Reg<u32, _CCR>>[src]

pub fn dual(&self) -> DUAL_R[src]

Bits 0:4 - Dual ADC mode selection

pub fn delay(&self) -> DELAY_R[src]

Bits 8:11 - Delay between 2 sampling phases

pub fn dmacfg(&self) -> DMACFG_R[src]

Bit 13 - DMA configuration (for multi-ADC mode)

pub fn mdma(&self) -> MDMA_R[src]

Bits 14:15 - Direct memory access mode for multi ADC mode

pub fn ckmode(&self) -> CKMODE_R[src]

Bits 16:17 - ADC clock mode

pub fn vrefen(&self) -> VREFEN_R[src]

Bit 22 - VREFINT enable

pub fn tsen(&self) -> TSEN_R[src]

Bit 23 - Temperature sensor enable

pub fn vbaten(&self) -> VBATEN_R[src]

Bit 24 - VBAT enable

impl R<u32, Reg<u32, _CDR>>[src]

pub fn rdata_slv(&self) -> RDATA_SLV_R[src]

Bits 16:31 - Regular data of the slave ADC

pub fn rdata_mst(&self) -> RDATA_MST_R[src]

Bits 0:15 - Regular data of the master ADC

impl R<u32, Reg<u32, _CFGR1>>[src]

pub fn mem_mode(&self) -> MEM_MODE_R[src]

Bits 0:2 - Memory mapping selection bits

pub fn usb_it_rmp(&self) -> USB_IT_RMP_R[src]

Bit 5 - USB interrupt remap

pub fn tim1_itr3_rmp(&self) -> TIM1_ITR3_RMP_R[src]

Bit 6 - Timer 1 ITR3 selection

pub fn dac_trig_rmp(&self) -> DAC_TRIG_RMP_R[src]

Bit 7 - DAC trigger remap (when TSEL = 001)

pub fn adc24_dma_rmp(&self) -> ADC24_DMA_RMP_R[src]

Bit 8 - ADC24 DMA remapping bit

pub fn tim16_dma_rmp(&self) -> TIM16_DMA_RMP_R[src]

Bit 11 - TIM16 DMA request remapping bit

pub fn tim17_dma_rmp(&self) -> TIM17_DMA_RMP_R[src]

Bit 12 - TIM17 DMA request remapping bit

pub fn tim6_dac1_dma_rmp(&self) -> TIM6_DAC1_DMA_RMP_R[src]

Bit 13 - TIM6 and DAC1 DMA request remapping bit

pub fn tim7_dac2_dma_rmp(&self) -> TIM7_DAC2_DMA_RMP_R[src]

Bit 14 - TIM7 and DAC2 DMA request remapping bit

pub fn i2c_pb6_fmp(&self) -> I2C_PB6_FMP_R[src]

Bit 16 - Fast Mode Plus (FM+) driving capability activation bits.

pub fn i2c_pb7_fmp(&self) -> I2C_PB7_FMP_R[src]

Bit 17 - Fast Mode Plus (FM+) driving capability activation bits.

pub fn i2c_pb8_fmp(&self) -> I2C_PB8_FMP_R[src]

Bit 18 - Fast Mode Plus (FM+) driving capability activation bits.

pub fn i2c_pb9_fmp(&self) -> I2C_PB9_FMP_R[src]

Bit 19 - Fast Mode Plus (FM+) driving capability activation bits.

pub fn i2c1_fmp(&self) -> I2C1_FMP_R[src]

Bit 20 - I2C1 Fast Mode Plus

pub fn i2c2_fmp(&self) -> I2C2_FMP_R[src]

Bit 21 - I2C2 Fast Mode Plus

pub fn encoder_mode(&self) -> ENCODER_MODE_R[src]

Bits 22:23 - Encoder mode

pub fn fpu_ie(&self) -> FPU_IE_R[src]

Bits 26:31 - Interrupt enable bits from FPU

pub fn dac2_ch1_dma_rmp(&self) -> DAC2_CH1_DMA_RMP_R[src]

Bit 15 - DAC2 channel1 DMA remap

pub fn i2c3_fmp(&self) -> I2C3_FMP_R[src]

Bit 24 - I2C3 Fast Mode Plus

impl R<u32, Reg<u32, _EXTICR1>>[src]

pub fn exti3(&self) -> EXTI3_R[src]

Bits 12:15 - EXTI 3 configuration bits

pub fn exti2(&self) -> EXTI2_R[src]

Bits 8:11 - EXTI 2 configuration bits

pub fn exti1(&self) -> EXTI1_R[src]

Bits 4:7 - EXTI 1 configuration bits

pub fn exti0(&self) -> EXTI0_R[src]

Bits 0:3 - EXTI 0 configuration bits

impl R<u32, Reg<u32, _EXTICR2>>[src]

pub fn exti7(&self) -> EXTI7_R[src]

Bits 12:15 - EXTI 7 configuration bits

pub fn exti6(&self) -> EXTI6_R[src]

Bits 8:11 - EXTI 6 configuration bits

pub fn exti5(&self) -> EXTI5_R[src]

Bits 4:7 - EXTI 5 configuration bits

pub fn exti4(&self) -> EXTI4_R[src]

Bits 0:3 - EXTI 4 configuration bits

impl R<u32, Reg<u32, _EXTICR3>>[src]

pub fn exti11(&self) -> EXTI11_R[src]

Bits 12:15 - EXTI 11 configuration bits

pub fn exti10(&self) -> EXTI10_R[src]

Bits 8:11 - EXTI 10 configuration bits

pub fn exti9(&self) -> EXTI9_R[src]

Bits 4:7 - EXTI 9 configuration bits

pub fn exti8(&self) -> EXTI8_R[src]

Bits 0:3 - EXTI 8 configuration bits

impl R<u32, Reg<u32, _EXTICR4>>[src]

pub fn exti15(&self) -> EXTI15_R[src]

Bits 12:15 - EXTI 15 configuration bits

pub fn exti14(&self) -> EXTI14_R[src]

Bits 8:11 - EXTI 14 configuration bits

pub fn exti13(&self) -> EXTI13_R[src]

Bits 4:7 - EXTI 13 configuration bits

pub fn exti12(&self) -> EXTI12_R[src]

Bits 0:3 - EXTI 12 configuration bits

impl R<u32, Reg<u32, _CFGR2>>[src]

pub fn lockup_lock(&self) -> LOCKUP_LOCK_R[src]

Bit 0 - Cortex-M0 LOCKUP bit enable bit

pub fn sram_parity_lock(&self) -> SRAM_PARITY_LOCK_R[src]

Bit 1 - SRAM parity lock bit

pub fn pvd_lock(&self) -> PVD_LOCK_R[src]

Bit 2 - PVD lock enable bit

pub fn byp_addr_par(&self) -> BYP_ADDR_PAR_R[src]

Bit 4 - Bypass address bit 29 in parity calculation

pub fn sram_pef(&self) -> SRAM_PEF_R[src]

Bit 8 - SRAM parity flag

impl R<u32, Reg<u32, _RCR>>[src]

pub fn page0_wp(&self) -> PAGE0_WP_R[src]

Bit 0 - CCM SRAM page write protection bit

pub fn page1_wp(&self) -> PAGE1_WP_R[src]

Bit 1 - CCM SRAM page write protection bit

pub fn page2_wp(&self) -> PAGE2_WP_R[src]

Bit 2 - CCM SRAM page write protection bit

pub fn page3_wp(&self) -> PAGE3_WP_R[src]

Bit 3 - CCM SRAM page write protection bit

pub fn page4_wp(&self) -> PAGE4_WP_R[src]

Bit 4 - CCM SRAM page write protection bit

pub fn page5_wp(&self) -> PAGE5_WP_R[src]

Bit 5 - CCM SRAM page write protection bit

pub fn page6_wp(&self) -> PAGE6_WP_R[src]

Bit 6 - CCM SRAM page write protection bit

pub fn page7_wp(&self) -> PAGE7_WP_R[src]

Bit 7 - CCM SRAM page write protection bit

pub fn page8_wp(&self) -> PAGE8_WP_R[src]

Bit 8 - CCM SRAM page write protection bit

pub fn page9_wp(&self) -> PAGE9_WP_R[src]

Bit 9 - CCM SRAM page write protection bit

pub fn page10_wp(&self) -> PAGE10_WP_R[src]

Bit 10 - CCM SRAM page write protection bit

pub fn page11_wp(&self) -> PAGE11_WP_R[src]

Bit 11 - CCM SRAM page write protection bit

pub fn page12_wp(&self) -> PAGE12_WP_R[src]

Bit 12 - CCM SRAM page write protection bit

pub fn page13_wp(&self) -> PAGE13_WP_R[src]

Bit 13 - CCM SRAM page write protection bit

pub fn page14_wp(&self) -> PAGE14_WP_R[src]

Bit 14 - CCM SRAM page write protection bit

pub fn page15_wp(&self) -> PAGE15_WP_R[src]

Bit 15 - CCM SRAM page write protection bit

impl R<u32, Reg<u32, _CFGR3>>[src]

pub fn spi1_rx_dma_rmp(&self) -> SPI1_RX_DMA_RMP_R[src]

Bits 0:1 - SPI1_RX DMA remapping bit

pub fn spi1_tx_dma_rmp(&self) -> SPI1_TX_DMA_RMP_R[src]

Bits 2:3 - SPI1_TX DMA remapping bit

pub fn i2c1_rx_dma_rmp(&self) -> I2C1_RX_DMA_RMP_R[src]

Bits 4:5 - I2C1_RX DMA remapping bit

pub fn i2c1_tx_dma_rmp(&self) -> I2C1_TX_DMA_RMP_R[src]

Bits 6:7 - I2C1_TX DMA remapping bit

pub fn adc2_dma_rmp(&self) -> ADC2_DMA_RMP_R[src]

Bits 8:9 - ADC2 DMA remapping bit

impl R<u32, Reg<u32, _CFGR4>>[src]

pub fn adc12_ext2_rmp(&self) -> ADC12_EXT2_RMP_R[src]

Bit 0 - Controls the Input trigger of ADC12 regular channel EXT2

pub fn adc12_ext3_rmp(&self) -> ADC12_EXT3_RMP_R[src]

Bit 1 - Controls the Input trigger of ADC12 regular channel EXT3

pub fn adc12_ext5_rmp(&self) -> ADC12_EXT5_RMP_R[src]

Bit 2 - Controls the Input trigger of ADC12 regular channel EXT5

pub fn adc12_ext13_rmp(&self) -> ADC12_EXT13_RMP_R[src]

Bit 3 - Controls the Input trigger of ADC12 regular channel EXT13

pub fn adc12_ext15_rmp(&self) -> ADC12_EXT15_RMP_R[src]

Bit 4 - Controls the Input trigger of ADC12 regular channel EXT15

pub fn adc12_jext3_rmp(&self) -> ADC12_JEXT3_RMP_R[src]

Bit 5 - Controls the Input trigger of ADC12 injected channel JEXT3

pub fn adc12_jext6_rmp(&self) -> ADC12_JEXT6_RMP_R[src]

Bit 6 - Controls the Input trigger of ADC12 injected channel JEXT6

pub fn adc12_jext13_rmp(&self) -> ADC12_JEXT13_RMP_R[src]

Bit 7 - Controls the Input trigger of ADC12 injected channel JEXT13

pub fn adc34_ext5_rmp(&self) -> ADC34_EXT5_RMP_R[src]

Bit 8 - Controls the Input trigger of ADC34 regular channel EXT5

pub fn adc34_ext6_rmp(&self) -> ADC34_EXT6_RMP_R[src]

Bit 9 - Controls the Input trigger of ADC34 regular channel EXT6

pub fn adc34_ext15_rmp(&self) -> ADC34_EXT15_RMP_R[src]

Bit 10 - Controls the Input trigger of ADC34 regular channel EXT15

pub fn adc34_jext5_rmp(&self) -> ADC34_JEXT5_RMP_R[src]

Bit 11 - Controls the Input trigger of ADC34 injected channel JEXT5

pub fn adc34_jext11_rmp(&self) -> ADC34_JEXT11_RMP_R[src]

Bit 12 - Controls the Input trigger of ADC34 injected channel JEXT11

pub fn adc34_jext14_rmp(&self) -> ADC34_JEXT14_RMP_R[src]

Bit 13 - Controls the Input trigger of ADC34 injected channel JEXT14

impl R<u32, Reg<u32, _BCR1>>[src]

pub fn cclken(&self) -> CCLKEN_R[src]

Bit 20 - CCLKEN

pub fn cburstrw(&self) -> CBURSTRW_R[src]

Bit 19 - CBURSTRW

pub fn asyncwait(&self) -> ASYNCWAIT_R[src]

Bit 15 - ASYNCWAIT

pub fn extmod(&self) -> EXTMOD_R[src]

Bit 14 - EXTMOD

pub fn waiten(&self) -> WAITEN_R[src]

Bit 13 - WAITEN

pub fn wren(&self) -> WREN_R[src]

Bit 12 - WREN

pub fn waitcfg(&self) -> WAITCFG_R[src]

Bit 11 - WAITCFG

pub fn waitpol(&self) -> WAITPOL_R[src]

Bit 9 - WAITPOL

pub fn bursten(&self) -> BURSTEN_R[src]

Bit 8 - BURSTEN

pub fn faccen(&self) -> FACCEN_R[src]

Bit 6 - FACCEN

pub fn mwid(&self) -> MWID_R[src]

Bits 4:5 - MWID

pub fn mtyp(&self) -> MTYP_R[src]

Bits 2:3 - MTYP

pub fn muxen(&self) -> MUXEN_R[src]

Bit 1 - MUXEN

pub fn mbken(&self) -> MBKEN_R[src]

Bit 0 - MBKEN

impl R<u32, Reg<u32, _BTR1>>[src]

pub fn accmod(&self) -> ACCMOD_R[src]

Bits 28:29 - ACCMOD

pub fn datlat(&self) -> DATLAT_R[src]

Bits 24:27 - DATLAT

pub fn clkdiv(&self) -> CLKDIV_R[src]

Bits 20:23 - CLKDIV

pub fn busturn(&self) -> BUSTURN_R[src]

Bits 16:19 - BUSTURN

pub fn datast(&self) -> DATAST_R[src]

Bits 8:15 - DATAST

pub fn addhld(&self) -> ADDHLD_R[src]

Bits 4:7 - ADDHLD

pub fn addset(&self) -> ADDSET_R[src]

Bits 0:3 - ADDSET

impl R<u32, Reg<u32, _BCR2>>[src]

pub fn cburstrw(&self) -> CBURSTRW_R[src]

Bit 19 - CBURSTRW

pub fn asyncwait(&self) -> ASYNCWAIT_R[src]

Bit 15 - ASYNCWAIT

pub fn extmod(&self) -> EXTMOD_R[src]

Bit 14 - EXTMOD

pub fn waiten(&self) -> WAITEN_R[src]

Bit 13 - WAITEN

pub fn wren(&self) -> WREN_R[src]

Bit 12 - WREN

pub fn waitcfg(&self) -> WAITCFG_R[src]

Bit 11 - WAITCFG

pub fn wrapmod(&self) -> WRAPMOD_R[src]

Bit 10 - WRAPMOD

pub fn waitpol(&self) -> WAITPOL_R[src]

Bit 9 - WAITPOL

pub fn bursten(&self) -> BURSTEN_R[src]

Bit 8 - BURSTEN

pub fn faccen(&self) -> FACCEN_R[src]

Bit 6 - FACCEN

pub fn mwid(&self) -> MWID_R[src]

Bits 4:5 - MWID

pub fn mtyp(&self) -> MTYP_R[src]

Bits 2:3 - MTYP

pub fn muxen(&self) -> MUXEN_R[src]

Bit 1 - MUXEN

pub fn mbken(&self) -> MBKEN_R[src]

Bit 0 - MBKEN

impl R<u32, Reg<u32, _BTR2>>[src]

pub fn accmod(&self) -> ACCMOD_R[src]

Bits 28:29 - ACCMOD

pub fn datlat(&self) -> DATLAT_R[src]

Bits 24:27 - DATLAT

pub fn clkdiv(&self) -> CLKDIV_R[src]

Bits 20:23 - CLKDIV

pub fn busturn(&self) -> BUSTURN_R[src]

Bits 16:19 - BUSTURN

pub fn datast(&self) -> DATAST_R[src]

Bits 8:15 - DATAST

pub fn addhld(&self) -> ADDHLD_R[src]

Bits 4:7 - ADDHLD

pub fn addset(&self) -> ADDSET_R[src]

Bits 0:3 - ADDSET

impl R<u32, Reg<u32, _BCR3>>[src]

pub fn cburstrw(&self) -> CBURSTRW_R[src]

Bit 19 - CBURSTRW

pub fn asyncwait(&self) -> ASYNCWAIT_R[src]

Bit 15 - ASYNCWAIT

pub fn extmod(&self) -> EXTMOD_R[src]

Bit 14 - EXTMOD

pub fn waiten(&self) -> WAITEN_R[src]

Bit 13 - WAITEN

pub fn wren(&self) -> WREN_R[src]

Bit 12 - WREN

pub fn waitcfg(&self) -> WAITCFG_R[src]

Bit 11 - WAITCFG

pub fn wrapmod(&self) -> WRAPMOD_R[src]

Bit 10 - WRAPMOD

pub fn waitpol(&self) -> WAITPOL_R[src]

Bit 9 - WAITPOL

pub fn bursten(&self) -> BURSTEN_R[src]

Bit 8 - BURSTEN

pub fn faccen(&self) -> FACCEN_R[src]

Bit 6 - FACCEN

pub fn mwid(&self) -> MWID_R[src]

Bits 4:5 - MWID

pub fn mtyp(&self) -> MTYP_R[src]

Bits 2:3 - MTYP

pub fn muxen(&self) -> MUXEN_R[src]

Bit 1 - MUXEN

pub fn mbken(&self) -> MBKEN_R[src]

Bit 0 - MBKEN

impl R<u32, Reg<u32, _BTR3>>[src]

pub fn accmod(&self) -> ACCMOD_R[src]

Bits 28:29 - ACCMOD

pub fn datlat(&self) -> DATLAT_R[src]

Bits 24:27 - DATLAT

pub fn clkdiv(&self) -> CLKDIV_R[src]

Bits 20:23 - CLKDIV

pub fn busturn(&self) -> BUSTURN_R[src]

Bits 16:19 - BUSTURN

pub fn datast(&self) -> DATAST_R[src]

Bits 8:15 - DATAST

pub fn addhld(&self) -> ADDHLD_R[src]

Bits 4:7 - ADDHLD

pub fn addset(&self) -> ADDSET_R[src]

Bits 0:3 - ADDSET

impl R<u32, Reg<u32, _BCR4>>[src]

pub fn cburstrw(&self) -> CBURSTRW_R[src]

Bit 19 - CBURSTRW

pub fn asyncwait(&self) -> ASYNCWAIT_R[src]

Bit 15 - ASYNCWAIT

pub fn extmod(&self) -> EXTMOD_R[src]

Bit 14 - EXTMOD

pub fn waiten(&self) -> WAITEN_R[src]

Bit 13 - WAITEN

pub fn wren(&self) -> WREN_R[src]

Bit 12 - WREN

pub fn waitcfg(&self) -> WAITCFG_R[src]

Bit 11 - WAITCFG

pub fn wrapmod(&self) -> WRAPMOD_R[src]

Bit 10 - WRAPMOD

pub fn waitpol(&self) -> WAITPOL_R[src]

Bit 9 - WAITPOL

pub fn bursten(&self) -> BURSTEN_R[src]

Bit 8 - BURSTEN

pub fn faccen(&self) -> FACCEN_R[src]

Bit 6 - FACCEN

pub fn mwid(&self) -> MWID_R[src]

Bits 4:5 - MWID

pub fn mtyp(&self) -> MTYP_R[src]

Bits 2:3 - MTYP

pub fn muxen(&self) -> MUXEN_R[src]

Bit 1 - MUXEN

pub fn mbken(&self) -> MBKEN_R[src]

Bit 0 - MBKEN

impl R<u32, Reg<u32, _BTR4>>[src]

pub fn accmod(&self) -> ACCMOD_R[src]

Bits 28:29 - ACCMOD

pub fn datlat(&self) -> DATLAT_R[src]

Bits 24:27 - DATLAT

pub fn clkdiv(&self) -> CLKDIV_R[src]

Bits 20:23 - CLKDIV

pub fn busturn(&self) -> BUSTURN_R[src]

Bits 16:19 - BUSTURN

pub fn datast(&self) -> DATAST_R[src]

Bits 8:15 - DATAST

pub fn addhld(&self) -> ADDHLD_R[src]

Bits 4:7 - ADDHLD

pub fn addset(&self) -> ADDSET_R[src]

Bits 0:3 - ADDSET

impl R<u32, Reg<u32, _PCR2>>[src]

pub fn eccps(&self) -> ECCPS_R[src]

Bits 17:19 - ECCPS

pub fn tar(&self) -> TAR_R[src]

Bits 13:16 - TAR

pub fn tclr(&self) -> TCLR_R[src]

Bits 9:12 - TCLR

pub fn eccen(&self) -> ECCEN_R[src]

Bit 6 - ECCEN

pub fn pwid(&self) -> PWID_R[src]

Bits 4:5 - PWID

pub fn ptyp(&self) -> PTYP_R[src]

Bit 3 - PTYP

pub fn pbken(&self) -> PBKEN_R[src]

Bit 2 - PBKEN

pub fn pwaiten(&self) -> PWAITEN_R[src]

Bit 1 - PWAITEN

impl R<u32, Reg<u32, _SR2>>[src]

pub fn fempt(&self) -> FEMPT_R[src]

Bit 6 - FEMPT

pub fn ifen(&self) -> IFEN_R[src]

Bit 5 - IFEN

pub fn ilen(&self) -> ILEN_R[src]

Bit 4 - ILEN

pub fn iren(&self) -> IREN_R[src]

Bit 3 - IREN

pub fn ifs(&self) -> IFS_R[src]

Bit 2 - IFS

pub fn ils(&self) -> ILS_R[src]

Bit 1 - ILS

pub fn irs(&self) -> IRS_R[src]

Bit 0 - IRS

impl R<u32, Reg<u32, _PMEM2>>[src]

pub fn memhizx(&self) -> MEMHIZX_R[src]

Bits 24:31 - MEMHIZx

pub fn memholdx(&self) -> MEMHOLDX_R[src]

Bits 16:23 - MEMHOLDx

pub fn memwaitx(&self) -> MEMWAITX_R[src]

Bits 8:15 - MEMWAITx

pub fn memsetx(&self) -> MEMSETX_R[src]

Bits 0:7 - MEMSETx

impl R<u32, Reg<u32, _PATT2>>[src]

pub fn atthizx(&self) -> ATTHIZX_R[src]

Bits 24:31 - ATTHIZx

pub fn attholdx(&self) -> ATTHOLDX_R[src]

Bits 16:23 - ATTHOLDx

pub fn attwaitx(&self) -> ATTWAITX_R[src]

Bits 8:15 - ATTWAITx

pub fn attsetx(&self) -> ATTSETX_R[src]

Bits 0:7 - ATTSETx

impl R<u32, Reg<u32, _ECCR2>>[src]

pub fn eccx(&self) -> ECCX_R[src]

Bits 0:31 - ECCx

impl R<u32, Reg<u32, _PCR3>>[src]

pub fn eccps(&self) -> ECCPS_R[src]

Bits 17:19 - ECCPS

pub fn tar(&self) -> TAR_R[src]

Bits 13:16 - TAR

pub fn tclr(&self) -> TCLR_R[src]

Bits 9:12 - TCLR

pub fn eccen(&self) -> ECCEN_R[src]

Bit 6 - ECCEN

pub fn pwid(&self) -> PWID_R[src]

Bits 4:5 - PWID

pub fn ptyp(&self) -> PTYP_R[src]

Bit 3 - PTYP

pub fn pbken(&self) -> PBKEN_R[src]

Bit 2 - PBKEN

pub fn pwaiten(&self) -> PWAITEN_R[src]

Bit 1 - PWAITEN

impl R<u32, Reg<u32, _SR3>>[src]

pub fn fempt(&self) -> FEMPT_R[src]

Bit 6 - FEMPT

pub fn ifen(&self) -> IFEN_R[src]

Bit 5 - IFEN

pub fn ilen(&self) -> ILEN_R[src]

Bit 4 - ILEN

pub fn iren(&self) -> IREN_R[src]

Bit 3 - IREN

pub fn ifs(&self) -> IFS_R[src]

Bit 2 - IFS

pub fn ils(&self) -> ILS_R[src]

Bit 1 - ILS

pub fn irs(&self) -> IRS_R[src]

Bit 0 - IRS

impl R<u32, Reg<u32, _PMEM3>>[src]

pub fn memhizx(&self) -> MEMHIZX_R[src]

Bits 24:31 - MEMHIZx

pub fn memholdx(&self) -> MEMHOLDX_R[src]

Bits 16:23 - MEMHOLDx

pub fn memwaitx(&self) -> MEMWAITX_R[src]

Bits 8:15 - MEMWAITx

pub fn memsetx(&self) -> MEMSETX_R[src]

Bits 0:7 - MEMSETx

impl R<u32, Reg<u32, _PATT3>>[src]

pub fn atthizx(&self) -> ATTHIZX_R[src]

Bits 24:31 - ATTHIZx

pub fn attholdx(&self) -> ATTHOLDX_R[src]

Bits 16:23 - ATTHOLDx

pub fn attwaitx(&self) -> ATTWAITX_R[src]

Bits 8:15 - ATTWAITx

pub fn attsetx(&self) -> ATTSETX_R[src]

Bits 0:7 - ATTSETx

impl R<u32, Reg<u32, _ECCR3>>[src]

pub fn eccx(&self) -> ECCX_R[src]

Bits 0:31 - ECCx

impl R<u32, Reg<u32, _PCR4>>[src]

pub fn eccps(&self) -> ECCPS_R[src]

Bits 17:19 - ECCPS

pub fn tar(&self) -> TAR_R[src]

Bits 13:16 - TAR

pub fn tclr(&self) -> TCLR_R[src]

Bits 9:12 - TCLR

pub fn eccen(&self) -> ECCEN_R[src]

Bit 6 - ECCEN

pub fn pwid(&self) -> PWID_R[src]

Bits 4:5 - PWID

pub fn ptyp(&self) -> PTYP_R[src]

Bit 3 - PTYP

pub fn pbken(&self) -> PBKEN_R[src]

Bit 2 - PBKEN

pub fn pwaiten(&self) -> PWAITEN_R[src]

Bit 1 - PWAITEN

impl R<u32, Reg<u32, _SR4>>[src]

pub fn fempt(&self) -> FEMPT_R[src]

Bit 6 - FEMPT

pub fn ifen(&self) -> IFEN_R[src]

Bit 5 - IFEN

pub fn ilen(&self) -> ILEN_R[src]

Bit 4 - ILEN

pub fn iren(&self) -> IREN_R[src]

Bit 3 - IREN

pub fn ifs(&self) -> IFS_R[src]

Bit 2 - IFS

pub fn ils(&self) -> ILS_R[src]

Bit 1 - ILS

pub fn irs(&self) -> IRS_R[src]

Bit 0 - IRS

impl R<u32, Reg<u32, _PMEM4>>[src]

pub fn memhizx(&self) -> MEMHIZX_R[src]

Bits 24:31 - MEMHIZx

pub fn memholdx(&self) -> MEMHOLDX_R[src]

Bits 16:23 - MEMHOLDx

pub fn memwaitx(&self) -> MEMWAITX_R[src]

Bits 8:15 - MEMWAITx

pub fn memsetx(&self) -> MEMSETX_R[src]

Bits 0:7 - MEMSETx

impl R<u32, Reg<u32, _PATT4>>[src]

pub fn atthizx(&self) -> ATTHIZX_R[src]

Bits 24:31 - ATTHIZx

pub fn attholdx(&self) -> ATTHOLDX_R[src]

Bits 16:23 - ATTHOLDx

pub fn attwaitx(&self) -> ATTWAITX_R[src]

Bits 8:15 - ATTWAITx

pub fn attsetx(&self) -> ATTSETX_R[src]

Bits 0:7 - ATTSETx

impl R<u32, Reg<u32, _PIO4>>[src]

pub fn iohizx(&self) -> IOHIZX_R[src]

Bits 24:31 - IOHIZx

pub fn ioholdx(&self) -> IOHOLDX_R[src]

Bits 16:23 - IOHOLDx

pub fn iowaitx(&self) -> IOWAITX_R[src]

Bits 8:15 - IOWAITx

pub fn iosetx(&self) -> IOSETX_R[src]

Bits 0:7 - IOSETx

impl R<u32, Reg<u32, _BWTR1>>[src]

pub fn accmod(&self) -> ACCMOD_R[src]

Bits 28:29 - ACCMOD

pub fn datlat(&self) -> DATLAT_R[src]

Bits 24:27 - DATLAT

pub fn clkdiv(&self) -> CLKDIV_R[src]

Bits 20:23 - CLKDIV

pub fn busturn(&self) -> BUSTURN_R[src]

Bits 16:19 - Bus turnaround phase duration

pub fn datast(&self) -> DATAST_R[src]

Bits 8:15 - DATAST

pub fn addhld(&self) -> ADDHLD_R[src]

Bits 4:7 - ADDHLD

pub fn addset(&self) -> ADDSET_R[src]

Bits 0:3 - ADDSET

impl R<u32, Reg<u32, _BWTR2>>[src]

pub fn accmod(&self) -> ACCMOD_R[src]

Bits 28:29 - ACCMOD

pub fn datlat(&self) -> DATLAT_R[src]

Bits 24:27 - DATLAT

pub fn clkdiv(&self) -> CLKDIV_R[src]

Bits 20:23 - CLKDIV

pub fn busturn(&self) -> BUSTURN_R[src]

Bits 16:19 - Bus turnaround phase duration

pub fn datast(&self) -> DATAST_R[src]

Bits 8:15 - DATAST

pub fn addhld(&self) -> ADDHLD_R[src]

Bits 4:7 - ADDHLD

pub fn addset(&self) -> ADDSET_R[src]

Bits 0:3 - ADDSET

impl R<u32, Reg<u32, _BWTR3>>[src]

pub fn accmod(&self) -> ACCMOD_R[src]

Bits 28:29 - ACCMOD

pub fn datlat(&self) -> DATLAT_R[src]

Bits 24:27 - DATLAT

pub fn clkdiv(&self) -> CLKDIV_R[src]

Bits 20:23 - CLKDIV

pub fn busturn(&self) -> BUSTURN_R[src]

Bits 16:19 - Bus turnaround phase duration

pub fn datast(&self) -> DATAST_R[src]

Bits 8:15 - DATAST

pub fn addhld(&self) -> ADDHLD_R[src]

Bits 4:7 - ADDHLD

pub fn addset(&self) -> ADDSET_R[src]

Bits 0:3 - ADDSET

impl R<u32, Reg<u32, _BWTR4>>[src]

pub fn accmod(&self) -> ACCMOD_R[src]

Bits 28:29 - ACCMOD

pub fn datlat(&self) -> DATLAT_R[src]

Bits 24:27 - DATLAT

pub fn clkdiv(&self) -> CLKDIV_R[src]

Bits 20:23 - CLKDIV

pub fn busturn(&self) -> BUSTURN_R[src]

Bits 16:19 - Bus turnaround phase duration

pub fn datast(&self) -> DATAST_R[src]

Bits 8:15 - DATAST

pub fn addhld(&self) -> ADDHLD_R[src]

Bits 4:7 - ADDHLD

pub fn addset(&self) -> ADDSET_R[src]

Bits 0:3 - ADDSET

impl R<u32, Reg<u32, _FPCCR>>[src]

pub fn lspact(&self) -> LSPACT_R[src]

Bit 0 - LSPACT

pub fn user(&self) -> USER_R[src]

Bit 1 - USER

pub fn thread(&self) -> THREAD_R[src]

Bit 3 - THREAD

pub fn hfrdy(&self) -> HFRDY_R[src]

Bit 4 - HFRDY

pub fn mmrdy(&self) -> MMRDY_R[src]

Bit 5 - MMRDY

pub fn bfrdy(&self) -> BFRDY_R[src]

Bit 6 - BFRDY

pub fn monrdy(&self) -> MONRDY_R[src]

Bit 8 - MONRDY

pub fn lspen(&self) -> LSPEN_R[src]

Bit 30 - LSPEN

pub fn aspen(&self) -> ASPEN_R[src]

Bit 31 - ASPEN

impl R<u32, Reg<u32, _FPCAR>>[src]

pub fn address(&self) -> ADDRESS_R[src]

Bits 3:31 - Location of unpopulated floating-point

impl R<u32, Reg<u32, _FPSCR>>[src]

pub fn ioc(&self) -> IOC_R[src]

Bit 0 - Invalid operation cumulative exception bit

pub fn dzc(&self) -> DZC_R[src]

Bit 1 - Division by zero cumulative exception bit.

pub fn ofc(&self) -> OFC_R[src]

Bit 2 - Overflow cumulative exception bit

pub fn ufc(&self) -> UFC_R[src]

Bit 3 - Underflow cumulative exception bit

pub fn ixc(&self) -> IXC_R[src]

Bit 4 - Inexact cumulative exception bit

pub fn idc(&self) -> IDC_R[src]

Bit 7 - Input denormal cumulative exception bit.

pub fn rmode(&self) -> RMODE_R[src]

Bits 22:23 - Rounding Mode control field

pub fn fz(&self) -> FZ_R[src]

Bit 24 - Flush-to-zero mode control bit:

pub fn dn(&self) -> DN_R[src]

Bit 25 - Default NaN mode control bit

pub fn ahp(&self) -> AHP_R[src]

Bit 26 - Alternative half-precision control bit

pub fn v(&self) -> V_R[src]

Bit 28 - Overflow condition code flag

pub fn c(&self) -> C_R[src]

Bit 29 - Carry condition code flag

pub fn z(&self) -> Z_R[src]

Bit 30 - Zero condition code flag

pub fn n(&self) -> N_R[src]

Bit 31 - Negative condition code flag

impl R<u32, Reg<u32, _CTRL>>[src]

pub fn enable(&self) -> ENABLE_R[src]

Bit 0 - Counter enable

pub fn tickint(&self) -> TICKINT_R[src]

Bit 1 - SysTick exception request enable

pub fn clksource(&self) -> CLKSOURCE_R[src]

Bit 2 - Clock source selection

pub fn countflag(&self) -> COUNTFLAG_R[src]

Bit 16 - COUNTFLAG

impl R<u32, Reg<u32, _LOAD>>[src]

pub fn reload(&self) -> RELOAD_R[src]

Bits 0:23 - RELOAD value

impl R<u32, Reg<u32, _VAL>>[src]

pub fn current(&self) -> CURRENT_R[src]

Bits 0:23 - Current counter value

impl R<u32, Reg<u32, _CALIB>>[src]

pub fn tenms(&self) -> TENMS_R[src]

Bits 0:23 - Calibration value

pub fn skew(&self) -> SKEW_R[src]

Bit 30 - SKEW flag: Indicates whether the TENMS value is exact

pub fn noref(&self) -> NOREF_R[src]

Bit 31 - NOREF flag. Reads as zero

impl R<u32, Reg<u32, _STIR>>[src]

pub fn intid(&self) -> INTID_R[src]

Bits 0:8 - Software generated interrupt ID

impl R<u32, Reg<u32, _CPACR>>[src]

pub fn cp(&self) -> CP_R[src]

Bits 20:23 - CP

impl R<u32, Reg<u32, _ACTRL>>[src]

pub fn dismcycint(&self) -> DISMCYCINT_R[src]

Bit 0 - DISMCYCINT

pub fn disdefwbuf(&self) -> DISDEFWBUF_R[src]

Bit 1 - DISDEFWBUF

pub fn disfold(&self) -> DISFOLD_R[src]

Bit 2 - DISFOLD

pub fn disfpca(&self) -> DISFPCA_R[src]

Bit 8 - DISFPCA

pub fn disoofp(&self) -> DISOOFP_R[src]

Bit 9 - DISOOFP

impl R<bool, CEN_A>[src]

pub fn variant(&self) -> CEN_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, UDIS_A>[src]

pub fn variant(&self) -> UDIS_A[src]

Get enumerated values variant

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

impl R<bool, URS_A>[src]

pub fn variant(&self) -> URS_A[src]

Get enumerated values variant

pub fn is_any_event(&self) -> bool[src]

Checks if the value of the field is ANYEVENT

pub fn is_counter_only(&self) -> bool[src]

Checks if the value of the field is COUNTERONLY

impl R<bool, OPM_A>[src]

pub fn variant(&self) -> OPM_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, DIR_A>[src]

pub fn variant(&self) -> DIR_A[src]

Get enumerated values variant

pub fn is_up(&self) -> bool[src]

Checks if the value of the field is UP

pub fn is_down(&self) -> bool[src]

Checks if the value of the field is DOWN

impl R<u8, CMS_A>[src]

pub fn variant(&self) -> CMS_A[src]

Get enumerated values variant

pub fn is_edge_aligned(&self) -> bool[src]

Checks if the value of the field is EDGEALIGNED

pub fn is_center_aligned1(&self) -> bool[src]

Checks if the value of the field is CENTERALIGNED1

pub fn is_center_aligned2(&self) -> bool[src]

Checks if the value of the field is CENTERALIGNED2

pub fn is_center_aligned3(&self) -> bool[src]

Checks if the value of the field is CENTERALIGNED3

impl R<bool, ARPE_A>[src]

pub fn variant(&self) -> ARPE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u8, CKD_A>[src]

pub fn variant(&self) -> Variant<u8, CKD_A>[src]

Get enumerated values variant

pub fn is_div1(&self) -> bool[src]

Checks if the value of the field is DIV1

pub fn is_div2(&self) -> bool[src]

Checks if the value of the field is DIV2

pub fn is_div4(&self) -> bool[src]

Checks if the value of the field is DIV4

impl R<u32, Reg<u32, _CR1>>[src]

pub fn cen(&self) -> CEN_R[src]

Bit 0 - Counter enable

pub fn udis(&self) -> UDIS_R[src]

Bit 1 - Update disable

pub fn urs(&self) -> URS_R[src]

Bit 2 - Update request source

pub fn opm(&self) -> OPM_R[src]

Bit 3 - One-pulse mode

pub fn dir(&self) -> DIR_R[src]

Bit 4 - Direction

pub fn cms(&self) -> CMS_R[src]

Bits 5:6 - Center-aligned mode selection

pub fn arpe(&self) -> ARPE_R[src]

Bit 7 - Auto-reload preload enable

pub fn ckd(&self) -> CKD_R[src]

Bits 8:9 - Clock division

pub fn uifremap(&self) -> UIFREMAP_R[src]

Bit 11 - UIF status bit remapping

impl R<bool, TI1S_A>[src]

pub fn variant(&self) -> TI1S_A[src]

Get enumerated values variant

pub fn is_normal(&self) -> bool[src]

Checks if the value of the field is NORMAL

pub fn is_xor(&self) -> bool[src]

Checks if the value of the field is XOR

impl R<u8, MMS_A>[src]

pub fn variant(&self) -> MMS_A[src]

Get enumerated values variant

pub fn is_reset(&self) -> bool[src]

Checks if the value of the field is RESET

pub fn is_enable(&self) -> bool[src]

Checks if the value of the field is ENABLE

pub fn is_update(&self) -> bool[src]

Checks if the value of the field is UPDATE

pub fn is_compare_pulse(&self) -> bool[src]

Checks if the value of the field is COMPAREPULSE

pub fn is_compare_oc1(&self) -> bool[src]

Checks if the value of the field is COMPAREOC1

pub fn is_compare_oc2(&self) -> bool[src]

Checks if the value of the field is COMPAREOC2

pub fn is_compare_oc3(&self) -> bool[src]

Checks if the value of the field is COMPAREOC3

pub fn is_compare_oc4(&self) -> bool[src]

Checks if the value of the field is COMPAREOC4

impl R<bool, CCDS_A>[src]

pub fn variant(&self) -> CCDS_A[src]

Get enumerated values variant

pub fn is_on_compare(&self) -> bool[src]

Checks if the value of the field is ONCOMPARE

pub fn is_on_update(&self) -> bool[src]

Checks if the value of the field is ONUPDATE

impl R<u32, Reg<u32, _CR2>>[src]

pub fn ti1s(&self) -> TI1S_R[src]

Bit 7 - TI1 selection

pub fn mms(&self) -> MMS_R[src]

Bits 4:6 - Master mode selection

pub fn ccds(&self) -> CCDS_R[src]

Bit 3 - Capture/compare DMA selection

impl R<u8, SMS_A>[src]

pub fn variant(&self) -> SMS_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_encoder_mode_1(&self) -> bool[src]

Checks if the value of the field is ENCODER_MODE_1

pub fn is_encoder_mode_2(&self) -> bool[src]

Checks if the value of the field is ENCODER_MODE_2

pub fn is_encoder_mode_3(&self) -> bool[src]

Checks if the value of the field is ENCODER_MODE_3

pub fn is_reset_mode(&self) -> bool[src]

Checks if the value of the field is RESET_MODE

pub fn is_gated_mode(&self) -> bool[src]

Checks if the value of the field is GATED_MODE

pub fn is_trigger_mode(&self) -> bool[src]

Checks if the value of the field is TRIGGER_MODE

pub fn is_ext_clock_mode(&self) -> bool[src]

Checks if the value of the field is EXT_CLOCK_MODE

impl R<u8, TS_A>[src]

pub fn variant(&self) -> Variant<u8, TS_A>[src]

Get enumerated values variant

pub fn is_itr0(&self) -> bool[src]

Checks if the value of the field is ITR0

pub fn is_itr1(&self) -> bool[src]

Checks if the value of the field is ITR1

pub fn is_itr2(&self) -> bool[src]

Checks if the value of the field is ITR2

pub fn is_ti1f_ed(&self) -> bool[src]

Checks if the value of the field is TI1F_ED

pub fn is_ti1fp1(&self) -> bool[src]

Checks if the value of the field is TI1FP1

pub fn is_ti2fp2(&self) -> bool[src]

Checks if the value of the field is TI2FP2

pub fn is_etrf(&self) -> bool[src]

Checks if the value of the field is ETRF

impl R<bool, MSM_A>[src]

pub fn variant(&self) -> MSM_A[src]

Get enumerated values variant

pub fn is_no_sync(&self) -> bool[src]

Checks if the value of the field is NOSYNC

pub fn is_sync(&self) -> bool[src]

Checks if the value of the field is SYNC

impl R<u8, ETF_A>[src]

pub fn variant(&self) -> ETF_A[src]

Get enumerated values variant

pub fn is_no_filter(&self) -> bool[src]

Checks if the value of the field is NOFILTER

pub fn is_fck_int_n2(&self) -> bool[src]

Checks if the value of the field is FCK_INT_N2

pub fn is_fck_int_n4(&self) -> bool[src]

Checks if the value of the field is FCK_INT_N4

pub fn is_fck_int_n8(&self) -> bool[src]

Checks if the value of the field is FCK_INT_N8

pub fn is_fdts_div2_n6(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV2_N6

pub fn is_fdts_div2_n8(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV2_N8

pub fn is_fdts_div4_n6(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV4_N6

pub fn is_fdts_div4_n8(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV4_N8

pub fn is_fdts_div8_n6(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV8_N6

pub fn is_fdts_div8_n8(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV8_N8

pub fn is_fdts_div16_n5(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV16_N5

pub fn is_fdts_div16_n6(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV16_N6

pub fn is_fdts_div16_n8(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV16_N8

pub fn is_fdts_div32_n5(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV32_N5

pub fn is_fdts_div32_n6(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV32_N6

pub fn is_fdts_div32_n8(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV32_N8

impl R<u8, ETPS_A>[src]

pub fn variant(&self) -> ETPS_A[src]

Get enumerated values variant

pub fn is_div1(&self) -> bool[src]

Checks if the value of the field is DIV1

pub fn is_div2(&self) -> bool[src]

Checks if the value of the field is DIV2

pub fn is_div4(&self) -> bool[src]

Checks if the value of the field is DIV4

pub fn is_div8(&self) -> bool[src]

Checks if the value of the field is DIV8

impl R<bool, ECE_A>[src]

pub fn variant(&self) -> ECE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, ETP_A>[src]

pub fn variant(&self) -> ETP_A[src]

Get enumerated values variant

pub fn is_not_inverted(&self) -> bool[src]

Checks if the value of the field is NOTINVERTED

pub fn is_inverted(&self) -> bool[src]

Checks if the value of the field is INVERTED

impl R<u32, Reg<u32, _SMCR>>[src]

pub fn sms(&self) -> SMS_R[src]

Bits 0:2 - Slave mode selection

pub fn occs(&self) -> OCCS_R[src]

Bit 3 - OCREF clear selection

pub fn ts(&self) -> TS_R[src]

Bits 4:6 - Trigger selection

pub fn msm(&self) -> MSM_R[src]

Bit 7 - Master/Slave mode

pub fn etf(&self) -> ETF_R[src]

Bits 8:11 - External trigger filter

pub fn etps(&self) -> ETPS_R[src]

Bits 12:13 - External trigger prescaler

pub fn ece(&self) -> ECE_R[src]

Bit 14 - External clock enable

pub fn etp(&self) -> ETP_R[src]

Bit 15 - External trigger polarity

pub fn sms_3(&self) -> SMS_3_R[src]

Bit 16 - Slave mode selection bit3

impl R<bool, TDE_A>[src]

pub fn variant(&self) -> TDE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, CC4DE_A>[src]

pub fn variant(&self) -> CC4DE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, UDE_A>[src]

pub fn variant(&self) -> UDE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, TIE_A>[src]

pub fn variant(&self) -> TIE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, CC4IE_A>[src]

pub fn variant(&self) -> CC4IE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, UIE_A>[src]

pub fn variant(&self) -> UIE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u32, Reg<u32, _DIER>>[src]

pub fn tde(&self) -> TDE_R[src]

Bit 14 - Trigger DMA request enable

pub fn cc4de(&self) -> CC4DE_R[src]

Bit 12 - Capture/Compare 4 DMA request enable

pub fn cc3de(&self) -> CC3DE_R[src]

Bit 11 - Capture/Compare 3 DMA request enable

pub fn cc2de(&self) -> CC2DE_R[src]

Bit 10 - Capture/Compare 2 DMA request enable

pub fn cc1de(&self) -> CC1DE_R[src]

Bit 9 - Capture/Compare 1 DMA request enable

pub fn ude(&self) -> UDE_R[src]

Bit 8 - Update DMA request enable

pub fn tie(&self) -> TIE_R[src]

Bit 6 - Trigger interrupt enable

pub fn cc4ie(&self) -> CC4IE_R[src]

Bit 4 - Capture/Compare 4 interrupt enable

pub fn cc3ie(&self) -> CC3IE_R[src]

Bit 3 - Capture/Compare 3 interrupt enable

pub fn cc2ie(&self) -> CC2IE_R[src]

Bit 2 - Capture/Compare 2 interrupt enable

pub fn cc1ie(&self) -> CC1IE_R[src]

Bit 1 - Capture/Compare 1 interrupt enable

pub fn uie(&self) -> UIE_R[src]

Bit 0 - Update interrupt enable

impl R<bool, CC4OF_A>[src]

pub fn variant(&self) -> Variant<bool, CC4OF_A>[src]

Get enumerated values variant

pub fn is_overcapture(&self) -> bool[src]

Checks if the value of the field is OVERCAPTURE

impl R<bool, TIF_A>[src]

pub fn variant(&self) -> TIF_A[src]

Get enumerated values variant

pub fn is_no_trigger(&self) -> bool[src]

Checks if the value of the field is NOTRIGGER

pub fn is_trigger(&self) -> bool[src]

Checks if the value of the field is TRIGGER

impl R<bool, CC4IF_A>[src]

pub fn variant(&self) -> Variant<bool, CC4IF_A>[src]

Get enumerated values variant

pub fn is_match_(&self) -> bool[src]

Checks if the value of the field is MATCH

impl R<bool, UIF_A>[src]

pub fn variant(&self) -> UIF_A[src]

Get enumerated values variant

pub fn is_clear(&self) -> bool[src]

Checks if the value of the field is CLEAR

pub fn is_update_pending(&self) -> bool[src]

Checks if the value of the field is UPDATEPENDING

impl R<u32, Reg<u32, _SR>>[src]

pub fn cc4of(&self) -> CC4OF_R[src]

Bit 12 - Capture/Compare 4 overcapture flag

pub fn cc3of(&self) -> CC3OF_R[src]

Bit 11 - Capture/Compare 3 overcapture flag

pub fn cc2of(&self) -> CC2OF_R[src]

Bit 10 - Capture/compare 2 overcapture flag

pub fn cc1of(&self) -> CC1OF_R[src]

Bit 9 - Capture/Compare 1 overcapture flag

pub fn tif(&self) -> TIF_R[src]

Bit 6 - Trigger interrupt flag

pub fn cc4if(&self) -> CC4IF_R[src]

Bit 4 - Capture/Compare 4 interrupt flag

pub fn cc3if(&self) -> CC3IF_R[src]

Bit 3 - Capture/Compare 3 interrupt flag

pub fn cc2if(&self) -> CC2IF_R[src]

Bit 2 - Capture/Compare 2 interrupt flag

pub fn cc1if(&self) -> CC1IF_R[src]

Bit 1 - Capture/compare 1 interrupt flag

pub fn uif(&self) -> UIF_R[src]

Bit 0 - Update interrupt flag

impl R<u8, CC1S_A>[src]

pub fn variant(&self) -> Variant<u8, CC1S_A>[src]

Get enumerated values variant

pub fn is_output(&self) -> bool[src]

Checks if the value of the field is OUTPUT

impl R<bool, OC1PE_A>[src]

pub fn variant(&self) -> OC1PE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u8, OC1M_A>[src]

pub fn variant(&self) -> OC1M_A[src]

Get enumerated values variant

pub fn is_frozen(&self) -> bool[src]

Checks if the value of the field is FROZEN

pub fn is_active_on_match(&self) -> bool[src]

Checks if the value of the field is ACTIVEONMATCH

pub fn is_inactive_on_match(&self) -> bool[src]

Checks if the value of the field is INACTIVEONMATCH

pub fn is_toggle(&self) -> bool[src]

Checks if the value of the field is TOGGLE

pub fn is_force_inactive(&self) -> bool[src]

Checks if the value of the field is FORCEINACTIVE

pub fn is_force_active(&self) -> bool[src]

Checks if the value of the field is FORCEACTIVE

pub fn is_pwm_mode1(&self) -> bool[src]

Checks if the value of the field is PWMMODE1

pub fn is_pwm_mode2(&self) -> bool[src]

Checks if the value of the field is PWMMODE2

impl R<u8, CC2S_A>[src]

pub fn variant(&self) -> Variant<u8, CC2S_A>[src]

Get enumerated values variant

pub fn is_output(&self) -> bool[src]

Checks if the value of the field is OUTPUT

impl R<bool, OC2PE_A>[src]

pub fn variant(&self) -> OC2PE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u32, Reg<u32, _CCMR1_OUTPUT>>[src]

pub fn cc1s(&self) -> CC1S_R[src]

Bits 0:1 - Capture/Compare 1 selection

pub fn oc1fe(&self) -> OC1FE_R[src]

Bit 2 - Output compare 1 fast enable

pub fn oc1pe(&self) -> OC1PE_R[src]

Bit 3 - Output compare 1 preload enable

pub fn oc1m(&self) -> OC1M_R[src]

Bits 4:6 - Output compare 1 mode

pub fn oc1ce(&self) -> OC1CE_R[src]

Bit 7 - Output compare 1 clear enable

pub fn cc2s(&self) -> CC2S_R[src]

Bits 8:9 - Capture/Compare 2 selection

pub fn oc2fe(&self) -> OC2FE_R[src]

Bit 10 - Output compare 2 fast enable

pub fn oc2pe(&self) -> OC2PE_R[src]

Bit 11 - Output compare 2 preload enable

pub fn oc2m(&self) -> OC2M_R[src]

Bits 12:14 - Output compare 2 mode

pub fn oc2ce(&self) -> OC2CE_R[src]

Bit 15 - Output compare 2 clear enable

pub fn oc1m_3(&self) -> OC1M_3_R[src]

Bit 16 - Output compare 1 mode bit 3

pub fn oc2m_3(&self) -> OC2M_3_R[src]

Bit 24 - Output compare 2 mode bit 3

impl R<u8, CC2S_A>[src]

pub fn variant(&self) -> Variant<u8, CC2S_A>[src]

Get enumerated values variant

pub fn is_ti2(&self) -> bool[src]

Checks if the value of the field is TI2

pub fn is_ti1(&self) -> bool[src]

Checks if the value of the field is TI1

pub fn is_trc(&self) -> bool[src]

Checks if the value of the field is TRC

impl R<u8, IC1F_A>[src]

pub fn variant(&self) -> IC1F_A[src]

Get enumerated values variant

pub fn is_no_filter(&self) -> bool[src]

Checks if the value of the field is NOFILTER

pub fn is_fck_int_n2(&self) -> bool[src]

Checks if the value of the field is FCK_INT_N2

pub fn is_fck_int_n4(&self) -> bool[src]

Checks if the value of the field is FCK_INT_N4

pub fn is_fck_int_n8(&self) -> bool[src]

Checks if the value of the field is FCK_INT_N8

pub fn is_fdts_div2_n6(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV2_N6

pub fn is_fdts_div2_n8(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV2_N8

pub fn is_fdts_div4_n6(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV4_N6

pub fn is_fdts_div4_n8(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV4_N8

pub fn is_fdts_div8_n6(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV8_N6

pub fn is_fdts_div8_n8(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV8_N8

pub fn is_fdts_div16_n5(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV16_N5

pub fn is_fdts_div16_n6(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV16_N6

pub fn is_fdts_div16_n8(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV16_N8

pub fn is_fdts_div32_n5(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV32_N5

pub fn is_fdts_div32_n6(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV32_N6

pub fn is_fdts_div32_n8(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV32_N8

impl R<u8, CC1S_A>[src]

pub fn variant(&self) -> Variant<u8, CC1S_A>[src]

Get enumerated values variant

pub fn is_ti1(&self) -> bool[src]

Checks if the value of the field is TI1

pub fn is_ti2(&self) -> bool[src]

Checks if the value of the field is TI2

pub fn is_trc(&self) -> bool[src]

Checks if the value of the field is TRC

impl R<u32, Reg<u32, _CCMR1_INPUT>>[src]

pub fn ic2f(&self) -> IC2F_R[src]

Bits 12:15 - Input capture 2 filter

pub fn ic2psc(&self) -> IC2PSC_R[src]

Bits 10:11 - Input capture 2 prescaler

pub fn cc2s(&self) -> CC2S_R[src]

Bits 8:9 - Capture/compare 2 selection

pub fn ic1f(&self) -> IC1F_R[src]

Bits 4:7 - Input capture 1 filter

pub fn ic1psc(&self) -> IC1PSC_R[src]

Bits 2:3 - Input capture 1 prescaler

pub fn cc1s(&self) -> CC1S_R[src]

Bits 0:1 - Capture/Compare 1 selection

impl R<u8, CC3S_A>[src]

pub fn variant(&self) -> Variant<u8, CC3S_A>[src]

Get enumerated values variant

pub fn is_output(&self) -> bool[src]

Checks if the value of the field is OUTPUT

impl R<bool, OC3PE_A>[src]

pub fn variant(&self) -> OC3PE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u8, OC3M_A>[src]

pub fn variant(&self) -> OC3M_A[src]

Get enumerated values variant

pub fn is_frozen(&self) -> bool[src]

Checks if the value of the field is FROZEN

pub fn is_active_on_match(&self) -> bool[src]

Checks if the value of the field is ACTIVEONMATCH

pub fn is_inactive_on_match(&self) -> bool[src]

Checks if the value of the field is INACTIVEONMATCH

pub fn is_toggle(&self) -> bool[src]

Checks if the value of the field is TOGGLE

pub fn is_force_inactive(&self) -> bool[src]

Checks if the value of the field is FORCEINACTIVE

pub fn is_force_active(&self) -> bool[src]

Checks if the value of the field is FORCEACTIVE

pub fn is_pwm_mode1(&self) -> bool[src]

Checks if the value of the field is PWMMODE1

pub fn is_pwm_mode2(&self) -> bool[src]

Checks if the value of the field is PWMMODE2

impl R<u8, CC4S_A>[src]

pub fn variant(&self) -> Variant<u8, CC4S_A>[src]

Get enumerated values variant

pub fn is_output(&self) -> bool[src]

Checks if the value of the field is OUTPUT

impl R<bool, OC4PE_A>[src]

pub fn variant(&self) -> OC4PE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u32, Reg<u32, _CCMR2_OUTPUT>>[src]

pub fn cc3s(&self) -> CC3S_R[src]

Bits 0:1 - Capture/Compare 3 selection

pub fn oc3fe(&self) -> OC3FE_R[src]

Bit 2 - Output compare 3 fast enable

pub fn oc3pe(&self) -> OC3PE_R[src]

Bit 3 - Output compare 3 preload enable

pub fn oc3m(&self) -> OC3M_R[src]

Bits 4:6 - Output compare 3 mode

pub fn oc3ce(&self) -> OC3CE_R[src]

Bit 7 - Output compare 3 clear enable

pub fn cc4s(&self) -> CC4S_R[src]

Bits 8:9 - Capture/Compare 4 selection

pub fn oc4fe(&self) -> OC4FE_R[src]

Bit 10 - Output compare 4 fast enable

pub fn oc4pe(&self) -> OC4PE_R[src]

Bit 11 - Output compare 4 preload enable

pub fn oc4m(&self) -> OC4M_R[src]

Bits 12:14 - Output compare 4 mode

pub fn oc4ce(&self) -> OC4CE_R[src]

Bit 15 - Output compare 4 clear enable

pub fn oc3m_3(&self) -> OC3M_3_R[src]

Bit 16 - Output compare 3 mode bit3

pub fn oc4m_3(&self) -> OC4M_3_R[src]

Bit 24 - Output compare 4 mode bit3

impl R<u8, CC4S_A>[src]

pub fn variant(&self) -> Variant<u8, CC4S_A>[src]

Get enumerated values variant

pub fn is_ti4(&self) -> bool[src]

Checks if the value of the field is TI4

pub fn is_ti3(&self) -> bool[src]

Checks if the value of the field is TI3

pub fn is_trc(&self) -> bool[src]

Checks if the value of the field is TRC

impl R<u8, CC3S_A>[src]

pub fn variant(&self) -> Variant<u8, CC3S_A>[src]

Get enumerated values variant

pub fn is_ti3(&self) -> bool[src]

Checks if the value of the field is TI3

pub fn is_ti4(&self) -> bool[src]

Checks if the value of the field is TI4

pub fn is_trc(&self) -> bool[src]

Checks if the value of the field is TRC

impl R<u32, Reg<u32, _CCMR2_INPUT>>[src]

pub fn ic4f(&self) -> IC4F_R[src]

Bits 12:15 - Input capture 4 filter

pub fn ic4psc(&self) -> IC4PSC_R[src]

Bits 10:11 - Input capture 4 prescaler

pub fn cc4s(&self) -> CC4S_R[src]

Bits 8:9 - Capture/Compare 4 selection

pub fn ic3f(&self) -> IC3F_R[src]

Bits 4:7 - Input capture 3 filter

pub fn ic3psc(&self) -> IC3PSC_R[src]

Bits 2:3 - Input capture 3 prescaler

pub fn cc3s(&self) -> CC3S_R[src]

Bits 0:1 - Capture/Compare 3 selection

impl R<u32, Reg<u32, _CCER>>[src]

pub fn cc1e(&self) -> CC1E_R[src]

Bit 0 - Capture/Compare 1 output enable

pub fn cc1p(&self) -> CC1P_R[src]

Bit 1 - Capture/Compare 1 output Polarity

pub fn cc1np(&self) -> CC1NP_R[src]

Bit 3 - Capture/Compare 1 output Polarity

pub fn cc2e(&self) -> CC2E_R[src]

Bit 4 - Capture/Compare 2 output enable

pub fn cc2p(&self) -> CC2P_R[src]

Bit 5 - Capture/Compare 2 output Polarity

pub fn cc2np(&self) -> CC2NP_R[src]

Bit 7 - Capture/Compare 2 output Polarity

pub fn cc3e(&self) -> CC3E_R[src]

Bit 8 - Capture/Compare 3 output enable

pub fn cc3p(&self) -> CC3P_R[src]

Bit 9 - Capture/Compare 3 output Polarity

pub fn cc3np(&self) -> CC3NP_R[src]

Bit 11 - Capture/Compare 3 output Polarity

pub fn cc4e(&self) -> CC4E_R[src]

Bit 12 - Capture/Compare 4 output enable

pub fn cc4p(&self) -> CC4P_R[src]

Bit 13 - Capture/Compare 3 output Polarity

pub fn cc4np(&self) -> CC4NP_R[src]

Bit 15 - Capture/Compare 3 output Polarity

impl R<u32, Reg<u32, _CNT>>[src]

pub fn cnt(&self) -> CNT_R[src]

Bits 0:15 - Counter value

pub fn cnth(&self) -> CNTH_R[src]

Bits 16:30 - High counter value

pub fn cnt_or_uifcpy(&self) -> CNT_OR_UIFCPY_R[src]

Bit 31 - if IUFREMAP=0 than CNT with read write access else UIFCPY with read only access

impl R<u32, Reg<u32, _PSC>>[src]

pub fn psc(&self) -> PSC_R[src]

Bits 0:15 - Prescaler value

impl R<u32, Reg<u32, _ARR>>[src]

pub fn arr(&self) -> ARR_R[src]

Bits 0:15 - Auto-reload value

pub fn arrh(&self) -> ARRH_R[src]

Bits 16:31 - High Auto-reload value

impl R<u32, Reg<u32, _CCR>>[src]

pub fn ccr(&self) -> CCR_R[src]

Bits 0:15 - Capture/Compare 1 value

pub fn ccr1h(&self) -> CCR1H_R[src]

Bits 16:31 - High Capture/Compare 1 value (on TIM2)

impl R<u32, Reg<u32, _DCR>>[src]

pub fn dbl(&self) -> DBL_R[src]

Bits 8:12 - DMA burst length

pub fn dba(&self) -> DBA_R[src]

Bits 0:4 - DMA base address

impl R<u32, Reg<u32, _DMAR>>[src]

pub fn dmab(&self) -> DMAB_R[src]

Bits 0:15 - DMA register for burst accesses

impl R<bool, CEN_A>[src]

pub fn variant(&self) -> CEN_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, UDIS_A>[src]

pub fn variant(&self) -> UDIS_A[src]

Get enumerated values variant

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

impl R<bool, URS_A>[src]

pub fn variant(&self) -> URS_A[src]

Get enumerated values variant

pub fn is_any_event(&self) -> bool[src]

Checks if the value of the field is ANYEVENT

pub fn is_counter_only(&self) -> bool[src]

Checks if the value of the field is COUNTERONLY

impl R<bool, OPM_A>[src]

pub fn variant(&self) -> OPM_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, DIR_A>[src]

pub fn variant(&self) -> DIR_A[src]

Get enumerated values variant

pub fn is_up(&self) -> bool[src]

Checks if the value of the field is UP

pub fn is_down(&self) -> bool[src]

Checks if the value of the field is DOWN

impl R<u8, CMS_A>[src]

pub fn variant(&self) -> CMS_A[src]

Get enumerated values variant

pub fn is_edge_aligned(&self) -> bool[src]

Checks if the value of the field is EDGEALIGNED

pub fn is_center_aligned1(&self) -> bool[src]

Checks if the value of the field is CENTERALIGNED1

pub fn is_center_aligned2(&self) -> bool[src]

Checks if the value of the field is CENTERALIGNED2

pub fn is_center_aligned3(&self) -> bool[src]

Checks if the value of the field is CENTERALIGNED3

impl R<bool, ARPE_A>[src]

pub fn variant(&self) -> ARPE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u8, CKD_A>[src]

pub fn variant(&self) -> Variant<u8, CKD_A>[src]

Get enumerated values variant

pub fn is_div1(&self) -> bool[src]

Checks if the value of the field is DIV1

pub fn is_div2(&self) -> bool[src]

Checks if the value of the field is DIV2

pub fn is_div4(&self) -> bool[src]

Checks if the value of the field is DIV4

impl R<u32, Reg<u32, _CR1>>[src]

pub fn cen(&self) -> CEN_R[src]

Bit 0 - Counter enable

pub fn udis(&self) -> UDIS_R[src]

Bit 1 - Update disable

pub fn urs(&self) -> URS_R[src]

Bit 2 - Update request source

pub fn opm(&self) -> OPM_R[src]

Bit 3 - One-pulse mode

pub fn dir(&self) -> DIR_R[src]

Bit 4 - Direction

pub fn cms(&self) -> CMS_R[src]

Bits 5:6 - Center-aligned mode selection

pub fn arpe(&self) -> ARPE_R[src]

Bit 7 - Auto-reload preload enable

pub fn ckd(&self) -> CKD_R[src]

Bits 8:9 - Clock division

pub fn uifremap(&self) -> UIFREMAP_R[src]

Bit 11 - UIF status bit remapping

impl R<bool, TI1S_A>[src]

pub fn variant(&self) -> TI1S_A[src]

Get enumerated values variant

pub fn is_normal(&self) -> bool[src]

Checks if the value of the field is NORMAL

pub fn is_xor(&self) -> bool[src]

Checks if the value of the field is XOR

impl R<u8, MMS_A>[src]

pub fn variant(&self) -> MMS_A[src]

Get enumerated values variant

pub fn is_reset(&self) -> bool[src]

Checks if the value of the field is RESET

pub fn is_enable(&self) -> bool[src]

Checks if the value of the field is ENABLE

pub fn is_update(&self) -> bool[src]

Checks if the value of the field is UPDATE

pub fn is_compare_pulse(&self) -> bool[src]

Checks if the value of the field is COMPAREPULSE

pub fn is_compare_oc1(&self) -> bool[src]

Checks if the value of the field is COMPAREOC1

pub fn is_compare_oc2(&self) -> bool[src]

Checks if the value of the field is COMPAREOC2

pub fn is_compare_oc3(&self) -> bool[src]

Checks if the value of the field is COMPAREOC3

pub fn is_compare_oc4(&self) -> bool[src]

Checks if the value of the field is COMPAREOC4

impl R<bool, CCDS_A>[src]

pub fn variant(&self) -> CCDS_A[src]

Get enumerated values variant

pub fn is_on_compare(&self) -> bool[src]

Checks if the value of the field is ONCOMPARE

pub fn is_on_update(&self) -> bool[src]

Checks if the value of the field is ONUPDATE

impl R<u32, Reg<u32, _CR2>>[src]

pub fn ti1s(&self) -> TI1S_R[src]

Bit 7 - TI1 selection

pub fn mms(&self) -> MMS_R[src]

Bits 4:6 - Master mode selection

pub fn ccds(&self) -> CCDS_R[src]

Bit 3 - Capture/compare DMA selection

impl R<u8, SMS_A>[src]

pub fn variant(&self) -> SMS_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_encoder_mode_1(&self) -> bool[src]

Checks if the value of the field is ENCODER_MODE_1

pub fn is_encoder_mode_2(&self) -> bool[src]

Checks if the value of the field is ENCODER_MODE_2

pub fn is_encoder_mode_3(&self) -> bool[src]

Checks if the value of the field is ENCODER_MODE_3

pub fn is_reset_mode(&self) -> bool[src]

Checks if the value of the field is RESET_MODE

pub fn is_gated_mode(&self) -> bool[src]

Checks if the value of the field is GATED_MODE

pub fn is_trigger_mode(&self) -> bool[src]

Checks if the value of the field is TRIGGER_MODE

pub fn is_ext_clock_mode(&self) -> bool[src]

Checks if the value of the field is EXT_CLOCK_MODE

impl R<u8, TS_A>[src]

pub fn variant(&self) -> Variant<u8, TS_A>[src]

Get enumerated values variant

pub fn is_itr0(&self) -> bool[src]

Checks if the value of the field is ITR0

pub fn is_itr1(&self) -> bool[src]

Checks if the value of the field is ITR1

pub fn is_itr2(&self) -> bool[src]

Checks if the value of the field is ITR2

pub fn is_ti1f_ed(&self) -> bool[src]

Checks if the value of the field is TI1F_ED

pub fn is_ti1fp1(&self) -> bool[src]

Checks if the value of the field is TI1FP1

pub fn is_ti2fp2(&self) -> bool[src]

Checks if the value of the field is TI2FP2

pub fn is_etrf(&self) -> bool[src]

Checks if the value of the field is ETRF

impl R<bool, MSM_A>[src]

pub fn variant(&self) -> MSM_A[src]

Get enumerated values variant

pub fn is_no_sync(&self) -> bool[src]

Checks if the value of the field is NOSYNC

pub fn is_sync(&self) -> bool[src]

Checks if the value of the field is SYNC

impl R<u8, ETF_A>[src]

pub fn variant(&self) -> ETF_A[src]

Get enumerated values variant

pub fn is_no_filter(&self) -> bool[src]

Checks if the value of the field is NOFILTER

pub fn is_fck_int_n2(&self) -> bool[src]

Checks if the value of the field is FCK_INT_N2

pub fn is_fck_int_n4(&self) -> bool[src]

Checks if the value of the field is FCK_INT_N4

pub fn is_fck_int_n8(&self) -> bool[src]

Checks if the value of the field is FCK_INT_N8

pub fn is_fdts_div2_n6(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV2_N6

pub fn is_fdts_div2_n8(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV2_N8

pub fn is_fdts_div4_n6(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV4_N6

pub fn is_fdts_div4_n8(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV4_N8

pub fn is_fdts_div8_n6(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV8_N6

pub fn is_fdts_div8_n8(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV8_N8

pub fn is_fdts_div16_n5(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV16_N5

pub fn is_fdts_div16_n6(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV16_N6

pub fn is_fdts_div16_n8(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV16_N8

pub fn is_fdts_div32_n5(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV32_N5

pub fn is_fdts_div32_n6(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV32_N6

pub fn is_fdts_div32_n8(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV32_N8

impl R<u8, ETPS_A>[src]

pub fn variant(&self) -> ETPS_A[src]

Get enumerated values variant

pub fn is_div1(&self) -> bool[src]

Checks if the value of the field is DIV1

pub fn is_div2(&self) -> bool[src]

Checks if the value of the field is DIV2

pub fn is_div4(&self) -> bool[src]

Checks if the value of the field is DIV4

pub fn is_div8(&self) -> bool[src]

Checks if the value of the field is DIV8

impl R<bool, ECE_A>[src]

pub fn variant(&self) -> ECE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, ETP_A>[src]

pub fn variant(&self) -> ETP_A[src]

Get enumerated values variant

pub fn is_not_inverted(&self) -> bool[src]

Checks if the value of the field is NOTINVERTED

pub fn is_inverted(&self) -> bool[src]

Checks if the value of the field is INVERTED

impl R<u32, Reg<u32, _SMCR>>[src]

pub fn sms(&self) -> SMS_R[src]

Bits 0:2 - Slave mode selection

pub fn occs(&self) -> OCCS_R[src]

Bit 3 - OCREF clear selection

pub fn ts(&self) -> TS_R[src]

Bits 4:6 - Trigger selection

pub fn msm(&self) -> MSM_R[src]

Bit 7 - Master/Slave mode

pub fn etf(&self) -> ETF_R[src]

Bits 8:11 - External trigger filter

pub fn etps(&self) -> ETPS_R[src]

Bits 12:13 - External trigger prescaler

pub fn ece(&self) -> ECE_R[src]

Bit 14 - External clock enable

pub fn etp(&self) -> ETP_R[src]

Bit 15 - External trigger polarity

pub fn sms_3(&self) -> SMS_3_R[src]

Bit 16 - Slave mode selection bit3

impl R<bool, TDE_A>[src]

pub fn variant(&self) -> TDE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, CC4DE_A>[src]

pub fn variant(&self) -> CC4DE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, UDE_A>[src]

pub fn variant(&self) -> UDE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, TIE_A>[src]

pub fn variant(&self) -> TIE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, CC4IE_A>[src]

pub fn variant(&self) -> CC4IE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, UIE_A>[src]

pub fn variant(&self) -> UIE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u32, Reg<u32, _DIER>>[src]

pub fn tde(&self) -> TDE_R[src]

Bit 14 - Trigger DMA request enable

pub fn cc4de(&self) -> CC4DE_R[src]

Bit 12 - Capture/Compare 4 DMA request enable

pub fn cc3de(&self) -> CC3DE_R[src]

Bit 11 - Capture/Compare 3 DMA request enable

pub fn cc2de(&self) -> CC2DE_R[src]

Bit 10 - Capture/Compare 2 DMA request enable

pub fn cc1de(&self) -> CC1DE_R[src]

Bit 9 - Capture/Compare 1 DMA request enable

pub fn ude(&self) -> UDE_R[src]

Bit 8 - Update DMA request enable

pub fn tie(&self) -> TIE_R[src]

Bit 6 - Trigger interrupt enable

pub fn cc4ie(&self) -> CC4IE_R[src]

Bit 4 - Capture/Compare 4 interrupt enable

pub fn cc3ie(&self) -> CC3IE_R[src]

Bit 3 - Capture/Compare 3 interrupt enable

pub fn cc2ie(&self) -> CC2IE_R[src]

Bit 2 - Capture/Compare 2 interrupt enable

pub fn cc1ie(&self) -> CC1IE_R[src]

Bit 1 - Capture/Compare 1 interrupt enable

pub fn uie(&self) -> UIE_R[src]

Bit 0 - Update interrupt enable

impl R<bool, CC4OF_A>[src]

pub fn variant(&self) -> Variant<bool, CC4OF_A>[src]

Get enumerated values variant

pub fn is_overcapture(&self) -> bool[src]

Checks if the value of the field is OVERCAPTURE

impl R<bool, TIF_A>[src]

pub fn variant(&self) -> TIF_A[src]

Get enumerated values variant

pub fn is_no_trigger(&self) -> bool[src]

Checks if the value of the field is NOTRIGGER

pub fn is_trigger(&self) -> bool[src]

Checks if the value of the field is TRIGGER

impl R<bool, CC4IF_A>[src]

pub fn variant(&self) -> Variant<bool, CC4IF_A>[src]

Get enumerated values variant

pub fn is_match_(&self) -> bool[src]

Checks if the value of the field is MATCH

impl R<bool, UIF_A>[src]

pub fn variant(&self) -> UIF_A[src]

Get enumerated values variant

pub fn is_clear(&self) -> bool[src]

Checks if the value of the field is CLEAR

pub fn is_update_pending(&self) -> bool[src]

Checks if the value of the field is UPDATEPENDING

impl R<u32, Reg<u32, _SR>>[src]

pub fn cc4of(&self) -> CC4OF_R[src]

Bit 12 - Capture/Compare 4 overcapture flag

pub fn cc3of(&self) -> CC3OF_R[src]

Bit 11 - Capture/Compare 3 overcapture flag

pub fn cc2of(&self) -> CC2OF_R[src]

Bit 10 - Capture/compare 2 overcapture flag

pub fn cc1of(&self) -> CC1OF_R[src]

Bit 9 - Capture/Compare 1 overcapture flag

pub fn tif(&self) -> TIF_R[src]

Bit 6 - Trigger interrupt flag

pub fn cc4if(&self) -> CC4IF_R[src]

Bit 4 - Capture/Compare 4 interrupt flag

pub fn cc3if(&self) -> CC3IF_R[src]

Bit 3 - Capture/Compare 3 interrupt flag

pub fn cc2if(&self) -> CC2IF_R[src]

Bit 2 - Capture/Compare 2 interrupt flag

pub fn cc1if(&self) -> CC1IF_R[src]

Bit 1 - Capture/compare 1 interrupt flag

pub fn uif(&self) -> UIF_R[src]

Bit 0 - Update interrupt flag

impl R<u8, CC1S_A>[src]

pub fn variant(&self) -> Variant<u8, CC1S_A>[src]

Get enumerated values variant

pub fn is_output(&self) -> bool[src]

Checks if the value of the field is OUTPUT

impl R<bool, OC1PE_A>[src]

pub fn variant(&self) -> OC1PE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u8, OC1M_A>[src]

pub fn variant(&self) -> OC1M_A[src]

Get enumerated values variant

pub fn is_frozen(&self) -> bool[src]

Checks if the value of the field is FROZEN

pub fn is_active_on_match(&self) -> bool[src]

Checks if the value of the field is ACTIVEONMATCH

pub fn is_inactive_on_match(&self) -> bool[src]

Checks if the value of the field is INACTIVEONMATCH

pub fn is_toggle(&self) -> bool[src]

Checks if the value of the field is TOGGLE

pub fn is_force_inactive(&self) -> bool[src]

Checks if the value of the field is FORCEINACTIVE

pub fn is_force_active(&self) -> bool[src]

Checks if the value of the field is FORCEACTIVE

pub fn is_pwm_mode1(&self) -> bool[src]

Checks if the value of the field is PWMMODE1

pub fn is_pwm_mode2(&self) -> bool[src]

Checks if the value of the field is PWMMODE2

impl R<u8, CC2S_A>[src]

pub fn variant(&self) -> Variant<u8, CC2S_A>[src]

Get enumerated values variant

pub fn is_output(&self) -> bool[src]

Checks if the value of the field is OUTPUT

impl R<bool, OC2PE_A>[src]

pub fn variant(&self) -> OC2PE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u32, Reg<u32, _CCMR1_OUTPUT>>[src]

pub fn cc1s(&self) -> CC1S_R[src]

Bits 0:1 - Capture/Compare 1 selection

pub fn oc1fe(&self) -> OC1FE_R[src]

Bit 2 - Output compare 1 fast enable

pub fn oc1pe(&self) -> OC1PE_R[src]

Bit 3 - Output compare 1 preload enable

pub fn oc1m(&self) -> OC1M_R[src]

Bits 4:6 - Output compare 1 mode

pub fn oc1ce(&self) -> OC1CE_R[src]

Bit 7 - Output compare 1 clear enable

pub fn cc2s(&self) -> CC2S_R[src]

Bits 8:9 - Capture/Compare 2 selection

pub fn oc2fe(&self) -> OC2FE_R[src]

Bit 10 - Output compare 2 fast enable

pub fn oc2pe(&self) -> OC2PE_R[src]

Bit 11 - Output compare 2 preload enable

pub fn oc2m(&self) -> OC2M_R[src]

Bits 12:14 - Output compare 2 mode

pub fn oc2ce(&self) -> OC2CE_R[src]

Bit 15 - Output compare 2 clear enable

pub fn oc1m_3(&self) -> OC1M_3_R[src]

Bit 16 - Output compare 1 mode bit 3

pub fn oc2m_3(&self) -> OC2M_3_R[src]

Bit 24 - Output compare 2 mode bit 3

impl R<u8, CC2S_A>[src]

pub fn variant(&self) -> Variant<u8, CC2S_A>[src]

Get enumerated values variant

pub fn is_ti2(&self) -> bool[src]

Checks if the value of the field is TI2

pub fn is_ti1(&self) -> bool[src]

Checks if the value of the field is TI1

pub fn is_trc(&self) -> bool[src]

Checks if the value of the field is TRC

impl R<u8, IC1F_A>[src]

pub fn variant(&self) -> IC1F_A[src]

Get enumerated values variant

pub fn is_no_filter(&self) -> bool[src]

Checks if the value of the field is NOFILTER

pub fn is_fck_int_n2(&self) -> bool[src]

Checks if the value of the field is FCK_INT_N2

pub fn is_fck_int_n4(&self) -> bool[src]

Checks if the value of the field is FCK_INT_N4

pub fn is_fck_int_n8(&self) -> bool[src]

Checks if the value of the field is FCK_INT_N8

pub fn is_fdts_div2_n6(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV2_N6

pub fn is_fdts_div2_n8(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV2_N8

pub fn is_fdts_div4_n6(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV4_N6

pub fn is_fdts_div4_n8(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV4_N8

pub fn is_fdts_div8_n6(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV8_N6

pub fn is_fdts_div8_n8(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV8_N8

pub fn is_fdts_div16_n5(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV16_N5

pub fn is_fdts_div16_n6(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV16_N6

pub fn is_fdts_div16_n8(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV16_N8

pub fn is_fdts_div32_n5(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV32_N5

pub fn is_fdts_div32_n6(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV32_N6

pub fn is_fdts_div32_n8(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV32_N8

impl R<u8, CC1S_A>[src]

pub fn variant(&self) -> Variant<u8, CC1S_A>[src]

Get enumerated values variant

pub fn is_ti1(&self) -> bool[src]

Checks if the value of the field is TI1

pub fn is_ti2(&self) -> bool[src]

Checks if the value of the field is TI2

pub fn is_trc(&self) -> bool[src]

Checks if the value of the field is TRC

impl R<u32, Reg<u32, _CCMR1_INPUT>>[src]

pub fn ic2f(&self) -> IC2F_R[src]

Bits 12:15 - Input capture 2 filter

pub fn ic2psc(&self) -> IC2PSC_R[src]

Bits 10:11 - Input capture 2 prescaler

pub fn cc2s(&self) -> CC2S_R[src]

Bits 8:9 - Capture/compare 2 selection

pub fn ic1f(&self) -> IC1F_R[src]

Bits 4:7 - Input capture 1 filter

pub fn ic1psc(&self) -> IC1PSC_R[src]

Bits 2:3 - Input capture 1 prescaler

pub fn cc1s(&self) -> CC1S_R[src]

Bits 0:1 - Capture/Compare 1 selection

impl R<u8, CC3S_A>[src]

pub fn variant(&self) -> Variant<u8, CC3S_A>[src]

Get enumerated values variant

pub fn is_output(&self) -> bool[src]

Checks if the value of the field is OUTPUT

impl R<bool, OC3PE_A>[src]

pub fn variant(&self) -> OC3PE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u8, OC3M_A>[src]

pub fn variant(&self) -> OC3M_A[src]

Get enumerated values variant

pub fn is_frozen(&self) -> bool[src]

Checks if the value of the field is FROZEN

pub fn is_active_on_match(&self) -> bool[src]

Checks if the value of the field is ACTIVEONMATCH

pub fn is_inactive_on_match(&self) -> bool[src]

Checks if the value of the field is INACTIVEONMATCH

pub fn is_toggle(&self) -> bool[src]

Checks if the value of the field is TOGGLE

pub fn is_force_inactive(&self) -> bool[src]

Checks if the value of the field is FORCEINACTIVE

pub fn is_force_active(&self) -> bool[src]

Checks if the value of the field is FORCEACTIVE

pub fn is_pwm_mode1(&self) -> bool[src]

Checks if the value of the field is PWMMODE1

pub fn is_pwm_mode2(&self) -> bool[src]

Checks if the value of the field is PWMMODE2

impl R<u8, CC4S_A>[src]

pub fn variant(&self) -> Variant<u8, CC4S_A>[src]

Get enumerated values variant

pub fn is_output(&self) -> bool[src]

Checks if the value of the field is OUTPUT

impl R<bool, OC4PE_A>[src]

pub fn variant(&self) -> OC4PE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u32, Reg<u32, _CCMR2_OUTPUT>>[src]

pub fn cc3s(&self) -> CC3S_R[src]

Bits 0:1 - Capture/Compare 3 selection

pub fn oc3fe(&self) -> OC3FE_R[src]

Bit 2 - Output compare 3 fast enable

pub fn oc3pe(&self) -> OC3PE_R[src]

Bit 3 - Output compare 3 preload enable

pub fn oc3m(&self) -> OC3M_R[src]

Bits 4:6 - Output compare 3 mode

pub fn oc3ce(&self) -> OC3CE_R[src]

Bit 7 - Output compare 3 clear enable

pub fn cc4s(&self) -> CC4S_R[src]

Bits 8:9 - Capture/Compare 4 selection

pub fn oc4fe(&self) -> OC4FE_R[src]

Bit 10 - Output compare 4 fast enable

pub fn oc4pe(&self) -> OC4PE_R[src]

Bit 11 - Output compare 4 preload enable

pub fn oc4m(&self) -> OC4M_R[src]

Bits 12:14 - Output compare 4 mode

pub fn oc4ce(&self) -> OC4CE_R[src]

Bit 15 - Output compare 4 clear enable

pub fn oc3m_3(&self) -> OC3M_3_R[src]

Bit 16 - Output compare 3 mode bit3

pub fn oc4m_3(&self) -> OC4M_3_R[src]

Bit 24 - Output compare 4 mode bit3

impl R<u8, CC4S_A>[src]

pub fn variant(&self) -> Variant<u8, CC4S_A>[src]

Get enumerated values variant

pub fn is_ti4(&self) -> bool[src]

Checks if the value of the field is TI4

pub fn is_ti3(&self) -> bool[src]

Checks if the value of the field is TI3

pub fn is_trc(&self) -> bool[src]

Checks if the value of the field is TRC

impl R<u8, CC3S_A>[src]

pub fn variant(&self) -> Variant<u8, CC3S_A>[src]

Get enumerated values variant

pub fn is_ti3(&self) -> bool[src]

Checks if the value of the field is TI3

pub fn is_ti4(&self) -> bool[src]

Checks if the value of the field is TI4

pub fn is_trc(&self) -> bool[src]

Checks if the value of the field is TRC

impl R<u32, Reg<u32, _CCMR2_INPUT>>[src]

pub fn ic4f(&self) -> IC4F_R[src]

Bits 12:15 - Input capture 4 filter

pub fn ic4psc(&self) -> IC4PSC_R[src]

Bits 10:11 - Input capture 4 prescaler

pub fn cc4s(&self) -> CC4S_R[src]

Bits 8:9 - Capture/Compare 4 selection

pub fn ic3f(&self) -> IC3F_R[src]

Bits 4:7 - Input capture 3 filter

pub fn ic3psc(&self) -> IC3PSC_R[src]

Bits 2:3 - Input capture 3 prescaler

pub fn cc3s(&self) -> CC3S_R[src]

Bits 0:1 - Capture/Compare 3 selection

impl R<u32, Reg<u32, _CCER>>[src]

pub fn cc1e(&self) -> CC1E_R[src]

Bit 0 - Capture/Compare 1 output enable

pub fn cc1p(&self) -> CC1P_R[src]

Bit 1 - Capture/Compare 1 output Polarity

pub fn cc1np(&self) -> CC1NP_R[src]

Bit 3 - Capture/Compare 1 output Polarity

pub fn cc2e(&self) -> CC2E_R[src]

Bit 4 - Capture/Compare 2 output enable

pub fn cc2p(&self) -> CC2P_R[src]

Bit 5 - Capture/Compare 2 output Polarity

pub fn cc2np(&self) -> CC2NP_R[src]

Bit 7 - Capture/Compare 2 output Polarity

pub fn cc3e(&self) -> CC3E_R[src]

Bit 8 - Capture/Compare 3 output enable

pub fn cc3p(&self) -> CC3P_R[src]

Bit 9 - Capture/Compare 3 output Polarity

pub fn cc3np(&self) -> CC3NP_R[src]

Bit 11 - Capture/Compare 3 output Polarity

pub fn cc4e(&self) -> CC4E_R[src]

Bit 12 - Capture/Compare 4 output enable

pub fn cc4p(&self) -> CC4P_R[src]

Bit 13 - Capture/Compare 3 output Polarity

pub fn cc4np(&self) -> CC4NP_R[src]

Bit 15 - Capture/Compare 3 output Polarity

impl R<u32, Reg<u32, _CNT>>[src]

pub fn cnt(&self) -> CNT_R[src]

Bits 0:15 - Counter value

pub fn cnth(&self) -> CNTH_R[src]

Bits 16:30 - High counter value

pub fn cnt_or_uifcpy(&self) -> CNT_OR_UIFCPY_R[src]

Bit 31 - if IUFREMAP=0 than CNT with read write access else UIFCPY with read only access

impl R<u32, Reg<u32, _PSC>>[src]

pub fn psc(&self) -> PSC_R[src]

Bits 0:15 - Prescaler value

impl R<u32, Reg<u32, _ARR>>[src]

pub fn arr(&self) -> ARR_R[src]

Bits 0:15 - Auto-reload value

pub fn arrh(&self) -> ARRH_R[src]

Bits 16:31 - High Auto-reload value

impl R<u32, Reg<u32, _CCR>>[src]

pub fn ccr(&self) -> CCR_R[src]

Bits 0:15 - Capture/Compare 1 value

pub fn ccr1h(&self) -> CCR1H_R[src]

Bits 16:31 - High Capture/Compare 1 value (on TIM2)

impl R<u32, Reg<u32, _DCR>>[src]

pub fn dbl(&self) -> DBL_R[src]

Bits 8:12 - DMA burst length

pub fn dba(&self) -> DBA_R[src]

Bits 0:4 - DMA base address

impl R<u32, Reg<u32, _DMAR>>[src]

pub fn dmab(&self) -> DMAB_R[src]

Bits 0:15 - DMA register for burst accesses

impl R<bool, OPAMP2EN_A>[src]

pub fn variant(&self) -> OPAMP2EN_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, FORCE_VP_A>[src]

pub fn variant(&self) -> FORCE_VP_A[src]

Get enumerated values variant

pub fn is_normal(&self) -> bool[src]

Checks if the value of the field is NORMAL

pub fn is_calibration(&self) -> bool[src]

Checks if the value of the field is CALIBRATION

impl R<u8, VP_SEL_A>[src]

pub fn variant(&self) -> Variant<u8, VP_SEL_A>[src]

Get enumerated values variant

pub fn is_pb14(&self) -> bool[src]

Checks if the value of the field is PB14

pub fn is_pb0(&self) -> bool[src]

Checks if the value of the field is PB0

pub fn is_pa7(&self) -> bool[src]

Checks if the value of the field is PA7

impl R<u8, VM_SEL_A>[src]

pub fn variant(&self) -> VM_SEL_A[src]

Get enumerated values variant

pub fn is_pc5(&self) -> bool[src]

Checks if the value of the field is PC5

pub fn is_pa5(&self) -> bool[src]

Checks if the value of the field is PA5

pub fn is_pga(&self) -> bool[src]

Checks if the value of the field is PGA

pub fn is_follower(&self) -> bool[src]

Checks if the value of the field is FOLLOWER

impl R<bool, TCM_EN_A>[src]

pub fn variant(&self) -> TCM_EN_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, VMS_SEL_A>[src]

pub fn variant(&self) -> VMS_SEL_A[src]

Get enumerated values variant

pub fn is_pc5(&self) -> bool[src]

Checks if the value of the field is PC5

pub fn is_pa5(&self) -> bool[src]

Checks if the value of the field is PA5

impl R<u8, VPS_SEL_A>[src]

pub fn variant(&self) -> Variant<u8, VPS_SEL_A>[src]

Get enumerated values variant

pub fn is_pb14(&self) -> bool[src]

Checks if the value of the field is PB14

pub fn is_pb0(&self) -> bool[src]

Checks if the value of the field is PB0

pub fn is_pa7(&self) -> bool[src]

Checks if the value of the field is PA7

impl R<bool, CALON_A>[src]

pub fn variant(&self) -> CALON_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u8, CALSEL_A>[src]

pub fn variant(&self) -> CALSEL_A[src]

Get enumerated values variant

pub fn is_percent3_3(&self) -> bool[src]

Checks if the value of the field is PERCENT3_3

pub fn is_percent10(&self) -> bool[src]

Checks if the value of the field is PERCENT10

pub fn is_percent50(&self) -> bool[src]

Checks if the value of the field is PERCENT50

pub fn is_percent90(&self) -> bool[src]

Checks if the value of the field is PERCENT90

impl R<u8, PGA_GAIN_A>[src]

pub fn variant(&self) -> Variant<u8, PGA_GAIN_A>[src]

Get enumerated values variant

pub fn is_gain2(&self) -> bool[src]

Checks if the value of the field is GAIN2

pub fn is_gain4(&self) -> bool[src]

Checks if the value of the field is GAIN4

pub fn is_gain8(&self) -> bool[src]

Checks if the value of the field is GAIN8

pub fn is_gain16(&self) -> bool[src]

Checks if the value of the field is GAIN16

pub fn is_gain2_vm0(&self) -> bool[src]

Checks if the value of the field is GAIN2_VM0

pub fn is_gain4_vm0(&self) -> bool[src]

Checks if the value of the field is GAIN4_VM0

pub fn is_gain8_vm0(&self) -> bool[src]

Checks if the value of the field is GAIN8_VM0

pub fn is_gain16_vm0(&self) -> bool[src]

Checks if the value of the field is GAIN16_VM0

pub fn is_gain2_vm1(&self) -> bool[src]

Checks if the value of the field is GAIN2_VM1

pub fn is_gain4_vm1(&self) -> bool[src]

Checks if the value of the field is GAIN4_VM1

pub fn is_gain8_vm1(&self) -> bool[src]

Checks if the value of the field is GAIN8_VM1

pub fn is_gain16_vm1(&self) -> bool[src]

Checks if the value of the field is GAIN16_VM1

impl R<bool, USER_TRIM_A>[src]

pub fn variant(&self) -> USER_TRIM_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, TSTREF_A>[src]

pub fn variant(&self) -> TSTREF_A[src]

Get enumerated values variant

pub fn is_output(&self) -> bool[src]

Checks if the value of the field is OUTPUT

pub fn is_not_output(&self) -> bool[src]

Checks if the value of the field is NOTOUTPUT

impl R<bool, OUTCAL_A>[src]

pub fn variant(&self) -> OUTCAL_A[src]

Get enumerated values variant

pub fn is_low(&self) -> bool[src]

Checks if the value of the field is LOW

pub fn is_high(&self) -> bool[src]

Checks if the value of the field is HIGH

impl R<bool, LOCK_A>[src]

pub fn variant(&self) -> LOCK_A[src]

Get enumerated values variant

pub fn is_unlocked(&self) -> bool[src]

Checks if the value of the field is UNLOCKED

pub fn is_locked(&self) -> bool[src]

Checks if the value of the field is LOCKED

impl R<u32, Reg<u32, _OPAMP2_CSR>>[src]

pub fn opamp2en(&self) -> OPAMP2EN_R[src]

Bit 0 - OPAMP2 enable

pub fn force_vp(&self) -> FORCE_VP_R[src]

Bit 1 - FORCE_VP

pub fn vp_sel(&self) -> VP_SEL_R[src]

Bits 2:3 - OPAMP Non inverting input selection

pub fn vm_sel(&self) -> VM_SEL_R[src]

Bits 5:6 - OPAMP inverting input selection

pub fn tcm_en(&self) -> TCM_EN_R[src]

Bit 7 - Timer controlled Mux mode enable

pub fn vms_sel(&self) -> VMS_SEL_R[src]

Bit 8 - OPAMP inverting input secondary selection

pub fn vps_sel(&self) -> VPS_SEL_R[src]

Bits 9:10 - OPAMP Non inverting input secondary selection

pub fn calon(&self) -> CALON_R[src]

Bit 11 - Calibration mode enable

pub fn calsel(&self) -> CALSEL_R[src]

Bits 12:13 - Calibration selection

pub fn pga_gain(&self) -> PGA_GAIN_R[src]

Bits 14:17 - Gain in PGA mode

pub fn user_trim(&self) -> USER_TRIM_R[src]

Bit 18 - User trimming enable

pub fn trimoffsetp(&self) -> TRIMOFFSETP_R[src]

Bits 19:23 - Offset trimming value (PMOS)

pub fn trimoffsetn(&self) -> TRIMOFFSETN_R[src]

Bits 24:28 - Offset trimming value (NMOS)

pub fn tstref(&self) -> TSTREF_R[src]

Bit 29 - TSTREF

pub fn outcal(&self) -> OUTCAL_R[src]

Bit 30 - OPAMP ouput status flag

pub fn lock(&self) -> LOCK_R[src]

Bit 31 - OPAMP lock

impl R<u32, Reg<u32, _OPAMP3_CSR>>[src]

pub fn opamp3en(&self) -> OPAMP3EN_R[src]

Bit 0 - OPAMP3 enable

pub fn force_vp(&self) -> FORCE_VP_R[src]

Bit 1 - FORCE_VP

pub fn vp_sel(&self) -> VP_SEL_R[src]

Bits 2:3 - OPAMP Non inverting input selection

pub fn vm_sel(&self) -> VM_SEL_R[src]

Bits 5:6 - OPAMP inverting input selection

pub fn tcm_en(&self) -> TCM_EN_R[src]

Bit 7 - Timer controlled Mux mode enable

pub fn vms_sel(&self) -> VMS_SEL_R[src]

Bit 8 - OPAMP inverting input secondary selection

pub fn vps_sel(&self) -> VPS_SEL_R[src]

Bits 9:10 - OPAMP Non inverting input secondary selection

pub fn calon(&self) -> CALON_R[src]

Bit 11 - Calibration mode enable

pub fn calsel(&self) -> CALSEL_R[src]

Bits 12:13 - Calibration selection

pub fn pga_gain(&self) -> PGA_GAIN_R[src]

Bits 14:17 - Gain in PGA mode

pub fn user_trim(&self) -> USER_TRIM_R[src]

Bit 18 - User trimming enable

pub fn trimoffsetp(&self) -> TRIMOFFSETP_R[src]

Bits 19:23 - Offset trimming value (PMOS)

pub fn trimoffsetn(&self) -> TRIMOFFSETN_R[src]

Bits 24:28 - Offset trimming value (NMOS)

pub fn tstref(&self) -> TSTREF_R[src]

Bit 29 - TSTREF

pub fn outcal(&self) -> OUTCAL_R[src]

Bit 30 - OPAMP ouput status flag

pub fn lock(&self) -> LOCK_R[src]

Bit 31 - OPAMP lock

impl R<u32, Reg<u32, _OPAMP4_CSR>>[src]

pub fn opamp4en(&self) -> OPAMP4EN_R[src]

Bit 0 - OPAMP4 enable

pub fn force_vp(&self) -> FORCE_VP_R[src]

Bit 1 - FORCE_VP

pub fn vp_sel(&self) -> VP_SEL_R[src]

Bits 2:3 - OPAMP Non inverting input selection

pub fn vm_sel(&self) -> VM_SEL_R[src]

Bits 5:6 - OPAMP inverting input selection

pub fn tcm_en(&self) -> TCM_EN_R[src]

Bit 7 - Timer controlled Mux mode enable

pub fn vms_sel(&self) -> VMS_SEL_R[src]

Bit 8 - OPAMP inverting input secondary selection

pub fn vps_sel(&self) -> VPS_SEL_R[src]

Bits 9:10 - OPAMP Non inverting input secondary selection

pub fn calon(&self) -> CALON_R[src]

Bit 11 - Calibration mode enable

pub fn calsel(&self) -> CALSEL_R[src]

Bits 12:13 - Calibration selection

pub fn pga_gain(&self) -> PGA_GAIN_R[src]

Bits 14:17 - Gain in PGA mode

pub fn user_trim(&self) -> USER_TRIM_R[src]

Bit 18 - User trimming enable

pub fn trimoffsetp(&self) -> TRIMOFFSETP_R[src]

Bits 19:23 - Offset trimming value (PMOS)

pub fn trimoffsetn(&self) -> TRIMOFFSETN_R[src]

Bits 24:28 - Offset trimming value (NMOS)

pub fn tstref(&self) -> TSTREF_R[src]

Bit 29 - TSTREF

pub fn outcal(&self) -> OUTCAL_R[src]

Bit 30 - OPAMP ouput status flag

pub fn lock(&self) -> LOCK_R[src]

Bit 31 - OPAMP lock

impl R<u32, Reg<u32, _OPAMP1_CSR>>[src]

pub fn opamp1en(&self) -> OPAMP1EN_R[src]

Bit 0 - OPAMP1 enable

pub fn force_vp(&self) -> FORCE_VP_R[src]

Bit 1 - FORCE_VP

pub fn vp_sel(&self) -> VP_SEL_R[src]

Bits 2:3 - OPAMP Non inverting input selection

pub fn vm_sel(&self) -> VM_SEL_R[src]

Bits 5:6 - OPAMP inverting input selection

pub fn tcm_en(&self) -> TCM_EN_R[src]

Bit 7 - Timer controlled Mux mode enable

pub fn vms_sel(&self) -> VMS_SEL_R[src]

Bit 8 - OPAMP inverting input secondary selection

pub fn vps_sel(&self) -> VPS_SEL_R[src]

Bits 9:10 - OPAMP Non inverting input secondary selection

pub fn calon(&self) -> CALON_R[src]

Bit 11 - Calibration mode enable

pub fn calsel(&self) -> CALSEL_R[src]

Bits 12:13 - Calibration selection

pub fn pga_gain(&self) -> PGA_GAIN_R[src]

Bits 14:17 - Gain in PGA mode

pub fn user_trim(&self) -> USER_TRIM_R[src]

Bit 18 - User trimming enable

pub fn trimoffsetp(&self) -> TRIMOFFSETP_R[src]

Bits 19:23 - Offset trimming value (PMOS)

pub fn trimoffsetn(&self) -> TRIMOFFSETN_R[src]

Bits 24:28 - Offset trimming value (NMOS)

pub fn tstref(&self) -> TSTREF_R[src]

Bit 29 - TSTREF

pub fn outcal(&self) -> OUTCAL_R[src]

Bit 30 - OPAMP ouput status flag

pub fn lock(&self) -> LOCK_R[src]

Bit 31 - OPAMP lock

impl R<bool, COMP2EN_A>[src]

pub fn variant(&self) -> COMP2EN_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u8, COMP2INMSEL_A>[src]

pub fn variant(&self) -> Variant<u8, COMP2INMSEL_A>[src]

Get enumerated values variant

pub fn is_one_quarter_vref(&self) -> bool[src]

Checks if the value of the field is ONEQUARTERVREF

pub fn is_one_half_vref(&self) -> bool[src]

Checks if the value of the field is ONEHALFVREF

pub fn is_three_quarter_vref(&self) -> bool[src]

Checks if the value of the field is THREEQUARTERVREF

pub fn is_vref(&self) -> bool[src]

Checks if the value of the field is VREF

pub fn is_pa4_dac1_ch1(&self) -> bool[src]

Checks if the value of the field is PA4_DAC1_CH1

pub fn is_dac1_ch2(&self) -> bool[src]

Checks if the value of the field is DAC1_CH2

pub fn is_pa2(&self) -> bool[src]

Checks if the value of the field is PA2

impl R<u8, COMP2OUTSEL_A>[src]

pub fn variant(&self) -> Variant<u8, COMP2OUTSEL_A>[src]

Get enumerated values variant

pub fn is_no_selection(&self) -> bool[src]

Checks if the value of the field is NOSELECTION

pub fn is_timer1break_input(&self) -> bool[src]

Checks if the value of the field is TIMER1BREAKINPUT

pub fn is_timer1break_input2(&self) -> bool[src]

Checks if the value of the field is TIMER1BREAKINPUT2

pub fn is_timer1ocref_clear_input(&self) -> bool[src]

Checks if the value of the field is TIMER1OCREFCLEARINPUT

pub fn is_timer1input_capture1(&self) -> bool[src]

Checks if the value of the field is TIMER1INPUTCAPTURE1

pub fn is_timer2input_capture4(&self) -> bool[src]

Checks if the value of the field is TIMER2INPUTCAPTURE4

pub fn is_timer2ocref_clear_input(&self) -> bool[src]

Checks if the value of the field is TIMER2OCREFCLEARINPUT

pub fn is_timer3input_capture1(&self) -> bool[src]

Checks if the value of the field is TIMER3INPUTCAPTURE1

pub fn is_timer3ocref_clear_input(&self) -> bool[src]

Checks if the value of the field is TIMER3OCREFCLEARINPUT

impl R<bool, COMP2POL_A>[src]

pub fn variant(&self) -> COMP2POL_A[src]

Get enumerated values variant

pub fn is_not_inverted(&self) -> bool[src]

Checks if the value of the field is NOTINVERTED

pub fn is_inverted(&self) -> bool[src]

Checks if the value of the field is INVERTED

impl R<u8, COMP2_BLANKING_A>[src]

pub fn variant(&self) -> Variant<u8, COMP2_BLANKING_A>[src]

Get enumerated values variant

pub fn is_no_blanking(&self) -> bool[src]

Checks if the value of the field is NOBLANKING

pub fn is_tim1oc5(&self) -> bool[src]

Checks if the value of the field is TIM1OC5

pub fn is_tim2oc3(&self) -> bool[src]

Checks if the value of the field is TIM2OC3

pub fn is_tim3oc3(&self) -> bool[src]

Checks if the value of the field is TIM3OC3

impl R<bool, COMP2OUT_A>[src]

pub fn variant(&self) -> COMP2OUT_A[src]

Get enumerated values variant

pub fn is_low(&self) -> bool[src]

Checks if the value of the field is LOW

pub fn is_high(&self) -> bool[src]

Checks if the value of the field is HIGH

impl R<bool, COMP2LOCK_A>[src]

pub fn variant(&self) -> COMP2LOCK_A[src]

Get enumerated values variant

pub fn is_unlocked(&self) -> bool[src]

Checks if the value of the field is UNLOCKED

pub fn is_locked(&self) -> bool[src]

Checks if the value of the field is LOCKED

impl R<u32, Reg<u32, _COMP2_CSR>>[src]

pub fn comp2en(&self) -> COMP2EN_R[src]

Bit 0 - Comparator 2 enable

pub fn comp2inmsel(&self) -> COMP2INMSEL_R[src]

Bits 4:6 - Comparator 2 inverting input selection

pub fn comp2outsel(&self) -> COMP2OUTSEL_R[src]

Bits 10:13 - Comparator 2 output selection

pub fn comp2pol(&self) -> COMP2POL_R[src]

Bit 15 - Comparator 2 output polarity

pub fn comp2_blanking(&self) -> COMP2_BLANKING_R[src]

Bits 18:20 - Comparator 2 blanking source

pub fn comp2out(&self) -> COMP2OUT_R[src]

Bit 30 - Comparator 2 output

pub fn comp2lock(&self) -> COMP2LOCK_R[src]

Bit 31 - Comparator 2 lock

pub fn comp2mode(&self) -> COMP2MODE_R[src]

Bits 2:3 - Comparator 2 mode

pub fn comp2inpsel(&self) -> COMP2INPSEL_R[src]

Bit 7 - Comparator 2 non inverted input

pub fn comp2winmode(&self) -> COMP2WINMODE_R[src]

Bit 9 - Comparator 2 window mode

pub fn comp2hyst(&self) -> COMP2HYST_R[src]

Bits 16:17 - Comparator 2 hysteresis

pub fn comp2inmsel3(&self) -> COMP2INMSEL3_R[src]

Bit 22 - Comparator 2 inverting input selection

impl R<bool, COMP4EN_A>[src]

pub fn variant(&self) -> COMP4EN_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u8, COMP4INMSEL_A>[src]

pub fn variant(&self) -> Variant<u8, COMP4INMSEL_A>[src]

Get enumerated values variant

pub fn is_one_quarter_vref(&self) -> bool[src]

Checks if the value of the field is ONEQUARTERVREF

pub fn is_one_half_vref(&self) -> bool[src]

Checks if the value of the field is ONEHALFVREF

pub fn is_three_quarter_vref(&self) -> bool[src]

Checks if the value of the field is THREEQUARTERVREF

pub fn is_vref(&self) -> bool[src]

Checks if the value of the field is VREF

pub fn is_pa4_dac1_ch1(&self) -> bool[src]

Checks if the value of the field is PA4_DAC1_CH1

pub fn is_dac1_ch2(&self) -> bool[src]

Checks if the value of the field is DAC1_CH2

pub fn is_pb2(&self) -> bool[src]

Checks if the value of the field is PB2

impl R<u8, COMP4OUTSEL_A>[src]

pub fn variant(&self) -> Variant<u8, COMP4OUTSEL_A>[src]

Get enumerated values variant

pub fn is_no_selection(&self) -> bool[src]

Checks if the value of the field is NOSELECTION

pub fn is_timer1break_input(&self) -> bool[src]

Checks if the value of the field is TIMER1BREAKINPUT

pub fn is_timer1break_input2(&self) -> bool[src]

Checks if the value of the field is TIMER1BREAKINPUT2

pub fn is_timer3input_capture3(&self) -> bool[src]

Checks if the value of the field is TIMER3INPUTCAPTURE3

pub fn is_timer15input_capture2(&self) -> bool[src]

Checks if the value of the field is TIMER15INPUTCAPTURE2

pub fn is_timer15ocref_clear_input(&self) -> bool[src]

Checks if the value of the field is TIMER15OCREFCLEARINPUT

pub fn is_timer3ocref_clear_input(&self) -> bool[src]

Checks if the value of the field is TIMER3OCREFCLEARINPUT

impl R<bool, COMP4POL_A>[src]

pub fn variant(&self) -> COMP4POL_A[src]

Get enumerated values variant

pub fn is_not_inverted(&self) -> bool[src]

Checks if the value of the field is NOTINVERTED

pub fn is_inverted(&self) -> bool[src]

Checks if the value of the field is INVERTED

impl R<u8, COMP4_BLANKING_A>[src]

pub fn variant(&self) -> Variant<u8, COMP4_BLANKING_A>[src]

Get enumerated values variant

pub fn is_no_blanking(&self) -> bool[src]

Checks if the value of the field is NOBLANKING

pub fn is_tim3oc4(&self) -> bool[src]

Checks if the value of the field is TIM3OC4

pub fn is_tim15oc1(&self) -> bool[src]

Checks if the value of the field is TIM15OC1

impl R<bool, COMP4OUT_A>[src]

pub fn variant(&self) -> COMP4OUT_A[src]

Get enumerated values variant

pub fn is_low(&self) -> bool[src]

Checks if the value of the field is LOW

pub fn is_high(&self) -> bool[src]

Checks if the value of the field is HIGH

impl R<bool, COMP4LOCK_A>[src]

pub fn variant(&self) -> COMP4LOCK_A[src]

Get enumerated values variant

pub fn is_unlocked(&self) -> bool[src]

Checks if the value of the field is UNLOCKED

pub fn is_locked(&self) -> bool[src]

Checks if the value of the field is LOCKED

impl R<u32, Reg<u32, _COMP4_CSR>>[src]

pub fn comp4en(&self) -> COMP4EN_R[src]

Bit 0 - Comparator 4 enable

pub fn comp4inmsel(&self) -> COMP4INMSEL_R[src]

Bits 4:6 - Comparator 4 inverting input selection

pub fn comp4outsel(&self) -> COMP4OUTSEL_R[src]

Bits 10:13 - Comparator 4 output selection

pub fn comp4pol(&self) -> COMP4POL_R[src]

Bit 15 - Comparator 4 output polarity

pub fn comp4_blanking(&self) -> COMP4_BLANKING_R[src]

Bits 18:20 - Comparator 4 blanking source

pub fn comp4out(&self) -> COMP4OUT_R[src]

Bit 30 - Comparator 4 output

pub fn comp4lock(&self) -> COMP4LOCK_R[src]

Bit 31 - Comparator 4 lock

pub fn comp4winmode(&self) -> COMP4WINMODE_R[src]

Bit 9 - Comparator 4 window mode

pub fn comp4mode(&self) -> COMP4MODE_R[src]

Bits 2:3 - Comparator 4 mode

pub fn comp4inpsel(&self) -> COMP4INPSEL_R[src]

Bit 7 - Comparator 4 non inverted input

pub fn comp4hyst(&self) -> COMP4HYST_R[src]

Bits 16:17 - Comparator 4 hysteresis

pub fn comp4inmsel3(&self) -> COMP4INMSEL3_R[src]

Bit 22 - Comparator 4 inverting input selection

impl R<bool, COMP6EN_A>[src]

pub fn variant(&self) -> COMP6EN_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u8, COMP6INMSEL_A>[src]

pub fn variant(&self) -> Variant<u8, COMP6INMSEL_A>[src]

Get enumerated values variant

pub fn is_one_quarter_vref(&self) -> bool[src]

Checks if the value of the field is ONEQUARTERVREF

pub fn is_one_half_vref(&self) -> bool[src]

Checks if the value of the field is ONEHALFVREF

pub fn is_three_quarter_vref(&self) -> bool[src]

Checks if the value of the field is THREEQUARTERVREF

pub fn is_vref(&self) -> bool[src]

Checks if the value of the field is VREF

pub fn is_pa4_dac1_ch1(&self) -> bool[src]

Checks if the value of the field is PA4_DAC1_CH1

pub fn is_dac1_ch2(&self) -> bool[src]

Checks if the value of the field is DAC1_CH2

pub fn is_pb15(&self) -> bool[src]

Checks if the value of the field is PB15

impl R<u8, COMP6OUTSEL_A>[src]

pub fn variant(&self) -> Variant<u8, COMP6OUTSEL_A>[src]

Get enumerated values variant

pub fn is_no_selection(&self) -> bool[src]

Checks if the value of the field is NOSELECTION

pub fn is_timer1break_input(&self) -> bool[src]

Checks if the value of the field is TIMER1BREAKINPUT

pub fn is_timer1break_input2(&self) -> bool[src]

Checks if the value of the field is TIMER1BREAKINPUT2

pub fn is_timer2input_capture2(&self) -> bool[src]

Checks if the value of the field is TIMER2INPUTCAPTURE2

pub fn is_timer2ocref_clear_input(&self) -> bool[src]

Checks if the value of the field is TIMER2OCREFCLEARINPUT

pub fn is_timer16ocref_clear_input(&self) -> bool[src]

Checks if the value of the field is TIMER16OCREFCLEARINPUT

pub fn is_timer16input_capture1(&self) -> bool[src]

Checks if the value of the field is TIMER16INPUTCAPTURE1

impl R<bool, COMP6POL_A>[src]

pub fn variant(&self) -> COMP6POL_A[src]

Get enumerated values variant

pub fn is_not_inverted(&self) -> bool[src]

Checks if the value of the field is NOTINVERTED

pub fn is_inverted(&self) -> bool[src]

Checks if the value of the field is INVERTED

impl R<u8, COMP6_BLANKING_A>[src]

pub fn variant(&self) -> Variant<u8, COMP6_BLANKING_A>[src]

Get enumerated values variant

pub fn is_no_blanking(&self) -> bool[src]

Checks if the value of the field is NOBLANKING

pub fn is_tim2oc4(&self) -> bool[src]

Checks if the value of the field is TIM2OC4

pub fn is_tim15oc2(&self) -> bool[src]

Checks if the value of the field is TIM15OC2

impl R<bool, COMP6OUT_A>[src]

pub fn variant(&self) -> COMP6OUT_A[src]

Get enumerated values variant

pub fn is_low(&self) -> bool[src]

Checks if the value of the field is LOW

pub fn is_high(&self) -> bool[src]

Checks if the value of the field is HIGH

impl R<bool, COMP6LOCK_A>[src]

pub fn variant(&self) -> COMP6LOCK_A[src]

Get enumerated values variant

pub fn is_unlocked(&self) -> bool[src]

Checks if the value of the field is UNLOCKED

pub fn is_locked(&self) -> bool[src]

Checks if the value of the field is LOCKED

impl R<u32, Reg<u32, _COMP6_CSR>>[src]

pub fn comp6en(&self) -> COMP6EN_R[src]

Bit 0 - Comparator 6 enable

pub fn comp6inmsel(&self) -> COMP6INMSEL_R[src]

Bits 4:6 - Comparator 6 inverting input selection

pub fn comp6outsel(&self) -> COMP6OUTSEL_R[src]

Bits 10:13 - Comparator 6 output selection

pub fn comp6pol(&self) -> COMP6POL_R[src]

Bit 15 - Comparator 6 output polarity

pub fn comp6_blanking(&self) -> COMP6_BLANKING_R[src]

Bits 18:20 - Comparator 6 blanking source

pub fn comp6out(&self) -> COMP6OUT_R[src]

Bit 30 - Comparator 6 output

pub fn comp6lock(&self) -> COMP6LOCK_R[src]

Bit 31 - Comparator 6 lock

pub fn comp6winmode(&self) -> COMP6WINMODE_R[src]

Bit 9 - Comparator 6 window mode

pub fn comp6mode(&self) -> COMP6MODE_R[src]

Bits 2:3 - Comparator 6 mode

pub fn comp6inpsel(&self) -> COMP6INPSEL_R[src]

Bit 7 - Comparator 6 non inverted input

pub fn comp6hyst(&self) -> COMP6HYST_R[src]

Bits 16:17 - Comparator 6 hysteresis

pub fn comp6inmsel3(&self) -> COMP6INMSEL3_R[src]

Bit 22 - Comparator 6 inverting input selection

impl R<u32, Reg<u32, _COMP3_CSR>>[src]

pub fn comp3en(&self) -> COMP3EN_R[src]

Bit 0 - Comparator 3 enable

pub fn comp3mode(&self) -> COMP3MODE_R[src]

Bits 2:3 - Comparator 3 mode

pub fn comp3inmsel(&self) -> COMP3INMSEL_R[src]

Bits 4:6 - Comparator 3 inverting input selection

pub fn comp3inpsel(&self) -> COMP3INPSEL_R[src]

Bit 7 - Comparator 3 non inverted input

pub fn comp3outsel(&self) -> COMP3OUTSEL_R[src]

Bits 10:13 - Comparator 3 output selection

pub fn comp3pol(&self) -> COMP3POL_R[src]

Bit 15 - Comparator 3 output polarity

pub fn comp3hyst(&self) -> COMP3HYST_R[src]

Bits 16:17 - Comparator 3 hysteresis

pub fn comp3_blanking(&self) -> COMP3_BLANKING_R[src]

Bits 18:20 - Comparator 3 blanking source

pub fn comp3out(&self) -> COMP3OUT_R[src]

Bit 30 - Comparator 3 output

pub fn comp3lock(&self) -> COMP3LOCK_R[src]

Bit 31 - Comparator 3 lock

impl R<u32, Reg<u32, _COMP5_CSR>>[src]

pub fn comp5en(&self) -> COMP5EN_R[src]

Bit 0 - Comparator 5 enable

pub fn comp5mode(&self) -> COMP5MODE_R[src]

Bits 2:3 - Comparator 5 mode

pub fn comp5inmsel(&self) -> COMP5INMSEL_R[src]

Bits 4:6 - Comparator 5 inverting input selection

pub fn comp5inpsel(&self) -> COMP5INPSEL_R[src]

Bit 7 - Comparator 5 non inverted input

pub fn comp5outsel(&self) -> COMP5OUTSEL_R[src]

Bits 10:13 - Comparator 5 output selection

pub fn comp5pol(&self) -> COMP5POL_R[src]

Bit 15 - Comparator 5 output polarity

pub fn comp5hyst(&self) -> COMP5HYST_R[src]

Bits 16:17 - Comparator 5 hysteresis

pub fn comp5_blanking(&self) -> COMP5_BLANKING_R[src]

Bits 18:20 - Comparator 5 blanking source

pub fn comp5out(&self) -> COMP5OUT_R[src]

Bit 30 - Comparator 5 output

pub fn comp5lock(&self) -> COMP5LOCK_R[src]

Bit 31 - Comparator 5 lock

impl R<u32, Reg<u32, _COMP7_CSR>>[src]

pub fn comp7en(&self) -> COMP7EN_R[src]

Bit 0 - Comparator 7 enable

pub fn comp7mode(&self) -> COMP7MODE_R[src]

Bits 2:3 - Comparator 7 mode

pub fn comp7inmsel(&self) -> COMP7INMSEL_R[src]

Bits 4:6 - Comparator 7 inverting input selection

pub fn comp7inpsel(&self) -> COMP7INPSEL_R[src]

Bit 7 - Comparator 7 non inverted input

pub fn comp7outsel(&self) -> COMP7OUTSEL_R[src]

Bits 10:13 - Comparator 7 output selection

pub fn comp7pol(&self) -> COMP7POL_R[src]

Bit 15 - Comparator 7 output polarity

pub fn comp7hyst(&self) -> COMP7HYST_R[src]

Bits 16:17 - Comparator 7 hysteresis

pub fn comp7_blanking(&self) -> COMP7_BLANKING_R[src]

Bits 18:20 - Comparator 7 blanking source

pub fn comp7out(&self) -> COMP7OUT_R[src]

Bit 30 - Comparator 7 output

pub fn comp7lock(&self) -> COMP7LOCK_R[src]

Bit 31 - Comparator 7 lock

impl R<u32, Reg<u32, _COMP1_CSR>>[src]

pub fn comp1en(&self) -> COMP1EN_R[src]

Bit 0 - Comparator 1 enable

pub fn comp1_inp_dac(&self) -> COMP1_INP_DAC_R[src]

Bit 1 - Comparator 1 non inverting input connection to DAC output

pub fn comp1mode(&self) -> COMP1MODE_R[src]

Bits 2:3 - Comparator 1 mode

pub fn comp1inmsel(&self) -> COMP1INMSEL_R[src]

Bits 4:6 - Comparator 1 inverting input selection

pub fn comp1outsel(&self) -> COMP1OUTSEL_R[src]

Bits 10:13 - Comparator 1 output selection

pub fn comp1pol(&self) -> COMP1POL_R[src]

Bit 15 - Comparator 1 output polarity

pub fn comp1hyst(&self) -> COMP1HYST_R[src]

Bits 16:17 - Comparator 1 hysteresis

pub fn comp1_blanking(&self) -> COMP1_BLANKING_R[src]

Bits 18:20 - Comparator 1 blanking source

pub fn comp1out(&self) -> COMP1OUT_R[src]

Bit 30 - Comparator 1 output

pub fn comp1lock(&self) -> COMP1LOCK_R[src]

Bit 31 - Comparator 1 lock

impl R<u8, MODER15_A>[src]

pub fn variant(&self) -> MODER15_A[src]

Get enumerated values variant

pub fn is_input(&self) -> bool[src]

Checks if the value of the field is INPUT

pub fn is_output(&self) -> bool[src]

Checks if the value of the field is OUTPUT

pub fn is_alternate(&self) -> bool[src]

Checks if the value of the field is ALTERNATE

pub fn is_analog(&self) -> bool[src]

Checks if the value of the field is ANALOG

impl R<u32, Reg<u32, _MODER>>[src]

pub fn moder15(&self) -> MODER15_R[src]

Bits 30:31 - Port x configuration bits (y = 0..15)

pub fn moder14(&self) -> MODER14_R[src]

Bits 28:29 - Port x configuration bits (y = 0..15)

pub fn moder13(&self) -> MODER13_R[src]

Bits 26:27 - Port x configuration bits (y = 0..15)

pub fn moder12(&self) -> MODER12_R[src]

Bits 24:25 - Port x configuration bits (y = 0..15)

pub fn moder11(&self) -> MODER11_R[src]

Bits 22:23 - Port x configuration bits (y = 0..15)

pub fn moder10(&self) -> MODER10_R[src]

Bits 20:21 - Port x configuration bits (y = 0..15)

pub fn moder9(&self) -> MODER9_R[src]

Bits 18:19 - Port x configuration bits (y = 0..15)

pub fn moder8(&self) -> MODER8_R[src]

Bits 16:17 - Port x configuration bits (y = 0..15)

pub fn moder7(&self) -> MODER7_R[src]

Bits 14:15 - Port x configuration bits (y = 0..15)

pub fn moder6(&self) -> MODER6_R[src]

Bits 12:13 - Port x configuration bits (y = 0..15)

pub fn moder5(&self) -> MODER5_R[src]

Bits 10:11 - Port x configuration bits (y = 0..15)

pub fn moder4(&self) -> MODER4_R[src]

Bits 8:9 - Port x configuration bits (y = 0..15)

pub fn moder3(&self) -> MODER3_R[src]

Bits 6:7 - Port x configuration bits (y = 0..15)

pub fn moder2(&self) -> MODER2_R[src]

Bits 4:5 - Port x configuration bits (y = 0..15)

pub fn moder1(&self) -> MODER1_R[src]

Bits 2:3 - Port x configuration bits (y = 0..15)

pub fn moder0(&self) -> MODER0_R[src]

Bits 0:1 - Port x configuration bits (y = 0..15)

impl R<bool, OT15_A>[src]

pub fn variant(&self) -> OT15_A[src]

Get enumerated values variant

pub fn is_push_pull(&self) -> bool[src]

Checks if the value of the field is PUSHPULL

pub fn is_open_drain(&self) -> bool[src]

Checks if the value of the field is OPENDRAIN

impl R<u32, Reg<u32, _OTYPER>>[src]

pub fn ot15(&self) -> OT15_R[src]

Bit 15 - Port x configuration bits (y = 0..15)

pub fn ot14(&self) -> OT14_R[src]

Bit 14 - Port x configuration bits (y = 0..15)

pub fn ot13(&self) -> OT13_R[src]

Bit 13 - Port x configuration bits (y = 0..15)

pub fn ot12(&self) -> OT12_R[src]

Bit 12 - Port x configuration bits (y = 0..15)

pub fn ot11(&self) -> OT11_R[src]

Bit 11 - Port x configuration bits (y = 0..15)

pub fn ot10(&self) -> OT10_R[src]

Bit 10 - Port x configuration bits (y = 0..15)

pub fn ot9(&self) -> OT9_R[src]

Bit 9 - Port x configuration bits (y = 0..15)

pub fn ot8(&self) -> OT8_R[src]

Bit 8 - Port x configuration bits (y = 0..15)

pub fn ot7(&self) -> OT7_R[src]

Bit 7 - Port x configuration bits (y = 0..15)

pub fn ot6(&self) -> OT6_R[src]

Bit 6 - Port x configuration bits (y = 0..15)

pub fn ot5(&self) -> OT5_R[src]

Bit 5 - Port x configuration bits (y = 0..15)

pub fn ot4(&self) -> OT4_R[src]

Bit 4 - Port x configuration bits (y = 0..15)

pub fn ot3(&self) -> OT3_R[src]

Bit 3 - Port x configuration bits (y = 0..15)

pub fn ot2(&self) -> OT2_R[src]

Bit 2 - Port x configuration bits (y = 0..15)

pub fn ot1(&self) -> OT1_R[src]

Bit 1 - Port x configuration bits (y = 0..15)

pub fn ot0(&self) -> OT0_R[src]

Bit 0 - Port x configuration bits (y = 0..15)

impl R<u8, OSPEEDR15_A>[src]

pub fn variant(&self) -> OSPEEDR15_A[src]

Get enumerated values variant

pub fn is_low_speed(&self) -> bool[src]

Checks if the value of the field is LOWSPEED

pub fn is_medium_speed(&self) -> bool[src]

Checks if the value of the field is MEDIUMSPEED

pub fn is_high_speed(&self) -> bool[src]

Checks if the value of the field is HIGHSPEED

pub fn is_very_high_speed(&self) -> bool[src]

Checks if the value of the field is VERYHIGHSPEED

impl R<u32, Reg<u32, _OSPEEDR>>[src]

pub fn ospeedr15(&self) -> OSPEEDR15_R[src]

Bits 30:31 - Port x configuration bits (y = 0..15)

pub fn ospeedr14(&self) -> OSPEEDR14_R[src]

Bits 28:29 - Port x configuration bits (y = 0..15)

pub fn ospeedr13(&self) -> OSPEEDR13_R[src]

Bits 26:27 - Port x configuration bits (y = 0..15)

pub fn ospeedr12(&self) -> OSPEEDR12_R[src]

Bits 24:25 - Port x configuration bits (y = 0..15)

pub fn ospeedr11(&self) -> OSPEEDR11_R[src]

Bits 22:23 - Port x configuration bits (y = 0..15)

pub fn ospeedr10(&self) -> OSPEEDR10_R[src]

Bits 20:21 - Port x configuration bits (y = 0..15)

pub fn ospeedr9(&self) -> OSPEEDR9_R[src]

Bits 18:19 - Port x configuration bits (y = 0..15)

pub fn ospeedr8(&self) -> OSPEEDR8_R[src]

Bits 16:17 - Port x configuration bits (y = 0..15)

pub fn ospeedr7(&self) -> OSPEEDR7_R[src]

Bits 14:15 - Port x configuration bits (y = 0..15)

pub fn ospeedr6(&self) -> OSPEEDR6_R[src]

Bits 12:13 - Port x configuration bits (y = 0..15)

pub fn ospeedr5(&self) -> OSPEEDR5_R[src]

Bits 10:11 - Port x configuration bits (y = 0..15)

pub fn ospeedr4(&self) -> OSPEEDR4_R[src]

Bits 8:9 - Port x configuration bits (y = 0..15)

pub fn ospeedr3(&self) -> OSPEEDR3_R[src]

Bits 6:7 - Port x configuration bits (y = 0..15)

pub fn ospeedr2(&self) -> OSPEEDR2_R[src]

Bits 4:5 - Port x configuration bits (y = 0..15)

pub fn ospeedr1(&self) -> OSPEEDR1_R[src]

Bits 2:3 - Port x configuration bits (y = 0..15)

pub fn ospeedr0(&self) -> OSPEEDR0_R[src]

Bits 0:1 - Port x configuration bits (y = 0..15)

impl R<u8, PUPDR15_A>[src]

pub fn variant(&self) -> Variant<u8, PUPDR15_A>[src]

Get enumerated values variant

pub fn is_floating(&self) -> bool[src]

Checks if the value of the field is FLOATING

pub fn is_pull_up(&self) -> bool[src]

Checks if the value of the field is PULLUP

pub fn is_pull_down(&self) -> bool[src]

Checks if the value of the field is PULLDOWN

impl R<u32, Reg<u32, _PUPDR>>[src]

pub fn pupdr15(&self) -> PUPDR15_R[src]

Bits 30:31 - Port x configuration bits (y = 0..15)

pub fn pupdr14(&self) -> PUPDR14_R[src]

Bits 28:29 - Port x configuration bits (y = 0..15)

pub fn pupdr13(&self) -> PUPDR13_R[src]

Bits 26:27 - Port x configuration bits (y = 0..15)

pub fn pupdr12(&self) -> PUPDR12_R[src]

Bits 24:25 - Port x configuration bits (y = 0..15)

pub fn pupdr11(&self) -> PUPDR11_R[src]

Bits 22:23 - Port x configuration bits (y = 0..15)

pub fn pupdr10(&self) -> PUPDR10_R[src]

Bits 20:21 - Port x configuration bits (y = 0..15)

pub fn pupdr9(&self) -> PUPDR9_R[src]

Bits 18:19 - Port x configuration bits (y = 0..15)

pub fn pupdr8(&self) -> PUPDR8_R[src]

Bits 16:17 - Port x configuration bits (y = 0..15)

pub fn pupdr7(&self) -> PUPDR7_R[src]

Bits 14:15 - Port x configuration bits (y = 0..15)

pub fn pupdr6(&self) -> PUPDR6_R[src]

Bits 12:13 - Port x configuration bits (y = 0..15)

pub fn pupdr5(&self) -> PUPDR5_R[src]

Bits 10:11 - Port x configuration bits (y = 0..15)

pub fn pupdr4(&self) -> PUPDR4_R[src]

Bits 8:9 - Port x configuration bits (y = 0..15)

pub fn pupdr3(&self) -> PUPDR3_R[src]

Bits 6:7 - Port x configuration bits (y = 0..15)

pub fn pupdr2(&self) -> PUPDR2_R[src]

Bits 4:5 - Port x configuration bits (y = 0..15)

pub fn pupdr1(&self) -> PUPDR1_R[src]

Bits 2:3 - Port x configuration bits (y = 0..15)

pub fn pupdr0(&self) -> PUPDR0_R[src]

Bits 0:1 - Port x configuration bits (y = 0..15)

impl R<bool, IDR15_A>[src]

pub fn variant(&self) -> IDR15_A[src]

Get enumerated values variant

pub fn is_high(&self) -> bool[src]

Checks if the value of the field is HIGH

pub fn is_low(&self) -> bool[src]

Checks if the value of the field is LOW

impl R<u32, Reg<u32, _IDR>>[src]

pub fn idr15(&self) -> IDR15_R[src]

Bit 15 - Port input data (y = 0..15)

pub fn idr14(&self) -> IDR14_R[src]

Bit 14 - Port input data (y = 0..15)

pub fn idr13(&self) -> IDR13_R[src]

Bit 13 - Port input data (y = 0..15)

pub fn idr12(&self) -> IDR12_R[src]

Bit 12 - Port input data (y = 0..15)

pub fn idr11(&self) -> IDR11_R[src]

Bit 11 - Port input data (y = 0..15)

pub fn idr10(&self) -> IDR10_R[src]

Bit 10 - Port input data (y = 0..15)

pub fn idr9(&self) -> IDR9_R[src]

Bit 9 - Port input data (y = 0..15)

pub fn idr8(&self) -> IDR8_R[src]

Bit 8 - Port input data (y = 0..15)

pub fn idr7(&self) -> IDR7_R[src]

Bit 7 - Port input data (y = 0..15)

pub fn idr6(&self) -> IDR6_R[src]

Bit 6 - Port input data (y = 0..15)

pub fn idr5(&self) -> IDR5_R[src]

Bit 5 - Port input data (y = 0..15)

pub fn idr4(&self) -> IDR4_R[src]

Bit 4 - Port input data (y = 0..15)

pub fn idr3(&self) -> IDR3_R[src]

Bit 3 - Port input data (y = 0..15)

pub fn idr2(&self) -> IDR2_R[src]

Bit 2 - Port input data (y = 0..15)

pub fn idr1(&self) -> IDR1_R[src]

Bit 1 - Port input data (y = 0..15)

pub fn idr0(&self) -> IDR0_R[src]

Bit 0 - Port input data (y = 0..15)

impl R<bool, ODR15_A>[src]

pub fn variant(&self) -> ODR15_A[src]

Get enumerated values variant

pub fn is_high(&self) -> bool[src]

Checks if the value of the field is HIGH

pub fn is_low(&self) -> bool[src]

Checks if the value of the field is LOW

impl R<u32, Reg<u32, _ODR>>[src]

pub fn odr15(&self) -> ODR15_R[src]

Bit 15 - Port output data (y = 0..15)

pub fn odr14(&self) -> ODR14_R[src]

Bit 14 - Port output data (y = 0..15)

pub fn odr13(&self) -> ODR13_R[src]

Bit 13 - Port output data (y = 0..15)

pub fn odr12(&self) -> ODR12_R[src]

Bit 12 - Port output data (y = 0..15)

pub fn odr11(&self) -> ODR11_R[src]

Bit 11 - Port output data (y = 0..15)

pub fn odr10(&self) -> ODR10_R[src]

Bit 10 - Port output data (y = 0..15)

pub fn odr9(&self) -> ODR9_R[src]

Bit 9 - Port output data (y = 0..15)

pub fn odr8(&self) -> ODR8_R[src]

Bit 8 - Port output data (y = 0..15)

pub fn odr7(&self) -> ODR7_R[src]

Bit 7 - Port output data (y = 0..15)

pub fn odr6(&self) -> ODR6_R[src]

Bit 6 - Port output data (y = 0..15)

pub fn odr5(&self) -> ODR5_R[src]

Bit 5 - Port output data (y = 0..15)

pub fn odr4(&self) -> ODR4_R[src]

Bit 4 - Port output data (y = 0..15)

pub fn odr3(&self) -> ODR3_R[src]

Bit 3 - Port output data (y = 0..15)

pub fn odr2(&self) -> ODR2_R[src]

Bit 2 - Port output data (y = 0..15)

pub fn odr1(&self) -> ODR1_R[src]

Bit 1 - Port output data (y = 0..15)

pub fn odr0(&self) -> ODR0_R[src]

Bit 0 - Port output data (y = 0..15)

impl R<bool, LCKK_A>[src]

pub fn variant(&self) -> LCKK_A[src]

Get enumerated values variant

pub fn is_not_active(&self) -> bool[src]

Checks if the value of the field is NOTACTIVE

pub fn is_active(&self) -> bool[src]

Checks if the value of the field is ACTIVE

impl R<bool, LCK15_A>[src]

pub fn variant(&self) -> LCK15_A[src]

Get enumerated values variant

pub fn is_unlocked(&self) -> bool[src]

Checks if the value of the field is UNLOCKED

pub fn is_locked(&self) -> bool[src]

Checks if the value of the field is LOCKED

impl R<bool, LCK9_A>[src]

pub fn variant(&self) -> LCK9_A[src]

Get enumerated values variant

pub fn is_unlocked(&self) -> bool[src]

Checks if the value of the field is UNLOCKED

pub fn is_locked(&self) -> bool[src]

Checks if the value of the field is LOCKED

impl R<u32, Reg<u32, _LCKR>>[src]

pub fn lckk(&self) -> LCKK_R[src]

Bit 16 - Lok Key

pub fn lck15(&self) -> LCK15_R[src]

Bit 15 - Port x lock bit y (y= 0..15)

pub fn lck14(&self) -> LCK14_R[src]

Bit 14 - Port x lock bit y (y= 0..15)

pub fn lck13(&self) -> LCK13_R[src]

Bit 13 - Port x lock bit y (y= 0..15)

pub fn lck12(&self) -> LCK12_R[src]

Bit 12 - Port x lock bit y (y= 0..15)

pub fn lck11(&self) -> LCK11_R[src]

Bit 11 - Port x lock bit y (y= 0..15)

pub fn lck10(&self) -> LCK10_R[src]

Bit 10 - Port x lock bit y (y= 0..15)

pub fn lck9(&self) -> LCK9_R[src]

Bit 9 - Port x lock bit y (y= 0..15)

pub fn lck8(&self) -> LCK8_R[src]

Bit 8 - Port x lock bit y (y= 0..15)

pub fn lck7(&self) -> LCK7_R[src]

Bit 7 - Port x lock bit y (y= 0..15)

pub fn lck6(&self) -> LCK6_R[src]

Bit 6 - Port x lock bit y (y= 0..15)

pub fn lck5(&self) -> LCK5_R[src]

Bit 5 - Port x lock bit y (y= 0..15)

pub fn lck4(&self) -> LCK4_R[src]

Bit 4 - Port x lock bit y (y= 0..15)

pub fn lck3(&self) -> LCK3_R[src]

Bit 3 - Port x lock bit y (y= 0..15)

pub fn lck2(&self) -> LCK2_R[src]

Bit 2 - Port x lock bit y (y= 0..15)

pub fn lck1(&self) -> LCK1_R[src]

Bit 1 - Port x lock bit y (y= 0..15)

pub fn lck0(&self) -> LCK0_R[src]

Bit 0 - Port x lock bit y (y= 0..15)

impl R<u8, AFRL7_A>[src]

pub fn variant(&self) -> AFRL7_A[src]

Get enumerated values variant

pub fn is_af0(&self) -> bool[src]

Checks if the value of the field is AF0

pub fn is_af1(&self) -> bool[src]

Checks if the value of the field is AF1

pub fn is_af2(&self) -> bool[src]

Checks if the value of the field is AF2

pub fn is_af3(&self) -> bool[src]

Checks if the value of the field is AF3

pub fn is_af4(&self) -> bool[src]

Checks if the value of the field is AF4

pub fn is_af5(&self) -> bool[src]

Checks if the value of the field is AF5

pub fn is_af6(&self) -> bool[src]

Checks if the value of the field is AF6

pub fn is_af7(&self) -> bool[src]

Checks if the value of the field is AF7

pub fn is_af8(&self) -> bool[src]

Checks if the value of the field is AF8

pub fn is_af9(&self) -> bool[src]

Checks if the value of the field is AF9

pub fn is_af10(&self) -> bool[src]

Checks if the value of the field is AF10

pub fn is_af11(&self) -> bool[src]

Checks if the value of the field is AF11

pub fn is_af12(&self) -> bool[src]

Checks if the value of the field is AF12

pub fn is_af13(&self) -> bool[src]

Checks if the value of the field is AF13

pub fn is_af14(&self) -> bool[src]

Checks if the value of the field is AF14

pub fn is_af15(&self) -> bool[src]

Checks if the value of the field is AF15

impl R<u32, Reg<u32, _AFRL>>[src]

pub fn afrl7(&self) -> AFRL7_R[src]

Bits 28:31 - Alternate function selection for port x bit y (y = 0..7)

pub fn afrl6(&self) -> AFRL6_R[src]

Bits 24:27 - Alternate function selection for port x bit y (y = 0..7)

pub fn afrl5(&self) -> AFRL5_R[src]

Bits 20:23 - Alternate function selection for port x bit y (y = 0..7)

pub fn afrl4(&self) -> AFRL4_R[src]

Bits 16:19 - Alternate function selection for port x bit y (y = 0..7)

pub fn afrl3(&self) -> AFRL3_R[src]

Bits 12:15 - Alternate function selection for port x bit y (y = 0..7)

pub fn afrl2(&self) -> AFRL2_R[src]

Bits 8:11 - Alternate function selection for port x bit y (y = 0..7)

pub fn afrl1(&self) -> AFRL1_R[src]

Bits 4:7 - Alternate function selection for port x bit y (y = 0..7)

pub fn afrl0(&self) -> AFRL0_R[src]

Bits 0:3 - Alternate function selection for port x bit y (y = 0..7)

impl R<u8, AFRH15_A>[src]

pub fn variant(&self) -> AFRH15_A[src]

Get enumerated values variant

pub fn is_af0(&self) -> bool[src]

Checks if the value of the field is AF0

pub fn is_af1(&self) -> bool[src]

Checks if the value of the field is AF1

pub fn is_af2(&self) -> bool[src]

Checks if the value of the field is AF2

pub fn is_af3(&self) -> bool[src]

Checks if the value of the field is AF3

pub fn is_af4(&self) -> bool[src]

Checks if the value of the field is AF4

pub fn is_af5(&self) -> bool[src]

Checks if the value of the field is AF5

pub fn is_af6(&self) -> bool[src]

Checks if the value of the field is AF6

pub fn is_af7(&self) -> bool[src]

Checks if the value of the field is AF7

pub fn is_af8(&self) -> bool[src]

Checks if the value of the field is AF8

pub fn is_af9(&self) -> bool[src]

Checks if the value of the field is AF9

pub fn is_af10(&self) -> bool[src]

Checks if the value of the field is AF10

pub fn is_af11(&self) -> bool[src]

Checks if the value of the field is AF11

pub fn is_af12(&self) -> bool[src]

Checks if the value of the field is AF12

pub fn is_af13(&self) -> bool[src]

Checks if the value of the field is AF13

pub fn is_af14(&self) -> bool[src]

Checks if the value of the field is AF14

pub fn is_af15(&self) -> bool[src]

Checks if the value of the field is AF15

impl R<u32, Reg<u32, _AFRH>>[src]

pub fn afrh15(&self) -> AFRH15_R[src]

Bits 28:31 - Alternate function selection for port x bit y (y = 8..15)

pub fn afrh14(&self) -> AFRH14_R[src]

Bits 24:27 - Alternate function selection for port x bit y (y = 8..15)

pub fn afrh13(&self) -> AFRH13_R[src]

Bits 20:23 - Alternate function selection for port x bit y (y = 8..15)

pub fn afrh12(&self) -> AFRH12_R[src]

Bits 16:19 - Alternate function selection for port x bit y (y = 8..15)

pub fn afrh11(&self) -> AFRH11_R[src]

Bits 12:15 - Alternate function selection for port x bit y (y = 8..15)

pub fn afrh10(&self) -> AFRH10_R[src]

Bits 8:11 - Alternate function selection for port x bit y (y = 8..15)

pub fn afrh9(&self) -> AFRH9_R[src]

Bits 4:7 - Alternate function selection for port x bit y (y = 8..15)

pub fn afrh8(&self) -> AFRH8_R[src]

Bits 0:3 - Alternate function selection for port x bit y (y = 8..15)

impl R<u8, MODER15_A>[src]

pub fn variant(&self) -> MODER15_A[src]

Get enumerated values variant

pub fn is_input(&self) -> bool[src]

Checks if the value of the field is INPUT

pub fn is_output(&self) -> bool[src]

Checks if the value of the field is OUTPUT

pub fn is_alternate(&self) -> bool[src]

Checks if the value of the field is ALTERNATE

pub fn is_analog(&self) -> bool[src]

Checks if the value of the field is ANALOG

impl R<u32, Reg<u32, _MODER>>[src]

pub fn moder15(&self) -> MODER15_R[src]

Bits 30:31 - Port x configuration bits (y = 0..15)

pub fn moder14(&self) -> MODER14_R[src]

Bits 28:29 - Port x configuration bits (y = 0..15)

pub fn moder13(&self) -> MODER13_R[src]

Bits 26:27 - Port x configuration bits (y = 0..15)

pub fn moder12(&self) -> MODER12_R[src]

Bits 24:25 - Port x configuration bits (y = 0..15)

pub fn moder11(&self) -> MODER11_R[src]

Bits 22:23 - Port x configuration bits (y = 0..15)

pub fn moder10(&self) -> MODER10_R[src]

Bits 20:21 - Port x configuration bits (y = 0..15)

pub fn moder9(&self) -> MODER9_R[src]

Bits 18:19 - Port x configuration bits (y = 0..15)

pub fn moder8(&self) -> MODER8_R[src]

Bits 16:17 - Port x configuration bits (y = 0..15)

pub fn moder7(&self) -> MODER7_R[src]

Bits 14:15 - Port x configuration bits (y = 0..15)

pub fn moder6(&self) -> MODER6_R[src]

Bits 12:13 - Port x configuration bits (y = 0..15)

pub fn moder5(&self) -> MODER5_R[src]

Bits 10:11 - Port x configuration bits (y = 0..15)

pub fn moder4(&self) -> MODER4_R[src]

Bits 8:9 - Port x configuration bits (y = 0..15)

pub fn moder3(&self) -> MODER3_R[src]

Bits 6:7 - Port x configuration bits (y = 0..15)

pub fn moder2(&self) -> MODER2_R[src]

Bits 4:5 - Port x configuration bits (y = 0..15)

pub fn moder1(&self) -> MODER1_R[src]

Bits 2:3 - Port x configuration bits (y = 0..15)

pub fn moder0(&self) -> MODER0_R[src]

Bits 0:1 - Port x configuration bits (y = 0..15)

impl R<bool, OT15_A>[src]

pub fn variant(&self) -> OT15_A[src]

Get enumerated values variant

pub fn is_push_pull(&self) -> bool[src]

Checks if the value of the field is PUSHPULL

pub fn is_open_drain(&self) -> bool[src]

Checks if the value of the field is OPENDRAIN

impl R<u32, Reg<u32, _OTYPER>>[src]

pub fn ot15(&self) -> OT15_R[src]

Bit 15 - Port x configuration bit 15

pub fn ot14(&self) -> OT14_R[src]

Bit 14 - Port x configuration bit 14

pub fn ot13(&self) -> OT13_R[src]

Bit 13 - Port x configuration bit 13

pub fn ot12(&self) -> OT12_R[src]

Bit 12 - Port x configuration bit 12

pub fn ot11(&self) -> OT11_R[src]

Bit 11 - Port x configuration bit 11

pub fn ot10(&self) -> OT10_R[src]

Bit 10 - Port x configuration bit 10

pub fn ot9(&self) -> OT9_R[src]

Bit 9 - Port x configuration bit 9

pub fn ot8(&self) -> OT8_R[src]

Bit 8 - Port x configuration bit 8

pub fn ot7(&self) -> OT7_R[src]

Bit 7 - Port x configuration bit 7

pub fn ot6(&self) -> OT6_R[src]

Bit 6 - Port x configuration bit 6

pub fn ot5(&self) -> OT5_R[src]

Bit 5 - Port x configuration bit 5

pub fn ot4(&self) -> OT4_R[src]

Bit 4 - Port x configuration bit 4

pub fn ot3(&self) -> OT3_R[src]

Bit 3 - Port x configuration bit 3

pub fn ot2(&self) -> OT2_R[src]

Bit 2 - Port x configuration bit 2

pub fn ot1(&self) -> OT1_R[src]

Bit 1 - Port x configuration bit 1

pub fn ot0(&self) -> OT0_R[src]

Bit 0 - Port x configuration bit 0

impl R<u8, OSPEEDR15_A>[src]

pub fn variant(&self) -> OSPEEDR15_A[src]

Get enumerated values variant

pub fn is_low_speed(&self) -> bool[src]

Checks if the value of the field is LOWSPEED

pub fn is_medium_speed(&self) -> bool[src]

Checks if the value of the field is MEDIUMSPEED

pub fn is_high_speed(&self) -> bool[src]

Checks if the value of the field is HIGHSPEED

pub fn is_very_high_speed(&self) -> bool[src]

Checks if the value of the field is VERYHIGHSPEED

impl R<u32, Reg<u32, _OSPEEDR>>[src]

pub fn ospeedr15(&self) -> OSPEEDR15_R[src]

Bits 30:31 - Port x configuration bits (y = 0..15)

pub fn ospeedr14(&self) -> OSPEEDR14_R[src]

Bits 28:29 - Port x configuration bits (y = 0..15)

pub fn ospeedr13(&self) -> OSPEEDR13_R[src]

Bits 26:27 - Port x configuration bits (y = 0..15)

pub fn ospeedr12(&self) -> OSPEEDR12_R[src]

Bits 24:25 - Port x configuration bits (y = 0..15)

pub fn ospeedr11(&self) -> OSPEEDR11_R[src]

Bits 22:23 - Port x configuration bits (y = 0..15)

pub fn ospeedr10(&self) -> OSPEEDR10_R[src]

Bits 20:21 - Port x configuration bits (y = 0..15)

pub fn ospeedr9(&self) -> OSPEEDR9_R[src]

Bits 18:19 - Port x configuration bits (y = 0..15)

pub fn ospeedr8(&self) -> OSPEEDR8_R[src]

Bits 16:17 - Port x configuration bits (y = 0..15)

pub fn ospeedr7(&self) -> OSPEEDR7_R[src]

Bits 14:15 - Port x configuration bits (y = 0..15)

pub fn ospeedr6(&self) -> OSPEEDR6_R[src]

Bits 12:13 - Port x configuration bits (y = 0..15)

pub fn ospeedr5(&self) -> OSPEEDR5_R[src]

Bits 10:11 - Port x configuration bits (y = 0..15)

pub fn ospeedr4(&self) -> OSPEEDR4_R[src]

Bits 8:9 - Port x configuration bits (y = 0..15)

pub fn ospeedr3(&self) -> OSPEEDR3_R[src]

Bits 6:7 - Port x configuration bits (y = 0..15)

pub fn ospeedr2(&self) -> OSPEEDR2_R[src]

Bits 4:5 - Port x configuration bits (y = 0..15)

pub fn ospeedr1(&self) -> OSPEEDR1_R[src]

Bits 2:3 - Port x configuration bits (y = 0..15)

pub fn ospeedr0(&self) -> OSPEEDR0_R[src]

Bits 0:1 - Port x configuration bits (y = 0..15)

impl R<u8, PUPDR15_A>[src]

pub fn variant(&self) -> Variant<u8, PUPDR15_A>[src]

Get enumerated values variant

pub fn is_floating(&self) -> bool[src]

Checks if the value of the field is FLOATING

pub fn is_pull_up(&self) -> bool[src]

Checks if the value of the field is PULLUP

pub fn is_pull_down(&self) -> bool[src]

Checks if the value of the field is PULLDOWN

impl R<u32, Reg<u32, _PUPDR>>[src]

pub fn pupdr15(&self) -> PUPDR15_R[src]

Bits 30:31 - Port x configuration bits (y = 0..15)

pub fn pupdr14(&self) -> PUPDR14_R[src]

Bits 28:29 - Port x configuration bits (y = 0..15)

pub fn pupdr13(&self) -> PUPDR13_R[src]

Bits 26:27 - Port x configuration bits (y = 0..15)

pub fn pupdr12(&self) -> PUPDR12_R[src]

Bits 24:25 - Port x configuration bits (y = 0..15)

pub fn pupdr11(&self) -> PUPDR11_R[src]

Bits 22:23 - Port x configuration bits (y = 0..15)

pub fn pupdr10(&self) -> PUPDR10_R[src]

Bits 20:21 - Port x configuration bits (y = 0..15)

pub fn pupdr9(&self) -> PUPDR9_R[src]

Bits 18:19 - Port x configuration bits (y = 0..15)

pub fn pupdr8(&self) -> PUPDR8_R[src]

Bits 16:17 - Port x configuration bits (y = 0..15)

pub fn pupdr7(&self) -> PUPDR7_R[src]

Bits 14:15 - Port x configuration bits (y = 0..15)

pub fn pupdr6(&self) -> PUPDR6_R[src]

Bits 12:13 - Port x configuration bits (y = 0..15)

pub fn pupdr5(&self) -> PUPDR5_R[src]

Bits 10:11 - Port x configuration bits (y = 0..15)

pub fn pupdr4(&self) -> PUPDR4_R[src]

Bits 8:9 - Port x configuration bits (y = 0..15)

pub fn pupdr3(&self) -> PUPDR3_R[src]

Bits 6:7 - Port x configuration bits (y = 0..15)

pub fn pupdr2(&self) -> PUPDR2_R[src]

Bits 4:5 - Port x configuration bits (y = 0..15)

pub fn pupdr1(&self) -> PUPDR1_R[src]

Bits 2:3 - Port x configuration bits (y = 0..15)

pub fn pupdr0(&self) -> PUPDR0_R[src]

Bits 0:1 - Port x configuration bits (y = 0..15)

impl R<bool, IDR15_A>[src]

pub fn variant(&self) -> IDR15_A[src]

Get enumerated values variant

pub fn is_high(&self) -> bool[src]

Checks if the value of the field is HIGH

pub fn is_low(&self) -> bool[src]

Checks if the value of the field is LOW

impl R<u32, Reg<u32, _IDR>>[src]

pub fn idr15(&self) -> IDR15_R[src]

Bit 15 - Port input data (y = 0..15)

pub fn idr14(&self) -> IDR14_R[src]

Bit 14 - Port input data (y = 0..15)

pub fn idr13(&self) -> IDR13_R[src]

Bit 13 - Port input data (y = 0..15)

pub fn idr12(&self) -> IDR12_R[src]

Bit 12 - Port input data (y = 0..15)

pub fn idr11(&self) -> IDR11_R[src]

Bit 11 - Port input data (y = 0..15)

pub fn idr10(&self) -> IDR10_R[src]

Bit 10 - Port input data (y = 0..15)

pub fn idr9(&self) -> IDR9_R[src]

Bit 9 - Port input data (y = 0..15)

pub fn idr8(&self) -> IDR8_R[src]

Bit 8 - Port input data (y = 0..15)

pub fn idr7(&self) -> IDR7_R[src]

Bit 7 - Port input data (y = 0..15)

pub fn idr6(&self) -> IDR6_R[src]

Bit 6 - Port input data (y = 0..15)

pub fn idr5(&self) -> IDR5_R[src]

Bit 5 - Port input data (y = 0..15)

pub fn idr4(&self) -> IDR4_R[src]

Bit 4 - Port input data (y = 0..15)

pub fn idr3(&self) -> IDR3_R[src]

Bit 3 - Port input data (y = 0..15)

pub fn idr2(&self) -> IDR2_R[src]

Bit 2 - Port input data (y = 0..15)

pub fn idr1(&self) -> IDR1_R[src]

Bit 1 - Port input data (y = 0..15)

pub fn idr0(&self) -> IDR0_R[src]

Bit 0 - Port input data (y = 0..15)

impl R<bool, ODR15_A>[src]

pub fn variant(&self) -> ODR15_A[src]

Get enumerated values variant

pub fn is_high(&self) -> bool[src]

Checks if the value of the field is HIGH

pub fn is_low(&self) -> bool[src]

Checks if the value of the field is LOW

impl R<u32, Reg<u32, _ODR>>[src]

pub fn odr15(&self) -> ODR15_R[src]

Bit 15 - Port output data (y = 0..15)

pub fn odr14(&self) -> ODR14_R[src]

Bit 14 - Port output data (y = 0..15)

pub fn odr13(&self) -> ODR13_R[src]

Bit 13 - Port output data (y = 0..15)

pub fn odr12(&self) -> ODR12_R[src]

Bit 12 - Port output data (y = 0..15)

pub fn odr11(&self) -> ODR11_R[src]

Bit 11 - Port output data (y = 0..15)

pub fn odr10(&self) -> ODR10_R[src]

Bit 10 - Port output data (y = 0..15)

pub fn odr9(&self) -> ODR9_R[src]

Bit 9 - Port output data (y = 0..15)

pub fn odr8(&self) -> ODR8_R[src]

Bit 8 - Port output data (y = 0..15)

pub fn odr7(&self) -> ODR7_R[src]

Bit 7 - Port output data (y = 0..15)

pub fn odr6(&self) -> ODR6_R[src]

Bit 6 - Port output data (y = 0..15)

pub fn odr5(&self) -> ODR5_R[src]

Bit 5 - Port output data (y = 0..15)

pub fn odr4(&self) -> ODR4_R[src]

Bit 4 - Port output data (y = 0..15)

pub fn odr3(&self) -> ODR3_R[src]

Bit 3 - Port output data (y = 0..15)

pub fn odr2(&self) -> ODR2_R[src]

Bit 2 - Port output data (y = 0..15)

pub fn odr1(&self) -> ODR1_R[src]

Bit 1 - Port output data (y = 0..15)

pub fn odr0(&self) -> ODR0_R[src]

Bit 0 - Port output data (y = 0..15)

impl R<bool, LCKK_A>[src]

pub fn variant(&self) -> LCKK_A[src]

Get enumerated values variant

pub fn is_not_active(&self) -> bool[src]

Checks if the value of the field is NOTACTIVE

pub fn is_active(&self) -> bool[src]

Checks if the value of the field is ACTIVE

impl R<bool, LCK15_A>[src]

pub fn variant(&self) -> LCK15_A[src]

Get enumerated values variant

pub fn is_unlocked(&self) -> bool[src]

Checks if the value of the field is UNLOCKED

pub fn is_locked(&self) -> bool[src]

Checks if the value of the field is LOCKED

impl R<bool, LCK9_A>[src]

pub fn variant(&self) -> LCK9_A[src]

Get enumerated values variant

pub fn is_unlocked(&self) -> bool[src]

Checks if the value of the field is UNLOCKED

pub fn is_locked(&self) -> bool[src]

Checks if the value of the field is LOCKED

impl R<u32, Reg<u32, _LCKR>>[src]

pub fn lckk(&self) -> LCKK_R[src]

Bit 16 - Lok Key

pub fn lck15(&self) -> LCK15_R[src]

Bit 15 - Port x lock bit y (y= 0..15)

pub fn lck14(&self) -> LCK14_R[src]

Bit 14 - Port x lock bit y (y= 0..15)

pub fn lck13(&self) -> LCK13_R[src]

Bit 13 - Port x lock bit y (y= 0..15)

pub fn lck12(&self) -> LCK12_R[src]

Bit 12 - Port x lock bit y (y= 0..15)

pub fn lck11(&self) -> LCK11_R[src]

Bit 11 - Port x lock bit y (y= 0..15)

pub fn lck10(&self) -> LCK10_R[src]

Bit 10 - Port x lock bit y (y= 0..15)

pub fn lck9(&self) -> LCK9_R[src]

Bit 9 - Port x lock bit y (y= 0..15)

pub fn lck8(&self) -> LCK8_R[src]

Bit 8 - Port x lock bit y (y= 0..15)

pub fn lck7(&self) -> LCK7_R[src]

Bit 7 - Port x lock bit y (y= 0..15)

pub fn lck6(&self) -> LCK6_R[src]

Bit 6 - Port x lock bit y (y= 0..15)

pub fn lck5(&self) -> LCK5_R[src]

Bit 5 - Port x lock bit y (y= 0..15)

pub fn lck4(&self) -> LCK4_R[src]

Bit 4 - Port x lock bit y (y= 0..15)

pub fn lck3(&self) -> LCK3_R[src]

Bit 3 - Port x lock bit y (y= 0..15)

pub fn lck2(&self) -> LCK2_R[src]

Bit 2 - Port x lock bit y (y= 0..15)

pub fn lck1(&self) -> LCK1_R[src]

Bit 1 - Port x lock bit y (y= 0..15)

pub fn lck0(&self) -> LCK0_R[src]

Bit 0 - Port x lock bit y (y= 0..15)

impl R<u8, AFRL7_A>[src]

pub fn variant(&self) -> AFRL7_A[src]

Get enumerated values variant

pub fn is_af0(&self) -> bool[src]

Checks if the value of the field is AF0

pub fn is_af1(&self) -> bool[src]

Checks if the value of the field is AF1

pub fn is_af2(&self) -> bool[src]

Checks if the value of the field is AF2

pub fn is_af3(&self) -> bool[src]

Checks if the value of the field is AF3

pub fn is_af4(&self) -> bool[src]

Checks if the value of the field is AF4

pub fn is_af5(&self) -> bool[src]

Checks if the value of the field is AF5

pub fn is_af6(&self) -> bool[src]

Checks if the value of the field is AF6

pub fn is_af7(&self) -> bool[src]

Checks if the value of the field is AF7

pub fn is_af8(&self) -> bool[src]

Checks if the value of the field is AF8

pub fn is_af9(&self) -> bool[src]

Checks if the value of the field is AF9

pub fn is_af10(&self) -> bool[src]

Checks if the value of the field is AF10

pub fn is_af11(&self) -> bool[src]

Checks if the value of the field is AF11

pub fn is_af12(&self) -> bool[src]

Checks if the value of the field is AF12

pub fn is_af13(&self) -> bool[src]

Checks if the value of the field is AF13

pub fn is_af14(&self) -> bool[src]

Checks if the value of the field is AF14

pub fn is_af15(&self) -> bool[src]

Checks if the value of the field is AF15

impl R<u32, Reg<u32, _AFRL>>[src]

pub fn afrl7(&self) -> AFRL7_R[src]

Bits 28:31 - Alternate function selection for port x bit y (y = 0..7)

pub fn afrl6(&self) -> AFRL6_R[src]

Bits 24:27 - Alternate function selection for port x bit y (y = 0..7)

pub fn afrl5(&self) -> AFRL5_R[src]

Bits 20:23 - Alternate function selection for port x bit y (y = 0..7)

pub fn afrl4(&self) -> AFRL4_R[src]

Bits 16:19 - Alternate function selection for port x bit y (y = 0..7)

pub fn afrl3(&self) -> AFRL3_R[src]

Bits 12:15 - Alternate function selection for port x bit y (y = 0..7)

pub fn afrl2(&self) -> AFRL2_R[src]

Bits 8:11 - Alternate function selection for port x bit y (y = 0..7)

pub fn afrl1(&self) -> AFRL1_R[src]

Bits 4:7 - Alternate function selection for port x bit y (y = 0..7)

pub fn afrl0(&self) -> AFRL0_R[src]

Bits 0:3 - Alternate function selection for port x bit y (y = 0..7)

impl R<u8, AFRH15_A>[src]

pub fn variant(&self) -> AFRH15_A[src]

Get enumerated values variant

pub fn is_af0(&self) -> bool[src]

Checks if the value of the field is AF0

pub fn is_af1(&self) -> bool[src]

Checks if the value of the field is AF1

pub fn is_af2(&self) -> bool[src]

Checks if the value of the field is AF2

pub fn is_af3(&self) -> bool[src]

Checks if the value of the field is AF3

pub fn is_af4(&self) -> bool[src]

Checks if the value of the field is AF4

pub fn is_af5(&self) -> bool[src]

Checks if the value of the field is AF5

pub fn is_af6(&self) -> bool[src]

Checks if the value of the field is AF6

pub fn is_af7(&self) -> bool[src]

Checks if the value of the field is AF7

pub fn is_af8(&self) -> bool[src]

Checks if the value of the field is AF8

pub fn is_af9(&self) -> bool[src]

Checks if the value of the field is AF9

pub fn is_af10(&self) -> bool[src]

Checks if the value of the field is AF10

pub fn is_af11(&self) -> bool[src]

Checks if the value of the field is AF11

pub fn is_af12(&self) -> bool[src]

Checks if the value of the field is AF12

pub fn is_af13(&self) -> bool[src]

Checks if the value of the field is AF13

pub fn is_af14(&self) -> bool[src]

Checks if the value of the field is AF14

pub fn is_af15(&self) -> bool[src]

Checks if the value of the field is AF15

impl R<u32, Reg<u32, _AFRH>>[src]

pub fn afrh15(&self) -> AFRH15_R[src]

Bits 28:31 - Alternate function selection for port x bit y (y = 8..15)

pub fn afrh14(&self) -> AFRH14_R[src]

Bits 24:27 - Alternate function selection for port x bit y (y = 8..15)

pub fn afrh13(&self) -> AFRH13_R[src]

Bits 20:23 - Alternate function selection for port x bit y (y = 8..15)

pub fn afrh12(&self) -> AFRH12_R[src]

Bits 16:19 - Alternate function selection for port x bit y (y = 8..15)

pub fn afrh11(&self) -> AFRH11_R[src]

Bits 12:15 - Alternate function selection for port x bit y (y = 8..15)

pub fn afrh10(&self) -> AFRH10_R[src]

Bits 8:11 - Alternate function selection for port x bit y (y = 8..15)

pub fn afrh9(&self) -> AFRH9_R[src]

Bits 4:7 - Alternate function selection for port x bit y (y = 8..15)

pub fn afrh8(&self) -> AFRH8_R[src]

Bits 0:3 - Alternate function selection for port x bit y (y = 8..15)

impl R<u8, MODER15_A>[src]

pub fn variant(&self) -> MODER15_A[src]

Get enumerated values variant

pub fn is_input(&self) -> bool[src]

Checks if the value of the field is INPUT

pub fn is_output(&self) -> bool[src]

Checks if the value of the field is OUTPUT

pub fn is_alternate(&self) -> bool[src]

Checks if the value of the field is ALTERNATE

pub fn is_analog(&self) -> bool[src]

Checks if the value of the field is ANALOG

impl R<u32, Reg<u32, _MODER>>[src]

pub fn moder15(&self) -> MODER15_R[src]

Bits 30:31 - Port x configuration bits (y = 0..15)

pub fn moder14(&self) -> MODER14_R[src]

Bits 28:29 - Port x configuration bits (y = 0..15)

pub fn moder13(&self) -> MODER13_R[src]

Bits 26:27 - Port x configuration bits (y = 0..15)

pub fn moder12(&self) -> MODER12_R[src]

Bits 24:25 - Port x configuration bits (y = 0..15)

pub fn moder11(&self) -> MODER11_R[src]

Bits 22:23 - Port x configuration bits (y = 0..15)

pub fn moder10(&self) -> MODER10_R[src]

Bits 20:21 - Port x configuration bits (y = 0..15)

pub fn moder9(&self) -> MODER9_R[src]

Bits 18:19 - Port x configuration bits (y = 0..15)

pub fn moder8(&self) -> MODER8_R[src]

Bits 16:17 - Port x configuration bits (y = 0..15)

pub fn moder7(&self) -> MODER7_R[src]

Bits 14:15 - Port x configuration bits (y = 0..15)

pub fn moder6(&self) -> MODER6_R[src]

Bits 12:13 - Port x configuration bits (y = 0..15)

pub fn moder5(&self) -> MODER5_R[src]

Bits 10:11 - Port x configuration bits (y = 0..15)

pub fn moder4(&self) -> MODER4_R[src]

Bits 8:9 - Port x configuration bits (y = 0..15)

pub fn moder3(&self) -> MODER3_R[src]

Bits 6:7 - Port x configuration bits (y = 0..15)

pub fn moder2(&self) -> MODER2_R[src]

Bits 4:5 - Port x configuration bits (y = 0..15)

pub fn moder1(&self) -> MODER1_R[src]

Bits 2:3 - Port x configuration bits (y = 0..15)

pub fn moder0(&self) -> MODER0_R[src]

Bits 0:1 - Port x configuration bits (y = 0..15)

impl R<bool, OT15_A>[src]

pub fn variant(&self) -> OT15_A[src]

Get enumerated values variant

pub fn is_push_pull(&self) -> bool[src]

Checks if the value of the field is PUSHPULL

pub fn is_open_drain(&self) -> bool[src]

Checks if the value of the field is OPENDRAIN

impl R<u32, Reg<u32, _OTYPER>>[src]

pub fn ot15(&self) -> OT15_R[src]

Bit 15 - Port x configuration bit 15

pub fn ot14(&self) -> OT14_R[src]

Bit 14 - Port x configuration bit 14

pub fn ot13(&self) -> OT13_R[src]

Bit 13 - Port x configuration bit 13

pub fn ot12(&self) -> OT12_R[src]

Bit 12 - Port x configuration bit 12

pub fn ot11(&self) -> OT11_R[src]

Bit 11 - Port x configuration bit 11

pub fn ot10(&self) -> OT10_R[src]

Bit 10 - Port x configuration bit 10

pub fn ot9(&self) -> OT9_R[src]

Bit 9 - Port x configuration bit 9

pub fn ot8(&self) -> OT8_R[src]

Bit 8 - Port x configuration bit 8

pub fn ot7(&self) -> OT7_R[src]

Bit 7 - Port x configuration bit 7

pub fn ot6(&self) -> OT6_R[src]

Bit 6 - Port x configuration bit 6

pub fn ot5(&self) -> OT5_R[src]

Bit 5 - Port x configuration bit 5

pub fn ot4(&self) -> OT4_R[src]

Bit 4 - Port x configuration bit 4

pub fn ot3(&self) -> OT3_R[src]

Bit 3 - Port x configuration bit 3

pub fn ot2(&self) -> OT2_R[src]

Bit 2 - Port x configuration bit 2

pub fn ot1(&self) -> OT1_R[src]

Bit 1 - Port x configuration bit 1

pub fn ot0(&self) -> OT0_R[src]

Bit 0 - Port x configuration bit 0

impl R<u8, OSPEEDR15_A>[src]

pub fn variant(&self) -> OSPEEDR15_A[src]

Get enumerated values variant

pub fn is_low_speed(&self) -> bool[src]

Checks if the value of the field is LOWSPEED

pub fn is_medium_speed(&self) -> bool[src]

Checks if the value of the field is MEDIUMSPEED

pub fn is_high_speed(&self) -> bool[src]

Checks if the value of the field is HIGHSPEED

pub fn is_very_high_speed(&self) -> bool[src]

Checks if the value of the field is VERYHIGHSPEED

impl R<u32, Reg<u32, _OSPEEDR>>[src]

pub fn ospeedr15(&self) -> OSPEEDR15_R[src]

Bits 30:31 - Port x configuration bits (y = 0..15)

pub fn ospeedr14(&self) -> OSPEEDR14_R[src]

Bits 28:29 - Port x configuration bits (y = 0..15)

pub fn ospeedr13(&self) -> OSPEEDR13_R[src]

Bits 26:27 - Port x configuration bits (y = 0..15)

pub fn ospeedr12(&self) -> OSPEEDR12_R[src]

Bits 24:25 - Port x configuration bits (y = 0..15)

pub fn ospeedr11(&self) -> OSPEEDR11_R[src]

Bits 22:23 - Port x configuration bits (y = 0..15)

pub fn ospeedr10(&self) -> OSPEEDR10_R[src]

Bits 20:21 - Port x configuration bits (y = 0..15)

pub fn ospeedr9(&self) -> OSPEEDR9_R[src]

Bits 18:19 - Port x configuration bits (y = 0..15)

pub fn ospeedr8(&self) -> OSPEEDR8_R[src]

Bits 16:17 - Port x configuration bits (y = 0..15)

pub fn ospeedr7(&self) -> OSPEEDR7_R[src]

Bits 14:15 - Port x configuration bits (y = 0..15)

pub fn ospeedr6(&self) -> OSPEEDR6_R[src]

Bits 12:13 - Port x configuration bits (y = 0..15)

pub fn ospeedr5(&self) -> OSPEEDR5_R[src]

Bits 10:11 - Port x configuration bits (y = 0..15)

pub fn ospeedr4(&self) -> OSPEEDR4_R[src]

Bits 8:9 - Port x configuration bits (y = 0..15)

pub fn ospeedr3(&self) -> OSPEEDR3_R[src]

Bits 6:7 - Port x configuration bits (y = 0..15)

pub fn ospeedr2(&self) -> OSPEEDR2_R[src]

Bits 4:5 - Port x configuration bits (y = 0..15)

pub fn ospeedr1(&self) -> OSPEEDR1_R[src]

Bits 2:3 - Port x configuration bits (y = 0..15)

pub fn ospeedr0(&self) -> OSPEEDR0_R[src]

Bits 0:1 - Port x configuration bits (y = 0..15)

impl R<u8, PUPDR15_A>[src]

pub fn variant(&self) -> Variant<u8, PUPDR15_A>[src]

Get enumerated values variant

pub fn is_floating(&self) -> bool[src]

Checks if the value of the field is FLOATING

pub fn is_pull_up(&self) -> bool[src]

Checks if the value of the field is PULLUP

pub fn is_pull_down(&self) -> bool[src]

Checks if the value of the field is PULLDOWN

impl R<u32, Reg<u32, _PUPDR>>[src]

pub fn pupdr15(&self) -> PUPDR15_R[src]

Bits 30:31 - Port x configuration bits (y = 0..15)

pub fn pupdr14(&self) -> PUPDR14_R[src]

Bits 28:29 - Port x configuration bits (y = 0..15)

pub fn pupdr13(&self) -> PUPDR13_R[src]

Bits 26:27 - Port x configuration bits (y = 0..15)

pub fn pupdr12(&self) -> PUPDR12_R[src]

Bits 24:25 - Port x configuration bits (y = 0..15)

pub fn pupdr11(&self) -> PUPDR11_R[src]

Bits 22:23 - Port x configuration bits (y = 0..15)

pub fn pupdr10(&self) -> PUPDR10_R[src]

Bits 20:21 - Port x configuration bits (y = 0..15)

pub fn pupdr9(&self) -> PUPDR9_R[src]

Bits 18:19 - Port x configuration bits (y = 0..15)

pub fn pupdr8(&self) -> PUPDR8_R[src]

Bits 16:17 - Port x configuration bits (y = 0..15)

pub fn pupdr7(&self) -> PUPDR7_R[src]

Bits 14:15 - Port x configuration bits (y = 0..15)

pub fn pupdr6(&self) -> PUPDR6_R[src]

Bits 12:13 - Port x configuration bits (y = 0..15)

pub fn pupdr5(&self) -> PUPDR5_R[src]

Bits 10:11 - Port x configuration bits (y = 0..15)

pub fn pupdr4(&self) -> PUPDR4_R[src]

Bits 8:9 - Port x configuration bits (y = 0..15)

pub fn pupdr3(&self) -> PUPDR3_R[src]

Bits 6:7 - Port x configuration bits (y = 0..15)

pub fn pupdr2(&self) -> PUPDR2_R[src]

Bits 4:5 - Port x configuration bits (y = 0..15)

pub fn pupdr1(&self) -> PUPDR1_R[src]

Bits 2:3 - Port x configuration bits (y = 0..15)

pub fn pupdr0(&self) -> PUPDR0_R[src]

Bits 0:1 - Port x configuration bits (y = 0..15)

impl R<bool, IDR15_A>[src]

pub fn variant(&self) -> IDR15_A[src]

Get enumerated values variant

pub fn is_high(&self) -> bool[src]

Checks if the value of the field is HIGH

pub fn is_low(&self) -> bool[src]

Checks if the value of the field is LOW

impl R<u32, Reg<u32, _IDR>>[src]

pub fn idr15(&self) -> IDR15_R[src]

Bit 15 - Port input data (y = 0..15)

pub fn idr14(&self) -> IDR14_R[src]

Bit 14 - Port input data (y = 0..15)

pub fn idr13(&self) -> IDR13_R[src]

Bit 13 - Port input data (y = 0..15)

pub fn idr12(&self) -> IDR12_R[src]

Bit 12 - Port input data (y = 0..15)

pub fn idr11(&self) -> IDR11_R[src]

Bit 11 - Port input data (y = 0..15)

pub fn idr10(&self) -> IDR10_R[src]

Bit 10 - Port input data (y = 0..15)

pub fn idr9(&self) -> IDR9_R[src]

Bit 9 - Port input data (y = 0..15)

pub fn idr8(&self) -> IDR8_R[src]

Bit 8 - Port input data (y = 0..15)

pub fn idr7(&self) -> IDR7_R[src]

Bit 7 - Port input data (y = 0..15)

pub fn idr6(&self) -> IDR6_R[src]

Bit 6 - Port input data (y = 0..15)

pub fn idr5(&self) -> IDR5_R[src]

Bit 5 - Port input data (y = 0..15)

pub fn idr4(&self) -> IDR4_R[src]

Bit 4 - Port input data (y = 0..15)

pub fn idr3(&self) -> IDR3_R[src]

Bit 3 - Port input data (y = 0..15)

pub fn idr2(&self) -> IDR2_R[src]

Bit 2 - Port input data (y = 0..15)

pub fn idr1(&self) -> IDR1_R[src]

Bit 1 - Port input data (y = 0..15)

pub fn idr0(&self) -> IDR0_R[src]

Bit 0 - Port input data (y = 0..15)

impl R<bool, ODR15_A>[src]

pub fn variant(&self) -> ODR15_A[src]

Get enumerated values variant

pub fn is_high(&self) -> bool[src]

Checks if the value of the field is HIGH

pub fn is_low(&self) -> bool[src]

Checks if the value of the field is LOW

impl R<u32, Reg<u32, _ODR>>[src]

pub fn odr15(&self) -> ODR15_R[src]

Bit 15 - Port output data (y = 0..15)

pub fn odr14(&self) -> ODR14_R[src]

Bit 14 - Port output data (y = 0..15)

pub fn odr13(&self) -> ODR13_R[src]

Bit 13 - Port output data (y = 0..15)

pub fn odr12(&self) -> ODR12_R[src]

Bit 12 - Port output data (y = 0..15)

pub fn odr11(&self) -> ODR11_R[src]

Bit 11 - Port output data (y = 0..15)

pub fn odr10(&self) -> ODR10_R[src]

Bit 10 - Port output data (y = 0..15)

pub fn odr9(&self) -> ODR9_R[src]

Bit 9 - Port output data (y = 0..15)

pub fn odr8(&self) -> ODR8_R[src]

Bit 8 - Port output data (y = 0..15)

pub fn odr7(&self) -> ODR7_R[src]

Bit 7 - Port output data (y = 0..15)

pub fn odr6(&self) -> ODR6_R[src]

Bit 6 - Port output data (y = 0..15)

pub fn odr5(&self) -> ODR5_R[src]

Bit 5 - Port output data (y = 0..15)

pub fn odr4(&self) -> ODR4_R[src]

Bit 4 - Port output data (y = 0..15)

pub fn odr3(&self) -> ODR3_R[src]

Bit 3 - Port output data (y = 0..15)

pub fn odr2(&self) -> ODR2_R[src]

Bit 2 - Port output data (y = 0..15)

pub fn odr1(&self) -> ODR1_R[src]

Bit 1 - Port output data (y = 0..15)

pub fn odr0(&self) -> ODR0_R[src]

Bit 0 - Port output data (y = 0..15)

impl R<u8, AFRL7_A>[src]

pub fn variant(&self) -> AFRL7_A[src]

Get enumerated values variant

pub fn is_af0(&self) -> bool[src]

Checks if the value of the field is AF0

pub fn is_af1(&self) -> bool[src]

Checks if the value of the field is AF1

pub fn is_af2(&self) -> bool[src]

Checks if the value of the field is AF2

pub fn is_af3(&self) -> bool[src]

Checks if the value of the field is AF3

pub fn is_af4(&self) -> bool[src]

Checks if the value of the field is AF4

pub fn is_af5(&self) -> bool[src]

Checks if the value of the field is AF5

pub fn is_af6(&self) -> bool[src]

Checks if the value of the field is AF6

pub fn is_af7(&self) -> bool[src]

Checks if the value of the field is AF7

pub fn is_af8(&self) -> bool[src]

Checks if the value of the field is AF8

pub fn is_af9(&self) -> bool[src]

Checks if the value of the field is AF9

pub fn is_af10(&self) -> bool[src]

Checks if the value of the field is AF10

pub fn is_af11(&self) -> bool[src]

Checks if the value of the field is AF11

pub fn is_af12(&self) -> bool[src]

Checks if the value of the field is AF12

pub fn is_af13(&self) -> bool[src]

Checks if the value of the field is AF13

pub fn is_af14(&self) -> bool[src]

Checks if the value of the field is AF14

pub fn is_af15(&self) -> bool[src]

Checks if the value of the field is AF15

impl R<u32, Reg<u32, _AFRL>>[src]

pub fn afrl7(&self) -> AFRL7_R[src]

Bits 28:31 - Alternate function selection for port x bit y (y = 0..7)

pub fn afrl6(&self) -> AFRL6_R[src]

Bits 24:27 - Alternate function selection for port x bit y (y = 0..7)

pub fn afrl5(&self) -> AFRL5_R[src]

Bits 20:23 - Alternate function selection for port x bit y (y = 0..7)

pub fn afrl4(&self) -> AFRL4_R[src]

Bits 16:19 - Alternate function selection for port x bit y (y = 0..7)

pub fn afrl3(&self) -> AFRL3_R[src]

Bits 12:15 - Alternate function selection for port x bit y (y = 0..7)

pub fn afrl2(&self) -> AFRL2_R[src]

Bits 8:11 - Alternate function selection for port x bit y (y = 0..7)

pub fn afrl1(&self) -> AFRL1_R[src]

Bits 4:7 - Alternate function selection for port x bit y (y = 0..7)

pub fn afrl0(&self) -> AFRL0_R[src]

Bits 0:3 - Alternate function selection for port x bit y (y = 0..7)

impl R<u8, AFRH15_A>[src]

pub fn variant(&self) -> AFRH15_A[src]

Get enumerated values variant

pub fn is_af0(&self) -> bool[src]

Checks if the value of the field is AF0

pub fn is_af1(&self) -> bool[src]

Checks if the value of the field is AF1

pub fn is_af2(&self) -> bool[src]

Checks if the value of the field is AF2

pub fn is_af3(&self) -> bool[src]

Checks if the value of the field is AF3

pub fn is_af4(&self) -> bool[src]

Checks if the value of the field is AF4

pub fn is_af5(&self) -> bool[src]

Checks if the value of the field is AF5

pub fn is_af6(&self) -> bool[src]

Checks if the value of the field is AF6

pub fn is_af7(&self) -> bool[src]

Checks if the value of the field is AF7

pub fn is_af8(&self) -> bool[src]

Checks if the value of the field is AF8

pub fn is_af9(&self) -> bool[src]

Checks if the value of the field is AF9

pub fn is_af10(&self) -> bool[src]

Checks if the value of the field is AF10

pub fn is_af11(&self) -> bool[src]

Checks if the value of the field is AF11

pub fn is_af12(&self) -> bool[src]

Checks if the value of the field is AF12

pub fn is_af13(&self) -> bool[src]

Checks if the value of the field is AF13

pub fn is_af14(&self) -> bool[src]

Checks if the value of the field is AF14

pub fn is_af15(&self) -> bool[src]

Checks if the value of the field is AF15

impl R<u32, Reg<u32, _AFRH>>[src]

pub fn afrh15(&self) -> AFRH15_R[src]

Bits 28:31 - Alternate function selection for port x bit y (y = 8..15)

pub fn afrh14(&self) -> AFRH14_R[src]

Bits 24:27 - Alternate function selection for port x bit y (y = 8..15)

pub fn afrh13(&self) -> AFRH13_R[src]

Bits 20:23 - Alternate function selection for port x bit y (y = 8..15)

pub fn afrh12(&self) -> AFRH12_R[src]

Bits 16:19 - Alternate function selection for port x bit y (y = 8..15)

pub fn afrh11(&self) -> AFRH11_R[src]

Bits 12:15 - Alternate function selection for port x bit y (y = 8..15)

pub fn afrh10(&self) -> AFRH10_R[src]

Bits 8:11 - Alternate function selection for port x bit y (y = 8..15)

pub fn afrh9(&self) -> AFRH9_R[src]

Bits 4:7 - Alternate function selection for port x bit y (y = 8..15)

pub fn afrh8(&self) -> AFRH8_R[src]

Bits 0:3 - Alternate function selection for port x bit y (y = 8..15)

impl R<u32, Reg<u32, _CR>>[src]

pub fn ctph(&self) -> CTPH_R[src]

Bits 28:31 - Charge transfer pulse high

pub fn ctpl(&self) -> CTPL_R[src]

Bits 24:27 - Charge transfer pulse low

pub fn ssd(&self) -> SSD_R[src]

Bits 17:23 - Spread spectrum deviation

pub fn sse(&self) -> SSE_R[src]

Bit 16 - Spread spectrum enable

pub fn sspsc(&self) -> SSPSC_R[src]

Bit 15 - Spread spectrum prescaler

pub fn pgpsc(&self) -> PGPSC_R[src]

Bits 12:14 - pulse generator prescaler

pub fn mcv(&self) -> MCV_R[src]

Bits 5:7 - Max count value

pub fn iodef(&self) -> IODEF_R[src]

Bit 4 - I/O Default mode

pub fn syncpol(&self) -> SYNCPOL_R[src]

Bit 3 - Synchronization pin polarity

pub fn am(&self) -> AM_R[src]

Bit 2 - Acquisition mode

pub fn start(&self) -> START_R[src]

Bit 1 - Start a new acquisition

pub fn tsce(&self) -> TSCE_R[src]

Bit 0 - Touch sensing controller enable

impl R<u32, Reg<u32, _IER>>[src]

pub fn mceie(&self) -> MCEIE_R[src]

Bit 1 - Max count error interrupt enable

pub fn eoaie(&self) -> EOAIE_R[src]

Bit 0 - End of acquisition interrupt enable

impl R<u32, Reg<u32, _ICR>>[src]

pub fn mceic(&self) -> MCEIC_R[src]

Bit 1 - Max count error interrupt clear

pub fn eoaic(&self) -> EOAIC_R[src]

Bit 0 - End of acquisition interrupt clear

impl R<u32, Reg<u32, _ISR>>[src]

pub fn mcef(&self) -> MCEF_R[src]

Bit 1 - Max count error flag

pub fn eoaf(&self) -> EOAF_R[src]

Bit 0 - End of acquisition flag

impl R<u32, Reg<u32, _IOHCR>>[src]

pub fn g1_io1(&self) -> G1_IO1_R[src]

Bit 0 - G1_IO1 Schmitt trigger hysteresis mode

pub fn g1_io2(&self) -> G1_IO2_R[src]

Bit 1 - G1_IO2 Schmitt trigger hysteresis mode

pub fn g1_io3(&self) -> G1_IO3_R[src]

Bit 2 - G1_IO3 Schmitt trigger hysteresis mode

pub fn g1_io4(&self) -> G1_IO4_R[src]

Bit 3 - G1_IO4 Schmitt trigger hysteresis mode

pub fn g2_io1(&self) -> G2_IO1_R[src]

Bit 4 - G2_IO1 Schmitt trigger hysteresis mode

pub fn g2_io2(&self) -> G2_IO2_R[src]

Bit 5 - G2_IO2 Schmitt trigger hysteresis mode

pub fn g2_io3(&self) -> G2_IO3_R[src]

Bit 6 - G2_IO3 Schmitt trigger hysteresis mode

pub fn g2_io4(&self) -> G2_IO4_R[src]

Bit 7 - G2_IO4 Schmitt trigger hysteresis mode

pub fn g3_io1(&self) -> G3_IO1_R[src]

Bit 8 - G3_IO1 Schmitt trigger hysteresis mode

pub fn g3_io2(&self) -> G3_IO2_R[src]

Bit 9 - G3_IO2 Schmitt trigger hysteresis mode

pub fn g3_io3(&self) -> G3_IO3_R[src]

Bit 10 - G3_IO3 Schmitt trigger hysteresis mode

pub fn g3_io4(&self) -> G3_IO4_R[src]

Bit 11 - G3_IO4 Schmitt trigger hysteresis mode

pub fn g4_io1(&self) -> G4_IO1_R[src]

Bit 12 - G4_IO1 Schmitt trigger hysteresis mode

pub fn g4_io2(&self) -> G4_IO2_R[src]

Bit 13 - G4_IO2 Schmitt trigger hysteresis mode

pub fn g4_io3(&self) -> G4_IO3_R[src]

Bit 14 - G4_IO3 Schmitt trigger hysteresis mode

pub fn g4_io4(&self) -> G4_IO4_R[src]

Bit 15 - G4_IO4 Schmitt trigger hysteresis mode

pub fn g5_io1(&self) -> G5_IO1_R[src]

Bit 16 - G5_IO1 Schmitt trigger hysteresis mode

pub fn g5_io2(&self) -> G5_IO2_R[src]

Bit 17 - G5_IO2 Schmitt trigger hysteresis mode

pub fn g5_io3(&self) -> G5_IO3_R[src]

Bit 18 - G5_IO3 Schmitt trigger hysteresis mode

pub fn g5_io4(&self) -> G5_IO4_R[src]

Bit 19 - G5_IO4 Schmitt trigger hysteresis mode

pub fn g6_io1(&self) -> G6_IO1_R[src]

Bit 20 - G6_IO1 Schmitt trigger hysteresis mode

pub fn g6_io2(&self) -> G6_IO2_R[src]

Bit 21 - G6_IO2 Schmitt trigger hysteresis mode

pub fn g6_io3(&self) -> G6_IO3_R[src]

Bit 22 - G6_IO3 Schmitt trigger hysteresis mode

pub fn g6_io4(&self) -> G6_IO4_R[src]

Bit 23 - G6_IO4 Schmitt trigger hysteresis mode

pub fn g7_io1(&self) -> G7_IO1_R[src]

Bit 24 - G7_IO1 Schmitt trigger hysteresis mode

pub fn g7_io2(&self) -> G7_IO2_R[src]

Bit 25 - G7_IO2 Schmitt trigger hysteresis mode

pub fn g7_io3(&self) -> G7_IO3_R[src]

Bit 26 - G7_IO3 Schmitt trigger hysteresis mode

pub fn g7_io4(&self) -> G7_IO4_R[src]

Bit 27 - G7_IO4 Schmitt trigger hysteresis mode

pub fn g8_io1(&self) -> G8_IO1_R[src]

Bit 28 - G8_IO1 Schmitt trigger hysteresis mode

pub fn g8_io2(&self) -> G8_IO2_R[src]

Bit 29 - G8_IO2 Schmitt trigger hysteresis mode

pub fn g8_io3(&self) -> G8_IO3_R[src]

Bit 30 - G8_IO3 Schmitt trigger hysteresis mode

pub fn g8_io4(&self) -> G8_IO4_R[src]

Bit 31 - G8_IO4 Schmitt trigger hysteresis mode

impl R<u32, Reg<u32, _IOASCR>>[src]

pub fn g1_io1(&self) -> G1_IO1_R[src]

Bit 0 - G1_IO1 analog switch enable

pub fn g1_io2(&self) -> G1_IO2_R[src]

Bit 1 - G1_IO2 analog switch enable

pub fn g1_io3(&self) -> G1_IO3_R[src]

Bit 2 - G1_IO3 analog switch enable

pub fn g1_io4(&self) -> G1_IO4_R[src]

Bit 3 - G1_IO4 analog switch enable

pub fn g2_io1(&self) -> G2_IO1_R[src]

Bit 4 - G2_IO1 analog switch enable

pub fn g2_io2(&self) -> G2_IO2_R[src]

Bit 5 - G2_IO2 analog switch enable

pub fn g2_io3(&self) -> G2_IO3_R[src]

Bit 6 - G2_IO3 analog switch enable

pub fn g2_io4(&self) -> G2_IO4_R[src]

Bit 7 - G2_IO4 analog switch enable

pub fn g3_io1(&self) -> G3_IO1_R[src]

Bit 8 - G3_IO1 analog switch enable

pub fn g3_io2(&self) -> G3_IO2_R[src]

Bit 9 - G3_IO2 analog switch enable

pub fn g3_io3(&self) -> G3_IO3_R[src]

Bit 10 - G3_IO3 analog switch enable

pub fn g3_io4(&self) -> G3_IO4_R[src]

Bit 11 - G3_IO4 analog switch enable

pub fn g4_io1(&self) -> G4_IO1_R[src]

Bit 12 - G4_IO1 analog switch enable

pub fn g4_io2(&self) -> G4_IO2_R[src]

Bit 13 - G4_IO2 analog switch enable

pub fn g4_io3(&self) -> G4_IO3_R[src]

Bit 14 - G4_IO3 analog switch enable

pub fn g4_io4(&self) -> G4_IO4_R[src]

Bit 15 - G4_IO4 analog switch enable

pub fn g5_io1(&self) -> G5_IO1_R[src]

Bit 16 - G5_IO1 analog switch enable

pub fn g5_io2(&self) -> G5_IO2_R[src]

Bit 17 - G5_IO2 analog switch enable

pub fn g5_io3(&self) -> G5_IO3_R[src]

Bit 18 - G5_IO3 analog switch enable

pub fn g5_io4(&self) -> G5_IO4_R[src]

Bit 19 - G5_IO4 analog switch enable

pub fn g6_io1(&self) -> G6_IO1_R[src]

Bit 20 - G6_IO1 analog switch enable

pub fn g6_io2(&self) -> G6_IO2_R[src]

Bit 21 - G6_IO2 analog switch enable

pub fn g6_io3(&self) -> G6_IO3_R[src]

Bit 22 - G6_IO3 analog switch enable

pub fn g6_io4(&self) -> G6_IO4_R[src]

Bit 23 - G6_IO4 analog switch enable

pub fn g7_io1(&self) -> G7_IO1_R[src]

Bit 24 - G7_IO1 analog switch enable

pub fn g7_io2(&self) -> G7_IO2_R[src]

Bit 25 - G7_IO2 analog switch enable

pub fn g7_io3(&self) -> G7_IO3_R[src]

Bit 26 - G7_IO3 analog switch enable

pub fn g7_io4(&self) -> G7_IO4_R[src]

Bit 27 - G7_IO4 analog switch enable

pub fn g8_io1(&self) -> G8_IO1_R[src]

Bit 28 - G8_IO1 analog switch enable

pub fn g8_io2(&self) -> G8_IO2_R[src]

Bit 29 - G8_IO2 analog switch enable

pub fn g8_io3(&self) -> G8_IO3_R[src]

Bit 30 - G8_IO3 analog switch enable

pub fn g8_io4(&self) -> G8_IO4_R[src]

Bit 31 - G8_IO4 analog switch enable

impl R<u32, Reg<u32, _IOSCR>>[src]

pub fn g1_io1(&self) -> G1_IO1_R[src]

Bit 0 - G1_IO1 sampling mode

pub fn g1_io2(&self) -> G1_IO2_R[src]

Bit 1 - G1_IO2 sampling mode

pub fn g1_io3(&self) -> G1_IO3_R[src]

Bit 2 - G1_IO3 sampling mode

pub fn g1_io4(&self) -> G1_IO4_R[src]

Bit 3 - G1_IO4 sampling mode

pub fn g2_io1(&self) -> G2_IO1_R[src]

Bit 4 - G2_IO1 sampling mode

pub fn g2_io2(&self) -> G2_IO2_R[src]

Bit 5 - G2_IO2 sampling mode

pub fn g2_io3(&self) -> G2_IO3_R[src]

Bit 6 - G2_IO3 sampling mode

pub fn g2_io4(&self) -> G2_IO4_R[src]

Bit 7 - G2_IO4 sampling mode

pub fn g3_io1(&self) -> G3_IO1_R[src]

Bit 8 - G3_IO1 sampling mode

pub fn g3_io2(&self) -> G3_IO2_R[src]

Bit 9 - G3_IO2 sampling mode

pub fn g3_io3(&self) -> G3_IO3_R[src]

Bit 10 - G3_IO3 sampling mode

pub fn g3_io4(&self) -> G3_IO4_R[src]

Bit 11 - G3_IO4 sampling mode

pub fn g4_io1(&self) -> G4_IO1_R[src]

Bit 12 - G4_IO1 sampling mode

pub fn g4_io2(&self) -> G4_IO2_R[src]

Bit 13 - G4_IO2 sampling mode

pub fn g4_io3(&self) -> G4_IO3_R[src]

Bit 14 - G4_IO3 sampling mode

pub fn g4_io4(&self) -> G4_IO4_R[src]

Bit 15 - G4_IO4 sampling mode

pub fn g5_io1(&self) -> G5_IO1_R[src]

Bit 16 - G5_IO1 sampling mode

pub fn g5_io2(&self) -> G5_IO2_R[src]

Bit 17 - G5_IO2 sampling mode

pub fn g5_io3(&self) -> G5_IO3_R[src]

Bit 18 - G5_IO3 sampling mode

pub fn g5_io4(&self) -> G5_IO4_R[src]

Bit 19 - G5_IO4 sampling mode

pub fn g6_io1(&self) -> G6_IO1_R[src]

Bit 20 - G6_IO1 sampling mode

pub fn g6_io2(&self) -> G6_IO2_R[src]

Bit 21 - G6_IO2 sampling mode

pub fn g6_io3(&self) -> G6_IO3_R[src]

Bit 22 - G6_IO3 sampling mode

pub fn g6_io4(&self) -> G6_IO4_R[src]

Bit 23 - G6_IO4 sampling mode

pub fn g7_io1(&self) -> G7_IO1_R[src]

Bit 24 - G7_IO1 sampling mode

pub fn g7_io2(&self) -> G7_IO2_R[src]

Bit 25 - G7_IO2 sampling mode

pub fn g7_io3(&self) -> G7_IO3_R[src]

Bit 26 - G7_IO3 sampling mode

pub fn g7_io4(&self) -> G7_IO4_R[src]

Bit 27 - G7_IO4 sampling mode

pub fn g8_io1(&self) -> G8_IO1_R[src]

Bit 28 - G8_IO1 sampling mode

pub fn g8_io2(&self) -> G8_IO2_R[src]

Bit 29 - G8_IO2 sampling mode

pub fn g8_io3(&self) -> G8_IO3_R[src]

Bit 30 - G8_IO3 sampling mode

pub fn g8_io4(&self) -> G8_IO4_R[src]

Bit 31 - G8_IO4 sampling mode

impl R<u32, Reg<u32, _IOCCR>>[src]

pub fn g1_io1(&self) -> G1_IO1_R[src]

Bit 0 - G1_IO1 channel mode

pub fn g1_io2(&self) -> G1_IO2_R[src]

Bit 1 - G1_IO2 channel mode

pub fn g1_io3(&self) -> G1_IO3_R[src]

Bit 2 - G1_IO3 channel mode

pub fn g1_io4(&self) -> G1_IO4_R[src]

Bit 3 - G1_IO4 channel mode

pub fn g2_io1(&self) -> G2_IO1_R[src]

Bit 4 - G2_IO1 channel mode

pub fn g2_io2(&self) -> G2_IO2_R[src]

Bit 5 - G2_IO2 channel mode

pub fn g2_io3(&self) -> G2_IO3_R[src]

Bit 6 - G2_IO3 channel mode

pub fn g2_io4(&self) -> G2_IO4_R[src]

Bit 7 - G2_IO4 channel mode

pub fn g3_io1(&self) -> G3_IO1_R[src]

Bit 8 - G3_IO1 channel mode

pub fn g3_io2(&self) -> G3_IO2_R[src]

Bit 9 - G3_IO2 channel mode

pub fn g3_io3(&self) -> G3_IO3_R[src]

Bit 10 - G3_IO3 channel mode

pub fn g3_io4(&self) -> G3_IO4_R[src]

Bit 11 - G3_IO4 channel mode

pub fn g4_io1(&self) -> G4_IO1_R[src]

Bit 12 - G4_IO1 channel mode

pub fn g4_io2(&self) -> G4_IO2_R[src]

Bit 13 - G4_IO2 channel mode

pub fn g4_io3(&self) -> G4_IO3_R[src]

Bit 14 - G4_IO3 channel mode

pub fn g4_io4(&self) -> G4_IO4_R[src]

Bit 15 - G4_IO4 channel mode

pub fn g5_io1(&self) -> G5_IO1_R[src]

Bit 16 - G5_IO1 channel mode

pub fn g5_io2(&self) -> G5_IO2_R[src]

Bit 17 - G5_IO2 channel mode

pub fn g5_io3(&self) -> G5_IO3_R[src]

Bit 18 - G5_IO3 channel mode

pub fn g5_io4(&self) -> G5_IO4_R[src]

Bit 19 - G5_IO4 channel mode

pub fn g6_io1(&self) -> G6_IO1_R[src]

Bit 20 - G6_IO1 channel mode

pub fn g6_io2(&self) -> G6_IO2_R[src]

Bit 21 - G6_IO2 channel mode

pub fn g6_io3(&self) -> G6_IO3_R[src]

Bit 22 - G6_IO3 channel mode

pub fn g6_io4(&self) -> G6_IO4_R[src]

Bit 23 - G6_IO4 channel mode

pub fn g7_io1(&self) -> G7_IO1_R[src]

Bit 24 - G7_IO1 channel mode

pub fn g7_io2(&self) -> G7_IO2_R[src]

Bit 25 - G7_IO2 channel mode

pub fn g7_io3(&self) -> G7_IO3_R[src]

Bit 26 - G7_IO3 channel mode

pub fn g7_io4(&self) -> G7_IO4_R[src]

Bit 27 - G7_IO4 channel mode

pub fn g8_io1(&self) -> G8_IO1_R[src]

Bit 28 - G8_IO1 channel mode

pub fn g8_io2(&self) -> G8_IO2_R[src]

Bit 29 - G8_IO2 channel mode

pub fn g8_io3(&self) -> G8_IO3_R[src]

Bit 30 - G8_IO3 channel mode

pub fn g8_io4(&self) -> G8_IO4_R[src]

Bit 31 - G8_IO4 channel mode

impl R<u32, Reg<u32, _IOGCSR>>[src]

pub fn g8s(&self) -> G8S_R[src]

Bit 23 - Analog I/O group x status

pub fn g7s(&self) -> G7S_R[src]

Bit 22 - Analog I/O group x status

pub fn g6s(&self) -> G6S_R[src]

Bit 21 - Analog I/O group x status

pub fn g5s(&self) -> G5S_R[src]

Bit 20 - Analog I/O group x status

pub fn g4s(&self) -> G4S_R[src]

Bit 19 - Analog I/O group x status

pub fn g3s(&self) -> G3S_R[src]

Bit 18 - Analog I/O group x status

pub fn g2s(&self) -> G2S_R[src]

Bit 17 - Analog I/O group x status

pub fn g1s(&self) -> G1S_R[src]

Bit 16 - Analog I/O group x status

pub fn g8e(&self) -> G8E_R[src]

Bit 7 - Analog I/O group x enable

pub fn g7e(&self) -> G7E_R[src]

Bit 6 - Analog I/O group x enable

pub fn g6e(&self) -> G6E_R[src]

Bit 5 - Analog I/O group x enable

pub fn g5e(&self) -> G5E_R[src]

Bit 4 - Analog I/O group x enable

pub fn g4e(&self) -> G4E_R[src]

Bit 3 - Analog I/O group x enable

pub fn g3e(&self) -> G3E_R[src]

Bit 2 - Analog I/O group x enable

pub fn g2e(&self) -> G2E_R[src]

Bit 1 - Analog I/O group x enable

pub fn g1e(&self) -> G1E_R[src]

Bit 0 - Analog I/O group x enable

impl R<u32, Reg<u32, _IOGCR>>[src]

pub fn cnt(&self) -> CNT_R[src]

Bits 0:13 - Counter value

impl R<u32, Reg<u32, _DR>>[src]

pub fn dr(&self) -> DR_R[src]

Bits 0:31 - Data register bits

impl R<u32, Reg<u32, _IDR>>[src]

pub fn idr(&self) -> IDR_R[src]

Bits 0:7 - General-purpose 8-bit data register bits

impl R<bool, RESET_A>[src]

pub fn variant(&self) -> Variant<bool, RESET_A>[src]

Get enumerated values variant

pub fn is_reset(&self) -> bool[src]

Checks if the value of the field is RESET

impl R<u32, Reg<u32, _CR>>[src]

pub fn reset(&self) -> RESET_R[src]

Bit 0 - reset bit

pub fn rev_in(&self) -> REV_IN_R[src]

Bits 5:6 - Reverse input data

pub fn rev_out(&self) -> REV_OUT_R[src]

Bit 7 - Reverse output data

pub fn polysize(&self) -> POLYSIZE_R[src]

Bits 3:4 - Polynomial size

impl R<u32, Reg<u32, _INIT>>[src]

pub fn init(&self) -> INIT_R[src]

Bits 0:31 - Programmable initial CRC value

impl R<u32, Reg<u32, _POL>>[src]

pub fn pol(&self) -> POL_R[src]

Bits 0:31 - Programmable polynomial

impl R<u32, Reg<u32, _ACR>>[src]

pub fn latency(&self) -> LATENCY_R[src]

Bits 0:2 - LATENCY

pub fn prftbe(&self) -> PRFTBE_R[src]

Bit 4 - PRFTBE

pub fn prftbs(&self) -> PRFTBS_R[src]

Bit 5 - PRFTBS

impl R<u32, Reg<u32, _SR>>[src]

pub fn eop(&self) -> EOP_R[src]

Bit 5 - End of operation

pub fn wrprt(&self) -> WRPRT_R[src]

Bit 4 - Write protection error

pub fn pgerr(&self) -> PGERR_R[src]

Bit 2 - Programming error

pub fn bsy(&self) -> BSY_R[src]

Bit 0 - Busy

impl R<u32, Reg<u32, _CR>>[src]

pub fn force_optload(&self) -> FORCE_OPTLOAD_R[src]

Bit 13 - Force option byte loading

pub fn eopie(&self) -> EOPIE_R[src]

Bit 12 - End of operation interrupt enable

pub fn errie(&self) -> ERRIE_R[src]

Bit 10 - Error interrupt enable

pub fn optwre(&self) -> OPTWRE_R[src]

Bit 9 - Option bytes write enable

pub fn lock(&self) -> LOCK_R[src]

Bit 7 - Lock

pub fn strt(&self) -> STRT_R[src]

Bit 6 - Start

pub fn opter(&self) -> OPTER_R[src]

Bit 5 - Option byte erase

pub fn optpg(&self) -> OPTPG_R[src]

Bit 4 - Option byte programming

pub fn mer(&self) -> MER_R[src]

Bit 2 - Mass erase

pub fn per(&self) -> PER_R[src]

Bit 1 - Page erase

pub fn pg(&self) -> PG_R[src]

Bit 0 - Programming

impl R<u32, Reg<u32, _OBR>>[src]

pub fn opterr(&self) -> OPTERR_R[src]

Bit 0 - Option byte error

pub fn level1_prot(&self) -> LEVEL1_PROT_R[src]

Bit 1 - Level 1 protection status

pub fn level2_prot(&self) -> LEVEL2_PROT_R[src]

Bit 2 - Level 2 protection status

pub fn wdg_sw(&self) -> WDG_SW_R[src]

Bit 8 - WDG_SW

pub fn n_rst_stop(&self) -> NRST_STOP_R[src]

Bit 9 - nRST_STOP

pub fn n_rst_stdby(&self) -> NRST_STDBY_R[src]

Bit 10 - nRST_STDBY

pub fn boot1(&self) -> BOOT1_R[src]

Bit 12 - BOOT1

pub fn vdda_monitor(&self) -> VDDA_MONITOR_R[src]

Bit 13 - VDDA_MONITOR

pub fn sram_parity_check(&self) -> SRAM_PARITY_CHECK_R[src]

Bit 14 - SRAM_PARITY_CHECK

pub fn sdadc12_vdd_monitor(&self) -> SDADC12_VDD_MONITOR_R[src]

Bit 15 - SDADC12_VDD_MONITOR

pub fn data0(&self) -> DATA0_R[src]

Bits 16:23 - Data0

pub fn data1(&self) -> DATA1_R[src]

Bits 24:31 - Data1

impl R<u32, Reg<u32, _WRPR>>[src]

pub fn wrp(&self) -> WRP_R[src]

Bits 0:31 - Write protect

impl R<bool, HSION_A>[src]

pub fn variant(&self) -> HSION_A[src]

Get enumerated values variant

pub fn is_off(&self) -> bool[src]

Checks if the value of the field is OFF

pub fn is_on(&self) -> bool[src]

Checks if the value of the field is ON

impl R<bool, HSIRDY_A>[src]

pub fn variant(&self) -> HSIRDY_A[src]

Get enumerated values variant

pub fn is_not_ready(&self) -> bool[src]

Checks if the value of the field is NOTREADY

pub fn is_ready(&self) -> bool[src]

Checks if the value of the field is READY

impl R<bool, HSEBYP_A>[src]

pub fn variant(&self) -> HSEBYP_A[src]

Get enumerated values variant

pub fn is_not_bypassed(&self) -> bool[src]

Checks if the value of the field is NOTBYPASSED

pub fn is_bypassed(&self) -> bool[src]

Checks if the value of the field is BYPASSED

impl R<bool, CSSON_A>[src]

pub fn variant(&self) -> CSSON_A[src]

Get enumerated values variant

pub fn is_off(&self) -> bool[src]

Checks if the value of the field is OFF

pub fn is_on(&self) -> bool[src]

Checks if the value of the field is ON

impl R<u32, Reg<u32, _CR>>[src]

pub fn hsion(&self) -> HSION_R[src]

Bit 0 - Internal High Speed clock enable

pub fn hsirdy(&self) -> HSIRDY_R[src]

Bit 1 - Internal High Speed clock ready flag

pub fn hsitrim(&self) -> HSITRIM_R[src]

Bits 3:7 - Internal High Speed clock trimming

pub fn hsical(&self) -> HSICAL_R[src]

Bits 8:15 - Internal High Speed clock Calibration

pub fn hseon(&self) -> HSEON_R[src]

Bit 16 - External High Speed clock enable

pub fn hserdy(&self) -> HSERDY_R[src]

Bit 17 - External High Speed clock ready flag

pub fn hsebyp(&self) -> HSEBYP_R[src]

Bit 18 - External High Speed clock Bypass

pub fn csson(&self) -> CSSON_R[src]

Bit 19 - Clock Security System enable

pub fn pllon(&self) -> PLLON_R[src]

Bit 24 - PLL enable

pub fn pllrdy(&self) -> PLLRDY_R[src]

Bit 25 - PLL clock ready flag

impl R<u8, SW_A>[src]

pub fn variant(&self) -> Variant<u8, SW_A>[src]

Get enumerated values variant

pub fn is_hsi(&self) -> bool[src]

Checks if the value of the field is HSI

pub fn is_hse(&self) -> bool[src]

Checks if the value of the field is HSE

pub fn is_pll(&self) -> bool[src]

Checks if the value of the field is PLL

impl R<u8, SWS_A>[src]

pub fn variant(&self) -> Variant<u8, SWS_A>[src]

Get enumerated values variant

pub fn is_hsi(&self) -> bool[src]

Checks if the value of the field is HSI

pub fn is_hse(&self) -> bool[src]

Checks if the value of the field is HSE

pub fn is_pll(&self) -> bool[src]

Checks if the value of the field is PLL

impl R<u8, HPRE_A>[src]

pub fn variant(&self) -> Variant<u8, HPRE_A>[src]

Get enumerated values variant

pub fn is_div1(&self) -> bool[src]

Checks if the value of the field is DIV1

pub fn is_div2(&self) -> bool[src]

Checks if the value of the field is DIV2

pub fn is_div4(&self) -> bool[src]

Checks if the value of the field is DIV4

pub fn is_div8(&self) -> bool[src]

Checks if the value of the field is DIV8

pub fn is_div16(&self) -> bool[src]

Checks if the value of the field is DIV16

pub fn is_div64(&self) -> bool[src]

Checks if the value of the field is DIV64

pub fn is_div128(&self) -> bool[src]

Checks if the value of the field is DIV128

pub fn is_div256(&self) -> bool[src]

Checks if the value of the field is DIV256

pub fn is_div512(&self) -> bool[src]

Checks if the value of the field is DIV512

impl R<u8, PPRE1_A>[src]

pub fn variant(&self) -> Variant<u8, PPRE1_A>[src]

Get enumerated values variant

pub fn is_div1(&self) -> bool[src]

Checks if the value of the field is DIV1

pub fn is_div2(&self) -> bool[src]

Checks if the value of the field is DIV2

pub fn is_div4(&self) -> bool[src]

Checks if the value of the field is DIV4

pub fn is_div8(&self) -> bool[src]

Checks if the value of the field is DIV8

pub fn is_div16(&self) -> bool[src]

Checks if the value of the field is DIV16

impl R<u8, ADCPRE_A>[src]

pub fn variant(&self) -> ADCPRE_A[src]

Get enumerated values variant

pub fn is_div2(&self) -> bool[src]

Checks if the value of the field is DIV2

pub fn is_div4(&self) -> bool[src]

Checks if the value of the field is DIV4

pub fn is_div6(&self) -> bool[src]

Checks if the value of the field is DIV6

pub fn is_div8(&self) -> bool[src]

Checks if the value of the field is DIV8

impl R<bool, PLLSRC_A>[src]

pub fn variant(&self) -> PLLSRC_A[src]

Get enumerated values variant

pub fn is_hsi_div2(&self) -> bool[src]

Checks if the value of the field is HSI_DIV2

pub fn is_hse_div_prediv(&self) -> bool[src]

Checks if the value of the field is HSE_DIV_PREDIV

impl R<bool, PLLXTPRE_A>[src]

pub fn variant(&self) -> PLLXTPRE_A[src]

Get enumerated values variant

pub fn is_div1(&self) -> bool[src]

Checks if the value of the field is DIV1

pub fn is_div2(&self) -> bool[src]

Checks if the value of the field is DIV2

impl R<u8, PLLMUL_A>[src]

pub fn variant(&self) -> PLLMUL_A[src]

Get enumerated values variant

pub fn is_mul2(&self) -> bool[src]

Checks if the value of the field is MUL2

pub fn is_mul3(&self) -> bool[src]

Checks if the value of the field is MUL3

pub fn is_mul4(&self) -> bool[src]

Checks if the value of the field is MUL4

pub fn is_mul5(&self) -> bool[src]

Checks if the value of the field is MUL5

pub fn is_mul6(&self) -> bool[src]

Checks if the value of the field is MUL6

pub fn is_mul7(&self) -> bool[src]

Checks if the value of the field is MUL7

pub fn is_mul8(&self) -> bool[src]

Checks if the value of the field is MUL8

pub fn is_mul9(&self) -> bool[src]

Checks if the value of the field is MUL9

pub fn is_mul10(&self) -> bool[src]

Checks if the value of the field is MUL10

pub fn is_mul11(&self) -> bool[src]

Checks if the value of the field is MUL11

pub fn is_mul12(&self) -> bool[src]

Checks if the value of the field is MUL12

pub fn is_mul13(&self) -> bool[src]

Checks if the value of the field is MUL13

pub fn is_mul14(&self) -> bool[src]

Checks if the value of the field is MUL14

pub fn is_mul15(&self) -> bool[src]

Checks if the value of the field is MUL15

pub fn is_mul16(&self) -> bool[src]

Checks if the value of the field is MUL16

pub fn is_mul16x(&self) -> bool[src]

Checks if the value of the field is MUL16X

impl R<bool, USBPRE_A>[src]

pub fn variant(&self) -> USBPRE_A[src]

Get enumerated values variant

pub fn is_div1_5(&self) -> bool[src]

Checks if the value of the field is DIV1_5

pub fn is_div1(&self) -> bool[src]

Checks if the value of the field is DIV1

impl R<u8, MCO_A>[src]

pub fn variant(&self) -> Variant<u8, MCO_A>[src]

Get enumerated values variant

pub fn is_no_mco(&self) -> bool[src]

Checks if the value of the field is NOMCO

pub fn is_lsi(&self) -> bool[src]

Checks if the value of the field is LSI

pub fn is_lse(&self) -> bool[src]

Checks if the value of the field is LSE

pub fn is_sysclk(&self) -> bool[src]

Checks if the value of the field is SYSCLK

pub fn is_hsi(&self) -> bool[src]

Checks if the value of the field is HSI

pub fn is_hse(&self) -> bool[src]

Checks if the value of the field is HSE

pub fn is_pll(&self) -> bool[src]

Checks if the value of the field is PLL

impl R<u8, SDPRE_A>[src]

pub fn variant(&self) -> Variant<u8, SDPRE_A>[src]

Get enumerated values variant

pub fn is_div2(&self) -> bool[src]

Checks if the value of the field is DIV2

pub fn is_div4(&self) -> bool[src]

Checks if the value of the field is DIV4

pub fn is_div6(&self) -> bool[src]

Checks if the value of the field is DIV6

pub fn is_div8(&self) -> bool[src]

Checks if the value of the field is DIV8

pub fn is_div10(&self) -> bool[src]

Checks if the value of the field is DIV10

pub fn is_div12(&self) -> bool[src]

Checks if the value of the field is DIV12

pub fn is_div14(&self) -> bool[src]

Checks if the value of the field is DIV14

pub fn is_div16(&self) -> bool[src]

Checks if the value of the field is DIV16

pub fn is_div20(&self) -> bool[src]

Checks if the value of the field is DIV20

pub fn is_div24(&self) -> bool[src]

Checks if the value of the field is DIV24

pub fn is_div28(&self) -> bool[src]

Checks if the value of the field is DIV28

pub fn is_div32(&self) -> bool[src]

Checks if the value of the field is DIV32

pub fn is_div36(&self) -> bool[src]

Checks if the value of the field is DIV36

pub fn is_div40(&self) -> bool[src]

Checks if the value of the field is DIV40

pub fn is_div44(&self) -> bool[src]

Checks if the value of the field is DIV44

pub fn is_div48(&self) -> bool[src]

Checks if the value of the field is DIV48

impl R<u32, Reg<u32, _CFGR>>[src]

pub fn sw(&self) -> SW_R[src]

Bits 0:1 - System clock Switch

pub fn sws(&self) -> SWS_R[src]

Bits 2:3 - System Clock Switch Status

pub fn hpre(&self) -> HPRE_R[src]

Bits 4:7 - AHB prescaler

pub fn ppre1(&self) -> PPRE1_R[src]

Bits 8:10 - APB Low speed prescaler (APB1)

pub fn ppre2(&self) -> PPRE2_R[src]

Bits 11:13 - APB high speed prescaler (APB2)

pub fn adcpre(&self) -> ADCPRE_R[src]

Bits 14:15 - ADC prescaler

pub fn pllsrc(&self) -> PLLSRC_R[src]

Bit 16 - PLL entry clock source

pub fn pllxtpre(&self) -> PLLXTPRE_R[src]

Bit 17 - HSE divider for PLL entry

pub fn pllmul(&self) -> PLLMUL_R[src]

Bits 18:21 - PLL Multiplication Factor

pub fn usbpre(&self) -> USBPRE_R[src]

Bit 22 - USB prescaler

pub fn mco(&self) -> MCO_R[src]

Bits 24:26 - Microcontroller clock output

pub fn sdpre(&self) -> SDPRE_R[src]

Bits 27:31 - SDADC prescaler

impl R<bool, LSIRDYF_A>[src]

pub fn variant(&self) -> LSIRDYF_A[src]

Get enumerated values variant

pub fn is_not_interrupted(&self) -> bool[src]

Checks if the value of the field is NOTINTERRUPTED

pub fn is_interrupted(&self) -> bool[src]

Checks if the value of the field is INTERRUPTED

impl R<bool, CSSF_A>[src]

pub fn variant(&self) -> CSSF_A[src]

Get enumerated values variant

pub fn is_not_interrupted(&self) -> bool[src]

Checks if the value of the field is NOTINTERRUPTED

pub fn is_interrupted(&self) -> bool[src]

Checks if the value of the field is INTERRUPTED

impl R<bool, LSIRDYIE_A>[src]

pub fn variant(&self) -> LSIRDYIE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u32, Reg<u32, _CIR>>[src]

pub fn lsirdyf(&self) -> LSIRDYF_R[src]

Bit 0 - LSI Ready Interrupt flag

pub fn lserdyf(&self) -> LSERDYF_R[src]

Bit 1 - LSE Ready Interrupt flag

pub fn hsirdyf(&self) -> HSIRDYF_R[src]

Bit 2 - HSI Ready Interrupt flag

pub fn hserdyf(&self) -> HSERDYF_R[src]

Bit 3 - HSE Ready Interrupt flag

pub fn pllrdyf(&self) -> PLLRDYF_R[src]

Bit 4 - PLL Ready Interrupt flag

pub fn cssf(&self) -> CSSF_R[src]

Bit 7 - Clock Security System Interrupt flag

pub fn lsirdyie(&self) -> LSIRDYIE_R[src]

Bit 8 - LSI Ready Interrupt Enable

pub fn lserdyie(&self) -> LSERDYIE_R[src]

Bit 9 - LSE Ready Interrupt Enable

pub fn hsirdyie(&self) -> HSIRDYIE_R[src]

Bit 10 - HSI Ready Interrupt Enable

pub fn hserdyie(&self) -> HSERDYIE_R[src]

Bit 11 - HSE Ready Interrupt Enable

pub fn pllrdyie(&self) -> PLLRDYIE_R[src]

Bit 12 - PLL Ready Interrupt Enable

impl R<bool, SYSCFGRST_A>[src]

pub fn variant(&self) -> Variant<bool, SYSCFGRST_A>[src]

Get enumerated values variant

pub fn is_reset(&self) -> bool[src]

Checks if the value of the field is RESET

impl R<u32, Reg<u32, _APB2RSTR>>[src]

pub fn syscfgrst(&self) -> SYSCFGRST_R[src]

Bit 0 - SYSCFG and COMP reset

pub fn adcrst(&self) -> ADCRST_R[src]

Bit 9 - ADC interface reset

pub fn spi1rst(&self) -> SPI1RST_R[src]

Bit 12 - SPI 1 reset

pub fn usart1rst(&self) -> USART1RST_R[src]

Bit 14 - USART1 reset

pub fn tim15rst(&self) -> TIM15RST_R[src]

Bit 16 - TIM15 timer reset

pub fn tim16rst(&self) -> TIM16RST_R[src]

Bit 17 - TIM16 timer reset

pub fn tim17rst(&self) -> TIM17RST_R[src]

Bit 18 - TIM17 timer reset

pub fn tim19rst(&self) -> TIM19RST_R[src]

Bit 19 - TIM19 timer reset

pub fn sdadc1rst(&self) -> SDADC1RST_R[src]

Bit 24 - SDADC1 (Sigma delta ADC 1) reset

pub fn sdadc2rst(&self) -> SDADC2RST_R[src]

Bit 25 - SDADC2 (Sigma delta ADC 2) reset

pub fn sdadc3rst(&self) -> SDADC3RST_R[src]

Bit 26 - SDADC3 (Sigma delta ADC 3) reset

impl R<bool, TIM2RST_A>[src]

pub fn variant(&self) -> Variant<bool, TIM2RST_A>[src]

Get enumerated values variant

pub fn is_reset(&self) -> bool[src]

Checks if the value of the field is RESET

impl R<u32, Reg<u32, _APB1RSTR>>[src]

pub fn tim2rst(&self) -> TIM2RST_R[src]

Bit 0 - Timer 2 reset

pub fn tim3rst(&self) -> TIM3RST_R[src]

Bit 1 - Timer 3 reset

pub fn tim4rst(&self) -> TIM4RST_R[src]

Bit 2 - Timer 14 reset

pub fn tim5rst(&self) -> TIM5RST_R[src]

Bit 3 - Timer 5 reset

pub fn tim6rst(&self) -> TIM6RST_R[src]

Bit 4 - Timer 6 reset

pub fn tim7rst(&self) -> TIM7RST_R[src]

Bit 5 - Timer 7 reset

pub fn tim12rst(&self) -> TIM12RST_R[src]

Bit 6 - Timer 12 reset

pub fn tim13rst(&self) -> TIM13RST_R[src]

Bit 7 - Timer 13 reset

pub fn tim14rst(&self) -> TIM14RST_R[src]

Bit 8 - Timer 14 reset

pub fn tim18rst(&self) -> TIM18RST_R[src]

Bit 9 - Timer 18 reset

pub fn wwdgrst(&self) -> WWDGRST_R[src]

Bit 11 - Window watchdog reset

pub fn spi2rst(&self) -> SPI2RST_R[src]

Bit 14 - SPI2 reset

pub fn spi3rst(&self) -> SPI3RST_R[src]

Bit 15 - SPI3 reset

pub fn usart2rst(&self) -> USART2RST_R[src]

Bit 17 - USART 2 reset

pub fn usart3rst(&self) -> USART3RST_R[src]

Bit 18 - USART3 reset

pub fn i2c1rst(&self) -> I2C1RST_R[src]

Bit 21 - I2C1 reset

pub fn i2c2rst(&self) -> I2C2RST_R[src]

Bit 22 - I2C2 reset

pub fn usbrst(&self) -> USBRST_R[src]

Bit 23 - USB reset

pub fn canrst(&self) -> CANRST_R[src]

Bit 25 - CAN reset

pub fn dac2rst(&self) -> DAC2RST_R[src]

Bit 26 - DAC3 reset

pub fn pwrrst(&self) -> PWRRST_R[src]

Bit 28 - Power interface reset

pub fn dac1rst(&self) -> DAC1RST_R[src]

Bit 29 - DAC interface reset

pub fn cecrst(&self) -> CECRST_R[src]

Bit 30 - HDMI CEC reset

impl R<bool, DMA1EN_A>[src]

pub fn variant(&self) -> DMA1EN_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u32, Reg<u32, _AHBENR>>[src]

pub fn dma1en(&self) -> DMA1EN_R[src]

Bit 0 - DMA1 clock enable

pub fn dma2en(&self) -> DMA2EN_R[src]

Bit 1 - DMA2 clock enable

pub fn sramen(&self) -> SRAMEN_R[src]

Bit 2 - SRAM interface clock enable

pub fn flitfen(&self) -> FLITFEN_R[src]

Bit 4 - FLITF clock enable

pub fn crcen(&self) -> CRCEN_R[src]

Bit 6 - CRC clock enable

pub fn iopaen(&self) -> IOPAEN_R[src]

Bit 17 - I/O port A clock enable

pub fn iopben(&self) -> IOPBEN_R[src]

Bit 18 - I/O port B clock enable

pub fn iopcen(&self) -> IOPCEN_R[src]

Bit 19 - I/O port C clock enable

pub fn iopden(&self) -> IOPDEN_R[src]

Bit 20 - I/O port D clock enable

pub fn iopeen(&self) -> IOPEEN_R[src]

Bit 21 - I/O port E clock enable

pub fn iopfen(&self) -> IOPFEN_R[src]

Bit 22 - I/O port F clock enable

pub fn tscen(&self) -> TSCEN_R[src]

Bit 24 - Touch sensing controller clock enable

impl R<bool, SYSCFGEN_A>[src]

pub fn variant(&self) -> SYSCFGEN_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u32, Reg<u32, _APB2ENR>>[src]

pub fn syscfgen(&self) -> SYSCFGEN_R[src]

Bit 0 - SYSCFG clock enable

pub fn adcen(&self) -> ADCEN_R[src]

Bit 9 - ADC 1 interface clock enable

pub fn spi1en(&self) -> SPI1EN_R[src]

Bit 12 - SPI 1 clock enable

pub fn usart1en(&self) -> USART1EN_R[src]

Bit 14 - USART1 clock enable

pub fn tim15en(&self) -> TIM15EN_R[src]

Bit 16 - TIM15 timer clock enable

pub fn tim16en(&self) -> TIM16EN_R[src]

Bit 17 - TIM16 timer clock enable

pub fn tim17en(&self) -> TIM17EN_R[src]

Bit 18 - TIM17 timer clock enable

pub fn tim19en(&self) -> TIM19EN_R[src]

Bit 19 - TIM19 timer clock enable

pub fn dbgmcuen(&self) -> DBGMCUEN_R[src]

Bit 22 - MCU debug module clock enable

pub fn sdadc1en(&self) -> SDADC1EN_R[src]

Bit 24 - SDADC1 (Sigma Delta ADC 1) clock enable

pub fn sdadc2en(&self) -> SDADC2EN_R[src]

Bit 25 - SDADC2 (Sigma Delta ADC 2) clock enable

pub fn sdadc3en(&self) -> SDADC3EN_R[src]

Bit 26 - SDADC3 (Sigma Delta ADC 3) clock enable

impl R<bool, TIM2EN_A>[src]

pub fn variant(&self) -> TIM2EN_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u32, Reg<u32, _APB1ENR>>[src]

pub fn tim2en(&self) -> TIM2EN_R[src]

Bit 0 - Timer 2 clock enable

pub fn tim3en(&self) -> TIM3EN_R[src]

Bit 1 - Timer 3 clock enable

pub fn tim4en(&self) -> TIM4EN_R[src]

Bit 2 - Timer 4 clock enable

pub fn tim5en(&self) -> TIM5EN_R[src]

Bit 3 - Timer 5 clock enable

pub fn tim6en(&self) -> TIM6EN_R[src]

Bit 4 - Timer 6 clock enable

pub fn tim7en(&self) -> TIM7EN_R[src]

Bit 5 - Timer 7 clock enable

pub fn tim12en(&self) -> TIM12EN_R[src]

Bit 6 - Timer 12 clock enable

pub fn tim13en(&self) -> TIM13EN_R[src]

Bit 7 - Timer 13 clock enable

pub fn tim14en(&self) -> TIM14EN_R[src]

Bit 8 - Timer 14 clock enable

pub fn tim18en(&self) -> TIM18EN_R[src]

Bit 9 - Timer 18 clock enable

pub fn wwdgen(&self) -> WWDGEN_R[src]

Bit 11 - Window watchdog clock enable

pub fn spi2en(&self) -> SPI2EN_R[src]

Bit 14 - SPI 2 clock enable

pub fn spi3en(&self) -> SPI3EN_R[src]

Bit 15 - SPI 3 clock enable

pub fn usart2en(&self) -> USART2EN_R[src]

Bit 17 - USART 2 clock enable

pub fn usart3en(&self) -> USART3EN_R[src]

Bit 18 - USART 3 clock enable

pub fn i2c1en(&self) -> I2C1EN_R[src]

Bit 21 - I2C 1 clock enable

pub fn i2c2en(&self) -> I2C2EN_R[src]

Bit 22 - I2C 2 clock enable

pub fn usben(&self) -> USBEN_R[src]

Bit 23 - USB clock enable

pub fn canen(&self) -> CANEN_R[src]

Bit 25 - CAN clock enable

pub fn dac2en(&self) -> DAC2EN_R[src]

Bit 26 - DAC3 interface clock enable

pub fn pwren(&self) -> PWREN_R[src]

Bit 28 - Power interface clock enable

pub fn dac1en(&self) -> DAC1EN_R[src]

Bit 29 - DAC interface clock enable

pub fn cecen(&self) -> CECEN_R[src]

Bit 30 - HDMI CEC interface clock enable

impl R<bool, LSEON_A>[src]

pub fn variant(&self) -> LSEON_A[src]

Get enumerated values variant

pub fn is_off(&self) -> bool[src]

Checks if the value of the field is OFF

pub fn is_on(&self) -> bool[src]

Checks if the value of the field is ON

impl R<bool, LSERDY_A>[src]

pub fn variant(&self) -> LSERDY_A[src]

Get enumerated values variant

pub fn is_not_ready(&self) -> bool[src]

Checks if the value of the field is NOTREADY

pub fn is_ready(&self) -> bool[src]

Checks if the value of the field is READY

impl R<bool, LSEBYP_A>[src]

pub fn variant(&self) -> LSEBYP_A[src]

Get enumerated values variant

pub fn is_not_bypassed(&self) -> bool[src]

Checks if the value of the field is NOTBYPASSED

pub fn is_bypassed(&self) -> bool[src]

Checks if the value of the field is BYPASSED

impl R<u8, LSEDRV_A>[src]

pub fn variant(&self) -> LSEDRV_A[src]

Get enumerated values variant

pub fn is_low(&self) -> bool[src]

Checks if the value of the field is LOW

pub fn is_medium_high(&self) -> bool[src]

Checks if the value of the field is MEDIUMHIGH

pub fn is_medium_low(&self) -> bool[src]

Checks if the value of the field is MEDIUMLOW

pub fn is_high(&self) -> bool[src]

Checks if the value of the field is HIGH

impl R<u8, RTCSEL_A>[src]

pub fn variant(&self) -> RTCSEL_A[src]

Get enumerated values variant

pub fn is_no_clock(&self) -> bool[src]

Checks if the value of the field is NOCLOCK

pub fn is_lse(&self) -> bool[src]

Checks if the value of the field is LSE

pub fn is_lsi(&self) -> bool[src]

Checks if the value of the field is LSI

pub fn is_hse(&self) -> bool[src]

Checks if the value of the field is HSE

impl R<bool, RTCEN_A>[src]

pub fn variant(&self) -> RTCEN_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, BDRST_A>[src]

pub fn variant(&self) -> BDRST_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u32, Reg<u32, _BDCR>>[src]

pub fn lseon(&self) -> LSEON_R[src]

Bit 0 - External Low Speed oscillator enable

pub fn lserdy(&self) -> LSERDY_R[src]

Bit 1 - External Low Speed oscillator ready

pub fn lsebyp(&self) -> LSEBYP_R[src]

Bit 2 - External Low Speed oscillator bypass

pub fn lsedrv(&self) -> LSEDRV_R[src]

Bits 3:4 - LSE oscillator drive capability

pub fn rtcsel(&self) -> RTCSEL_R[src]

Bits 8:9 - RTC clock source selection

pub fn rtcen(&self) -> RTCEN_R[src]

Bit 15 - RTC clock enable

pub fn bdrst(&self) -> BDRST_R[src]

Bit 16 - Backup domain software reset

impl R<bool, LSION_A>[src]

pub fn variant(&self) -> LSION_A[src]

Get enumerated values variant

pub fn is_off(&self) -> bool[src]

Checks if the value of the field is OFF

pub fn is_on(&self) -> bool[src]

Checks if the value of the field is ON

impl R<bool, LSIRDY_A>[src]

pub fn variant(&self) -> LSIRDY_A[src]

Get enumerated values variant

pub fn is_not_ready(&self) -> bool[src]

Checks if the value of the field is NOTREADY

pub fn is_ready(&self) -> bool[src]

Checks if the value of the field is READY

impl R<bool, RMVF_A>[src]

pub fn variant(&self) -> Variant<bool, RMVF_A>[src]

Get enumerated values variant

pub fn is_clear(&self) -> bool[src]

Checks if the value of the field is CLEAR

impl R<bool, OBLRSTF_A>[src]

pub fn variant(&self) -> OBLRSTF_A[src]

Get enumerated values variant

pub fn is_no_reset(&self) -> bool[src]

Checks if the value of the field is NORESET

pub fn is_reset(&self) -> bool[src]

Checks if the value of the field is RESET

impl R<u32, Reg<u32, _CSR>>[src]

pub fn lsion(&self) -> LSION_R[src]

Bit 0 - Internal low speed oscillator enable

pub fn lsirdy(&self) -> LSIRDY_R[src]

Bit 1 - Internal low speed oscillator ready

pub fn rmvf(&self) -> RMVF_R[src]

Bit 24 - Remove reset flag

pub fn oblrstf(&self) -> OBLRSTF_R[src]

Bit 25 - Option byte loader reset flag

pub fn pinrstf(&self) -> PINRSTF_R[src]

Bit 26 - PIN reset flag

pub fn porrstf(&self) -> PORRSTF_R[src]

Bit 27 - POR/PDR reset flag

pub fn sftrstf(&self) -> SFTRSTF_R[src]

Bit 28 - Software reset flag

pub fn iwdgrstf(&self) -> IWDGRSTF_R[src]

Bit 29 - Independent watchdog reset flag

pub fn wwdgrstf(&self) -> WWDGRSTF_R[src]

Bit 30 - Window watchdog reset flag

pub fn lpwrrstf(&self) -> LPWRRSTF_R[src]

Bit 31 - Low-power reset flag

pub fn v18pwrrstf(&self) -> V18PWRRSTF_R[src]

Bit 23 - Reset flag of the 1.8 V domain

impl R<bool, IOPARST_A>[src]

pub fn variant(&self) -> Variant<bool, IOPARST_A>[src]

Get enumerated values variant

pub fn is_reset(&self) -> bool[src]

Checks if the value of the field is RESET

impl R<u32, Reg<u32, _AHBRSTR>>[src]

pub fn ioparst(&self) -> IOPARST_R[src]

Bit 17 - I/O port A reset

pub fn iopbrst(&self) -> IOPBRST_R[src]

Bit 18 - I/O port B reset

pub fn iopcrst(&self) -> IOPCRST_R[src]

Bit 19 - I/O port C reset

pub fn iopdrst(&self) -> IOPDRST_R[src]

Bit 20 - I/O port D reset

pub fn ioperst(&self) -> IOPERST_R[src]

Bit 21 - I/O port E reset

pub fn iopfrst(&self) -> IOPFRST_R[src]

Bit 22 - I/O port F reset

pub fn tscrst(&self) -> TSCRST_R[src]

Bit 24 - Touch sensing controller reset

impl R<u8, PREDIV_A>[src]

pub fn variant(&self) -> PREDIV_A[src]

Get enumerated values variant

pub fn is_div1(&self) -> bool[src]

Checks if the value of the field is DIV1

pub fn is_div2(&self) -> bool[src]

Checks if the value of the field is DIV2

pub fn is_div3(&self) -> bool[src]

Checks if the value of the field is DIV3

pub fn is_div4(&self) -> bool[src]

Checks if the value of the field is DIV4

pub fn is_div5(&self) -> bool[src]

Checks if the value of the field is DIV5

pub fn is_div6(&self) -> bool[src]

Checks if the value of the field is DIV6

pub fn is_div7(&self) -> bool[src]

Checks if the value of the field is DIV7

pub fn is_div8(&self) -> bool[src]

Checks if the value of the field is DIV8

pub fn is_div9(&self) -> bool[src]

Checks if the value of the field is DIV9

pub fn is_div10(&self) -> bool[src]

Checks if the value of the field is DIV10

pub fn is_div11(&self) -> bool[src]

Checks if the value of the field is DIV11

pub fn is_div12(&self) -> bool[src]

Checks if the value of the field is DIV12

pub fn is_div13(&self) -> bool[src]

Checks if the value of the field is DIV13

pub fn is_div14(&self) -> bool[src]

Checks if the value of the field is DIV14

pub fn is_div15(&self) -> bool[src]

Checks if the value of the field is DIV15

pub fn is_div16(&self) -> bool[src]

Checks if the value of the field is DIV16

impl R<u32, Reg<u32, _CFGR2>>[src]

pub fn prediv(&self) -> PREDIV_R[src]

Bits 0:3 - PREDIV division factor

impl R<u8, USART1SW_A>[src]

pub fn variant(&self) -> USART1SW_A[src]

Get enumerated values variant

pub fn is_pclk(&self) -> bool[src]

Checks if the value of the field is PCLK

pub fn is_sysclk(&self) -> bool[src]

Checks if the value of the field is SYSCLK

pub fn is_lse(&self) -> bool[src]

Checks if the value of the field is LSE

pub fn is_hsi(&self) -> bool[src]

Checks if the value of the field is HSI

impl R<bool, I2C1SW_A>[src]

pub fn variant(&self) -> I2C1SW_A[src]

Get enumerated values variant

pub fn is_hsi(&self) -> bool[src]

Checks if the value of the field is HSI

pub fn is_sysclk(&self) -> bool[src]

Checks if the value of the field is SYSCLK

impl R<bool, CECSW_A>[src]

pub fn variant(&self) -> CECSW_A[src]

Get enumerated values variant

pub fn is_hsi_div244(&self) -> bool[src]

Checks if the value of the field is HSI_DIV244

pub fn is_lse(&self) -> bool[src]

Checks if the value of the field is LSE

impl R<u32, Reg<u32, _CFGR3>>[src]

pub fn usart1sw(&self) -> USART1SW_R[src]

Bits 0:1 - USART1 clock source selection

pub fn i2c1sw(&self) -> I2C1SW_R[src]

Bit 4 - I2C1 clock source selection

pub fn i2c2sw(&self) -> I2C2SW_R[src]

Bit 5 - I2C2 clock source selection

pub fn cecsw(&self) -> CECSW_R[src]

Bit 6 - HDMI CEC clock source selection

pub fn usart2sw(&self) -> USART2SW_R[src]

Bits 16:17 - USART2 clock source selection

pub fn usart3sw(&self) -> USART3SW_R[src]

Bits 18:19 - USART3 clock source selection

impl R<bool, EN_A>[src]

pub fn variant(&self) -> EN_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, TCIE_A>[src]

pub fn variant(&self) -> TCIE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, HTIE_A>[src]

pub fn variant(&self) -> HTIE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, TEIE_A>[src]

pub fn variant(&self) -> TEIE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, DIR_A>[src]

pub fn variant(&self) -> DIR_A[src]

Get enumerated values variant

pub fn is_from_peripheral(&self) -> bool[src]

Checks if the value of the field is FROMPERIPHERAL

pub fn is_from_memory(&self) -> bool[src]

Checks if the value of the field is FROMMEMORY

impl R<bool, CIRC_A>[src]

pub fn variant(&self) -> CIRC_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, PINC_A>[src]

pub fn variant(&self) -> PINC_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u8, PSIZE_A>[src]

pub fn variant(&self) -> Variant<u8, PSIZE_A>[src]

Get enumerated values variant

pub fn is_bits8(&self) -> bool[src]

Checks if the value of the field is BITS8

pub fn is_bits16(&self) -> bool[src]

Checks if the value of the field is BITS16

pub fn is_bits32(&self) -> bool[src]

Checks if the value of the field is BITS32

impl R<u8, PL_A>[src]

pub fn variant(&self) -> PL_A[src]

Get enumerated values variant

pub fn is_low(&self) -> bool[src]

Checks if the value of the field is LOW

pub fn is_medium(&self) -> bool[src]

Checks if the value of the field is MEDIUM

pub fn is_high(&self) -> bool[src]

Checks if the value of the field is HIGH

pub fn is_very_high(&self) -> bool[src]

Checks if the value of the field is VERYHIGH

impl R<bool, MEM2MEM_A>[src]

pub fn variant(&self) -> MEM2MEM_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u32, Reg<u32, _CR>>[src]

pub fn en(&self) -> EN_R[src]

Bit 0 - Channel enable

pub fn tcie(&self) -> TCIE_R[src]

Bit 1 - Transfer complete interrupt enable

pub fn htie(&self) -> HTIE_R[src]

Bit 2 - Half Transfer interrupt enable

pub fn teie(&self) -> TEIE_R[src]

Bit 3 - Transfer error interrupt enable

pub fn dir(&self) -> DIR_R[src]

Bit 4 - Data transfer direction

pub fn circ(&self) -> CIRC_R[src]

Bit 5 - Circular mode

pub fn pinc(&self) -> PINC_R[src]

Bit 6 - Peripheral increment mode

pub fn minc(&self) -> MINC_R[src]

Bit 7 - Memory increment mode

pub fn psize(&self) -> PSIZE_R[src]

Bits 8:9 - Peripheral size

pub fn msize(&self) -> MSIZE_R[src]

Bits 10:11 - Memory size

pub fn pl(&self) -> PL_R[src]

Bits 12:13 - Channel Priority level

pub fn mem2mem(&self) -> MEM2MEM_R[src]

Bit 14 - Memory to memory mode

impl R<u32, Reg<u32, _NDTR>>[src]

pub fn ndt(&self) -> NDT_R[src]

Bits 0:15 - Number of data to transfer

impl R<u32, Reg<u32, _PAR>>[src]

pub fn pa(&self) -> PA_R[src]

Bits 0:31 - Peripheral address

impl R<u32, Reg<u32, _MAR>>[src]

pub fn ma(&self) -> MA_R[src]

Bits 0:31 - Memory address

impl R<bool, GIF1_A>[src]

pub fn variant(&self) -> GIF1_A[src]

Get enumerated values variant

pub fn is_no_event(&self) -> bool[src]

Checks if the value of the field is NOEVENT

pub fn is_event(&self) -> bool[src]

Checks if the value of the field is EVENT

impl R<bool, TCIF1_A>[src]

pub fn variant(&self) -> TCIF1_A[src]

Get enumerated values variant

pub fn is_not_complete(&self) -> bool[src]

Checks if the value of the field is NOTCOMPLETE

pub fn is_complete(&self) -> bool[src]

Checks if the value of the field is COMPLETE

impl R<bool, HTIF1_A>[src]

pub fn variant(&self) -> HTIF1_A[src]

Get enumerated values variant

pub fn is_not_half(&self) -> bool[src]

Checks if the value of the field is NOTHALF

pub fn is_half(&self) -> bool[src]

Checks if the value of the field is HALF

impl R<bool, TEIF1_A>[src]

pub fn variant(&self) -> TEIF1_A[src]

Get enumerated values variant

pub fn is_no_error(&self) -> bool[src]

Checks if the value of the field is NOERROR

pub fn is_error(&self) -> bool[src]

Checks if the value of the field is ERROR

impl R<u32, Reg<u32, _ISR>>[src]

pub fn gif1(&self) -> GIF1_R[src]

Bit 0 - Channel 1 Global interrupt flag

pub fn tcif1(&self) -> TCIF1_R[src]

Bit 1 - Channel 1 Transfer Complete flag

pub fn htif1(&self) -> HTIF1_R[src]

Bit 2 - Channel 1 Half Transfer Complete flag

pub fn teif1(&self) -> TEIF1_R[src]

Bit 3 - Channel 1 Transfer Error flag

pub fn gif2(&self) -> GIF2_R[src]

Bit 4 - Channel 2 Global interrupt flag

pub fn tcif2(&self) -> TCIF2_R[src]

Bit 5 - Channel 2 Transfer Complete flag

pub fn htif2(&self) -> HTIF2_R[src]

Bit 6 - Channel 2 Half Transfer Complete flag

pub fn teif2(&self) -> TEIF2_R[src]

Bit 7 - Channel 2 Transfer Error flag

pub fn gif3(&self) -> GIF3_R[src]

Bit 8 - Channel 3 Global interrupt flag

pub fn tcif3(&self) -> TCIF3_R[src]

Bit 9 - Channel 3 Transfer Complete flag

pub fn htif3(&self) -> HTIF3_R[src]

Bit 10 - Channel 3 Half Transfer Complete flag

pub fn teif3(&self) -> TEIF3_R[src]

Bit 11 - Channel 3 Transfer Error flag

pub fn gif4(&self) -> GIF4_R[src]

Bit 12 - Channel 4 Global interrupt flag

pub fn tcif4(&self) -> TCIF4_R[src]

Bit 13 - Channel 4 Transfer Complete flag

pub fn htif4(&self) -> HTIF4_R[src]

Bit 14 - Channel 4 Half Transfer Complete flag

pub fn teif4(&self) -> TEIF4_R[src]

Bit 15 - Channel 4 Transfer Error flag

pub fn gif5(&self) -> GIF5_R[src]

Bit 16 - Channel 5 Global interrupt flag

pub fn tcif5(&self) -> TCIF5_R[src]

Bit 17 - Channel 5 Transfer Complete flag

pub fn htif5(&self) -> HTIF5_R[src]

Bit 18 - Channel 5 Half Transfer Complete flag

pub fn teif5(&self) -> TEIF5_R[src]

Bit 19 - Channel 5 Transfer Error flag

pub fn gif6(&self) -> GIF6_R[src]

Bit 20 - Channel 6 Global interrupt flag

pub fn tcif6(&self) -> TCIF6_R[src]

Bit 21 - Channel 6 Transfer Complete flag

pub fn htif6(&self) -> HTIF6_R[src]

Bit 22 - Channel 6 Half Transfer Complete flag

pub fn teif6(&self) -> TEIF6_R[src]

Bit 23 - Channel 6 Transfer Error flag

pub fn gif7(&self) -> GIF7_R[src]

Bit 24 - Channel 7 Global interrupt flag

pub fn tcif7(&self) -> TCIF7_R[src]

Bit 25 - Channel 7 Transfer Complete flag

pub fn htif7(&self) -> HTIF7_R[src]

Bit 26 - Channel 7 Half Transfer Complete flag

pub fn teif7(&self) -> TEIF7_R[src]

Bit 27 - Channel 7 Transfer Error flag

impl R<u8, CKD_A>[src]

pub fn variant(&self) -> Variant<u8, CKD_A>[src]

Get enumerated values variant

pub fn is_div1(&self) -> bool[src]

Checks if the value of the field is DIV1

pub fn is_div2(&self) -> bool[src]

Checks if the value of the field is DIV2

pub fn is_div4(&self) -> bool[src]

Checks if the value of the field is DIV4

impl R<bool, ARPE_A>[src]

pub fn variant(&self) -> ARPE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u8, CMS_A>[src]

pub fn variant(&self) -> CMS_A[src]

Get enumerated values variant

pub fn is_edge_aligned(&self) -> bool[src]

Checks if the value of the field is EDGEALIGNED

pub fn is_center_aligned1(&self) -> bool[src]

Checks if the value of the field is CENTERALIGNED1

pub fn is_center_aligned2(&self) -> bool[src]

Checks if the value of the field is CENTERALIGNED2

pub fn is_center_aligned3(&self) -> bool[src]

Checks if the value of the field is CENTERALIGNED3

impl R<bool, DIR_A>[src]

pub fn variant(&self) -> DIR_A[src]

Get enumerated values variant

pub fn is_up(&self) -> bool[src]

Checks if the value of the field is UP

pub fn is_down(&self) -> bool[src]

Checks if the value of the field is DOWN

impl R<bool, OPM_A>[src]

pub fn variant(&self) -> OPM_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, URS_A>[src]

pub fn variant(&self) -> URS_A[src]

Get enumerated values variant

pub fn is_any_event(&self) -> bool[src]

Checks if the value of the field is ANYEVENT

pub fn is_counter_only(&self) -> bool[src]

Checks if the value of the field is COUNTERONLY

impl R<bool, UDIS_A>[src]

pub fn variant(&self) -> UDIS_A[src]

Get enumerated values variant

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

impl R<bool, CEN_A>[src]

pub fn variant(&self) -> CEN_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u32, Reg<u32, _CR1>>[src]

pub fn ckd(&self) -> CKD_R[src]

Bits 8:9 - Clock division

pub fn arpe(&self) -> ARPE_R[src]

Bit 7 - Auto-reload preload enable

pub fn cms(&self) -> CMS_R[src]

Bits 5:6 - Center-aligned mode selection

pub fn dir(&self) -> DIR_R[src]

Bit 4 - Direction

pub fn opm(&self) -> OPM_R[src]

Bit 3 - One-pulse mode

pub fn urs(&self) -> URS_R[src]

Bit 2 - Update request source

pub fn udis(&self) -> UDIS_R[src]

Bit 1 - Update disable

pub fn cen(&self) -> CEN_R[src]

Bit 0 - Counter enable

impl R<bool, TI1S_A>[src]

pub fn variant(&self) -> TI1S_A[src]

Get enumerated values variant

pub fn is_normal(&self) -> bool[src]

Checks if the value of the field is NORMAL

pub fn is_xor(&self) -> bool[src]

Checks if the value of the field is XOR

impl R<u8, MMS_A>[src]

pub fn variant(&self) -> MMS_A[src]

Get enumerated values variant

pub fn is_reset(&self) -> bool[src]

Checks if the value of the field is RESET

pub fn is_enable(&self) -> bool[src]

Checks if the value of the field is ENABLE

pub fn is_update(&self) -> bool[src]

Checks if the value of the field is UPDATE

pub fn is_compare_pulse(&self) -> bool[src]

Checks if the value of the field is COMPAREPULSE

pub fn is_compare_oc1(&self) -> bool[src]

Checks if the value of the field is COMPAREOC1

pub fn is_compare_oc2(&self) -> bool[src]

Checks if the value of the field is COMPAREOC2

pub fn is_compare_oc3(&self) -> bool[src]

Checks if the value of the field is COMPAREOC3

pub fn is_compare_oc4(&self) -> bool[src]

Checks if the value of the field is COMPAREOC4

impl R<bool, CCDS_A>[src]

pub fn variant(&self) -> CCDS_A[src]

Get enumerated values variant

pub fn is_on_compare(&self) -> bool[src]

Checks if the value of the field is ONCOMPARE

pub fn is_on_update(&self) -> bool[src]

Checks if the value of the field is ONUPDATE

impl R<u32, Reg<u32, _CR2>>[src]

pub fn ti1s(&self) -> TI1S_R[src]

Bit 7 - TI1 selection

pub fn mms(&self) -> MMS_R[src]

Bits 4:6 - Master mode selection

pub fn ccds(&self) -> CCDS_R[src]

Bit 3 - Capture/compare DMA selection

impl R<bool, ETP_A>[src]

pub fn variant(&self) -> ETP_A[src]

Get enumerated values variant

pub fn is_not_inverted(&self) -> bool[src]

Checks if the value of the field is NOTINVERTED

pub fn is_inverted(&self) -> bool[src]

Checks if the value of the field is INVERTED

impl R<bool, ECE_A>[src]

pub fn variant(&self) -> ECE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u8, ETPS_A>[src]

pub fn variant(&self) -> ETPS_A[src]

Get enumerated values variant

pub fn is_div1(&self) -> bool[src]

Checks if the value of the field is DIV1

pub fn is_div2(&self) -> bool[src]

Checks if the value of the field is DIV2

pub fn is_div4(&self) -> bool[src]

Checks if the value of the field is DIV4

pub fn is_div8(&self) -> bool[src]

Checks if the value of the field is DIV8

impl R<u8, ETF_A>[src]

pub fn variant(&self) -> ETF_A[src]

Get enumerated values variant

pub fn is_no_filter(&self) -> bool[src]

Checks if the value of the field is NOFILTER

pub fn is_fck_int_n2(&self) -> bool[src]

Checks if the value of the field is FCK_INT_N2

pub fn is_fck_int_n4(&self) -> bool[src]

Checks if the value of the field is FCK_INT_N4

pub fn is_fck_int_n8(&self) -> bool[src]

Checks if the value of the field is FCK_INT_N8

pub fn is_fdts_div2_n6(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV2_N6

pub fn is_fdts_div2_n8(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV2_N8

pub fn is_fdts_div4_n6(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV4_N6

pub fn is_fdts_div4_n8(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV4_N8

pub fn is_fdts_div8_n6(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV8_N6

pub fn is_fdts_div8_n8(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV8_N8

pub fn is_fdts_div16_n5(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV16_N5

pub fn is_fdts_div16_n6(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV16_N6

pub fn is_fdts_div16_n8(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV16_N8

pub fn is_fdts_div32_n5(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV32_N5

pub fn is_fdts_div32_n6(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV32_N6

pub fn is_fdts_div32_n8(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV32_N8

impl R<bool, MSM_A>[src]

pub fn variant(&self) -> MSM_A[src]

Get enumerated values variant

pub fn is_no_sync(&self) -> bool[src]

Checks if the value of the field is NOSYNC

pub fn is_sync(&self) -> bool[src]

Checks if the value of the field is SYNC

impl R<u8, TS_A>[src]

pub fn variant(&self) -> Variant<u8, TS_A>[src]

Get enumerated values variant

pub fn is_itr0(&self) -> bool[src]

Checks if the value of the field is ITR0

pub fn is_itr1(&self) -> bool[src]

Checks if the value of the field is ITR1

pub fn is_itr2(&self) -> bool[src]

Checks if the value of the field is ITR2

pub fn is_ti1f_ed(&self) -> bool[src]

Checks if the value of the field is TI1F_ED

pub fn is_ti1fp1(&self) -> bool[src]

Checks if the value of the field is TI1FP1

pub fn is_ti2fp2(&self) -> bool[src]

Checks if the value of the field is TI2FP2

pub fn is_etrf(&self) -> bool[src]

Checks if the value of the field is ETRF

impl R<u8, SMS_A>[src]

pub fn variant(&self) -> SMS_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_encoder_mode_1(&self) -> bool[src]

Checks if the value of the field is ENCODER_MODE_1

pub fn is_encoder_mode_2(&self) -> bool[src]

Checks if the value of the field is ENCODER_MODE_2

pub fn is_encoder_mode_3(&self) -> bool[src]

Checks if the value of the field is ENCODER_MODE_3

pub fn is_reset_mode(&self) -> bool[src]

Checks if the value of the field is RESET_MODE

pub fn is_gated_mode(&self) -> bool[src]

Checks if the value of the field is GATED_MODE

pub fn is_trigger_mode(&self) -> bool[src]

Checks if the value of the field is TRIGGER_MODE

pub fn is_ext_clock_mode(&self) -> bool[src]

Checks if the value of the field is EXT_CLOCK_MODE

impl R<u32, Reg<u32, _SMCR>>[src]

pub fn etp(&self) -> ETP_R[src]

Bit 15 - External trigger polarity

pub fn ece(&self) -> ECE_R[src]

Bit 14 - External clock enable

pub fn etps(&self) -> ETPS_R[src]

Bits 12:13 - External trigger prescaler

pub fn etf(&self) -> ETF_R[src]

Bits 8:11 - External trigger filter

pub fn msm(&self) -> MSM_R[src]

Bit 7 - Master/Slave mode

pub fn ts(&self) -> TS_R[src]

Bits 4:6 - Trigger selection

pub fn sms(&self) -> SMS_R[src]

Bits 0:2 - Slave mode selection

impl R<bool, TDE_A>[src]

pub fn variant(&self) -> TDE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, CC4DE_A>[src]

pub fn variant(&self) -> CC4DE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, UDE_A>[src]

pub fn variant(&self) -> UDE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, TIE_A>[src]

pub fn variant(&self) -> TIE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, CC4IE_A>[src]

pub fn variant(&self) -> CC4IE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, UIE_A>[src]

pub fn variant(&self) -> UIE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u32, Reg<u32, _DIER>>[src]

pub fn tde(&self) -> TDE_R[src]

Bit 14 - Trigger DMA request enable

pub fn cc4de(&self) -> CC4DE_R[src]

Bit 12 - Capture/Compare 4 DMA request enable

pub fn cc3de(&self) -> CC3DE_R[src]

Bit 11 - Capture/Compare 3 DMA request enable

pub fn cc2de(&self) -> CC2DE_R[src]

Bit 10 - Capture/Compare 2 DMA request enable

pub fn cc1de(&self) -> CC1DE_R[src]

Bit 9 - Capture/Compare 1 DMA request enable

pub fn ude(&self) -> UDE_R[src]

Bit 8 - Update DMA request enable

pub fn tie(&self) -> TIE_R[src]

Bit 6 - Trigger interrupt enable

pub fn cc4ie(&self) -> CC4IE_R[src]

Bit 4 - Capture/Compare 4 interrupt enable

pub fn cc3ie(&self) -> CC3IE_R[src]

Bit 3 - Capture/Compare 3 interrupt enable

pub fn cc2ie(&self) -> CC2IE_R[src]

Bit 2 - Capture/Compare 2 interrupt enable

pub fn cc1ie(&self) -> CC1IE_R[src]

Bit 1 - Capture/Compare 1 interrupt enable

pub fn uie(&self) -> UIE_R[src]

Bit 0 - Update interrupt enable

impl R<bool, CC4OF_A>[src]

pub fn variant(&self) -> Variant<bool, CC4OF_A>[src]

Get enumerated values variant

pub fn is_overcapture(&self) -> bool[src]

Checks if the value of the field is OVERCAPTURE

impl R<bool, TIF_A>[src]

pub fn variant(&self) -> TIF_A[src]

Get enumerated values variant

pub fn is_no_trigger(&self) -> bool[src]

Checks if the value of the field is NOTRIGGER

pub fn is_trigger(&self) -> bool[src]

Checks if the value of the field is TRIGGER

impl R<bool, CC4IF_A>[src]

pub fn variant(&self) -> Variant<bool, CC4IF_A>[src]

Get enumerated values variant

pub fn is_match_(&self) -> bool[src]

Checks if the value of the field is MATCH

impl R<bool, UIF_A>[src]

pub fn variant(&self) -> UIF_A[src]

Get enumerated values variant

pub fn is_clear(&self) -> bool[src]

Checks if the value of the field is CLEAR

pub fn is_update_pending(&self) -> bool[src]

Checks if the value of the field is UPDATEPENDING

impl R<u32, Reg<u32, _SR>>[src]

pub fn cc4of(&self) -> CC4OF_R[src]

Bit 12 - Capture/Compare 4 overcapture flag

pub fn cc3of(&self) -> CC3OF_R[src]

Bit 11 - Capture/Compare 3 overcapture flag

pub fn cc2of(&self) -> CC2OF_R[src]

Bit 10 - Capture/compare 2 overcapture flag

pub fn cc1of(&self) -> CC1OF_R[src]

Bit 9 - Capture/Compare 1 overcapture flag

pub fn tif(&self) -> TIF_R[src]

Bit 6 - Trigger interrupt flag

pub fn cc4if(&self) -> CC4IF_R[src]

Bit 4 - Capture/Compare 4 interrupt flag

pub fn cc3if(&self) -> CC3IF_R[src]

Bit 3 - Capture/Compare 3 interrupt flag

pub fn cc2if(&self) -> CC2IF_R[src]

Bit 2 - Capture/Compare 2 interrupt flag

pub fn cc1if(&self) -> CC1IF_R[src]

Bit 1 - Capture/compare 1 interrupt flag

pub fn uif(&self) -> UIF_R[src]

Bit 0 - Update interrupt flag

impl R<u8, OC2M_A>[src]

pub fn variant(&self) -> OC2M_A[src]

Get enumerated values variant

pub fn is_frozen(&self) -> bool[src]

Checks if the value of the field is FROZEN

pub fn is_active_on_match(&self) -> bool[src]

Checks if the value of the field is ACTIVEONMATCH

pub fn is_inactive_on_match(&self) -> bool[src]

Checks if the value of the field is INACTIVEONMATCH

pub fn is_toggle(&self) -> bool[src]

Checks if the value of the field is TOGGLE

pub fn is_force_inactive(&self) -> bool[src]

Checks if the value of the field is FORCEINACTIVE

pub fn is_force_active(&self) -> bool[src]

Checks if the value of the field is FORCEACTIVE

pub fn is_pwm_mode1(&self) -> bool[src]

Checks if the value of the field is PWMMODE1

pub fn is_pwm_mode2(&self) -> bool[src]

Checks if the value of the field is PWMMODE2

impl R<bool, OC2PE_A>[src]

pub fn variant(&self) -> OC2PE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u8, CC2S_A>[src]

pub fn variant(&self) -> Variant<u8, CC2S_A>[src]

Get enumerated values variant

pub fn is_output(&self) -> bool[src]

Checks if the value of the field is OUTPUT

impl R<bool, OC1PE_A>[src]

pub fn variant(&self) -> OC1PE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u8, CC1S_A>[src]

pub fn variant(&self) -> Variant<u8, CC1S_A>[src]

Get enumerated values variant

pub fn is_output(&self) -> bool[src]

Checks if the value of the field is OUTPUT

impl R<u32, Reg<u32, _CCMR1_OUTPUT>>[src]

pub fn oc2ce(&self) -> OC2CE_R[src]

Bit 15 - Output compare 2 clear enable

pub fn oc2m(&self) -> OC2M_R[src]

Bits 12:14 - Output compare 2 mode

pub fn oc2pe(&self) -> OC2PE_R[src]

Bit 11 - Output compare 2 preload enable

pub fn oc2fe(&self) -> OC2FE_R[src]

Bit 10 - Output compare 2 fast enable

pub fn cc2s(&self) -> CC2S_R[src]

Bits 8:9 - Capture/Compare 2 selection

pub fn oc1ce(&self) -> OC1CE_R[src]

Bit 7 - Output compare 1 clear enable

pub fn oc1m(&self) -> OC1M_R[src]

Bits 4:6 - Output compare 1 mode

pub fn oc1pe(&self) -> OC1PE_R[src]

Bit 3 - Output compare 1 preload enable

pub fn oc1fe(&self) -> OC1FE_R[src]

Bit 2 - Output compare 1 fast enable

pub fn cc1s(&self) -> CC1S_R[src]

Bits 0:1 - Capture/Compare 1 selection

impl R<u8, CC2S_A>[src]

pub fn variant(&self) -> Variant<u8, CC2S_A>[src]

Get enumerated values variant

pub fn is_ti2(&self) -> bool[src]

Checks if the value of the field is TI2

pub fn is_ti1(&self) -> bool[src]

Checks if the value of the field is TI1

pub fn is_trc(&self) -> bool[src]

Checks if the value of the field is TRC

impl R<u8, IC1F_A>[src]

pub fn variant(&self) -> IC1F_A[src]

Get enumerated values variant

pub fn is_no_filter(&self) -> bool[src]

Checks if the value of the field is NOFILTER

pub fn is_fck_int_n2(&self) -> bool[src]

Checks if the value of the field is FCK_INT_N2

pub fn is_fck_int_n4(&self) -> bool[src]

Checks if the value of the field is FCK_INT_N4

pub fn is_fck_int_n8(&self) -> bool[src]

Checks if the value of the field is FCK_INT_N8

pub fn is_fdts_div2_n6(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV2_N6

pub fn is_fdts_div2_n8(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV2_N8

pub fn is_fdts_div4_n6(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV4_N6

pub fn is_fdts_div4_n8(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV4_N8

pub fn is_fdts_div8_n6(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV8_N6

pub fn is_fdts_div8_n8(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV8_N8

pub fn is_fdts_div16_n5(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV16_N5

pub fn is_fdts_div16_n6(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV16_N6

pub fn is_fdts_div16_n8(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV16_N8

pub fn is_fdts_div32_n5(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV32_N5

pub fn is_fdts_div32_n6(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV32_N6

pub fn is_fdts_div32_n8(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV32_N8

impl R<u8, CC1S_A>[src]

pub fn variant(&self) -> Variant<u8, CC1S_A>[src]

Get enumerated values variant

pub fn is_ti1(&self) -> bool[src]

Checks if the value of the field is TI1

pub fn is_ti2(&self) -> bool[src]

Checks if the value of the field is TI2

pub fn is_trc(&self) -> bool[src]

Checks if the value of the field is TRC

impl R<u32, Reg<u32, _CCMR1_INPUT>>[src]

pub fn ic2f(&self) -> IC2F_R[src]

Bits 12:15 - Input capture 2 filter

pub fn ic2psc(&self) -> IC2PSC_R[src]

Bits 10:11 - Input capture 2 prescaler

pub fn cc2s(&self) -> CC2S_R[src]

Bits 8:9 - Capture/compare 2 selection

pub fn ic1f(&self) -> IC1F_R[src]

Bits 4:7 - Input capture 1 filter

pub fn ic1psc(&self) -> IC1PSC_R[src]

Bits 2:3 - Input capture 1 prescaler

pub fn cc1s(&self) -> CC1S_R[src]

Bits 0:1 - Capture/Compare 1 selection

impl R<u8, OC4M_A>[src]

pub fn variant(&self) -> OC4M_A[src]

Get enumerated values variant

pub fn is_frozen(&self) -> bool[src]

Checks if the value of the field is FROZEN

pub fn is_active_on_match(&self) -> bool[src]

Checks if the value of the field is ACTIVEONMATCH

pub fn is_inactive_on_match(&self) -> bool[src]

Checks if the value of the field is INACTIVEONMATCH

pub fn is_toggle(&self) -> bool[src]

Checks if the value of the field is TOGGLE

pub fn is_force_inactive(&self) -> bool[src]

Checks if the value of the field is FORCEINACTIVE

pub fn is_force_active(&self) -> bool[src]

Checks if the value of the field is FORCEACTIVE

pub fn is_pwm_mode1(&self) -> bool[src]

Checks if the value of the field is PWMMODE1

pub fn is_pwm_mode2(&self) -> bool[src]

Checks if the value of the field is PWMMODE2

impl R<bool, OC4PE_A>[src]

pub fn variant(&self) -> OC4PE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u8, CC4S_A>[src]

pub fn variant(&self) -> Variant<u8, CC4S_A>[src]

Get enumerated values variant

pub fn is_output(&self) -> bool[src]

Checks if the value of the field is OUTPUT

impl R<bool, OC3PE_A>[src]

pub fn variant(&self) -> OC3PE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u8, CC3S_A>[src]

pub fn variant(&self) -> Variant<u8, CC3S_A>[src]

Get enumerated values variant

pub fn is_output(&self) -> bool[src]

Checks if the value of the field is OUTPUT

impl R<u32, Reg<u32, _CCMR2_OUTPUT>>[src]

pub fn oc4ce(&self) -> OC4CE_R[src]

Bit 15 - Output compare 4 clear enable

pub fn oc4m(&self) -> OC4M_R[src]

Bits 12:14 - Output compare 4 mode

pub fn oc4pe(&self) -> OC4PE_R[src]

Bit 11 - Output compare 4 preload enable

pub fn oc4fe(&self) -> OC4FE_R[src]

Bit 10 - Output compare 4 fast enable

pub fn cc4s(&self) -> CC4S_R[src]

Bits 8:9 - Capture/Compare 4 selection

pub fn oc3ce(&self) -> OC3CE_R[src]

Bit 7 - Output compare 3 clear enable

pub fn oc3m(&self) -> OC3M_R[src]

Bits 4:6 - Output compare 3 mode

pub fn oc3pe(&self) -> OC3PE_R[src]

Bit 3 - Output compare 3 preload enable

pub fn oc3fe(&self) -> OC3FE_R[src]

Bit 2 - Output compare 3 fast enable

pub fn cc3s(&self) -> CC3S_R[src]

Bits 0:1 - Capture/Compare 3 selection

impl R<u8, CC4S_A>[src]

pub fn variant(&self) -> Variant<u8, CC4S_A>[src]

Get enumerated values variant

pub fn is_ti4(&self) -> bool[src]

Checks if the value of the field is TI4

pub fn is_ti3(&self) -> bool[src]

Checks if the value of the field is TI3

pub fn is_trc(&self) -> bool[src]

Checks if the value of the field is TRC

impl R<u8, CC3S_A>[src]

pub fn variant(&self) -> Variant<u8, CC3S_A>[src]

Get enumerated values variant

pub fn is_ti3(&self) -> bool[src]

Checks if the value of the field is TI3

pub fn is_ti4(&self) -> bool[src]

Checks if the value of the field is TI4

pub fn is_trc(&self) -> bool[src]

Checks if the value of the field is TRC

impl R<u32, Reg<u32, _CCMR2_INPUT>>[src]

pub fn ic4f(&self) -> IC4F_R[src]

Bits 12:15 - Input capture 4 filter

pub fn ic4psc(&self) -> IC4PSC_R[src]

Bits 10:11 - Input capture 4 prescaler

pub fn cc4s(&self) -> CC4S_R[src]

Bits 8:9 - Capture/Compare 4 selection

pub fn ic3f(&self) -> IC3F_R[src]

Bits 4:7 - Input capture 3 filter

pub fn ic3psc(&self) -> IC3PSC_R[src]

Bits 2:3 - Input capture 3 prescaler

pub fn cc3s(&self) -> CC3S_R[src]

Bits 0:1 - Capture/Compare 3 selection

impl R<u32, Reg<u32, _CCER>>[src]

pub fn cc1e(&self) -> CC1E_R[src]

Bit 0 - Capture/Compare 1 output enable

pub fn cc1p(&self) -> CC1P_R[src]

Bit 1 - Capture/Compare 1 output Polarity

pub fn cc1np(&self) -> CC1NP_R[src]

Bit 3 - Capture/Compare 1 output Polarity

pub fn cc2e(&self) -> CC2E_R[src]

Bit 4 - Capture/Compare 2 output enable

pub fn cc2p(&self) -> CC2P_R[src]

Bit 5 - Capture/Compare 2 output Polarity

pub fn cc2np(&self) -> CC2NP_R[src]

Bit 7 - Capture/Compare 2 output Polarity

pub fn cc3e(&self) -> CC3E_R[src]

Bit 8 - Capture/Compare 3 output enable

pub fn cc3p(&self) -> CC3P_R[src]

Bit 9 - Capture/Compare 3 output Polarity

pub fn cc3np(&self) -> CC3NP_R[src]

Bit 11 - Capture/Compare 3 output Polarity

pub fn cc4e(&self) -> CC4E_R[src]

Bit 12 - Capture/Compare 4 output enable

pub fn cc4p(&self) -> CC4P_R[src]

Bit 13 - Capture/Compare 3 output Polarity

pub fn cc4np(&self) -> CC4NP_R[src]

Bit 15 - Capture/Compare 3 output Polarity

impl R<u32, Reg<u32, _CNT>>[src]

pub fn cnt(&self) -> CNT_R[src]

Bits 0:31 - Low counter value

impl R<u32, Reg<u32, _PSC>>[src]

pub fn psc(&self) -> PSC_R[src]

Bits 0:15 - Prescaler value

impl R<u32, Reg<u32, _ARR>>[src]

pub fn arr(&self) -> ARR_R[src]

Bits 0:31 - Low Auto-reload value

impl R<u32, Reg<u32, _CCR>>[src]

pub fn ccr(&self) -> CCR_R[src]

Bits 0:31 - Low Capture/Compare 1 value

impl R<u32, Reg<u32, _DCR>>[src]

pub fn dbl(&self) -> DBL_R[src]

Bits 8:12 - DMA burst length

pub fn dba(&self) -> DBA_R[src]

Bits 0:4 - DMA base address

impl R<u32, Reg<u32, _DMAR>>[src]

pub fn dmab(&self) -> DMAB_R[src]

Bits 0:15 - DMA register for burst accesses

impl R<u32, Reg<u32, _OR>>[src]

pub fn itr1_rmp(&self) -> ITR1_RMP_R[src]

Bits 10:11 - Internal trigger 1 remap

impl R<u8, CKD_A>[src]

pub fn variant(&self) -> Variant<u8, CKD_A>[src]

Get enumerated values variant

pub fn is_div1(&self) -> bool[src]

Checks if the value of the field is DIV1

pub fn is_div2(&self) -> bool[src]

Checks if the value of the field is DIV2

pub fn is_div4(&self) -> bool[src]

Checks if the value of the field is DIV4

impl R<bool, ARPE_A>[src]

pub fn variant(&self) -> ARPE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u8, CMS_A>[src]

pub fn variant(&self) -> CMS_A[src]

Get enumerated values variant

pub fn is_edge_aligned(&self) -> bool[src]

Checks if the value of the field is EDGEALIGNED

pub fn is_center_aligned1(&self) -> bool[src]

Checks if the value of the field is CENTERALIGNED1

pub fn is_center_aligned2(&self) -> bool[src]

Checks if the value of the field is CENTERALIGNED2

pub fn is_center_aligned3(&self) -> bool[src]

Checks if the value of the field is CENTERALIGNED3

impl R<bool, DIR_A>[src]

pub fn variant(&self) -> DIR_A[src]

Get enumerated values variant

pub fn is_up(&self) -> bool[src]

Checks if the value of the field is UP

pub fn is_down(&self) -> bool[src]

Checks if the value of the field is DOWN

impl R<bool, OPM_A>[src]

pub fn variant(&self) -> OPM_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, URS_A>[src]

pub fn variant(&self) -> URS_A[src]

Get enumerated values variant

pub fn is_any_event(&self) -> bool[src]

Checks if the value of the field is ANYEVENT

pub fn is_counter_only(&self) -> bool[src]

Checks if the value of the field is COUNTERONLY

impl R<bool, UDIS_A>[src]

pub fn variant(&self) -> UDIS_A[src]

Get enumerated values variant

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

impl R<bool, CEN_A>[src]

pub fn variant(&self) -> CEN_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u32, Reg<u32, _CR1>>[src]

pub fn ckd(&self) -> CKD_R[src]

Bits 8:9 - Clock division

pub fn arpe(&self) -> ARPE_R[src]

Bit 7 - Auto-reload preload enable

pub fn cms(&self) -> CMS_R[src]

Bits 5:6 - Center-aligned mode selection

pub fn dir(&self) -> DIR_R[src]

Bit 4 - Direction

pub fn opm(&self) -> OPM_R[src]

Bit 3 - One-pulse mode

pub fn urs(&self) -> URS_R[src]

Bit 2 - Update request source

pub fn udis(&self) -> UDIS_R[src]

Bit 1 - Update disable

pub fn cen(&self) -> CEN_R[src]

Bit 0 - Counter enable

impl R<bool, TI1S_A>[src]

pub fn variant(&self) -> TI1S_A[src]

Get enumerated values variant

pub fn is_normal(&self) -> bool[src]

Checks if the value of the field is NORMAL

pub fn is_xor(&self) -> bool[src]

Checks if the value of the field is XOR

impl R<u8, MMS_A>[src]

pub fn variant(&self) -> MMS_A[src]

Get enumerated values variant

pub fn is_reset(&self) -> bool[src]

Checks if the value of the field is RESET

pub fn is_enable(&self) -> bool[src]

Checks if the value of the field is ENABLE

pub fn is_update(&self) -> bool[src]

Checks if the value of the field is UPDATE

pub fn is_compare_pulse(&self) -> bool[src]

Checks if the value of the field is COMPAREPULSE

pub fn is_compare_oc1(&self) -> bool[src]

Checks if the value of the field is COMPAREOC1

pub fn is_compare_oc2(&self) -> bool[src]

Checks if the value of the field is COMPAREOC2

pub fn is_compare_oc3(&self) -> bool[src]

Checks if the value of the field is COMPAREOC3

pub fn is_compare_oc4(&self) -> bool[src]

Checks if the value of the field is COMPAREOC4

impl R<bool, CCDS_A>[src]

pub fn variant(&self) -> CCDS_A[src]

Get enumerated values variant

pub fn is_on_compare(&self) -> bool[src]

Checks if the value of the field is ONCOMPARE

pub fn is_on_update(&self) -> bool[src]

Checks if the value of the field is ONUPDATE

impl R<u32, Reg<u32, _CR2>>[src]

pub fn ti1s(&self) -> TI1S_R[src]

Bit 7 - TI1 selection

pub fn mms(&self) -> MMS_R[src]

Bits 4:6 - Master mode selection

pub fn ccds(&self) -> CCDS_R[src]

Bit 3 - Capture/compare DMA selection

impl R<bool, ETP_A>[src]

pub fn variant(&self) -> ETP_A[src]

Get enumerated values variant

pub fn is_not_inverted(&self) -> bool[src]

Checks if the value of the field is NOTINVERTED

pub fn is_inverted(&self) -> bool[src]

Checks if the value of the field is INVERTED

impl R<bool, ECE_A>[src]

pub fn variant(&self) -> ECE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u8, ETPS_A>[src]

pub fn variant(&self) -> ETPS_A[src]

Get enumerated values variant

pub fn is_div1(&self) -> bool[src]

Checks if the value of the field is DIV1

pub fn is_div2(&self) -> bool[src]

Checks if the value of the field is DIV2

pub fn is_div4(&self) -> bool[src]

Checks if the value of the field is DIV4

pub fn is_div8(&self) -> bool[src]

Checks if the value of the field is DIV8

impl R<u8, ETF_A>[src]

pub fn variant(&self) -> ETF_A[src]

Get enumerated values variant

pub fn is_no_filter(&self) -> bool[src]

Checks if the value of the field is NOFILTER

pub fn is_fck_int_n2(&self) -> bool[src]

Checks if the value of the field is FCK_INT_N2

pub fn is_fck_int_n4(&self) -> bool[src]

Checks if the value of the field is FCK_INT_N4

pub fn is_fck_int_n8(&self) -> bool[src]

Checks if the value of the field is FCK_INT_N8

pub fn is_fdts_div2_n6(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV2_N6

pub fn is_fdts_div2_n8(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV2_N8

pub fn is_fdts_div4_n6(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV4_N6

pub fn is_fdts_div4_n8(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV4_N8

pub fn is_fdts_div8_n6(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV8_N6

pub fn is_fdts_div8_n8(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV8_N8

pub fn is_fdts_div16_n5(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV16_N5

pub fn is_fdts_div16_n6(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV16_N6

pub fn is_fdts_div16_n8(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV16_N8

pub fn is_fdts_div32_n5(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV32_N5

pub fn is_fdts_div32_n6(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV32_N6

pub fn is_fdts_div32_n8(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV32_N8

impl R<bool, MSM_A>[src]

pub fn variant(&self) -> MSM_A[src]

Get enumerated values variant

pub fn is_no_sync(&self) -> bool[src]

Checks if the value of the field is NOSYNC

pub fn is_sync(&self) -> bool[src]

Checks if the value of the field is SYNC

impl R<u8, TS_A>[src]

pub fn variant(&self) -> Variant<u8, TS_A>[src]

Get enumerated values variant

pub fn is_itr0(&self) -> bool[src]

Checks if the value of the field is ITR0

pub fn is_itr1(&self) -> bool[src]

Checks if the value of the field is ITR1

pub fn is_itr2(&self) -> bool[src]

Checks if the value of the field is ITR2

pub fn is_ti1f_ed(&self) -> bool[src]

Checks if the value of the field is TI1F_ED

pub fn is_ti1fp1(&self) -> bool[src]

Checks if the value of the field is TI1FP1

pub fn is_ti2fp2(&self) -> bool[src]

Checks if the value of the field is TI2FP2

pub fn is_etrf(&self) -> bool[src]

Checks if the value of the field is ETRF

impl R<u8, SMS_A>[src]

pub fn variant(&self) -> SMS_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_encoder_mode_1(&self) -> bool[src]

Checks if the value of the field is ENCODER_MODE_1

pub fn is_encoder_mode_2(&self) -> bool[src]

Checks if the value of the field is ENCODER_MODE_2

pub fn is_encoder_mode_3(&self) -> bool[src]

Checks if the value of the field is ENCODER_MODE_3

pub fn is_reset_mode(&self) -> bool[src]

Checks if the value of the field is RESET_MODE

pub fn is_gated_mode(&self) -> bool[src]

Checks if the value of the field is GATED_MODE

pub fn is_trigger_mode(&self) -> bool[src]

Checks if the value of the field is TRIGGER_MODE

pub fn is_ext_clock_mode(&self) -> bool[src]

Checks if the value of the field is EXT_CLOCK_MODE

impl R<u32, Reg<u32, _SMCR>>[src]

pub fn etp(&self) -> ETP_R[src]

Bit 15 - External trigger polarity

pub fn ece(&self) -> ECE_R[src]

Bit 14 - External clock enable

pub fn etps(&self) -> ETPS_R[src]

Bits 12:13 - External trigger prescaler

pub fn etf(&self) -> ETF_R[src]

Bits 8:11 - External trigger filter

pub fn msm(&self) -> MSM_R[src]

Bit 7 - Master/Slave mode

pub fn ts(&self) -> TS_R[src]

Bits 4:6 - Trigger selection

pub fn sms(&self) -> SMS_R[src]

Bits 0:2 - Slave mode selection

impl R<bool, TDE_A>[src]

pub fn variant(&self) -> TDE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, CC4DE_A>[src]

pub fn variant(&self) -> CC4DE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, UDE_A>[src]

pub fn variant(&self) -> UDE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, TIE_A>[src]

pub fn variant(&self) -> TIE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, CC4IE_A>[src]

pub fn variant(&self) -> CC4IE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, UIE_A>[src]

pub fn variant(&self) -> UIE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u32, Reg<u32, _DIER>>[src]

pub fn tde(&self) -> TDE_R[src]

Bit 14 - Trigger DMA request enable

pub fn cc4de(&self) -> CC4DE_R[src]

Bit 12 - Capture/Compare 4 DMA request enable

pub fn cc3de(&self) -> CC3DE_R[src]

Bit 11 - Capture/Compare 3 DMA request enable

pub fn cc2de(&self) -> CC2DE_R[src]

Bit 10 - Capture/Compare 2 DMA request enable

pub fn cc1de(&self) -> CC1DE_R[src]

Bit 9 - Capture/Compare 1 DMA request enable

pub fn ude(&self) -> UDE_R[src]

Bit 8 - Update DMA request enable

pub fn tie(&self) -> TIE_R[src]

Bit 6 - Trigger interrupt enable

pub fn cc4ie(&self) -> CC4IE_R[src]

Bit 4 - Capture/Compare 4 interrupt enable

pub fn cc3ie(&self) -> CC3IE_R[src]

Bit 3 - Capture/Compare 3 interrupt enable

pub fn cc2ie(&self) -> CC2IE_R[src]

Bit 2 - Capture/Compare 2 interrupt enable

pub fn cc1ie(&self) -> CC1IE_R[src]

Bit 1 - Capture/Compare 1 interrupt enable

pub fn uie(&self) -> UIE_R[src]

Bit 0 - Update interrupt enable

impl R<bool, CC4OF_A>[src]

pub fn variant(&self) -> Variant<bool, CC4OF_A>[src]

Get enumerated values variant

pub fn is_overcapture(&self) -> bool[src]

Checks if the value of the field is OVERCAPTURE

impl R<bool, TIF_A>[src]

pub fn variant(&self) -> TIF_A[src]

Get enumerated values variant

pub fn is_no_trigger(&self) -> bool[src]

Checks if the value of the field is NOTRIGGER

pub fn is_trigger(&self) -> bool[src]

Checks if the value of the field is TRIGGER

impl R<bool, CC4IF_A>[src]

pub fn variant(&self) -> Variant<bool, CC4IF_A>[src]

Get enumerated values variant

pub fn is_match_(&self) -> bool[src]

Checks if the value of the field is MATCH

impl R<bool, UIF_A>[src]

pub fn variant(&self) -> UIF_A[src]

Get enumerated values variant

pub fn is_clear(&self) -> bool[src]

Checks if the value of the field is CLEAR

pub fn is_update_pending(&self) -> bool[src]

Checks if the value of the field is UPDATEPENDING

impl R<u32, Reg<u32, _SR>>[src]

pub fn cc4of(&self) -> CC4OF_R[src]

Bit 12 - Capture/Compare 4 overcapture flag

pub fn cc3of(&self) -> CC3OF_R[src]

Bit 11 - Capture/Compare 3 overcapture flag

pub fn cc2of(&self) -> CC2OF_R[src]

Bit 10 - Capture/compare 2 overcapture flag

pub fn cc1of(&self) -> CC1OF_R[src]

Bit 9 - Capture/Compare 1 overcapture flag

pub fn tif(&self) -> TIF_R[src]

Bit 6 - Trigger interrupt flag

pub fn cc4if(&self) -> CC4IF_R[src]

Bit 4 - Capture/Compare 4 interrupt flag

pub fn cc3if(&self) -> CC3IF_R[src]

Bit 3 - Capture/Compare 3 interrupt flag

pub fn cc2if(&self) -> CC2IF_R[src]

Bit 2 - Capture/Compare 2 interrupt flag

pub fn cc1if(&self) -> CC1IF_R[src]

Bit 1 - Capture/compare 1 interrupt flag

pub fn uif(&self) -> UIF_R[src]

Bit 0 - Update interrupt flag

impl R<u8, OC2M_A>[src]

pub fn variant(&self) -> OC2M_A[src]

Get enumerated values variant

pub fn is_frozen(&self) -> bool[src]

Checks if the value of the field is FROZEN

pub fn is_active_on_match(&self) -> bool[src]

Checks if the value of the field is ACTIVEONMATCH

pub fn is_inactive_on_match(&self) -> bool[src]

Checks if the value of the field is INACTIVEONMATCH

pub fn is_toggle(&self) -> bool[src]

Checks if the value of the field is TOGGLE

pub fn is_force_inactive(&self) -> bool[src]

Checks if the value of the field is FORCEINACTIVE

pub fn is_force_active(&self) -> bool[src]

Checks if the value of the field is FORCEACTIVE

pub fn is_pwm_mode1(&self) -> bool[src]

Checks if the value of the field is PWMMODE1

pub fn is_pwm_mode2(&self) -> bool[src]

Checks if the value of the field is PWMMODE2

impl R<bool, OC2PE_A>[src]

pub fn variant(&self) -> OC2PE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u8, CC2S_A>[src]

pub fn variant(&self) -> Variant<u8, CC2S_A>[src]

Get enumerated values variant

pub fn is_output(&self) -> bool[src]

Checks if the value of the field is OUTPUT

impl R<bool, OC1PE_A>[src]

pub fn variant(&self) -> OC1PE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u8, CC1S_A>[src]

pub fn variant(&self) -> Variant<u8, CC1S_A>[src]

Get enumerated values variant

pub fn is_output(&self) -> bool[src]

Checks if the value of the field is OUTPUT

impl R<u32, Reg<u32, _CCMR1_OUTPUT>>[src]

pub fn oc2ce(&self) -> OC2CE_R[src]

Bit 15 - Output compare 2 clear enable

pub fn oc2m(&self) -> OC2M_R[src]

Bits 12:14 - Output compare 2 mode

pub fn oc2pe(&self) -> OC2PE_R[src]

Bit 11 - Output compare 2 preload enable

pub fn oc2fe(&self) -> OC2FE_R[src]

Bit 10 - Output compare 2 fast enable

pub fn cc2s(&self) -> CC2S_R[src]

Bits 8:9 - Capture/Compare 2 selection

pub fn oc1ce(&self) -> OC1CE_R[src]

Bit 7 - Output compare 1 clear enable

pub fn oc1m(&self) -> OC1M_R[src]

Bits 4:6 - Output compare 1 mode

pub fn oc1pe(&self) -> OC1PE_R[src]

Bit 3 - Output compare 1 preload enable

pub fn oc1fe(&self) -> OC1FE_R[src]

Bit 2 - Output compare 1 fast enable

pub fn cc1s(&self) -> CC1S_R[src]

Bits 0:1 - Capture/Compare 1 selection

impl R<u8, CC2S_A>[src]

pub fn variant(&self) -> Variant<u8, CC2S_A>[src]

Get enumerated values variant

pub fn is_ti2(&self) -> bool[src]

Checks if the value of the field is TI2

pub fn is_ti1(&self) -> bool[src]

Checks if the value of the field is TI1

pub fn is_trc(&self) -> bool[src]

Checks if the value of the field is TRC

impl R<u8, IC1F_A>[src]

pub fn variant(&self) -> IC1F_A[src]

Get enumerated values variant

pub fn is_no_filter(&self) -> bool[src]

Checks if the value of the field is NOFILTER

pub fn is_fck_int_n2(&self) -> bool[src]

Checks if the value of the field is FCK_INT_N2

pub fn is_fck_int_n4(&self) -> bool[src]

Checks if the value of the field is FCK_INT_N4

pub fn is_fck_int_n8(&self) -> bool[src]

Checks if the value of the field is FCK_INT_N8

pub fn is_fdts_div2_n6(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV2_N6

pub fn is_fdts_div2_n8(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV2_N8

pub fn is_fdts_div4_n6(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV4_N6

pub fn is_fdts_div4_n8(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV4_N8

pub fn is_fdts_div8_n6(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV8_N6

pub fn is_fdts_div8_n8(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV8_N8

pub fn is_fdts_div16_n5(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV16_N5

pub fn is_fdts_div16_n6(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV16_N6

pub fn is_fdts_div16_n8(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV16_N8

pub fn is_fdts_div32_n5(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV32_N5

pub fn is_fdts_div32_n6(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV32_N6

pub fn is_fdts_div32_n8(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV32_N8

impl R<u8, CC1S_A>[src]

pub fn variant(&self) -> Variant<u8, CC1S_A>[src]

Get enumerated values variant

pub fn is_ti1(&self) -> bool[src]

Checks if the value of the field is TI1

pub fn is_ti2(&self) -> bool[src]

Checks if the value of the field is TI2

pub fn is_trc(&self) -> bool[src]

Checks if the value of the field is TRC

impl R<u32, Reg<u32, _CCMR1_INPUT>>[src]

pub fn ic2f(&self) -> IC2F_R[src]

Bits 12:15 - Input capture 2 filter

pub fn ic2psc(&self) -> IC2PSC_R[src]

Bits 10:11 - Input capture 2 prescaler

pub fn cc2s(&self) -> CC2S_R[src]

Bits 8:9 - Capture/compare 2 selection

pub fn ic1f(&self) -> IC1F_R[src]

Bits 4:7 - Input capture 1 filter

pub fn ic1psc(&self) -> IC1PSC_R[src]

Bits 2:3 - Input capture 1 prescaler

pub fn cc1s(&self) -> CC1S_R[src]

Bits 0:1 - Capture/Compare 1 selection

impl R<u8, OC4M_A>[src]

pub fn variant(&self) -> OC4M_A[src]

Get enumerated values variant

pub fn is_frozen(&self) -> bool[src]

Checks if the value of the field is FROZEN

pub fn is_active_on_match(&self) -> bool[src]

Checks if the value of the field is ACTIVEONMATCH

pub fn is_inactive_on_match(&self) -> bool[src]

Checks if the value of the field is INACTIVEONMATCH

pub fn is_toggle(&self) -> bool[src]

Checks if the value of the field is TOGGLE

pub fn is_force_inactive(&self) -> bool[src]

Checks if the value of the field is FORCEINACTIVE

pub fn is_force_active(&self) -> bool[src]

Checks if the value of the field is FORCEACTIVE

pub fn is_pwm_mode1(&self) -> bool[src]

Checks if the value of the field is PWMMODE1

pub fn is_pwm_mode2(&self) -> bool[src]

Checks if the value of the field is PWMMODE2

impl R<bool, OC4PE_A>[src]

pub fn variant(&self) -> OC4PE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u8, CC4S_A>[src]

pub fn variant(&self) -> Variant<u8, CC4S_A>[src]

Get enumerated values variant

pub fn is_output(&self) -> bool[src]

Checks if the value of the field is OUTPUT

impl R<bool, OC3PE_A>[src]

pub fn variant(&self) -> OC3PE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u8, CC3S_A>[src]

pub fn variant(&self) -> Variant<u8, CC3S_A>[src]

Get enumerated values variant

pub fn is_output(&self) -> bool[src]

Checks if the value of the field is OUTPUT

impl R<u32, Reg<u32, _CCMR2_OUTPUT>>[src]

pub fn oc4ce(&self) -> OC4CE_R[src]

Bit 15 - Output compare 4 clear enable

pub fn oc4m(&self) -> OC4M_R[src]

Bits 12:14 - Output compare 4 mode

pub fn oc4pe(&self) -> OC4PE_R[src]

Bit 11 - Output compare 4 preload enable

pub fn oc4fe(&self) -> OC4FE_R[src]

Bit 10 - Output compare 4 fast enable

pub fn cc4s(&self) -> CC4S_R[src]

Bits 8:9 - Capture/Compare 4 selection

pub fn oc3ce(&self) -> OC3CE_R[src]

Bit 7 - Output compare 3 clear enable

pub fn oc3m(&self) -> OC3M_R[src]

Bits 4:6 - Output compare 3 mode

pub fn oc3pe(&self) -> OC3PE_R[src]

Bit 3 - Output compare 3 preload enable

pub fn oc3fe(&self) -> OC3FE_R[src]

Bit 2 - Output compare 3 fast enable

pub fn cc3s(&self) -> CC3S_R[src]

Bits 0:1 - Capture/Compare 3 selection

impl R<u8, CC4S_A>[src]

pub fn variant(&self) -> Variant<u8, CC4S_A>[src]

Get enumerated values variant

pub fn is_ti4(&self) -> bool[src]

Checks if the value of the field is TI4

pub fn is_ti3(&self) -> bool[src]

Checks if the value of the field is TI3

pub fn is_trc(&self) -> bool[src]

Checks if the value of the field is TRC

impl R<u8, CC3S_A>[src]

pub fn variant(&self) -> Variant<u8, CC3S_A>[src]

Get enumerated values variant

pub fn is_ti3(&self) -> bool[src]

Checks if the value of the field is TI3

pub fn is_ti4(&self) -> bool[src]

Checks if the value of the field is TI4

pub fn is_trc(&self) -> bool[src]

Checks if the value of the field is TRC

impl R<u32, Reg<u32, _CCMR2_INPUT>>[src]

pub fn ic4f(&self) -> IC4F_R[src]

Bits 12:15 - Input capture 4 filter

pub fn ic4psc(&self) -> IC4PSC_R[src]

Bits 10:11 - Input capture 4 prescaler

pub fn cc4s(&self) -> CC4S_R[src]

Bits 8:9 - Capture/Compare 4 selection

pub fn ic3f(&self) -> IC3F_R[src]

Bits 4:7 - Input capture 3 filter

pub fn ic3psc(&self) -> IC3PSC_R[src]

Bits 2:3 - Input capture 3 prescaler

pub fn cc3s(&self) -> CC3S_R[src]

Bits 0:1 - Capture/Compare 3 selection

impl R<u32, Reg<u32, _CCER>>[src]

pub fn cc1e(&self) -> CC1E_R[src]

Bit 0 - Capture/Compare 1 output enable

pub fn cc1p(&self) -> CC1P_R[src]

Bit 1 - Capture/Compare 1 output Polarity

pub fn cc1np(&self) -> CC1NP_R[src]

Bit 3 - Capture/Compare 1 output Polarity

pub fn cc2e(&self) -> CC2E_R[src]

Bit 4 - Capture/Compare 2 output enable

pub fn cc2p(&self) -> CC2P_R[src]

Bit 5 - Capture/Compare 2 output Polarity

pub fn cc2np(&self) -> CC2NP_R[src]

Bit 7 - Capture/Compare 2 output Polarity

pub fn cc3e(&self) -> CC3E_R[src]

Bit 8 - Capture/Compare 3 output enable

pub fn cc3p(&self) -> CC3P_R[src]

Bit 9 - Capture/Compare 3 output Polarity

pub fn cc3np(&self) -> CC3NP_R[src]

Bit 11 - Capture/Compare 3 output Polarity

pub fn cc4e(&self) -> CC4E_R[src]

Bit 12 - Capture/Compare 4 output enable

pub fn cc4p(&self) -> CC4P_R[src]

Bit 13 - Capture/Compare 3 output Polarity

pub fn cc4np(&self) -> CC4NP_R[src]

Bit 15 - Capture/Compare 3 output Polarity

impl R<u32, Reg<u32, _CNT>>[src]

pub fn cnt(&self) -> CNT_R[src]

Bits 0:31 - Low counter value

impl R<u32, Reg<u32, _PSC>>[src]

pub fn psc(&self) -> PSC_R[src]

Bits 0:15 - Prescaler value

impl R<u32, Reg<u32, _ARR>>[src]

pub fn arr(&self) -> ARR_R[src]

Bits 0:31 - Low Auto-reload value

impl R<u32, Reg<u32, _CCR>>[src]

pub fn ccr(&self) -> CCR_R[src]

Bits 0:31 - Low Capture/Compare 1 value

impl R<u32, Reg<u32, _DCR>>[src]

pub fn dbl(&self) -> DBL_R[src]

Bits 8:12 - DMA burst length

pub fn dba(&self) -> DBA_R[src]

Bits 0:4 - DMA base address

impl R<u32, Reg<u32, _DMAR>>[src]

pub fn dmab(&self) -> DMAB_R[src]

Bits 0:15 - DMA register for burst accesses

impl R<u32, Reg<u32, _OR>>[src]

pub fn it4_rmp(&self) -> IT4_RMP_R[src]

Bits 6:7 - Timer Input 4 remap

impl R<u8, CKD_A>[src]

pub fn variant(&self) -> Variant<u8, CKD_A>[src]

Get enumerated values variant

pub fn is_div1(&self) -> bool[src]

Checks if the value of the field is DIV1

pub fn is_div2(&self) -> bool[src]

Checks if the value of the field is DIV2

pub fn is_div4(&self) -> bool[src]

Checks if the value of the field is DIV4

impl R<bool, ARPE_A>[src]

pub fn variant(&self) -> ARPE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u8, CMS_A>[src]

pub fn variant(&self) -> CMS_A[src]

Get enumerated values variant

pub fn is_edge_aligned(&self) -> bool[src]

Checks if the value of the field is EDGEALIGNED

pub fn is_center_aligned1(&self) -> bool[src]

Checks if the value of the field is CENTERALIGNED1

pub fn is_center_aligned2(&self) -> bool[src]

Checks if the value of the field is CENTERALIGNED2

pub fn is_center_aligned3(&self) -> bool[src]

Checks if the value of the field is CENTERALIGNED3

impl R<bool, DIR_A>[src]

pub fn variant(&self) -> DIR_A[src]

Get enumerated values variant

pub fn is_up(&self) -> bool[src]

Checks if the value of the field is UP

pub fn is_down(&self) -> bool[src]

Checks if the value of the field is DOWN

impl R<bool, OPM_A>[src]

pub fn variant(&self) -> OPM_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, URS_A>[src]

pub fn variant(&self) -> URS_A[src]

Get enumerated values variant

pub fn is_any_event(&self) -> bool[src]

Checks if the value of the field is ANYEVENT

pub fn is_counter_only(&self) -> bool[src]

Checks if the value of the field is COUNTERONLY

impl R<bool, UDIS_A>[src]

pub fn variant(&self) -> UDIS_A[src]

Get enumerated values variant

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

impl R<bool, CEN_A>[src]

pub fn variant(&self) -> CEN_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u32, Reg<u32, _CR1>>[src]

pub fn ckd(&self) -> CKD_R[src]

Bits 8:9 - Clock division

pub fn arpe(&self) -> ARPE_R[src]

Bit 7 - Auto-reload preload enable

pub fn cms(&self) -> CMS_R[src]

Bits 5:6 - Center-aligned mode selection

pub fn dir(&self) -> DIR_R[src]

Bit 4 - Direction

pub fn opm(&self) -> OPM_R[src]

Bit 3 - One-pulse mode

pub fn urs(&self) -> URS_R[src]

Bit 2 - Update request source

pub fn udis(&self) -> UDIS_R[src]

Bit 1 - Update disable

pub fn cen(&self) -> CEN_R[src]

Bit 0 - Counter enable

impl R<bool, TI1S_A>[src]

pub fn variant(&self) -> TI1S_A[src]

Get enumerated values variant

pub fn is_normal(&self) -> bool[src]

Checks if the value of the field is NORMAL

pub fn is_xor(&self) -> bool[src]

Checks if the value of the field is XOR

impl R<u8, MMS_A>[src]

pub fn variant(&self) -> MMS_A[src]

Get enumerated values variant

pub fn is_reset(&self) -> bool[src]

Checks if the value of the field is RESET

pub fn is_enable(&self) -> bool[src]

Checks if the value of the field is ENABLE

pub fn is_update(&self) -> bool[src]

Checks if the value of the field is UPDATE

pub fn is_compare_pulse(&self) -> bool[src]

Checks if the value of the field is COMPAREPULSE

pub fn is_compare_oc1(&self) -> bool[src]

Checks if the value of the field is COMPAREOC1

pub fn is_compare_oc2(&self) -> bool[src]

Checks if the value of the field is COMPAREOC2

pub fn is_compare_oc3(&self) -> bool[src]

Checks if the value of the field is COMPAREOC3

pub fn is_compare_oc4(&self) -> bool[src]

Checks if the value of the field is COMPAREOC4

impl R<bool, CCDS_A>[src]

pub fn variant(&self) -> CCDS_A[src]

Get enumerated values variant

pub fn is_on_compare(&self) -> bool[src]

Checks if the value of the field is ONCOMPARE

pub fn is_on_update(&self) -> bool[src]

Checks if the value of the field is ONUPDATE

impl R<u32, Reg<u32, _CR2>>[src]

pub fn ti1s(&self) -> TI1S_R[src]

Bit 7 - TI1 selection

pub fn mms(&self) -> MMS_R[src]

Bits 4:6 - Master mode selection

pub fn ccds(&self) -> CCDS_R[src]

Bit 3 - Capture/compare DMA selection

impl R<bool, ETP_A>[src]

pub fn variant(&self) -> ETP_A[src]

Get enumerated values variant

pub fn is_not_inverted(&self) -> bool[src]

Checks if the value of the field is NOTINVERTED

pub fn is_inverted(&self) -> bool[src]

Checks if the value of the field is INVERTED

impl R<bool, ECE_A>[src]

pub fn variant(&self) -> ECE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u8, ETPS_A>[src]

pub fn variant(&self) -> ETPS_A[src]

Get enumerated values variant

pub fn is_div1(&self) -> bool[src]

Checks if the value of the field is DIV1

pub fn is_div2(&self) -> bool[src]

Checks if the value of the field is DIV2

pub fn is_div4(&self) -> bool[src]

Checks if the value of the field is DIV4

pub fn is_div8(&self) -> bool[src]

Checks if the value of the field is DIV8

impl R<u8, ETF_A>[src]

pub fn variant(&self) -> ETF_A[src]

Get enumerated values variant

pub fn is_no_filter(&self) -> bool[src]

Checks if the value of the field is NOFILTER

pub fn is_fck_int_n2(&self) -> bool[src]

Checks if the value of the field is FCK_INT_N2

pub fn is_fck_int_n4(&self) -> bool[src]

Checks if the value of the field is FCK_INT_N4

pub fn is_fck_int_n8(&self) -> bool[src]

Checks if the value of the field is FCK_INT_N8

pub fn is_fdts_div2_n6(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV2_N6

pub fn is_fdts_div2_n8(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV2_N8

pub fn is_fdts_div4_n6(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV4_N6

pub fn is_fdts_div4_n8(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV4_N8

pub fn is_fdts_div8_n6(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV8_N6

pub fn is_fdts_div8_n8(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV8_N8

pub fn is_fdts_div16_n5(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV16_N5

pub fn is_fdts_div16_n6(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV16_N6

pub fn is_fdts_div16_n8(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV16_N8

pub fn is_fdts_div32_n5(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV32_N5

pub fn is_fdts_div32_n6(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV32_N6

pub fn is_fdts_div32_n8(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV32_N8

impl R<bool, MSM_A>[src]

pub fn variant(&self) -> MSM_A[src]

Get enumerated values variant

pub fn is_no_sync(&self) -> bool[src]

Checks if the value of the field is NOSYNC

pub fn is_sync(&self) -> bool[src]

Checks if the value of the field is SYNC

impl R<u8, TS_A>[src]

pub fn variant(&self) -> Variant<u8, TS_A>[src]

Get enumerated values variant

pub fn is_itr0(&self) -> bool[src]

Checks if the value of the field is ITR0

pub fn is_itr1(&self) -> bool[src]

Checks if the value of the field is ITR1

pub fn is_itr2(&self) -> bool[src]

Checks if the value of the field is ITR2

pub fn is_ti1f_ed(&self) -> bool[src]

Checks if the value of the field is TI1F_ED

pub fn is_ti1fp1(&self) -> bool[src]

Checks if the value of the field is TI1FP1

pub fn is_ti2fp2(&self) -> bool[src]

Checks if the value of the field is TI2FP2

pub fn is_etrf(&self) -> bool[src]

Checks if the value of the field is ETRF

impl R<u8, SMS_A>[src]

pub fn variant(&self) -> SMS_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_encoder_mode_1(&self) -> bool[src]

Checks if the value of the field is ENCODER_MODE_1

pub fn is_encoder_mode_2(&self) -> bool[src]

Checks if the value of the field is ENCODER_MODE_2

pub fn is_encoder_mode_3(&self) -> bool[src]

Checks if the value of the field is ENCODER_MODE_3

pub fn is_reset_mode(&self) -> bool[src]

Checks if the value of the field is RESET_MODE

pub fn is_gated_mode(&self) -> bool[src]

Checks if the value of the field is GATED_MODE

pub fn is_trigger_mode(&self) -> bool[src]

Checks if the value of the field is TRIGGER_MODE

pub fn is_ext_clock_mode(&self) -> bool[src]

Checks if the value of the field is EXT_CLOCK_MODE

impl R<u32, Reg<u32, _SMCR>>[src]

pub fn etp(&self) -> ETP_R[src]

Bit 15 - External trigger polarity

pub fn ece(&self) -> ECE_R[src]

Bit 14 - External clock enable

pub fn etps(&self) -> ETPS_R[src]

Bits 12:13 - External trigger prescaler

pub fn etf(&self) -> ETF_R[src]

Bits 8:11 - External trigger filter

pub fn msm(&self) -> MSM_R[src]

Bit 7 - Master/Slave mode

pub fn ts(&self) -> TS_R[src]

Bits 4:6 - Trigger selection

pub fn sms(&self) -> SMS_R[src]

Bits 0:2 - Slave mode selection

impl R<bool, TDE_A>[src]

pub fn variant(&self) -> TDE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, CC4DE_A>[src]

pub fn variant(&self) -> CC4DE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, UDE_A>[src]

pub fn variant(&self) -> UDE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, TIE_A>[src]

pub fn variant(&self) -> TIE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, CC4IE_A>[src]

pub fn variant(&self) -> CC4IE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, UIE_A>[src]

pub fn variant(&self) -> UIE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u32, Reg<u32, _DIER>>[src]

pub fn tde(&self) -> TDE_R[src]

Bit 14 - Trigger DMA request enable

pub fn cc4de(&self) -> CC4DE_R[src]

Bit 12 - Capture/Compare 4 DMA request enable

pub fn cc3de(&self) -> CC3DE_R[src]

Bit 11 - Capture/Compare 3 DMA request enable

pub fn cc2de(&self) -> CC2DE_R[src]

Bit 10 - Capture/Compare 2 DMA request enable

pub fn cc1de(&self) -> CC1DE_R[src]

Bit 9 - Capture/Compare 1 DMA request enable

pub fn ude(&self) -> UDE_R[src]

Bit 8 - Update DMA request enable

pub fn tie(&self) -> TIE_R[src]

Bit 6 - Trigger interrupt enable

pub fn cc4ie(&self) -> CC4IE_R[src]

Bit 4 - Capture/Compare 4 interrupt enable

pub fn cc3ie(&self) -> CC3IE_R[src]

Bit 3 - Capture/Compare 3 interrupt enable

pub fn cc2ie(&self) -> CC2IE_R[src]

Bit 2 - Capture/Compare 2 interrupt enable

pub fn cc1ie(&self) -> CC1IE_R[src]

Bit 1 - Capture/Compare 1 interrupt enable

pub fn uie(&self) -> UIE_R[src]

Bit 0 - Update interrupt enable

impl R<bool, CC4OF_A>[src]

pub fn variant(&self) -> Variant<bool, CC4OF_A>[src]

Get enumerated values variant

pub fn is_overcapture(&self) -> bool[src]

Checks if the value of the field is OVERCAPTURE

impl R<bool, TIF_A>[src]

pub fn variant(&self) -> TIF_A[src]

Get enumerated values variant

pub fn is_no_trigger(&self) -> bool[src]

Checks if the value of the field is NOTRIGGER

pub fn is_trigger(&self) -> bool[src]

Checks if the value of the field is TRIGGER

impl R<bool, CC4IF_A>[src]

pub fn variant(&self) -> Variant<bool, CC4IF_A>[src]

Get enumerated values variant

pub fn is_match_(&self) -> bool[src]

Checks if the value of the field is MATCH

impl R<bool, UIF_A>[src]

pub fn variant(&self) -> UIF_A[src]

Get enumerated values variant

pub fn is_clear(&self) -> bool[src]

Checks if the value of the field is CLEAR

pub fn is_update_pending(&self) -> bool[src]

Checks if the value of the field is UPDATEPENDING

impl R<u32, Reg<u32, _SR>>[src]

pub fn cc4of(&self) -> CC4OF_R[src]

Bit 12 - Capture/Compare 4 overcapture flag

pub fn cc3of(&self) -> CC3OF_R[src]

Bit 11 - Capture/Compare 3 overcapture flag

pub fn cc2of(&self) -> CC2OF_R[src]

Bit 10 - Capture/compare 2 overcapture flag

pub fn cc1of(&self) -> CC1OF_R[src]

Bit 9 - Capture/Compare 1 overcapture flag

pub fn tif(&self) -> TIF_R[src]

Bit 6 - Trigger interrupt flag

pub fn cc4if(&self) -> CC4IF_R[src]

Bit 4 - Capture/Compare 4 interrupt flag

pub fn cc3if(&self) -> CC3IF_R[src]

Bit 3 - Capture/Compare 3 interrupt flag

pub fn cc2if(&self) -> CC2IF_R[src]

Bit 2 - Capture/Compare 2 interrupt flag

pub fn cc1if(&self) -> CC1IF_R[src]

Bit 1 - Capture/compare 1 interrupt flag

pub fn uif(&self) -> UIF_R[src]

Bit 0 - Update interrupt flag

impl R<u8, OC2M_A>[src]

pub fn variant(&self) -> OC2M_A[src]

Get enumerated values variant

pub fn is_frozen(&self) -> bool[src]

Checks if the value of the field is FROZEN

pub fn is_active_on_match(&self) -> bool[src]

Checks if the value of the field is ACTIVEONMATCH

pub fn is_inactive_on_match(&self) -> bool[src]

Checks if the value of the field is INACTIVEONMATCH

pub fn is_toggle(&self) -> bool[src]

Checks if the value of the field is TOGGLE

pub fn is_force_inactive(&self) -> bool[src]

Checks if the value of the field is FORCEINACTIVE

pub fn is_force_active(&self) -> bool[src]

Checks if the value of the field is FORCEACTIVE

pub fn is_pwm_mode1(&self) -> bool[src]

Checks if the value of the field is PWMMODE1

pub fn is_pwm_mode2(&self) -> bool[src]

Checks if the value of the field is PWMMODE2

impl R<bool, OC2PE_A>[src]

pub fn variant(&self) -> OC2PE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u8, CC2S_A>[src]

pub fn variant(&self) -> Variant<u8, CC2S_A>[src]

Get enumerated values variant

pub fn is_output(&self) -> bool[src]

Checks if the value of the field is OUTPUT

impl R<bool, OC1PE_A>[src]

pub fn variant(&self) -> OC1PE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u8, CC1S_A>[src]

pub fn variant(&self) -> Variant<u8, CC1S_A>[src]

Get enumerated values variant

pub fn is_output(&self) -> bool[src]

Checks if the value of the field is OUTPUT

impl R<u32, Reg<u32, _CCMR1_OUTPUT>>[src]

pub fn oc2ce(&self) -> OC2CE_R[src]

Bit 15 - Output compare 2 clear enable

pub fn oc2m(&self) -> OC2M_R[src]

Bits 12:14 - Output compare 2 mode

pub fn oc2pe(&self) -> OC2PE_R[src]

Bit 11 - Output compare 2 preload enable

pub fn oc2fe(&self) -> OC2FE_R[src]

Bit 10 - Output compare 2 fast enable

pub fn cc2s(&self) -> CC2S_R[src]

Bits 8:9 - Capture/Compare 2 selection

pub fn oc1ce(&self) -> OC1CE_R[src]

Bit 7 - Output compare 1 clear enable

pub fn oc1m(&self) -> OC1M_R[src]

Bits 4:6 - Output compare 1 mode

pub fn oc1pe(&self) -> OC1PE_R[src]

Bit 3 - Output compare 1 preload enable

pub fn oc1fe(&self) -> OC1FE_R[src]

Bit 2 - Output compare 1 fast enable

pub fn cc1s(&self) -> CC1S_R[src]

Bits 0:1 - Capture/Compare 1 selection

impl R<u8, CC2S_A>[src]

pub fn variant(&self) -> Variant<u8, CC2S_A>[src]

Get enumerated values variant

pub fn is_ti2(&self) -> bool[src]

Checks if the value of the field is TI2

pub fn is_ti1(&self) -> bool[src]

Checks if the value of the field is TI1

pub fn is_trc(&self) -> bool[src]

Checks if the value of the field is TRC

impl R<u8, IC1F_A>[src]

pub fn variant(&self) -> IC1F_A[src]

Get enumerated values variant

pub fn is_no_filter(&self) -> bool[src]

Checks if the value of the field is NOFILTER

pub fn is_fck_int_n2(&self) -> bool[src]

Checks if the value of the field is FCK_INT_N2

pub fn is_fck_int_n4(&self) -> bool[src]

Checks if the value of the field is FCK_INT_N4

pub fn is_fck_int_n8(&self) -> bool[src]

Checks if the value of the field is FCK_INT_N8

pub fn is_fdts_div2_n6(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV2_N6

pub fn is_fdts_div2_n8(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV2_N8

pub fn is_fdts_div4_n6(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV4_N6

pub fn is_fdts_div4_n8(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV4_N8

pub fn is_fdts_div8_n6(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV8_N6

pub fn is_fdts_div8_n8(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV8_N8

pub fn is_fdts_div16_n5(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV16_N5

pub fn is_fdts_div16_n6(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV16_N6

pub fn is_fdts_div16_n8(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV16_N8

pub fn is_fdts_div32_n5(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV32_N5

pub fn is_fdts_div32_n6(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV32_N6

pub fn is_fdts_div32_n8(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV32_N8

impl R<u8, CC1S_A>[src]

pub fn variant(&self) -> Variant<u8, CC1S_A>[src]

Get enumerated values variant

pub fn is_ti1(&self) -> bool[src]

Checks if the value of the field is TI1

pub fn is_ti2(&self) -> bool[src]

Checks if the value of the field is TI2

pub fn is_trc(&self) -> bool[src]

Checks if the value of the field is TRC

impl R<u32, Reg<u32, _CCMR1_INPUT>>[src]

pub fn ic2f(&self) -> IC2F_R[src]

Bits 12:15 - Input capture 2 filter

pub fn ic2psc(&self) -> IC2PSC_R[src]

Bits 10:11 - Input capture 2 prescaler

pub fn cc2s(&self) -> CC2S_R[src]

Bits 8:9 - Capture/compare 2 selection

pub fn ic1f(&self) -> IC1F_R[src]

Bits 4:7 - Input capture 1 filter

pub fn ic1psc(&self) -> IC1PSC_R[src]

Bits 2:3 - Input capture 1 prescaler

pub fn cc1s(&self) -> CC1S_R[src]

Bits 0:1 - Capture/Compare 1 selection

impl R<u8, OC4M_A>[src]

pub fn variant(&self) -> OC4M_A[src]

Get enumerated values variant

pub fn is_frozen(&self) -> bool[src]

Checks if the value of the field is FROZEN

pub fn is_active_on_match(&self) -> bool[src]

Checks if the value of the field is ACTIVEONMATCH

pub fn is_inactive_on_match(&self) -> bool[src]

Checks if the value of the field is INACTIVEONMATCH

pub fn is_toggle(&self) -> bool[src]

Checks if the value of the field is TOGGLE

pub fn is_force_inactive(&self) -> bool[src]

Checks if the value of the field is FORCEINACTIVE

pub fn is_force_active(&self) -> bool[src]

Checks if the value of the field is FORCEACTIVE

pub fn is_pwm_mode1(&self) -> bool[src]

Checks if the value of the field is PWMMODE1

pub fn is_pwm_mode2(&self) -> bool[src]

Checks if the value of the field is PWMMODE2

impl R<bool, OC4PE_A>[src]

pub fn variant(&self) -> OC4PE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u8, CC4S_A>[src]

pub fn variant(&self) -> Variant<u8, CC4S_A>[src]

Get enumerated values variant

pub fn is_output(&self) -> bool[src]

Checks if the value of the field is OUTPUT

impl R<bool, OC3PE_A>[src]

pub fn variant(&self) -> OC3PE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u8, CC3S_A>[src]

pub fn variant(&self) -> Variant<u8, CC3S_A>[src]

Get enumerated values variant

pub fn is_output(&self) -> bool[src]

Checks if the value of the field is OUTPUT

impl R<u32, Reg<u32, _CCMR2_OUTPUT>>[src]

pub fn oc4ce(&self) -> OC4CE_R[src]

Bit 15 - Output compare 4 clear enable

pub fn oc4m(&self) -> OC4M_R[src]

Bits 12:14 - Output compare 4 mode

pub fn oc4pe(&self) -> OC4PE_R[src]

Bit 11 - Output compare 4 preload enable

pub fn oc4fe(&self) -> OC4FE_R[src]

Bit 10 - Output compare 4 fast enable

pub fn cc4s(&self) -> CC4S_R[src]

Bits 8:9 - Capture/Compare 4 selection

pub fn oc3ce(&self) -> OC3CE_R[src]

Bit 7 - Output compare 3 clear enable

pub fn oc3m(&self) -> OC3M_R[src]

Bits 4:6 - Output compare 3 mode

pub fn oc3pe(&self) -> OC3PE_R[src]

Bit 3 - Output compare 3 preload enable

pub fn oc3fe(&self) -> OC3FE_R[src]

Bit 2 - Output compare 3 fast enable

pub fn cc3s(&self) -> CC3S_R[src]

Bits 0:1 - Capture/Compare 3 selection

impl R<u8, CC4S_A>[src]

pub fn variant(&self) -> Variant<u8, CC4S_A>[src]

Get enumerated values variant

pub fn is_ti4(&self) -> bool[src]

Checks if the value of the field is TI4

pub fn is_ti3(&self) -> bool[src]

Checks if the value of the field is TI3

pub fn is_trc(&self) -> bool[src]

Checks if the value of the field is TRC

impl R<u8, CC3S_A>[src]

pub fn variant(&self) -> Variant<u8, CC3S_A>[src]

Get enumerated values variant

pub fn is_ti3(&self) -> bool[src]

Checks if the value of the field is TI3

pub fn is_ti4(&self) -> bool[src]

Checks if the value of the field is TI4

pub fn is_trc(&self) -> bool[src]

Checks if the value of the field is TRC

impl R<u32, Reg<u32, _CCMR2_INPUT>>[src]

pub fn ic4f(&self) -> IC4F_R[src]

Bits 12:15 - Input capture 4 filter

pub fn ic4psc(&self) -> IC4PSC_R[src]

Bits 10:11 - Input capture 4 prescaler

pub fn cc4s(&self) -> CC4S_R[src]

Bits 8:9 - Capture/Compare 4 selection

pub fn ic3f(&self) -> IC3F_R[src]

Bits 4:7 - Input capture 3 filter

pub fn ic3psc(&self) -> IC3PSC_R[src]

Bits 2:3 - Input capture 3 prescaler

pub fn cc3s(&self) -> CC3S_R[src]

Bits 0:1 - Capture/Compare 3 selection

impl R<u32, Reg<u32, _CCER>>[src]

pub fn cc1e(&self) -> CC1E_R[src]

Bit 0 - Capture/Compare 1 output enable

pub fn cc1p(&self) -> CC1P_R[src]

Bit 1 - Capture/Compare 1 output Polarity

pub fn cc1np(&self) -> CC1NP_R[src]

Bit 3 - Capture/Compare 1 output Polarity

pub fn cc2e(&self) -> CC2E_R[src]

Bit 4 - Capture/Compare 2 output enable

pub fn cc2p(&self) -> CC2P_R[src]

Bit 5 - Capture/Compare 2 output Polarity

pub fn cc2np(&self) -> CC2NP_R[src]

Bit 7 - Capture/Compare 2 output Polarity

pub fn cc3e(&self) -> CC3E_R[src]

Bit 8 - Capture/Compare 3 output enable

pub fn cc3p(&self) -> CC3P_R[src]

Bit 9 - Capture/Compare 3 output Polarity

pub fn cc3np(&self) -> CC3NP_R[src]

Bit 11 - Capture/Compare 3 output Polarity

pub fn cc4e(&self) -> CC4E_R[src]

Bit 12 - Capture/Compare 4 output enable

pub fn cc4p(&self) -> CC4P_R[src]

Bit 13 - Capture/Compare 3 output Polarity

pub fn cc4np(&self) -> CC4NP_R[src]

Bit 15 - Capture/Compare 3 output Polarity

impl R<u32, Reg<u32, _CNT>>[src]

pub fn cnt(&self) -> CNT_R[src]

Bits 0:15 - counter value

impl R<u32, Reg<u32, _PSC>>[src]

pub fn psc(&self) -> PSC_R[src]

Bits 0:15 - Prescaler value

impl R<u32, Reg<u32, _ARR>>[src]

pub fn arr(&self) -> ARR_R[src]

Bits 0:15 - Auto-reload value

impl R<u32, Reg<u32, _CCR>>[src]

pub fn ccr(&self) -> CCR_R[src]

Bits 0:15 - Capture/Compare 1 value

impl R<u32, Reg<u32, _DCR>>[src]

pub fn dbl(&self) -> DBL_R[src]

Bits 8:12 - DMA burst length

pub fn dba(&self) -> DBA_R[src]

Bits 0:4 - DMA base address

impl R<u32, Reg<u32, _DMAR>>[src]

pub fn dmab(&self) -> DMAB_R[src]

Bits 0:15 - DMA register for burst accesses

impl R<u8, CKD_A>[src]

pub fn variant(&self) -> Variant<u8, CKD_A>[src]

Get enumerated values variant

pub fn is_div1(&self) -> bool[src]

Checks if the value of the field is DIV1

pub fn is_div2(&self) -> bool[src]

Checks if the value of the field is DIV2

pub fn is_div4(&self) -> bool[src]

Checks if the value of the field is DIV4

impl R<bool, ARPE_A>[src]

pub fn variant(&self) -> ARPE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, URS_A>[src]

pub fn variant(&self) -> URS_A[src]

Get enumerated values variant

pub fn is_any_event(&self) -> bool[src]

Checks if the value of the field is ANYEVENT

pub fn is_counter_only(&self) -> bool[src]

Checks if the value of the field is COUNTERONLY

impl R<bool, UDIS_A>[src]

pub fn variant(&self) -> UDIS_A[src]

Get enumerated values variant

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

impl R<bool, CEN_A>[src]

pub fn variant(&self) -> CEN_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u32, Reg<u32, _CR1>>[src]

pub fn ckd(&self) -> CKD_R[src]

Bits 8:9 - Clock division

pub fn arpe(&self) -> ARPE_R[src]

Bit 7 - Auto-reload preload enable

pub fn opm(&self) -> OPM_R[src]

Bit 3 - One-pulse mode

pub fn urs(&self) -> URS_R[src]

Bit 2 - Update request source

pub fn udis(&self) -> UDIS_R[src]

Bit 1 - Update disable

pub fn cen(&self) -> CEN_R[src]

Bit 0 - Counter enable

impl R<u32, Reg<u32, _CR2>>[src]

pub fn ois2(&self) -> OIS2_R[src]

Bit 10 - Output Idle state 2

pub fn ois1n(&self) -> OIS1N_R[src]

Bit 9 - Output Idle state 1

pub fn ois1(&self) -> OIS1_R[src]

Bit 8 - Output Idle state 1

pub fn mms(&self) -> MMS_R[src]

Bits 4:6 - Master mode selection

pub fn ccds(&self) -> CCDS_R[src]

Bit 3 - Capture/compare DMA selection

pub fn ccus(&self) -> CCUS_R[src]

Bit 2 - Capture/compare control update selection

pub fn ccpc(&self) -> CCPC_R[src]

Bit 0 - Capture/compare preloaded control

impl R<u32, Reg<u32, _SMCR>>[src]

pub fn msm(&self) -> MSM_R[src]

Bit 7 - Master/Slave mode

pub fn ts(&self) -> TS_R[src]

Bits 4:6 - Trigger selection

pub fn sms(&self) -> SMS_R[src]

Bits 0:2 - Slave mode selection

impl R<bool, UIE_A>[src]

pub fn variant(&self) -> UIE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u32, Reg<u32, _DIER>>[src]

pub fn tde(&self) -> TDE_R[src]

Bit 14 - Trigger DMA request enable

pub fn cc2de(&self) -> CC2DE_R[src]

Bit 10 - Capture/Compare 2 DMA request enable

pub fn cc1de(&self) -> CC1DE_R[src]

Bit 9 - Capture/Compare 1 DMA request enable

pub fn ude(&self) -> UDE_R[src]

Bit 8 - Update DMA request enable

pub fn bie(&self) -> BIE_R[src]

Bit 7 - Break interrupt enable

pub fn tie(&self) -> TIE_R[src]

Bit 6 - Trigger interrupt enable

pub fn comie(&self) -> COMIE_R[src]

Bit 5 - COM interrupt enable

pub fn cc2ie(&self) -> CC2IE_R[src]

Bit 2 - Capture/Compare 2 interrupt enable

pub fn cc1ie(&self) -> CC1IE_R[src]

Bit 1 - Capture/Compare 1 interrupt enable

pub fn uie(&self) -> UIE_R[src]

Bit 0 - Update interrupt enable

impl R<bool, UIF_A>[src]

pub fn variant(&self) -> UIF_A[src]

Get enumerated values variant

pub fn is_clear(&self) -> bool[src]

Checks if the value of the field is CLEAR

pub fn is_update_pending(&self) -> bool[src]

Checks if the value of the field is UPDATEPENDING

impl R<u32, Reg<u32, _SR>>[src]

pub fn cc2of(&self) -> CC2OF_R[src]

Bit 10 - Capture/compare 2 overcapture flag

pub fn cc1of(&self) -> CC1OF_R[src]

Bit 9 - Capture/Compare 1 overcapture flag

pub fn bif(&self) -> BIF_R[src]

Bit 7 - Break interrupt flag

pub fn tif(&self) -> TIF_R[src]

Bit 6 - Trigger interrupt flag

pub fn comif(&self) -> COMIF_R[src]

Bit 5 - COM interrupt flag

pub fn cc2if(&self) -> CC2IF_R[src]

Bit 2 - Capture/Compare 2 interrupt flag

pub fn cc1if(&self) -> CC1IF_R[src]

Bit 1 - Capture/compare 1 interrupt flag

pub fn uif(&self) -> UIF_R[src]

Bit 0 - Update interrupt flag

impl R<u32, Reg<u32, _CCMR1_OUTPUT>>[src]

pub fn oc2m(&self) -> OC2M_R[src]

Bits 12:14 - Output Compare 2 mode

pub fn oc2pe(&self) -> OC2PE_R[src]

Bit 11 - Output Compare 2 preload enable

pub fn oc2fe(&self) -> OC2FE_R[src]

Bit 10 - Output Compare 2 fast enable

pub fn cc2s(&self) -> CC2S_R[src]

Bits 8:9 - Capture/Compare 2 selection

pub fn oc1m(&self) -> OC1M_R[src]

Bits 4:6 - Output Compare 1 mode

pub fn oc1pe(&self) -> OC1PE_R[src]

Bit 3 - Output Compare 1 preload enable

pub fn oc1fe(&self) -> OC1FE_R[src]

Bit 2 - Output Compare 1 fast enable

pub fn cc1s(&self) -> CC1S_R[src]

Bits 0:1 - Capture/Compare 1 selection

impl R<u32, Reg<u32, _CCMR1_INPUT>>[src]

pub fn ic2f(&self) -> IC2F_R[src]

Bits 12:15 - Input capture 2 filter

pub fn ic2psc(&self) -> IC2PSC_R[src]

Bits 10:11 - Input capture 2 prescaler

pub fn cc2s(&self) -> CC2S_R[src]

Bits 8:9 - Capture/Compare 2 selection

pub fn ic1f(&self) -> IC1F_R[src]

Bits 4:7 - Input capture 1 filter

pub fn ic1psc(&self) -> IC1PSC_R[src]

Bits 2:3 - Input capture 1 prescaler

pub fn cc1s(&self) -> CC1S_R[src]

Bits 0:1 - Capture/Compare 1 selection

impl R<u32, Reg<u32, _CCER>>[src]

pub fn cc2np(&self) -> CC2NP_R[src]

Bit 7 - Capture/Compare 2 output Polarity

pub fn cc2p(&self) -> CC2P_R[src]

Bit 5 - Capture/Compare 2 output Polarity

pub fn cc2e(&self) -> CC2E_R[src]

Bit 4 - Capture/Compare 2 output enable

pub fn cc1np(&self) -> CC1NP_R[src]

Bit 3 - Capture/Compare 1 output Polarity

pub fn cc1ne(&self) -> CC1NE_R[src]

Bit 2 - Capture/Compare 1 complementary output enable

pub fn cc1p(&self) -> CC1P_R[src]

Bit 1 - Capture/Compare 1 output Polarity

pub fn cc1e(&self) -> CC1E_R[src]

Bit 0 - Capture/Compare 1 output enable

impl R<u32, Reg<u32, _CNT>>[src]

pub fn cnt(&self) -> CNT_R[src]

Bits 0:15 - counter value

impl R<u32, Reg<u32, _PSC>>[src]

pub fn psc(&self) -> PSC_R[src]

Bits 0:15 - Prescaler value

impl R<u32, Reg<u32, _ARR>>[src]

pub fn arr(&self) -> ARR_R[src]

Bits 0:15 - Auto-reload value

impl R<u32, Reg<u32, _RCR>>[src]

pub fn rep(&self) -> REP_R[src]

Bits 0:7 - Repetition counter value

impl R<u32, Reg<u32, _CCR1>>[src]

pub fn ccr1(&self) -> CCR1_R[src]

Bits 0:15 - Capture/Compare 1 value

impl R<u32, Reg<u32, _CCR2>>[src]

pub fn ccr2(&self) -> CCR2_R[src]

Bits 0:15 - Capture/Compare 2 value

impl R<u32, Reg<u32, _BDTR>>[src]

pub fn moe(&self) -> MOE_R[src]

Bit 15 - Main output enable

pub fn aoe(&self) -> AOE_R[src]

Bit 14 - Automatic output enable

pub fn bkp(&self) -> BKP_R[src]

Bit 13 - Break polarity

pub fn bke(&self) -> BKE_R[src]

Bit 12 - Break enable

pub fn ossr(&self) -> OSSR_R[src]

Bit 11 - Off-state selection for Run mode

pub fn ossi(&self) -> OSSI_R[src]

Bit 10 - Off-state selection for Idle mode

pub fn lock(&self) -> LOCK_R[src]

Bits 8:9 - Lock configuration

pub fn dtg(&self) -> DTG_R[src]

Bits 0:7 - Dead-time generator setup

impl R<u32, Reg<u32, _DCR>>[src]

pub fn dbl(&self) -> DBL_R[src]

Bits 8:12 - DMA burst length

pub fn dba(&self) -> DBA_R[src]

Bits 0:4 - DMA base address

impl R<u32, Reg<u32, _DMAR>>[src]

pub fn dmab(&self) -> DMAB_R[src]

Bits 0:15 - DMA register for burst accesses

impl R<u8, CKD_A>[src]

pub fn variant(&self) -> Variant<u8, CKD_A>[src]

Get enumerated values variant

pub fn is_div1(&self) -> bool[src]

Checks if the value of the field is DIV1

pub fn is_div2(&self) -> bool[src]

Checks if the value of the field is DIV2

pub fn is_div4(&self) -> bool[src]

Checks if the value of the field is DIV4

impl R<bool, ARPE_A>[src]

pub fn variant(&self) -> ARPE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, OPM_A>[src]

pub fn variant(&self) -> OPM_A[src]

Get enumerated values variant

pub fn is_not_stopped(&self) -> bool[src]

Checks if the value of the field is NOTSTOPPED

pub fn is_stopped(&self) -> bool[src]

Checks if the value of the field is STOPPED

impl R<bool, URS_A>[src]

pub fn variant(&self) -> URS_A[src]

Get enumerated values variant

pub fn is_any_event(&self) -> bool[src]

Checks if the value of the field is ANYEVENT

pub fn is_counter_only(&self) -> bool[src]

Checks if the value of the field is COUNTERONLY

impl R<bool, UDIS_A>[src]

pub fn variant(&self) -> UDIS_A[src]

Get enumerated values variant

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

impl R<bool, CEN_A>[src]

pub fn variant(&self) -> CEN_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u32, Reg<u32, _CR1>>[src]

pub fn ckd(&self) -> CKD_R[src]

Bits 8:9 - Clock division

pub fn arpe(&self) -> ARPE_R[src]

Bit 7 - Auto-reload preload enable

pub fn opm(&self) -> OPM_R[src]

Bit 3 - One-pulse mode

pub fn urs(&self) -> URS_R[src]

Bit 2 - Update request source

pub fn udis(&self) -> UDIS_R[src]

Bit 1 - Update disable

pub fn cen(&self) -> CEN_R[src]

Bit 0 - Counter enable

impl R<bool, OIS1N_A>[src]

pub fn variant(&self) -> OIS1N_A[src]

Get enumerated values variant

pub fn is_low(&self) -> bool[src]

Checks if the value of the field is LOW

pub fn is_high(&self) -> bool[src]

Checks if the value of the field is HIGH

impl R<bool, OIS1_A>[src]

pub fn variant(&self) -> OIS1_A[src]

Get enumerated values variant

pub fn is_low(&self) -> bool[src]

Checks if the value of the field is LOW

pub fn is_high(&self) -> bool[src]

Checks if the value of the field is HIGH

impl R<bool, CCDS_A>[src]

pub fn variant(&self) -> CCDS_A[src]

Get enumerated values variant

pub fn is_on_compare(&self) -> bool[src]

Checks if the value of the field is ONCOMPARE

pub fn is_on_update(&self) -> bool[src]

Checks if the value of the field is ONUPDATE

impl R<bool, CCUS_A>[src]

pub fn variant(&self) -> CCUS_A[src]

Get enumerated values variant

pub fn is_default(&self) -> bool[src]

Checks if the value of the field is DEFAULT

pub fn is_with_rising_edge(&self) -> bool[src]

Checks if the value of the field is WITHRISINGEDGE

impl R<bool, CCPC_A>[src]

pub fn variant(&self) -> CCPC_A[src]

Get enumerated values variant

pub fn is_not_preloaded(&self) -> bool[src]

Checks if the value of the field is NOTPRELOADED

pub fn is_preloaded(&self) -> bool[src]

Checks if the value of the field is PRELOADED

impl R<u32, Reg<u32, _CR2>>[src]

pub fn ois1n(&self) -> OIS1N_R[src]

Bit 9 - Output Idle state 1

pub fn ois1(&self) -> OIS1_R[src]

Bit 8 - Output Idle state 1

pub fn ccds(&self) -> CCDS_R[src]

Bit 3 - Capture/compare DMA selection

pub fn ccus(&self) -> CCUS_R[src]

Bit 2 - Capture/compare control update selection

pub fn ccpc(&self) -> CCPC_R[src]

Bit 0 - Capture/compare preloaded control

impl R<bool, CC1DE_A>[src]

pub fn variant(&self) -> CC1DE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, BIE_A>[src]

pub fn variant(&self) -> BIE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, COMIE_A>[src]

pub fn variant(&self) -> COMIE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, CC1IE_A>[src]

pub fn variant(&self) -> CC1IE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, UIE_A>[src]

pub fn variant(&self) -> UIE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u32, Reg<u32, _DIER>>[src]

pub fn tde(&self) -> TDE_R[src]

Bit 14 - Trigger DMA request enable

pub fn cc1de(&self) -> CC1DE_R[src]

Bit 9 - Capture/Compare 1 DMA request enable

pub fn ude(&self) -> UDE_R[src]

Bit 8 - Update DMA request enable

pub fn bie(&self) -> BIE_R[src]

Bit 7 - Break interrupt enable

pub fn tie(&self) -> TIE_R[src]

Bit 6 - Trigger interrupt enable

pub fn comie(&self) -> COMIE_R[src]

Bit 5 - COM interrupt enable

pub fn cc1ie(&self) -> CC1IE_R[src]

Bit 1 - Capture/Compare 1 interrupt enable

pub fn uie(&self) -> UIE_R[src]

Bit 0 - Update interrupt enable

impl R<bool, UIF_A>[src]

pub fn variant(&self) -> UIF_A[src]

Get enumerated values variant

pub fn is_clear(&self) -> bool[src]

Checks if the value of the field is CLEAR

pub fn is_update_pending(&self) -> bool[src]

Checks if the value of the field is UPDATEPENDING

impl R<u32, Reg<u32, _SR>>[src]

pub fn cc1of(&self) -> CC1OF_R[src]

Bit 9 - Capture/Compare 1 overcapture flag

pub fn bif(&self) -> BIF_R[src]

Bit 7 - Break interrupt flag

pub fn tif(&self) -> TIF_R[src]

Bit 6 - Trigger interrupt flag

pub fn comif(&self) -> COMIF_R[src]

Bit 5 - COM interrupt flag

pub fn cc1if(&self) -> CC1IF_R[src]

Bit 1 - Capture/compare 1 interrupt flag

pub fn uif(&self) -> UIF_R[src]

Bit 0 - Update interrupt flag

impl R<u32, Reg<u32, _CCMR1_OUTPUT>>[src]

pub fn oc1m(&self) -> OC1M_R[src]

Bits 4:6 - Output Compare 1 mode

pub fn oc1pe(&self) -> OC1PE_R[src]

Bit 3 - Output Compare 1 preload enable

pub fn oc1fe(&self) -> OC1FE_R[src]

Bit 2 - Output Compare 1 fast enable

pub fn cc1s(&self) -> CC1S_R[src]

Bits 0:1 - Capture/Compare 1 selection

impl R<u32, Reg<u32, _CCMR1_INPUT>>[src]

pub fn ic1f(&self) -> IC1F_R[src]

Bits 4:7 - Input capture 1 filter

pub fn ic1psc(&self) -> IC1PSC_R[src]

Bits 2:3 - Input capture 1 prescaler

pub fn cc1s(&self) -> CC1S_R[src]

Bits 0:1 - Capture/Compare 1 selection

impl R<u32, Reg<u32, _CCER>>[src]

pub fn cc1np(&self) -> CC1NP_R[src]

Bit 3 - Capture/Compare 1 output Polarity

pub fn cc1ne(&self) -> CC1NE_R[src]

Bit 2 - Capture/Compare 1 complementary output enable

pub fn cc1p(&self) -> CC1P_R[src]

Bit 1 - Capture/Compare 1 output Polarity

pub fn cc1e(&self) -> CC1E_R[src]

Bit 0 - Capture/Compare 1 output enable

impl R<u32, Reg<u32, _CNT>>[src]

pub fn cnt(&self) -> CNT_R[src]

Bits 0:15 - counter value

impl R<u32, Reg<u32, _PSC>>[src]

pub fn psc(&self) -> PSC_R[src]

Bits 0:15 - Prescaler value

impl R<u32, Reg<u32, _ARR>>[src]

pub fn arr(&self) -> ARR_R[src]

Bits 0:15 - Auto-reload value

impl R<u32, Reg<u32, _RCR>>[src]

pub fn rep(&self) -> REP_R[src]

Bits 0:7 - Repetition counter value

impl R<u32, Reg<u32, _CCR1>>[src]

pub fn ccr1(&self) -> CCR1_R[src]

Bits 0:15 - Capture/Compare 1 value

impl R<u32, Reg<u32, _BDTR>>[src]

pub fn moe(&self) -> MOE_R[src]

Bit 15 - Main output enable

pub fn aoe(&self) -> AOE_R[src]

Bit 14 - Automatic output enable

pub fn bkp(&self) -> BKP_R[src]

Bit 13 - Break polarity

pub fn bke(&self) -> BKE_R[src]

Bit 12 - Break enable

pub fn ossr(&self) -> OSSR_R[src]

Bit 11 - Off-state selection for Run mode

pub fn ossi(&self) -> OSSI_R[src]

Bit 10 - Off-state selection for Idle mode

pub fn lock(&self) -> LOCK_R[src]

Bits 8:9 - Lock configuration

pub fn dtg(&self) -> DTG_R[src]

Bits 0:7 - Dead-time generator setup

impl R<u32, Reg<u32, _DCR>>[src]

pub fn dbl(&self) -> DBL_R[src]

Bits 8:12 - DMA burst length

pub fn dba(&self) -> DBA_R[src]

Bits 0:4 - DMA base address

impl R<u32, Reg<u32, _DMAR>>[src]

pub fn dmab(&self) -> DMAB_R[src]

Bits 0:15 - DMA register for burst accesses

impl R<bool, EOBIE_A>[src]

pub fn variant(&self) -> EOBIE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, RTOIE_A>[src]

pub fn variant(&self) -> RTOIE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, OVER8_A>[src]

pub fn variant(&self) -> OVER8_A[src]

Get enumerated values variant

pub fn is_oversampling16(&self) -> bool[src]

Checks if the value of the field is OVERSAMPLING16

pub fn is_oversampling8(&self) -> bool[src]

Checks if the value of the field is OVERSAMPLING8

impl R<bool, CMIE_A>[src]

pub fn variant(&self) -> CMIE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, MME_A>[src]

pub fn variant(&self) -> MME_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, M_A>[src]

pub fn variant(&self) -> M_A[src]

Get enumerated values variant

pub fn is_bit8(&self) -> bool[src]

Checks if the value of the field is BIT8

pub fn is_bit9(&self) -> bool[src]

Checks if the value of the field is BIT9

impl R<bool, WAKE_A>[src]

pub fn variant(&self) -> WAKE_A[src]

Get enumerated values variant

pub fn is_idle(&self) -> bool[src]

Checks if the value of the field is IDLE

pub fn is_address(&self) -> bool[src]

Checks if the value of the field is ADDRESS

impl R<bool, PCE_A>[src]

pub fn variant(&self) -> PCE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, PS_A>[src]

pub fn variant(&self) -> PS_A[src]

Get enumerated values variant

pub fn is_even(&self) -> bool[src]

Checks if the value of the field is EVEN

pub fn is_odd(&self) -> bool[src]

Checks if the value of the field is ODD

impl R<bool, PEIE_A>[src]

pub fn variant(&self) -> PEIE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, TXEIE_A>[src]

pub fn variant(&self) -> TXEIE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, TCIE_A>[src]

pub fn variant(&self) -> TCIE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, RXNEIE_A>[src]

pub fn variant(&self) -> RXNEIE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, IDLEIE_A>[src]

pub fn variant(&self) -> IDLEIE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, TE_A>[src]

pub fn variant(&self) -> TE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, RE_A>[src]

pub fn variant(&self) -> RE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, UESM_A>[src]

pub fn variant(&self) -> UESM_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, UE_A>[src]

pub fn variant(&self) -> UE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u32, Reg<u32, _CR1>>[src]

pub fn eobie(&self) -> EOBIE_R[src]

Bit 27 - End of Block interrupt enable

pub fn rtoie(&self) -> RTOIE_R[src]

Bit 26 - Receiver timeout interrupt enable

pub fn deat(&self) -> DEAT_R[src]

Bits 21:25 - Driver Enable assertion time

pub fn dedt(&self) -> DEDT_R[src]

Bits 16:20 - Driver Enable deassertion time

pub fn over8(&self) -> OVER8_R[src]

Bit 15 - Oversampling mode

pub fn cmie(&self) -> CMIE_R[src]

Bit 14 - Character match interrupt enable

pub fn mme(&self) -> MME_R[src]

Bit 13 - Mute mode enable

pub fn m(&self) -> M_R[src]

Bit 12 - Word length

pub fn wake(&self) -> WAKE_R[src]

Bit 11 - Receiver wakeup method

pub fn pce(&self) -> PCE_R[src]

Bit 10 - Parity control enable

pub fn ps(&self) -> PS_R[src]

Bit 9 - Parity selection

pub fn peie(&self) -> PEIE_R[src]

Bit 8 - PE interrupt enable

pub fn txeie(&self) -> TXEIE_R[src]

Bit 7 - interrupt enable

pub fn tcie(&self) -> TCIE_R[src]

Bit 6 - Transmission complete interrupt enable

pub fn rxneie(&self) -> RXNEIE_R[src]

Bit 5 - RXNE interrupt enable

pub fn idleie(&self) -> IDLEIE_R[src]

Bit 4 - IDLE interrupt enable

pub fn te(&self) -> TE_R[src]

Bit 3 - Transmitter enable

pub fn re(&self) -> RE_R[src]

Bit 2 - Receiver enable

pub fn uesm(&self) -> UESM_R[src]

Bit 1 - USART enable in Stop mode

pub fn ue(&self) -> UE_R[src]

Bit 0 - USART enable

impl R<bool, RTOEN_A>[src]

pub fn variant(&self) -> RTOEN_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u8, ABRMOD_A>[src]

pub fn variant(&self) -> ABRMOD_A[src]

Get enumerated values variant

pub fn is_start(&self) -> bool[src]

Checks if the value of the field is START

pub fn is_edge(&self) -> bool[src]

Checks if the value of the field is EDGE

pub fn is_frame7f(&self) -> bool[src]

Checks if the value of the field is FRAME7F

pub fn is_frame55(&self) -> bool[src]

Checks if the value of the field is FRAME55

impl R<bool, ABREN_A>[src]

pub fn variant(&self) -> ABREN_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, MSBFIRST_A>[src]

pub fn variant(&self) -> MSBFIRST_A[src]

Get enumerated values variant

pub fn is_lsb(&self) -> bool[src]

Checks if the value of the field is LSB

pub fn is_msb(&self) -> bool[src]

Checks if the value of the field is MSB

impl R<bool, DATAINV_A>[src]

pub fn variant(&self) -> DATAINV_A[src]

Get enumerated values variant

pub fn is_positive(&self) -> bool[src]

Checks if the value of the field is POSITIVE

pub fn is_negative(&self) -> bool[src]

Checks if the value of the field is NEGATIVE

impl R<bool, TXINV_A>[src]

pub fn variant(&self) -> TXINV_A[src]

Get enumerated values variant

pub fn is_standard(&self) -> bool[src]

Checks if the value of the field is STANDARD

pub fn is_inverted(&self) -> bool[src]

Checks if the value of the field is INVERTED

impl R<bool, RXINV_A>[src]

pub fn variant(&self) -> RXINV_A[src]

Get enumerated values variant

pub fn is_standard(&self) -> bool[src]

Checks if the value of the field is STANDARD

pub fn is_inverted(&self) -> bool[src]

Checks if the value of the field is INVERTED

impl R<bool, SWAP_A>[src]

pub fn variant(&self) -> SWAP_A[src]

Get enumerated values variant

pub fn is_standard(&self) -> bool[src]

Checks if the value of the field is STANDARD

pub fn is_swapped(&self) -> bool[src]

Checks if the value of the field is SWAPPED

impl R<bool, LINEN_A>[src]

pub fn variant(&self) -> LINEN_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u8, STOP_A>[src]

pub fn variant(&self) -> STOP_A[src]

Get enumerated values variant

pub fn is_stop1(&self) -> bool[src]

Checks if the value of the field is STOP1

pub fn is_stop0p5(&self) -> bool[src]

Checks if the value of the field is STOP0P5

pub fn is_stop2(&self) -> bool[src]

Checks if the value of the field is STOP2

pub fn is_stop1p5(&self) -> bool[src]

Checks if the value of the field is STOP1P5

impl R<bool, CLKEN_A>[src]

pub fn variant(&self) -> CLKEN_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, CPOL_A>[src]

pub fn variant(&self) -> CPOL_A[src]

Get enumerated values variant

pub fn is_low(&self) -> bool[src]

Checks if the value of the field is LOW

pub fn is_high(&self) -> bool[src]

Checks if the value of the field is HIGH

impl R<bool, CPHA_A>[src]

pub fn variant(&self) -> CPHA_A[src]

Get enumerated values variant

pub fn is_first(&self) -> bool[src]

Checks if the value of the field is FIRST

pub fn is_second(&self) -> bool[src]

Checks if the value of the field is SECOND

impl R<bool, LBCL_A>[src]

pub fn variant(&self) -> LBCL_A[src]

Get enumerated values variant

pub fn is_not_output(&self) -> bool[src]

Checks if the value of the field is NOTOUTPUT

pub fn is_output(&self) -> bool[src]

Checks if the value of the field is OUTPUT

impl R<bool, LBDIE_A>[src]

pub fn variant(&self) -> LBDIE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, LBDL_A>[src]

pub fn variant(&self) -> LBDL_A[src]

Get enumerated values variant

pub fn is_bit10(&self) -> bool[src]

Checks if the value of the field is BIT10

pub fn is_bit11(&self) -> bool[src]

Checks if the value of the field is BIT11

impl R<bool, ADDM7_A>[src]

pub fn variant(&self) -> ADDM7_A[src]

Get enumerated values variant

pub fn is_bit4(&self) -> bool[src]

Checks if the value of the field is BIT4

pub fn is_bit7(&self) -> bool[src]

Checks if the value of the field is BIT7

impl R<u32, Reg<u32, _CR2>>[src]

pub fn rtoen(&self) -> RTOEN_R[src]

Bit 23 - Receiver timeout enable

pub fn abrmod(&self) -> ABRMOD_R[src]

Bits 21:22 - Auto baud rate mode

pub fn abren(&self) -> ABREN_R[src]

Bit 20 - Auto baud rate enable

pub fn msbfirst(&self) -> MSBFIRST_R[src]

Bit 19 - Most significant bit first

pub fn datainv(&self) -> DATAINV_R[src]

Bit 18 - Binary data inversion

pub fn txinv(&self) -> TXINV_R[src]

Bit 17 - TX pin active level inversion

pub fn rxinv(&self) -> RXINV_R[src]

Bit 16 - RX pin active level inversion

pub fn swap(&self) -> SWAP_R[src]

Bit 15 - Swap TX/RX pins

pub fn linen(&self) -> LINEN_R[src]

Bit 14 - LIN mode enable

pub fn stop(&self) -> STOP_R[src]

Bits 12:13 - STOP bits

pub fn clken(&self) -> CLKEN_R[src]

Bit 11 - Clock enable

pub fn cpol(&self) -> CPOL_R[src]

Bit 10 - Clock polarity

pub fn cpha(&self) -> CPHA_R[src]

Bit 9 - Clock phase

pub fn lbcl(&self) -> LBCL_R[src]

Bit 8 - Last bit clock pulse

pub fn lbdie(&self) -> LBDIE_R[src]

Bit 6 - LIN break detection interrupt enable

pub fn lbdl(&self) -> LBDL_R[src]

Bit 5 - LIN break detection length

pub fn addm7(&self) -> ADDM7_R[src]

Bit 4 - 7-bit Address Detection/4-bit Address Detection

pub fn add(&self) -> ADD_R[src]

Bits 24:31 - Address of the USART node

impl R<bool, WUFIE_A>[src]

pub fn variant(&self) -> WUFIE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u8, WUS_A>[src]

pub fn variant(&self) -> Variant<u8, WUS_A>[src]

Get enumerated values variant

pub fn is_address(&self) -> bool[src]

Checks if the value of the field is ADDRESS

pub fn is_start(&self) -> bool[src]

Checks if the value of the field is START

pub fn is_rxne(&self) -> bool[src]

Checks if the value of the field is RXNE

impl R<bool, DEP_A>[src]

pub fn variant(&self) -> DEP_A[src]

Get enumerated values variant

pub fn is_high(&self) -> bool[src]

Checks if the value of the field is HIGH

pub fn is_low(&self) -> bool[src]

Checks if the value of the field is LOW

impl R<bool, DEM_A>[src]

pub fn variant(&self) -> DEM_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, DDRE_A>[src]

pub fn variant(&self) -> DDRE_A[src]

Get enumerated values variant

pub fn is_not_disabled(&self) -> bool[src]

Checks if the value of the field is NOTDISABLED

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

impl R<bool, OVRDIS_A>[src]

pub fn variant(&self) -> OVRDIS_A[src]

Get enumerated values variant

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

impl R<bool, ONEBIT_A>[src]

pub fn variant(&self) -> ONEBIT_A[src]

Get enumerated values variant

pub fn is_sample3(&self) -> bool[src]

Checks if the value of the field is SAMPLE3

pub fn is_sample1(&self) -> bool[src]

Checks if the value of the field is SAMPLE1

impl R<bool, CTSIE_A>[src]

pub fn variant(&self) -> CTSIE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, CTSE_A>[src]

pub fn variant(&self) -> CTSE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, RTSE_A>[src]

pub fn variant(&self) -> RTSE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, DMAT_A>[src]

pub fn variant(&self) -> DMAT_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, DMAR_A>[src]

pub fn variant(&self) -> DMAR_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, SCEN_A>[src]

pub fn variant(&self) -> SCEN_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, NACK_A>[src]

pub fn variant(&self) -> NACK_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, HDSEL_A>[src]

pub fn variant(&self) -> HDSEL_A[src]

Get enumerated values variant

pub fn is_not_selected(&self) -> bool[src]

Checks if the value of the field is NOTSELECTED

pub fn is_selected(&self) -> bool[src]

Checks if the value of the field is SELECTED

impl R<bool, IRLP_A>[src]

pub fn variant(&self) -> IRLP_A[src]

Get enumerated values variant

pub fn is_normal(&self) -> bool[src]

Checks if the value of the field is NORMAL

pub fn is_low_power(&self) -> bool[src]

Checks if the value of the field is LOWPOWER

impl R<bool, IREN_A>[src]

pub fn variant(&self) -> IREN_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, EIE_A>[src]

pub fn variant(&self) -> EIE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u32, Reg<u32, _CR3>>[src]

pub fn wufie(&self) -> WUFIE_R[src]

Bit 22 - Wakeup from Stop mode interrupt enable

pub fn wus(&self) -> WUS_R[src]

Bits 20:21 - Wakeup from Stop mode interrupt flag selection

pub fn scarcnt(&self) -> SCARCNT_R[src]

Bits 17:19 - Smartcard auto-retry count

pub fn dep(&self) -> DEP_R[src]

Bit 15 - Driver enable polarity selection

pub fn dem(&self) -> DEM_R[src]

Bit 14 - Driver enable mode

pub fn ddre(&self) -> DDRE_R[src]

Bit 13 - DMA Disable on Reception Error

pub fn ovrdis(&self) -> OVRDIS_R[src]

Bit 12 - Overrun Disable

pub fn onebit(&self) -> ONEBIT_R[src]

Bit 11 - One sample bit method enable

pub fn ctsie(&self) -> CTSIE_R[src]

Bit 10 - CTS interrupt enable

pub fn ctse(&self) -> CTSE_R[src]

Bit 9 - CTS enable

pub fn rtse(&self) -> RTSE_R[src]

Bit 8 - RTS enable

pub fn dmat(&self) -> DMAT_R[src]

Bit 7 - DMA enable transmitter

pub fn dmar(&self) -> DMAR_R[src]

Bit 6 - DMA enable receiver

pub fn scen(&self) -> SCEN_R[src]

Bit 5 - Smartcard mode enable

pub fn nack(&self) -> NACK_R[src]

Bit 4 - Smartcard NACK enable

pub fn hdsel(&self) -> HDSEL_R[src]

Bit 3 - Half-duplex selection

pub fn irlp(&self) -> IRLP_R[src]

Bit 2 - IrDA low-power

pub fn iren(&self) -> IREN_R[src]

Bit 1 - IrDA mode enable

pub fn eie(&self) -> EIE_R[src]

Bit 0 - Error interrupt enable

impl R<u32, Reg<u32, _BRR>>[src]

pub fn brr(&self) -> BRR_R[src]

Bits 0:15 - mantissa of USARTDIV

impl R<u32, Reg<u32, _GTPR>>[src]

pub fn gt(&self) -> GT_R[src]

Bits 8:15 - Guard time value

pub fn psc(&self) -> PSC_R[src]

Bits 0:7 - Prescaler value

impl R<u32, Reg<u32, _RTOR>>[src]

pub fn blen(&self) -> BLEN_R[src]

Bits 24:31 - Block Length

pub fn rto(&self) -> RTO_R[src]

Bits 0:23 - Receiver timeout value

impl R<bool, TXFRQ_A>[src]

pub fn variant(&self) -> Variant<bool, TXFRQ_A>[src]

Get enumerated values variant

pub fn is_discard(&self) -> bool[src]

Checks if the value of the field is DISCARD

impl R<bool, RXFRQ_A>[src]

pub fn variant(&self) -> Variant<bool, RXFRQ_A>[src]

Get enumerated values variant

pub fn is_discard(&self) -> bool[src]

Checks if the value of the field is DISCARD

impl R<bool, MMRQ_A>[src]

pub fn variant(&self) -> Variant<bool, MMRQ_A>[src]

Get enumerated values variant

pub fn is_mute(&self) -> bool[src]

Checks if the value of the field is MUTE

impl R<bool, SBKRQ_A>[src]

pub fn variant(&self) -> Variant<bool, SBKRQ_A>[src]

Get enumerated values variant

pub fn is_break_(&self) -> bool[src]

Checks if the value of the field is BREAK

impl R<bool, ABRRQ_A>[src]

pub fn variant(&self) -> Variant<bool, ABRRQ_A>[src]

Get enumerated values variant

pub fn is_request(&self) -> bool[src]

Checks if the value of the field is REQUEST

impl R<u32, Reg<u32, _RQR>>[src]

pub fn txfrq(&self) -> TXFRQ_R[src]

Bit 4 - Transmit data flush request

pub fn rxfrq(&self) -> RXFRQ_R[src]

Bit 3 - Receive data flush request

pub fn mmrq(&self) -> MMRQ_R[src]

Bit 2 - Mute mode request

pub fn sbkrq(&self) -> SBKRQ_R[src]

Bit 1 - Send break request

pub fn abrrq(&self) -> ABRRQ_R[src]

Bit 0 - Auto baud rate request

impl R<u32, Reg<u32, _ISR>>[src]

pub fn reack(&self) -> REACK_R[src]

Bit 22 - Receive enable acknowledge flag

pub fn teack(&self) -> TEACK_R[src]

Bit 21 - Transmit enable acknowledge flag

pub fn wuf(&self) -> WUF_R[src]

Bit 20 - Wakeup from Stop mode flag

pub fn rwu(&self) -> RWU_R[src]

Bit 19 - Receiver wakeup from Mute mode

pub fn sbkf(&self) -> SBKF_R[src]

Bit 18 - Send break flag

pub fn cmf(&self) -> CMF_R[src]

Bit 17 - character match flag

pub fn busy(&self) -> BUSY_R[src]

Bit 16 - Busy flag

pub fn abrf(&self) -> ABRF_R[src]

Bit 15 - Auto baud rate flag

pub fn abre(&self) -> ABRE_R[src]

Bit 14 - Auto baud rate error

pub fn eobf(&self) -> EOBF_R[src]

Bit 12 - End of block flag

pub fn rtof(&self) -> RTOF_R[src]

Bit 11 - Receiver timeout

pub fn cts(&self) -> CTS_R[src]

Bit 10 - CTS flag

pub fn ctsif(&self) -> CTSIF_R[src]

Bit 9 - CTS interrupt flag

pub fn lbdf(&self) -> LBDF_R[src]

Bit 8 - LIN break detection flag

pub fn txe(&self) -> TXE_R[src]

Bit 7 - Transmit data register empty

pub fn tc(&self) -> TC_R[src]

Bit 6 - Transmission complete

pub fn rxne(&self) -> RXNE_R[src]

Bit 5 - Read data register not empty

pub fn idle(&self) -> IDLE_R[src]

Bit 4 - Idle line detected

pub fn ore(&self) -> ORE_R[src]

Bit 3 - Overrun error

pub fn nf(&self) -> NF_R[src]

Bit 2 - Noise detected flag

pub fn fe(&self) -> FE_R[src]

Bit 1 - Framing error

pub fn pe(&self) -> PE_R[src]

Bit 0 - Parity error

impl R<bool, WUCF_A>[src]

pub fn variant(&self) -> Variant<bool, WUCF_A>[src]

Get enumerated values variant

pub fn is_clear(&self) -> bool[src]

Checks if the value of the field is CLEAR

impl R<bool, CMCF_A>[src]

pub fn variant(&self) -> Variant<bool, CMCF_A>[src]

Get enumerated values variant

pub fn is_clear(&self) -> bool[src]

Checks if the value of the field is CLEAR

impl R<bool, EOBCF_A>[src]

pub fn variant(&self) -> Variant<bool, EOBCF_A>[src]

Get enumerated values variant

pub fn is_clear(&self) -> bool[src]

Checks if the value of the field is CLEAR

impl R<bool, RTOCF_A>[src]

pub fn variant(&self) -> Variant<bool, RTOCF_A>[src]

Get enumerated values variant

pub fn is_clear(&self) -> bool[src]

Checks if the value of the field is CLEAR

impl R<bool, CTSCF_A>[src]

pub fn variant(&self) -> Variant<bool, CTSCF_A>[src]

Get enumerated values variant

pub fn is_clear(&self) -> bool[src]

Checks if the value of the field is CLEAR

impl R<bool, LBDCF_A>[src]

pub fn variant(&self) -> Variant<bool, LBDCF_A>[src]

Get enumerated values variant

pub fn is_clear(&self) -> bool[src]

Checks if the value of the field is CLEAR

impl R<bool, TCCF_A>[src]

pub fn variant(&self) -> Variant<bool, TCCF_A>[src]

Get enumerated values variant

pub fn is_clear(&self) -> bool[src]

Checks if the value of the field is CLEAR

impl R<bool, IDLECF_A>[src]

pub fn variant(&self) -> Variant<bool, IDLECF_A>[src]

Get enumerated values variant

pub fn is_clear(&self) -> bool[src]

Checks if the value of the field is CLEAR

impl R<bool, ORECF_A>[src]

pub fn variant(&self) -> Variant<bool, ORECF_A>[src]

Get enumerated values variant

pub fn is_clear(&self) -> bool[src]

Checks if the value of the field is CLEAR

impl R<bool, NCF_A>[src]

pub fn variant(&self) -> Variant<bool, NCF_A>[src]

Get enumerated values variant

pub fn is_clear(&self) -> bool[src]

Checks if the value of the field is CLEAR

impl R<bool, FECF_A>[src]

pub fn variant(&self) -> Variant<bool, FECF_A>[src]

Get enumerated values variant

pub fn is_clear(&self) -> bool[src]

Checks if the value of the field is CLEAR

impl R<bool, PECF_A>[src]

pub fn variant(&self) -> Variant<bool, PECF_A>[src]

Get enumerated values variant

pub fn is_clear(&self) -> bool[src]

Checks if the value of the field is CLEAR

impl R<u32, Reg<u32, _ICR>>[src]

pub fn wucf(&self) -> WUCF_R[src]

Bit 20 - Wakeup from Stop mode clear flag

pub fn cmcf(&self) -> CMCF_R[src]

Bit 17 - Character match clear flag

pub fn eobcf(&self) -> EOBCF_R[src]

Bit 12 - End of timeout clear flag

pub fn rtocf(&self) -> RTOCF_R[src]

Bit 11 - Receiver timeout clear flag

pub fn ctscf(&self) -> CTSCF_R[src]

Bit 9 - CTS clear flag

pub fn lbdcf(&self) -> LBDCF_R[src]

Bit 8 - LIN break detection clear flag

pub fn tccf(&self) -> TCCF_R[src]

Bit 6 - Transmission complete clear flag

pub fn idlecf(&self) -> IDLECF_R[src]

Bit 4 - Idle line detected clear flag

pub fn orecf(&self) -> ORECF_R[src]

Bit 3 - Overrun error clear flag

pub fn ncf(&self) -> NCF_R[src]

Bit 2 - Noise detected clear flag

pub fn fecf(&self) -> FECF_R[src]

Bit 1 - Framing error clear flag

pub fn pecf(&self) -> PECF_R[src]

Bit 0 - Parity error clear flag

impl R<u32, Reg<u32, _RDR>>[src]

pub fn rdr(&self) -> RDR_R[src]

Bits 0:8 - Receive data value

impl R<u32, Reg<u32, _TDR>>[src]

pub fn tdr(&self) -> TDR_R[src]

Bits 0:8 - Transmit data value

impl R<bool, BIDIMODE_A>[src]

pub fn variant(&self) -> BIDIMODE_A[src]

Get enumerated values variant

pub fn is_unidirectional(&self) -> bool[src]

Checks if the value of the field is UNIDIRECTIONAL

pub fn is_bidirectional(&self) -> bool[src]

Checks if the value of the field is BIDIRECTIONAL

impl R<bool, BIDIOE_A>[src]

pub fn variant(&self) -> BIDIOE_A[src]

Get enumerated values variant

pub fn is_output_disabled(&self) -> bool[src]

Checks if the value of the field is OUTPUTDISABLED

pub fn is_output_enabled(&self) -> bool[src]

Checks if the value of the field is OUTPUTENABLED

impl R<bool, CRCEN_A>[src]

pub fn variant(&self) -> CRCEN_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, CRCNEXT_A>[src]

pub fn variant(&self) -> CRCNEXT_A[src]

Get enumerated values variant

pub fn is_tx_buffer(&self) -> bool[src]

Checks if the value of the field is TXBUFFER

pub fn is_crc(&self) -> bool[src]

Checks if the value of the field is CRC

impl R<bool, CRCL_A>[src]

pub fn variant(&self) -> CRCL_A[src]

Get enumerated values variant

pub fn is_eight_bit(&self) -> bool[src]

Checks if the value of the field is EIGHTBIT

pub fn is_sixteen_bit(&self) -> bool[src]

Checks if the value of the field is SIXTEENBIT

impl R<bool, RXONLY_A>[src]

pub fn variant(&self) -> RXONLY_A[src]

Get enumerated values variant

pub fn is_full_duplex(&self) -> bool[src]

Checks if the value of the field is FULLDUPLEX

pub fn is_output_disabled(&self) -> bool[src]

Checks if the value of the field is OUTPUTDISABLED

impl R<bool, SSM_A>[src]

pub fn variant(&self) -> SSM_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, SSI_A>[src]

pub fn variant(&self) -> SSI_A[src]

Get enumerated values variant

pub fn is_slave_selected(&self) -> bool[src]

Checks if the value of the field is SLAVESELECTED

pub fn is_slave_not_selected(&self) -> bool[src]

Checks if the value of the field is SLAVENOTSELECTED

impl R<bool, LSBFIRST_A>[src]

pub fn variant(&self) -> LSBFIRST_A[src]

Get enumerated values variant

pub fn is_msbfirst(&self) -> bool[src]

Checks if the value of the field is MSBFIRST

pub fn is_lsbfirst(&self) -> bool[src]

Checks if the value of the field is LSBFIRST

impl R<bool, SPE_A>[src]

pub fn variant(&self) -> SPE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u8, BR_A>[src]

pub fn variant(&self) -> BR_A[src]

Get enumerated values variant

pub fn is_div2(&self) -> bool[src]

Checks if the value of the field is DIV2

pub fn is_div4(&self) -> bool[src]

Checks if the value of the field is DIV4

pub fn is_div8(&self) -> bool[src]

Checks if the value of the field is DIV8

pub fn is_div16(&self) -> bool[src]

Checks if the value of the field is DIV16

pub fn is_div32(&self) -> bool[src]

Checks if the value of the field is DIV32

pub fn is_div64(&self) -> bool[src]

Checks if the value of the field is DIV64

pub fn is_div128(&self) -> bool[src]

Checks if the value of the field is DIV128

pub fn is_div256(&self) -> bool[src]

Checks if the value of the field is DIV256

impl R<bool, MSTR_A>[src]

pub fn variant(&self) -> MSTR_A[src]

Get enumerated values variant

pub fn is_slave(&self) -> bool[src]

Checks if the value of the field is SLAVE

pub fn is_master(&self) -> bool[src]

Checks if the value of the field is MASTER

impl R<bool, CPOL_A>[src]

pub fn variant(&self) -> CPOL_A[src]

Get enumerated values variant

pub fn is_idle_low(&self) -> bool[src]

Checks if the value of the field is IDLELOW

pub fn is_idle_high(&self) -> bool[src]

Checks if the value of the field is IDLEHIGH

impl R<bool, CPHA_A>[src]

pub fn variant(&self) -> CPHA_A[src]

Get enumerated values variant

pub fn is_first_edge(&self) -> bool[src]

Checks if the value of the field is FIRSTEDGE

pub fn is_second_edge(&self) -> bool[src]

Checks if the value of the field is SECONDEDGE

impl R<u32, Reg<u32, _CR1>>[src]

pub fn bidimode(&self) -> BIDIMODE_R[src]

Bit 15 - Bidirectional data mode enable

pub fn bidioe(&self) -> BIDIOE_R[src]

Bit 14 - Output enable in bidirectional mode

pub fn crcen(&self) -> CRCEN_R[src]

Bit 13 - Hardware CRC calculation enable

pub fn crcnext(&self) -> CRCNEXT_R[src]

Bit 12 - CRC transfer next

pub fn crcl(&self) -> CRCL_R[src]

Bit 11 - CRC length

pub fn rxonly(&self) -> RXONLY_R[src]

Bit 10 - Receive only

pub fn ssm(&self) -> SSM_R[src]

Bit 9 - Software slave management

pub fn ssi(&self) -> SSI_R[src]

Bit 8 - Internal slave select

pub fn lsbfirst(&self) -> LSBFIRST_R[src]

Bit 7 - Frame format

pub fn spe(&self) -> SPE_R[src]

Bit 6 - SPI enable

pub fn br(&self) -> BR_R[src]

Bits 3:5 - Baud rate control

pub fn mstr(&self) -> MSTR_R[src]

Bit 2 - Master selection

pub fn cpol(&self) -> CPOL_R[src]

Bit 1 - Clock polarity

pub fn cpha(&self) -> CPHA_R[src]

Bit 0 - Clock phase

impl R<bool, RXDMAEN_A>[src]

pub fn variant(&self) -> RXDMAEN_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, TXDMAEN_A>[src]

pub fn variant(&self) -> TXDMAEN_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, SSOE_A>[src]

pub fn variant(&self) -> SSOE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, NSSP_A>[src]

pub fn variant(&self) -> NSSP_A[src]

Get enumerated values variant

pub fn is_no_pulse(&self) -> bool[src]

Checks if the value of the field is NOPULSE

pub fn is_pulse_generated(&self) -> bool[src]

Checks if the value of the field is PULSEGENERATED

impl R<bool, FRF_A>[src]

pub fn variant(&self) -> FRF_A[src]

Get enumerated values variant

pub fn is_motorola(&self) -> bool[src]

Checks if the value of the field is MOTOROLA

pub fn is_ti(&self) -> bool[src]

Checks if the value of the field is TI

impl R<bool, ERRIE_A>[src]

pub fn variant(&self) -> ERRIE_A[src]

Get enumerated values variant

pub fn is_masked(&self) -> bool[src]

Checks if the value of the field is MASKED

pub fn is_not_masked(&self) -> bool[src]

Checks if the value of the field is NOTMASKED

impl R<bool, RXNEIE_A>[src]

pub fn variant(&self) -> RXNEIE_A[src]

Get enumerated values variant

pub fn is_masked(&self) -> bool[src]

Checks if the value of the field is MASKED

pub fn is_not_masked(&self) -> bool[src]

Checks if the value of the field is NOTMASKED

impl R<bool, TXEIE_A>[src]

pub fn variant(&self) -> TXEIE_A[src]

Get enumerated values variant

pub fn is_masked(&self) -> bool[src]

Checks if the value of the field is MASKED

pub fn is_not_masked(&self) -> bool[src]

Checks if the value of the field is NOTMASKED

impl R<u8, DS_A>[src]

pub fn variant(&self) -> Variant<u8, DS_A>[src]

Get enumerated values variant

pub fn is_four_bit(&self) -> bool[src]

Checks if the value of the field is FOURBIT

pub fn is_five_bit(&self) -> bool[src]

Checks if the value of the field is FIVEBIT

pub fn is_six_bit(&self) -> bool[src]

Checks if the value of the field is SIXBIT

pub fn is_seven_bit(&self) -> bool[src]

Checks if the value of the field is SEVENBIT

pub fn is_eight_bit(&self) -> bool[src]

Checks if the value of the field is EIGHTBIT

pub fn is_nine_bit(&self) -> bool[src]

Checks if the value of the field is NINEBIT

pub fn is_ten_bit(&self) -> bool[src]

Checks if the value of the field is TENBIT

pub fn is_eleven_bit(&self) -> bool[src]

Checks if the value of the field is ELEVENBIT

pub fn is_twelve_bit(&self) -> bool[src]

Checks if the value of the field is TWELVEBIT

pub fn is_thirteen_bit(&self) -> bool[src]

Checks if the value of the field is THIRTEENBIT

pub fn is_fourteen_bit(&self) -> bool[src]

Checks if the value of the field is FOURTEENBIT

pub fn is_fifteen_bit(&self) -> bool[src]

Checks if the value of the field is FIFTEENBIT

pub fn is_sixteen_bit(&self) -> bool[src]

Checks if the value of the field is SIXTEENBIT

impl R<bool, FRXTH_A>[src]

pub fn variant(&self) -> FRXTH_A[src]

Get enumerated values variant

pub fn is_half(&self) -> bool[src]

Checks if the value of the field is HALF

pub fn is_quarter(&self) -> bool[src]

Checks if the value of the field is QUARTER

impl R<bool, LDMA_RX_A>[src]

pub fn variant(&self) -> LDMA_RX_A[src]

Get enumerated values variant

pub fn is_even(&self) -> bool[src]

Checks if the value of the field is EVEN

pub fn is_odd(&self) -> bool[src]

Checks if the value of the field is ODD

impl R<bool, LDMA_TX_A>[src]

pub fn variant(&self) -> LDMA_TX_A[src]

Get enumerated values variant

pub fn is_even(&self) -> bool[src]

Checks if the value of the field is EVEN

pub fn is_odd(&self) -> bool[src]

Checks if the value of the field is ODD

impl R<u32, Reg<u32, _CR2>>[src]

pub fn rxdmaen(&self) -> RXDMAEN_R[src]

Bit 0 - Rx buffer DMA enable

pub fn txdmaen(&self) -> TXDMAEN_R[src]

Bit 1 - Tx buffer DMA enable

pub fn ssoe(&self) -> SSOE_R[src]

Bit 2 - SS output enable

pub fn nssp(&self) -> NSSP_R[src]

Bit 3 - NSS pulse management

pub fn frf(&self) -> FRF_R[src]

Bit 4 - Frame format

pub fn errie(&self) -> ERRIE_R[src]

Bit 5 - Error interrupt enable

pub fn rxneie(&self) -> RXNEIE_R[src]

Bit 6 - RX buffer not empty interrupt enable

pub fn txeie(&self) -> TXEIE_R[src]

Bit 7 - Tx buffer empty interrupt enable

pub fn ds(&self) -> DS_R[src]

Bits 8:11 - Data size

pub fn frxth(&self) -> FRXTH_R[src]

Bit 12 - FIFO reception threshold

pub fn ldma_rx(&self) -> LDMA_RX_R[src]

Bit 13 - Last DMA transfer for reception

pub fn ldma_tx(&self) -> LDMA_TX_R[src]

Bit 14 - Last DMA transfer for transmission

impl R<bool, RXNE_A>[src]

pub fn variant(&self) -> RXNE_A[src]

Get enumerated values variant

pub fn is_empty(&self) -> bool[src]

Checks if the value of the field is EMPTY

pub fn is_not_empty(&self) -> bool[src]

Checks if the value of the field is NOTEMPTY

impl R<bool, TXE_A>[src]

pub fn variant(&self) -> TXE_A[src]

Get enumerated values variant

pub fn is_not_empty(&self) -> bool[src]

Checks if the value of the field is NOTEMPTY

pub fn is_empty(&self) -> bool[src]

Checks if the value of the field is EMPTY

impl R<bool, CHSIDE_A>[src]

pub fn variant(&self) -> CHSIDE_A[src]

Get enumerated values variant

pub fn is_left(&self) -> bool[src]

Checks if the value of the field is LEFT

pub fn is_right(&self) -> bool[src]

Checks if the value of the field is RIGHT

impl R<bool, UDR_A>[src]

pub fn variant(&self) -> UDR_A[src]

Get enumerated values variant

pub fn is_no_underrun(&self) -> bool[src]

Checks if the value of the field is NOUNDERRUN

pub fn is_underrun(&self) -> bool[src]

Checks if the value of the field is UNDERRUN

impl R<bool, CRCERR_A>[src]

pub fn variant(&self) -> CRCERR_A[src]

Get enumerated values variant

pub fn is_match_(&self) -> bool[src]

Checks if the value of the field is MATCH

pub fn is_no_match(&self) -> bool[src]

Checks if the value of the field is NOMATCH

impl R<bool, MODF_A>[src]

pub fn variant(&self) -> MODF_A[src]

Get enumerated values variant

pub fn is_no_fault(&self) -> bool[src]

Checks if the value of the field is NOFAULT

pub fn is_fault(&self) -> bool[src]

Checks if the value of the field is FAULT

impl R<bool, OVR_A>[src]

pub fn variant(&self) -> OVR_A[src]

Get enumerated values variant

pub fn is_no_overrun(&self) -> bool[src]

Checks if the value of the field is NOOVERRUN

pub fn is_overrun(&self) -> bool[src]

Checks if the value of the field is OVERRUN

impl R<bool, BSY_A>[src]

pub fn variant(&self) -> BSY_A[src]

Get enumerated values variant

pub fn is_not_busy(&self) -> bool[src]

Checks if the value of the field is NOTBUSY

pub fn is_busy(&self) -> bool[src]

Checks if the value of the field is BUSY

impl R<bool, TIFRFE_A>[src]

pub fn variant(&self) -> TIFRFE_A[src]

Get enumerated values variant

pub fn is_no_error(&self) -> bool[src]

Checks if the value of the field is NOERROR

pub fn is_error(&self) -> bool[src]

Checks if the value of the field is ERROR

impl R<u8, FRLVL_A>[src]

pub fn variant(&self) -> FRLVL_A[src]

Get enumerated values variant

pub fn is_empty(&self) -> bool[src]

Checks if the value of the field is EMPTY

pub fn is_quarter(&self) -> bool[src]

Checks if the value of the field is QUARTER

pub fn is_half(&self) -> bool[src]

Checks if the value of the field is HALF

pub fn is_full(&self) -> bool[src]

Checks if the value of the field is FULL

impl R<u8, FTLVL_A>[src]

pub fn variant(&self) -> FTLVL_A[src]

Get enumerated values variant

pub fn is_empty(&self) -> bool[src]

Checks if the value of the field is EMPTY

pub fn is_quarter(&self) -> bool[src]

Checks if the value of the field is QUARTER

pub fn is_half(&self) -> bool[src]

Checks if the value of the field is HALF

pub fn is_full(&self) -> bool[src]

Checks if the value of the field is FULL

impl R<u32, Reg<u32, _SR>>[src]

pub fn rxne(&self) -> RXNE_R[src]

Bit 0 - Receive buffer not empty

pub fn txe(&self) -> TXE_R[src]

Bit 1 - Transmit buffer empty

pub fn chside(&self) -> CHSIDE_R[src]

Bit 2 - Channel side

pub fn udr(&self) -> UDR_R[src]

Bit 3 - Underrun flag

pub fn crcerr(&self) -> CRCERR_R[src]

Bit 4 - CRC error flag

pub fn modf(&self) -> MODF_R[src]

Bit 5 - Mode fault

pub fn ovr(&self) -> OVR_R[src]

Bit 6 - Overrun flag

pub fn bsy(&self) -> BSY_R[src]

Bit 7 - Busy flag

pub fn tifrfe(&self) -> TIFRFE_R[src]

Bit 8 - TI frame format error

pub fn frlvl(&self) -> FRLVL_R[src]

Bits 9:10 - FIFO reception level

pub fn ftlvl(&self) -> FTLVL_R[src]

Bits 11:12 - FIFO transmission level

impl R<u32, Reg<u32, _DR>>[src]

pub fn dr(&self) -> DR_R[src]

Bits 0:15 - Data register

impl R<u32, Reg<u32, _CRCPR>>[src]

pub fn crcpoly(&self) -> CRCPOLY_R[src]

Bits 0:15 - CRC polynomial register

impl R<u32, Reg<u32, _RXCRCR>>[src]

pub fn rx_crc(&self) -> RXCRC_R[src]

Bits 0:15 - Rx CRC register

impl R<u32, Reg<u32, _TXCRCR>>[src]

pub fn tx_crc(&self) -> TXCRC_R[src]

Bits 0:15 - Tx CRC register

impl R<bool, I2SMOD_A>[src]

pub fn variant(&self) -> I2SMOD_A[src]

Get enumerated values variant

pub fn is_spimode(&self) -> bool[src]

Checks if the value of the field is SPIMODE

pub fn is_i2smode(&self) -> bool[src]

Checks if the value of the field is I2SMODE

impl R<bool, I2SE_A>[src]

pub fn variant(&self) -> I2SE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u8, I2SCFG_A>[src]

pub fn variant(&self) -> I2SCFG_A[src]

Get enumerated values variant

pub fn is_slave_tx(&self) -> bool[src]

Checks if the value of the field is SLAVETX

pub fn is_slave_rx(&self) -> bool[src]

Checks if the value of the field is SLAVERX

pub fn is_master_tx(&self) -> bool[src]

Checks if the value of the field is MASTERTX

pub fn is_master_rx(&self) -> bool[src]

Checks if the value of the field is MASTERRX

impl R<bool, PCMSYNC_A>[src]

pub fn variant(&self) -> PCMSYNC_A[src]

Get enumerated values variant

pub fn is_short(&self) -> bool[src]

Checks if the value of the field is SHORT

pub fn is_long(&self) -> bool[src]

Checks if the value of the field is LONG

impl R<u8, I2SSTD_A>[src]

pub fn variant(&self) -> I2SSTD_A[src]

Get enumerated values variant

pub fn is_philips(&self) -> bool[src]

Checks if the value of the field is PHILIPS

pub fn is_msb(&self) -> bool[src]

Checks if the value of the field is MSB

pub fn is_lsb(&self) -> bool[src]

Checks if the value of the field is LSB

pub fn is_pcm(&self) -> bool[src]

Checks if the value of the field is PCM

impl R<bool, CKPOL_A>[src]

pub fn variant(&self) -> CKPOL_A[src]

Get enumerated values variant

pub fn is_idle_low(&self) -> bool[src]

Checks if the value of the field is IDLELOW

pub fn is_idle_high(&self) -> bool[src]

Checks if the value of the field is IDLEHIGH

impl R<u8, DATLEN_A>[src]

pub fn variant(&self) -> Variant<u8, DATLEN_A>[src]

Get enumerated values variant

pub fn is_sixteen_bit(&self) -> bool[src]

Checks if the value of the field is SIXTEENBIT

pub fn is_twenty_four_bit(&self) -> bool[src]

Checks if the value of the field is TWENTYFOURBIT

pub fn is_thirty_two_bit(&self) -> bool[src]

Checks if the value of the field is THIRTYTWOBIT

impl R<bool, CHLEN_A>[src]

pub fn variant(&self) -> CHLEN_A[src]

Get enumerated values variant

pub fn is_sixteen_bit(&self) -> bool[src]

Checks if the value of the field is SIXTEENBIT

pub fn is_thirty_two_bit(&self) -> bool[src]

Checks if the value of the field is THIRTYTWOBIT

impl R<u32, Reg<u32, _I2SCFGR>>[src]

pub fn i2smod(&self) -> I2SMOD_R[src]

Bit 11 - I2S mode selection

pub fn i2se(&self) -> I2SE_R[src]

Bit 10 - I2S Enable

pub fn i2scfg(&self) -> I2SCFG_R[src]

Bits 8:9 - I2S configuration mode

pub fn pcmsync(&self) -> PCMSYNC_R[src]

Bit 7 - PCM frame synchronization

pub fn i2sstd(&self) -> I2SSTD_R[src]

Bits 4:5 - I2S standard selection

pub fn ckpol(&self) -> CKPOL_R[src]

Bit 3 - Steady state clock polarity

pub fn datlen(&self) -> DATLEN_R[src]

Bits 1:2 - Data length to be transferred

pub fn chlen(&self) -> CHLEN_R[src]

Bit 0 - Channel length (number of bits per audio channel)

impl R<bool, MCKOE_A>[src]

pub fn variant(&self) -> MCKOE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, ODD_A>[src]

pub fn variant(&self) -> ODD_A[src]

Get enumerated values variant

pub fn is_even(&self) -> bool[src]

Checks if the value of the field is EVEN

pub fn is_odd(&self) -> bool[src]

Checks if the value of the field is ODD

impl R<u32, Reg<u32, _I2SPR>>[src]

pub fn mckoe(&self) -> MCKOE_R[src]

Bit 9 - Master clock output enable

pub fn odd(&self) -> ODD_R[src]

Bit 8 - Odd factor for the prescaler

pub fn i2sdiv(&self) -> I2SDIV_R[src]

Bits 0:7 - I2S Linear prescaler

impl R<bool, STRT_A>[src]

pub fn variant(&self) -> STRT_A[src]

Get enumerated values variant

pub fn is_not_started(&self) -> bool[src]

Checks if the value of the field is NOTSTARTED

pub fn is_started(&self) -> bool[src]

Checks if the value of the field is STARTED

impl R<bool, JSTRT_A>[src]

pub fn variant(&self) -> JSTRT_A[src]

Get enumerated values variant

pub fn is_not_started(&self) -> bool[src]

Checks if the value of the field is NOTSTARTED

pub fn is_started(&self) -> bool[src]

Checks if the value of the field is STARTED

impl R<bool, JEOC_A>[src]

pub fn variant(&self) -> JEOC_A[src]

Get enumerated values variant

pub fn is_not_complete(&self) -> bool[src]

Checks if the value of the field is NOTCOMPLETE

pub fn is_complete(&self) -> bool[src]

Checks if the value of the field is COMPLETE

impl R<bool, EOC_A>[src]

pub fn variant(&self) -> EOC_A[src]

Get enumerated values variant

pub fn is_not_complete(&self) -> bool[src]

Checks if the value of the field is NOTCOMPLETE

pub fn is_complete(&self) -> bool[src]

Checks if the value of the field is COMPLETE

impl R<bool, AWD_A>[src]

pub fn variant(&self) -> AWD_A[src]

Get enumerated values variant

pub fn is_no_event(&self) -> bool[src]

Checks if the value of the field is NOEVENT

pub fn is_event(&self) -> bool[src]

Checks if the value of the field is EVENT

impl R<u32, Reg<u32, _SR>>[src]

pub fn strt(&self) -> STRT_R[src]

Bit 4 - Regular channel start flag

pub fn jstrt(&self) -> JSTRT_R[src]

Bit 3 - Injected channel start flag

pub fn jeoc(&self) -> JEOC_R[src]

Bit 2 - Injected channel end of conversion

pub fn eoc(&self) -> EOC_R[src]

Bit 1 - Regular channel end of conversion

pub fn awd(&self) -> AWD_R[src]

Bit 0 - Analog watchdog flag

impl R<bool, AWDEN_A>[src]

pub fn variant(&self) -> AWDEN_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, JAWDEN_A>[src]

pub fn variant(&self) -> JAWDEN_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, JDISCEN_A>[src]

pub fn variant(&self) -> JDISCEN_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, DISCEN_A>[src]

pub fn variant(&self) -> DISCEN_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, JAUTO_A>[src]

pub fn variant(&self) -> JAUTO_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, AWDSGL_A>[src]

pub fn variant(&self) -> AWDSGL_A[src]

Get enumerated values variant

pub fn is_all(&self) -> bool[src]

Checks if the value of the field is ALL

pub fn is_single(&self) -> bool[src]

Checks if the value of the field is SINGLE

impl R<bool, SCAN_A>[src]

pub fn variant(&self) -> SCAN_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, JEOCIE_A>[src]

pub fn variant(&self) -> JEOCIE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, AWDIE_A>[src]

pub fn variant(&self) -> AWDIE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, EOCIE_A>[src]

pub fn variant(&self) -> EOCIE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u32, Reg<u32, _CR1>>[src]

pub fn awden(&self) -> AWDEN_R[src]

Bit 23 - Analog watchdog enable on regular channels

pub fn jawden(&self) -> JAWDEN_R[src]

Bit 22 - Analog watchdog enable on injected channels

pub fn discnum(&self) -> DISCNUM_R[src]

Bits 13:15 - Discontinuous mode channel count

pub fn jdiscen(&self) -> JDISCEN_R[src]

Bit 12 - Discontinuous mode on injected channels

pub fn discen(&self) -> DISCEN_R[src]

Bit 11 - Discontinuous mode on regular channels

pub fn jauto(&self) -> JAUTO_R[src]

Bit 10 - Automatic injected group conversion

pub fn awdsgl(&self) -> AWDSGL_R[src]

Bit 9 - Enable the watchdog on a single channel in scan mode

pub fn scan(&self) -> SCAN_R[src]

Bit 8 - Scan mode

pub fn jeocie(&self) -> JEOCIE_R[src]

Bit 7 - Interrupt enable for injected channels

pub fn awdie(&self) -> AWDIE_R[src]

Bit 6 - Analog watchdog interrupt enable

pub fn eocie(&self) -> EOCIE_R[src]

Bit 5 - Interrupt enable for EOC

pub fn awdch(&self) -> AWDCH_R[src]

Bits 0:4 - Analog watchdog channel select bits

impl R<bool, TSVREFE_A>[src]

pub fn variant(&self) -> TSVREFE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, SWSTART_A>[src]

pub fn variant(&self) -> SWSTART_A[src]

Get enumerated values variant

pub fn is_started(&self) -> bool[src]

Checks if the value of the field is STARTED

pub fn is_not_started(&self) -> bool[src]

Checks if the value of the field is NOTSTARTED

impl R<bool, JSWSTART_A>[src]

pub fn variant(&self) -> JSWSTART_A[src]

Get enumerated values variant

pub fn is_started(&self) -> bool[src]

Checks if the value of the field is STARTED

pub fn is_not_started(&self) -> bool[src]

Checks if the value of the field is NOTSTARTED

impl R<bool, EXTTRIG_A>[src]

pub fn variant(&self) -> EXTTRIG_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u8, EXTSEL_A>[src]

pub fn variant(&self) -> EXTSEL_A[src]

Get enumerated values variant

pub fn is_tim19trgo(&self) -> bool[src]

Checks if the value of the field is TIM19TRGO

pub fn is_tim19cc3(&self) -> bool[src]

Checks if the value of the field is TIM19CC3

pub fn is_tim19cc4(&self) -> bool[src]

Checks if the value of the field is TIM19CC4

pub fn is_tim2cc2(&self) -> bool[src]

Checks if the value of the field is TIM2CC2

pub fn is_tim3trgo(&self) -> bool[src]

Checks if the value of the field is TIM3TRGO

pub fn is_tim4cc4(&self) -> bool[src]

Checks if the value of the field is TIM4CC4

pub fn is_exti11(&self) -> bool[src]

Checks if the value of the field is EXTI11

pub fn is_swstart(&self) -> bool[src]

Checks if the value of the field is SWSTART

impl R<bool, JEXTTRIG_A>[src]

pub fn variant(&self) -> JEXTTRIG_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u8, JEXTSEL_A>[src]

pub fn variant(&self) -> JEXTSEL_A[src]

Get enumerated values variant

pub fn is_tim19cc1(&self) -> bool[src]

Checks if the value of the field is TIM19CC1

pub fn is_tim19cc2(&self) -> bool[src]

Checks if the value of the field is TIM19CC2

pub fn is_tim2trgo(&self) -> bool[src]

Checks if the value of the field is TIM2TRGO

pub fn is_tim2cc1(&self) -> bool[src]

Checks if the value of the field is TIM2CC1

pub fn is_tim3cc4(&self) -> bool[src]

Checks if the value of the field is TIM3CC4

pub fn is_tim4trgo(&self) -> bool[src]

Checks if the value of the field is TIM4TRGO

pub fn is_exti15(&self) -> bool[src]

Checks if the value of the field is EXTI15

pub fn is_jswstart(&self) -> bool[src]

Checks if the value of the field is JSWSTART

impl R<bool, ALIGN_A>[src]

pub fn variant(&self) -> ALIGN_A[src]

Get enumerated values variant

pub fn is_right(&self) -> bool[src]

Checks if the value of the field is RIGHT

pub fn is_left(&self) -> bool[src]

Checks if the value of the field is LEFT

impl R<bool, DMA_A>[src]

pub fn variant(&self) -> DMA_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, RSTCAL_A>[src]

pub fn variant(&self) -> RSTCAL_A[src]

Get enumerated values variant

pub fn is_initialized(&self) -> bool[src]

Checks if the value of the field is INITIALIZED

pub fn is_not_initialized(&self) -> bool[src]

Checks if the value of the field is NOTINITIALIZED

impl R<bool, CAL_A>[src]

pub fn variant(&self) -> CAL_A[src]

Get enumerated values variant

pub fn is_complete(&self) -> bool[src]

Checks if the value of the field is COMPLETE

pub fn is_not_complete(&self) -> bool[src]

Checks if the value of the field is NOTCOMPLETE

impl R<bool, CONT_A>[src]

pub fn variant(&self) -> CONT_A[src]

Get enumerated values variant

pub fn is_single(&self) -> bool[src]

Checks if the value of the field is SINGLE

pub fn is_continuous(&self) -> bool[src]

Checks if the value of the field is CONTINUOUS

impl R<bool, ADON_A>[src]

pub fn variant(&self) -> ADON_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u32, Reg<u32, _CR2>>[src]

pub fn tsvrefe(&self) -> TSVREFE_R[src]

Bit 23 - Temperature sensor and VREFINT enable

pub fn swstart(&self) -> SWSTART_R[src]

Bit 22 - Start conversion of regular channels

pub fn jswstart(&self) -> JSWSTART_R[src]

Bit 21 - Start conversion of injected channels

pub fn exttrig(&self) -> EXTTRIG_R[src]

Bit 20 - External trigger conversion mode for regular channels

pub fn extsel(&self) -> EXTSEL_R[src]

Bits 17:19 - External event select for regular group

pub fn jexttrig(&self) -> JEXTTRIG_R[src]

Bit 15 - External trigger conversion mode for injected channels

pub fn jextsel(&self) -> JEXTSEL_R[src]

Bits 12:14 - External event select for injected group

pub fn align(&self) -> ALIGN_R[src]

Bit 11 - Data alignment

pub fn dma(&self) -> DMA_R[src]

Bit 8 - Direct memory access mode

pub fn rstcal(&self) -> RSTCAL_R[src]

Bit 3 - Reset calibration

pub fn cal(&self) -> CAL_R[src]

Bit 2 - A/D calibration

pub fn cont(&self) -> CONT_R[src]

Bit 1 - Continuous conversion

pub fn adon(&self) -> ADON_R[src]

Bit 0 - A/D converter ON / OFF

impl R<u8, SMP10_A>[src]

pub fn variant(&self) -> SMP10_A[src]

Get enumerated values variant

pub fn is_cycles1_5(&self) -> bool[src]

Checks if the value of the field is CYCLES1_5

pub fn is_cycles7_5(&self) -> bool[src]

Checks if the value of the field is CYCLES7_5

pub fn is_cycles13_5(&self) -> bool[src]

Checks if the value of the field is CYCLES13_5

pub fn is_cycles28_5(&self) -> bool[src]

Checks if the value of the field is CYCLES28_5

pub fn is_cycles41_5(&self) -> bool[src]

Checks if the value of the field is CYCLES41_5

pub fn is_cycles55_5(&self) -> bool[src]

Checks if the value of the field is CYCLES55_5

pub fn is_cycles71_5(&self) -> bool[src]

Checks if the value of the field is CYCLES71_5

pub fn is_cycles239_5(&self) -> bool[src]

Checks if the value of the field is CYCLES239_5

impl R<u32, Reg<u32, _SMPR1>>[src]

pub fn smp10(&self) -> SMP10_R[src]

Bits 0:2 - Channel 10 sampling time selection

pub fn smp11(&self) -> SMP11_R[src]

Bits 3:5 - Channel 11 sampling time selection

pub fn smp12(&self) -> SMP12_R[src]

Bits 6:8 - Channel 12 sampling time selection

pub fn smp13(&self) -> SMP13_R[src]

Bits 9:11 - Channel 13 sampling time selection

pub fn smp14(&self) -> SMP14_R[src]

Bits 12:14 - Channel 14 sampling time selection

pub fn smp15(&self) -> SMP15_R[src]

Bits 15:17 - Channel 15 sampling time selection

pub fn smp16(&self) -> SMP16_R[src]

Bits 18:20 - Channel 16 sampling time selection

pub fn smp17(&self) -> SMP17_R[src]

Bits 21:23 - Channel 17 sampling time selection

impl R<u8, SMP0_A>[src]

pub fn variant(&self) -> SMP0_A[src]

Get enumerated values variant

pub fn is_cycles1_5(&self) -> bool[src]

Checks if the value of the field is CYCLES1_5

pub fn is_cycles7_5(&self) -> bool[src]

Checks if the value of the field is CYCLES7_5

pub fn is_cycles13_5(&self) -> bool[src]

Checks if the value of the field is CYCLES13_5

pub fn is_cycles28_5(&self) -> bool[src]

Checks if the value of the field is CYCLES28_5

pub fn is_cycles41_5(&self) -> bool[src]

Checks if the value of the field is CYCLES41_5

pub fn is_cycles55_5(&self) -> bool[src]

Checks if the value of the field is CYCLES55_5

pub fn is_cycles71_5(&self) -> bool[src]

Checks if the value of the field is CYCLES71_5

pub fn is_cycles239_5(&self) -> bool[src]

Checks if the value of the field is CYCLES239_5

impl R<u32, Reg<u32, _SMPR2>>[src]

pub fn smp0(&self) -> SMP0_R[src]

Bits 0:2 - Channel 0 sampling time selection

pub fn smp1(&self) -> SMP1_R[src]

Bits 3:5 - Channel 1 sampling time selection

pub fn smp2(&self) -> SMP2_R[src]

Bits 6:8 - Channel 2 sampling time selection

pub fn smp3(&self) -> SMP3_R[src]

Bits 9:11 - Channel 3 sampling time selection

pub fn smp4(&self) -> SMP4_R[src]

Bits 12:14 - Channel 4 sampling time selection

pub fn smp5(&self) -> SMP5_R[src]

Bits 15:17 - Channel 5 sampling time selection

pub fn smp6(&self) -> SMP6_R[src]

Bits 18:20 - Channel 6 sampling time selection

pub fn smp7(&self) -> SMP7_R[src]

Bits 21:23 - Channel 7 sampling time selection

pub fn smp8(&self) -> SMP8_R[src]

Bits 24:26 - Channel 8 sampling time selection

pub fn smp9(&self) -> SMP9_R[src]

Bits 27:29 - Channel 9 sampling time selection

impl R<u32, Reg<u32, _JOFR>>[src]

pub fn joffset(&self) -> JOFFSET_R[src]

Bits 0:11 - Data offset for injected channel x

impl R<u32, Reg<u32, _HTR>>[src]

pub fn ht(&self) -> HT_R[src]

Bits 0:11 - Analog watchdog higher threshold

impl R<u32, Reg<u32, _LTR>>[src]

pub fn lt(&self) -> LT_R[src]

Bits 0:11 - Analog watchdog lower threshold

impl R<u32, Reg<u32, _SQR1>>[src]

pub fn l(&self) -> L_R[src]

Bits 20:23 - Regular channel sequence length

pub fn sq16(&self) -> SQ16_R[src]

Bits 15:19 - 16th conversion in regular sequence

pub fn sq15(&self) -> SQ15_R[src]

Bits 10:14 - 15th conversion in regular sequence

pub fn sq14(&self) -> SQ14_R[src]

Bits 5:9 - 14th conversion in regular sequence

pub fn sq13(&self) -> SQ13_R[src]

Bits 0:4 - 13th conversion in regular sequence

impl R<u32, Reg<u32, _SQR2>>[src]

pub fn sq12(&self) -> SQ12_R[src]

Bits 25:29 - 12th conversion in regular sequence

pub fn sq11(&self) -> SQ11_R[src]

Bits 20:24 - 11th conversion in regular sequence

pub fn sq10(&self) -> SQ10_R[src]

Bits 15:19 - 10th conversion in regular sequence

pub fn sq9(&self) -> SQ9_R[src]

Bits 10:14 - 9th conversion in regular sequence

pub fn sq8(&self) -> SQ8_R[src]

Bits 5:9 - 8th conversion in regular sequence

pub fn sq7(&self) -> SQ7_R[src]

Bits 0:4 - 7th conversion in regular sequence

impl R<u32, Reg<u32, _SQR3>>[src]

pub fn sq6(&self) -> SQ6_R[src]

Bits 25:29 - 6th conversion in regular sequence

pub fn sq5(&self) -> SQ5_R[src]

Bits 20:24 - 5th conversion in regular sequence

pub fn sq4(&self) -> SQ4_R[src]

Bits 15:19 - 4th conversion in regular sequence

pub fn sq3(&self) -> SQ3_R[src]

Bits 10:14 - 3rd conversion in regular sequence

pub fn sq2(&self) -> SQ2_R[src]

Bits 5:9 - 2nd conversion in regular sequence

pub fn sq1(&self) -> SQ1_R[src]

Bits 0:4 - 1st conversion in regular sequence

impl R<u32, Reg<u32, _JSQR>>[src]

pub fn jl(&self) -> JL_R[src]

Bits 20:21 - Injected sequence length

pub fn jsq4(&self) -> JSQ4_R[src]

Bits 15:19 - 4th conversion in injected sequence

pub fn jsq3(&self) -> JSQ3_R[src]

Bits 10:14 - 3rd conversion in injected sequence

pub fn jsq2(&self) -> JSQ2_R[src]

Bits 5:9 - 2nd conversion in injected sequence

pub fn jsq1(&self) -> JSQ1_R[src]

Bits 0:4 - 1st conversion in injected sequence

impl R<u32, Reg<u32, _JDR>>[src]

pub fn jdata(&self) -> JDATA_R[src]

Bits 0:15 - Injected data

impl R<u32, Reg<u32, _DR>>[src]

pub fn data(&self) -> DATA_R[src]

Bits 0:15 - Regular data

impl R<bool, MR0_A>[src]

pub fn variant(&self) -> MR0_A[src]

Get enumerated values variant

pub fn is_masked(&self) -> bool[src]

Checks if the value of the field is MASKED

pub fn is_unmasked(&self) -> bool[src]

Checks if the value of the field is UNMASKED

impl R<u32, Reg<u32, _IMR>>[src]

pub fn mr0(&self) -> MR0_R[src]

Bit 0 - Interrupt Mask on line 0

pub fn mr1(&self) -> MR1_R[src]

Bit 1 - Interrupt Mask on line 1

pub fn mr2(&self) -> MR2_R[src]

Bit 2 - Interrupt Mask on line 2

pub fn mr3(&self) -> MR3_R[src]

Bit 3 - Interrupt Mask on line 3

pub fn mr4(&self) -> MR4_R[src]

Bit 4 - Interrupt Mask on line 4

pub fn mr5(&self) -> MR5_R[src]

Bit 5 - Interrupt Mask on line 5

pub fn mr6(&self) -> MR6_R[src]

Bit 6 - Interrupt Mask on line 6

pub fn mr7(&self) -> MR7_R[src]

Bit 7 - Interrupt Mask on line 7

pub fn mr8(&self) -> MR8_R[src]

Bit 8 - Interrupt Mask on line 8

pub fn mr9(&self) -> MR9_R[src]

Bit 9 - Interrupt Mask on line 9

pub fn mr10(&self) -> MR10_R[src]

Bit 10 - Interrupt Mask on line 10

pub fn mr11(&self) -> MR11_R[src]

Bit 11 - Interrupt Mask on line 11

pub fn mr12(&self) -> MR12_R[src]

Bit 12 - Interrupt Mask on line 12

pub fn mr13(&self) -> MR13_R[src]

Bit 13 - Interrupt Mask on line 13

pub fn mr14(&self) -> MR14_R[src]

Bit 14 - Interrupt Mask on line 14

pub fn mr15(&self) -> MR15_R[src]

Bit 15 - Interrupt Mask on line 15

pub fn mr16(&self) -> MR16_R[src]

Bit 16 - Interrupt Mask on line 16

pub fn mr17(&self) -> MR17_R[src]

Bit 17 - Interrupt Mask on line 17

pub fn mr18(&self) -> MR18_R[src]

Bit 18 - Interrupt Mask on line 18

pub fn mr19(&self) -> MR19_R[src]

Bit 19 - Interrupt Mask on line 19

pub fn mr20(&self) -> MR20_R[src]

Bit 20 - Interrupt Mask on line 20

pub fn mr21(&self) -> MR21_R[src]

Bit 21 - Interrupt Mask on line 21

pub fn mr22(&self) -> MR22_R[src]

Bit 22 - Interrupt Mask on line 22

pub fn mr23(&self) -> MR23_R[src]

Bit 23 - Interrupt Mask on line 23

pub fn mr24(&self) -> MR24_R[src]

Bit 24 - Interrupt Mask on line 24

pub fn mr25(&self) -> MR25_R[src]

Bit 25 - Interrupt Mask on line 25

pub fn mr26(&self) -> MR26_R[src]

Bit 26 - Interrupt Mask on line 26

pub fn mr27(&self) -> MR27_R[src]

Bit 27 - Interrupt Mask on line 27

pub fn mr28(&self) -> MR28_R[src]

Bit 28 - Interrupt Mask on line 28

impl R<bool, MR0_A>[src]

pub fn variant(&self) -> MR0_A[src]

Get enumerated values variant

pub fn is_masked(&self) -> bool[src]

Checks if the value of the field is MASKED

pub fn is_unmasked(&self) -> bool[src]

Checks if the value of the field is UNMASKED

impl R<u32, Reg<u32, _EMR>>[src]

pub fn mr0(&self) -> MR0_R[src]

Bit 0 - Event Mask on line 0

pub fn mr1(&self) -> MR1_R[src]

Bit 1 - Event Mask on line 1

pub fn mr2(&self) -> MR2_R[src]

Bit 2 - Event Mask on line 2

pub fn mr3(&self) -> MR3_R[src]

Bit 3 - Event Mask on line 3

pub fn mr4(&self) -> MR4_R[src]

Bit 4 - Event Mask on line 4

pub fn mr5(&self) -> MR5_R[src]

Bit 5 - Event Mask on line 5

pub fn mr6(&self) -> MR6_R[src]

Bit 6 - Event Mask on line 6

pub fn mr7(&self) -> MR7_R[src]

Bit 7 - Event Mask on line 7

pub fn mr8(&self) -> MR8_R[src]

Bit 8 - Event Mask on line 8

pub fn mr9(&self) -> MR9_R[src]

Bit 9 - Event Mask on line 9

pub fn mr10(&self) -> MR10_R[src]

Bit 10 - Event Mask on line 10

pub fn mr11(&self) -> MR11_R[src]

Bit 11 - Event Mask on line 11

pub fn mr12(&self) -> MR12_R[src]

Bit 12 - Event Mask on line 12

pub fn mr13(&self) -> MR13_R[src]

Bit 13 - Event Mask on line 13

pub fn mr14(&self) -> MR14_R[src]

Bit 14 - Event Mask on line 14

pub fn mr15(&self) -> MR15_R[src]

Bit 15 - Event Mask on line 15

pub fn mr16(&self) -> MR16_R[src]

Bit 16 - Event Mask on line 16

pub fn mr17(&self) -> MR17_R[src]

Bit 17 - Event Mask on line 17

pub fn mr18(&self) -> MR18_R[src]

Bit 18 - Event Mask on line 18

pub fn mr19(&self) -> MR19_R[src]

Bit 19 - Event Mask on line 19

pub fn mr20(&self) -> MR20_R[src]

Bit 20 - Event Mask on line 20

pub fn mr21(&self) -> MR21_R[src]

Bit 21 - Event Mask on line 21

pub fn mr22(&self) -> MR22_R[src]

Bit 22 - Event Mask on line 22

pub fn mr23(&self) -> MR23_R[src]

Bit 23 - Event Mask on line 23

pub fn mr24(&self) -> MR24_R[src]

Bit 24 - Event Mask on line 24

pub fn mr25(&self) -> MR25_R[src]

Bit 25 - Event Mask on line 25

pub fn mr26(&self) -> MR26_R[src]

Bit 26 - Event Mask on line 26

pub fn mr27(&self) -> MR27_R[src]

Bit 27 - Event Mask on line 27

pub fn mr28(&self) -> MR28_R[src]

Bit 28 - Event Mask on line 28

impl R<bool, TR0_A>[src]

pub fn variant(&self) -> TR0_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u32, Reg<u32, _RTSR>>[src]

pub fn tr0(&self) -> TR0_R[src]

Bit 0 - Rising trigger event configuration of line 0

pub fn tr1(&self) -> TR1_R[src]

Bit 1 - Rising trigger event configuration of line 1

pub fn tr2(&self) -> TR2_R[src]

Bit 2 - Rising trigger event configuration of line 2

pub fn tr3(&self) -> TR3_R[src]

Bit 3 - Rising trigger event configuration of line 3

pub fn tr4(&self) -> TR4_R[src]

Bit 4 - Rising trigger event configuration of line 4

pub fn tr5(&self) -> TR5_R[src]

Bit 5 - Rising trigger event configuration of line 5

pub fn tr6(&self) -> TR6_R[src]

Bit 6 - Rising trigger event configuration of line 6

pub fn tr7(&self) -> TR7_R[src]

Bit 7 - Rising trigger event configuration of line 7

pub fn tr8(&self) -> TR8_R[src]

Bit 8 - Rising trigger event configuration of line 8

pub fn tr9(&self) -> TR9_R[src]

Bit 9 - Rising trigger event configuration of line 9

pub fn tr10(&self) -> TR10_R[src]

Bit 10 - Rising trigger event configuration of line 10

pub fn tr11(&self) -> TR11_R[src]

Bit 11 - Rising trigger event configuration of line 11

pub fn tr12(&self) -> TR12_R[src]

Bit 12 - Rising trigger event configuration of line 12

pub fn tr13(&self) -> TR13_R[src]

Bit 13 - Rising trigger event configuration of line 13

pub fn tr14(&self) -> TR14_R[src]

Bit 14 - Rising trigger event configuration of line 14

pub fn tr15(&self) -> TR15_R[src]

Bit 15 - Rising trigger event configuration of line 15

pub fn tr16(&self) -> TR16_R[src]

Bit 16 - Rising trigger event configuration of line 16

pub fn tr17(&self) -> TR17_R[src]

Bit 17 - Rising trigger event configuration of line 17

pub fn tr18(&self) -> TR18_R[src]

Bit 18 - Rising trigger event configuration of line 18

pub fn tr19(&self) -> TR19_R[src]

Bit 19 - Rising trigger event configuration of line 19

pub fn tr20(&self) -> TR20_R[src]

Bit 20 - Rising trigger event configuration of line 20

pub fn tr21(&self) -> TR21_R[src]

Bit 21 - Rising trigger event configuration of line 21

pub fn tr22(&self) -> TR22_R[src]

Bit 22 - Rising trigger event configuration of line 22

impl R<bool, TR0_A>[src]

pub fn variant(&self) -> TR0_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u32, Reg<u32, _FTSR>>[src]

pub fn tr0(&self) -> TR0_R[src]

Bit 0 - Falling trigger event configuration of line 0

pub fn tr1(&self) -> TR1_R[src]

Bit 1 - Falling trigger event configuration of line 1

pub fn tr2(&self) -> TR2_R[src]

Bit 2 - Falling trigger event configuration of line 2

pub fn tr3(&self) -> TR3_R[src]

Bit 3 - Falling trigger event configuration of line 3

pub fn tr4(&self) -> TR4_R[src]

Bit 4 - Falling trigger event configuration of line 4

pub fn tr5(&self) -> TR5_R[src]

Bit 5 - Falling trigger event configuration of line 5

pub fn tr6(&self) -> TR6_R[src]

Bit 6 - Falling trigger event configuration of line 6

pub fn tr7(&self) -> TR7_R[src]

Bit 7 - Falling trigger event configuration of line 7

pub fn tr8(&self) -> TR8_R[src]

Bit 8 - Falling trigger event configuration of line 8

pub fn tr9(&self) -> TR9_R[src]

Bit 9 - Falling trigger event configuration of line 9

pub fn tr10(&self) -> TR10_R[src]

Bit 10 - Falling trigger event configuration of line 10

pub fn tr11(&self) -> TR11_R[src]

Bit 11 - Falling trigger event configuration of line 11

pub fn tr12(&self) -> TR12_R[src]

Bit 12 - Falling trigger event configuration of line 12

pub fn tr13(&self) -> TR13_R[src]

Bit 13 - Falling trigger event configuration of line 13

pub fn tr14(&self) -> TR14_R[src]

Bit 14 - Falling trigger event configuration of line 14

pub fn tr15(&self) -> TR15_R[src]

Bit 15 - Falling trigger event configuration of line 15

pub fn tr16(&self) -> TR16_R[src]

Bit 16 - Falling trigger event configuration of line 16

pub fn tr17(&self) -> TR17_R[src]

Bit 17 - Falling trigger event configuration of line 17

pub fn tr18(&self) -> TR18_R[src]

Bit 18 - Rising trigger event configuration of line 18

pub fn tr19(&self) -> TR19_R[src]

Bit 19 - Rising trigger event configuration of line 19

pub fn tr20(&self) -> TR20_R[src]

Bit 20 - Rising trigger event configuration of line 20

pub fn tr21(&self) -> TR21_R[src]

Bit 21 - Rising trigger event configuration of line 21

pub fn tr22(&self) -> TR22_R[src]

Bit 22 - Rising trigger event configuration of line 22

impl R<bool, SWIER0_A>[src]

pub fn variant(&self) -> Variant<bool, SWIER0_A>[src]

Get enumerated values variant

pub fn is_pend(&self) -> bool[src]

Checks if the value of the field is PEND

impl R<u32, Reg<u32, _SWIER>>[src]

pub fn swier0(&self) -> SWIER0_R[src]

Bit 0 - Software Interrupt on line 0

pub fn swier1(&self) -> SWIER1_R[src]

Bit 1 - Software Interrupt on line 1

pub fn swier2(&self) -> SWIER2_R[src]

Bit 2 - Software Interrupt on line 2

pub fn swier3(&self) -> SWIER3_R[src]

Bit 3 - Software Interrupt on line 3

pub fn swier4(&self) -> SWIER4_R[src]

Bit 4 - Software Interrupt on line 4

pub fn swier5(&self) -> SWIER5_R[src]

Bit 5 - Software Interrupt on line 5

pub fn swier6(&self) -> SWIER6_R[src]

Bit 6 - Software Interrupt on line 6

pub fn swier7(&self) -> SWIER7_R[src]

Bit 7 - Software Interrupt on line 7

pub fn swier8(&self) -> SWIER8_R[src]

Bit 8 - Software Interrupt on line 8

pub fn swier9(&self) -> SWIER9_R[src]

Bit 9 - Software Interrupt on line 9

pub fn swier10(&self) -> SWIER10_R[src]

Bit 10 - Software Interrupt on line 10

pub fn swier11(&self) -> SWIER11_R[src]

Bit 11 - Software Interrupt on line 11

pub fn swier12(&self) -> SWIER12_R[src]

Bit 12 - Software Interrupt on line 12

pub fn swier13(&self) -> SWIER13_R[src]

Bit 13 - Software Interrupt on line 13

pub fn swier14(&self) -> SWIER14_R[src]

Bit 14 - Software Interrupt on line 14

pub fn swier15(&self) -> SWIER15_R[src]

Bit 15 - Software Interrupt on line 15

pub fn swier16(&self) -> SWIER16_R[src]

Bit 16 - Software Interrupt on line 16

pub fn swier17(&self) -> SWIER17_R[src]

Bit 17 - Software Interrupt on line 17

pub fn swier18(&self) -> SWIER18_R[src]

Bit 18 - Software Interrupt on line 18

pub fn swier19(&self) -> SWIER19_R[src]

Bit 19 - Software Interrupt on line 19

pub fn swier20(&self) -> SWIER20_R[src]

Bit 20 - Software Interrupt on line 20

pub fn swier21(&self) -> SWIER21_R[src]

Bit 21 - Software Interrupt on line 21

pub fn swier22(&self) -> SWIER22_R[src]

Bit 22 - Software Interrupt on line 22

impl R<bool, PR0_A>[src]

pub fn variant(&self) -> PR0_A[src]

Get enumerated values variant

pub fn is_not_pending(&self) -> bool[src]

Checks if the value of the field is NOTPENDING

pub fn is_pending(&self) -> bool[src]

Checks if the value of the field is PENDING

impl R<u32, Reg<u32, _PR>>[src]

pub fn pr0(&self) -> PR0_R[src]

Bit 0 - Pending bit 0

pub fn pr1(&self) -> PR1_R[src]

Bit 1 - Pending bit 1

pub fn pr2(&self) -> PR2_R[src]

Bit 2 - Pending bit 2

pub fn pr3(&self) -> PR3_R[src]

Bit 3 - Pending bit 3

pub fn pr4(&self) -> PR4_R[src]

Bit 4 - Pending bit 4

pub fn pr5(&self) -> PR5_R[src]

Bit 5 - Pending bit 5

pub fn pr6(&self) -> PR6_R[src]

Bit 6 - Pending bit 6

pub fn pr7(&self) -> PR7_R[src]

Bit 7 - Pending bit 7

pub fn pr8(&self) -> PR8_R[src]

Bit 8 - Pending bit 8

pub fn pr9(&self) -> PR9_R[src]

Bit 9 - Pending bit 9

pub fn pr10(&self) -> PR10_R[src]

Bit 10 - Pending bit 10

pub fn pr11(&self) -> PR11_R[src]

Bit 11 - Pending bit 11

pub fn pr12(&self) -> PR12_R[src]

Bit 12 - Pending bit 12

pub fn pr13(&self) -> PR13_R[src]

Bit 13 - Pending bit 13

pub fn pr14(&self) -> PR14_R[src]

Bit 14 - Pending bit 14

pub fn pr15(&self) -> PR15_R[src]

Bit 15 - Pending bit 15

pub fn pr16(&self) -> PR16_R[src]

Bit 16 - Pending bit 16

pub fn pr17(&self) -> PR17_R[src]

Bit 17 - Pending bit 17

pub fn pr18(&self) -> PR18_R[src]

Bit 18 - Pending bit 18

pub fn pr19(&self) -> PR19_R[src]

Bit 19 - Pending bit 19

pub fn pr20(&self) -> PR20_R[src]

Bit 20 - Pending bit 20

pub fn pr21(&self) -> PR21_R[src]

Bit 21 - Pending bit 21

pub fn pr22(&self) -> PR22_R[src]

Bit 22 - Pending bit 22

impl R<u32, Reg<u32, _CR>>[src]

pub fn txeom(&self) -> TXEOM_R[src]

Bit 2 - Tx End Of Message

pub fn txsom(&self) -> TXSOM_R[src]

Bit 1 - Tx start of message

pub fn cecen(&self) -> CECEN_R[src]

Bit 0 - CEC Enable

impl R<u32, Reg<u32, _CFGR>>[src]

pub fn lbpegen(&self) -> LBPEGEN_R[src]

Bit 11 - Generate Error-Bit on Long Bit Period Error

pub fn bregen(&self) -> BREGEN_R[src]

Bit 10 - Generate error-bit on bit rising error

pub fn brestp(&self) -> BRESTP_R[src]

Bit 9 - Rx-stop on bit rising error

pub fn rxtol(&self) -> RXTOL_R[src]

Bit 8 - Rx-Tolerance

pub fn sft(&self) -> SFT_R[src]

Bits 5:7 - Signal Free Time

pub fn lstn(&self) -> LSTN_R[src]

Bit 4 - Listen mode

pub fn oar(&self) -> OAR_R[src]

Bits 0:3 - Own Address

impl R<u32, Reg<u32, _RXDR>>[src]

pub fn rxdr(&self) -> RXDR_R[src]

Bits 0:7 - CEC Rx Data Register

impl R<u32, Reg<u32, _ISR>>[src]

pub fn txacke(&self) -> TXACKE_R[src]

Bit 12 - Tx-Missing acknowledge error

pub fn txerr(&self) -> TXERR_R[src]

Bit 11 - Tx-Error

pub fn txudr(&self) -> TXUDR_R[src]

Bit 10 - Tx-Buffer Underrun

pub fn txend(&self) -> TXEND_R[src]

Bit 9 - End of Transmission

pub fn txbr(&self) -> TXBR_R[src]

Bit 8 - Tx-Byte Request

pub fn arblst(&self) -> ARBLST_R[src]

Bit 7 - Arbitration Lost

pub fn rxacke(&self) -> RXACKE_R[src]

Bit 6 - Rx-Missing Acknowledge

pub fn lbpe(&self) -> LBPE_R[src]

Bit 5 - Rx-Long Bit Period Error

pub fn sbpe(&self) -> SBPE_R[src]

Bit 4 - Rx-Short Bit period error

pub fn bre(&self) -> BRE_R[src]

Bit 3 - Rx-Bit rising error

pub fn rxovr(&self) -> RXOVR_R[src]

Bit 2 - Rx-Overrun

pub fn rxend(&self) -> RXEND_R[src]

Bit 1 - End Of Reception

pub fn rxbr(&self) -> RXBR_R[src]

Bit 0 - Rx-Byte Received

impl R<u32, Reg<u32, _IER>>[src]

pub fn txackie(&self) -> TXACKIE_R[src]

Bit 12 - Tx-Missing Acknowledge Error Interrupt Enable

pub fn txerrie(&self) -> TXERRIE_R[src]

Bit 11 - Tx-Error Interrupt Enable

pub fn txudrie(&self) -> TXUDRIE_R[src]

Bit 10 - Tx-Underrun interrupt enable

pub fn txendie(&self) -> TXENDIE_R[src]

Bit 9 - Tx-End of message interrupt enable

pub fn txbrie(&self) -> TXBRIE_R[src]

Bit 8 - Tx-Byte Request Interrupt Enable

pub fn arblstie(&self) -> ARBLSTIE_R[src]

Bit 7 - Arbitration Lost Interrupt Enable

pub fn rxackie(&self) -> RXACKIE_R[src]

Bit 6 - Rx-Missing Acknowledge Error Interrupt Enable

pub fn lbpeie(&self) -> LBPEIE_R[src]

Bit 5 - Long Bit Period Error Interrupt Enable

pub fn sbpeie(&self) -> SBPEIE_R[src]

Bit 4 - Short Bit Period Error Interrupt Enable

pub fn breie(&self) -> BREIE_R[src]

Bit 3 - Bit Rising Error Interrupt Enable

pub fn rxovrie(&self) -> RXOVRIE_R[src]

Bit 2 - Rx-Buffer Overrun Interrupt Enable

pub fn rxendie(&self) -> RXENDIE_R[src]

Bit 1 - End Of Reception Interrupt Enable

pub fn rxbrie(&self) -> RXBRIE_R[src]

Bit 0 - Rx-Byte Received Interrupt Enable

impl R<u32, Reg<u32, _CR>>[src]

pub fn lpds(&self) -> LPDS_R[src]

Bit 0 - Low-power deep sleep

pub fn pdds(&self) -> PDDS_R[src]

Bit 1 - Power down deepsleep

pub fn cwuf(&self) -> CWUF_R[src]

Bit 2 - Clear wakeup flag

pub fn csbf(&self) -> CSBF_R[src]

Bit 3 - Clear standby flag

pub fn pvde(&self) -> PVDE_R[src]

Bit 4 - Power voltage detector enable

pub fn pls(&self) -> PLS_R[src]

Bits 5:7 - PVD level selection

pub fn dbp(&self) -> DBP_R[src]

Bit 8 - Disable backup domain write protection

pub fn ensd1(&self) -> ENSD1_R[src]

Bit 9 - ENable SD1 ADC

pub fn ensd2(&self) -> ENSD2_R[src]

Bit 10 - ENable SD2 ADC

pub fn ensd3(&self) -> ENSD3_R[src]

Bit 11 - ENable SD3 ADC

impl R<u32, Reg<u32, _CSR>>[src]

pub fn wuf(&self) -> WUF_R[src]

Bit 0 - Wakeup flag

pub fn sbf(&self) -> SBF_R[src]

Bit 1 - Standby flag

pub fn pvdo(&self) -> PVDO_R[src]

Bit 2 - PVD output

pub fn ewup1(&self) -> EWUP1_R[src]

Bit 8 - Enable WKUP1 pin

pub fn ewup2(&self) -> EWUP2_R[src]

Bit 9 - Enable WKUP2 pin

pub fn ewup3(&self) -> EWUP3_R[src]

Bit 10 - Enable WKUP3 pin

impl R<bool, IDE_A>[src]

pub fn variant(&self) -> IDE_A[src]

Get enumerated values variant

pub fn is_standard(&self) -> bool[src]

Checks if the value of the field is STANDARD

pub fn is_extended(&self) -> bool[src]

Checks if the value of the field is EXTENDED

impl R<bool, RTR_A>[src]

pub fn variant(&self) -> RTR_A[src]

Get enumerated values variant

pub fn is_data(&self) -> bool[src]

Checks if the value of the field is DATA

pub fn is_remote(&self) -> bool[src]

Checks if the value of the field is REMOTE

impl R<u32, Reg<u32, _TIR>>[src]

pub fn stid(&self) -> STID_R[src]

Bits 21:31 - STID

pub fn exid(&self) -> EXID_R[src]

Bits 3:20 - EXID

pub fn ide(&self) -> IDE_R[src]

Bit 2 - IDE

pub fn rtr(&self) -> RTR_R[src]

Bit 1 - RTR

pub fn txrq(&self) -> TXRQ_R[src]

Bit 0 - TXRQ

impl R<u32, Reg<u32, _TDTR>>[src]

pub fn time(&self) -> TIME_R[src]

Bits 16:31 - TIME

pub fn tgt(&self) -> TGT_R[src]

Bit 8 - TGT

pub fn dlc(&self) -> DLC_R[src]

Bits 0:3 - DLC

impl R<u32, Reg<u32, _TDLR>>[src]

pub fn data3(&self) -> DATA3_R[src]

Bits 24:31 - DATA3

pub fn data2(&self) -> DATA2_R[src]

Bits 16:23 - DATA2

pub fn data1(&self) -> DATA1_R[src]

Bits 8:15 - DATA1

pub fn data0(&self) -> DATA0_R[src]

Bits 0:7 - DATA0

impl R<u32, Reg<u32, _TDHR>>[src]

pub fn data7(&self) -> DATA7_R[src]

Bits 24:31 - DATA7

pub fn data6(&self) -> DATA6_R[src]

Bits 16:23 - DATA6

pub fn data5(&self) -> DATA5_R[src]

Bits 8:15 - DATA5

pub fn data4(&self) -> DATA4_R[src]

Bits 0:7 - DATA4

impl R<bool, IDE_A>[src]

pub fn variant(&self) -> IDE_A[src]

Get enumerated values variant

pub fn is_standard(&self) -> bool[src]

Checks if the value of the field is STANDARD

pub fn is_extended(&self) -> bool[src]

Checks if the value of the field is EXTENDED

impl R<bool, RTR_A>[src]

pub fn variant(&self) -> RTR_A[src]

Get enumerated values variant

pub fn is_data(&self) -> bool[src]

Checks if the value of the field is DATA

pub fn is_remote(&self) -> bool[src]

Checks if the value of the field is REMOTE

impl R<u32, Reg<u32, _RIR>>[src]

pub fn stid(&self) -> STID_R[src]

Bits 21:31 - STID

pub fn exid(&self) -> EXID_R[src]

Bits 3:20 - EXID

pub fn ide(&self) -> IDE_R[src]

Bit 2 - IDE

pub fn rtr(&self) -> RTR_R[src]

Bit 1 - RTR

impl R<u32, Reg<u32, _RDTR>>[src]

pub fn time(&self) -> TIME_R[src]

Bits 16:31 - TIME

pub fn fmi(&self) -> FMI_R[src]

Bits 8:15 - FMI

pub fn dlc(&self) -> DLC_R[src]

Bits 0:3 - DLC

impl R<u32, Reg<u32, _RDLR>>[src]

pub fn data3(&self) -> DATA3_R[src]

Bits 24:31 - DATA3

pub fn data2(&self) -> DATA2_R[src]

Bits 16:23 - DATA2

pub fn data1(&self) -> DATA1_R[src]

Bits 8:15 - DATA1

pub fn data0(&self) -> DATA0_R[src]

Bits 0:7 - DATA0

impl R<u32, Reg<u32, _RDHR>>[src]

pub fn data7(&self) -> DATA7_R[src]

Bits 24:31 - DATA7

pub fn data6(&self) -> DATA6_R[src]

Bits 16:23 - DATA6

pub fn data5(&self) -> DATA5_R[src]

Bits 8:15 - DATA5

pub fn data4(&self) -> DATA4_R[src]

Bits 0:7 - DATA4

impl R<u32, Reg<u32, _FR1>>[src]

pub fn fb0(&self) -> FB0_R[src]

Bit 0 - Filter bits

pub fn fb1(&self) -> FB1_R[src]

Bit 1 - Filter bits

pub fn fb2(&self) -> FB2_R[src]

Bit 2 - Filter bits

pub fn fb3(&self) -> FB3_R[src]

Bit 3 - Filter bits

pub fn fb4(&self) -> FB4_R[src]

Bit 4 - Filter bits

pub fn fb5(&self) -> FB5_R[src]

Bit 5 - Filter bits

pub fn fb6(&self) -> FB6_R[src]

Bit 6 - Filter bits

pub fn fb7(&self) -> FB7_R[src]

Bit 7 - Filter bits

pub fn fb8(&self) -> FB8_R[src]

Bit 8 - Filter bits

pub fn fb9(&self) -> FB9_R[src]

Bit 9 - Filter bits

pub fn fb10(&self) -> FB10_R[src]

Bit 10 - Filter bits

pub fn fb11(&self) -> FB11_R[src]

Bit 11 - Filter bits

pub fn fb12(&self) -> FB12_R[src]

Bit 12 - Filter bits

pub fn fb13(&self) -> FB13_R[src]

Bit 13 - Filter bits

pub fn fb14(&self) -> FB14_R[src]

Bit 14 - Filter bits

pub fn fb15(&self) -> FB15_R[src]

Bit 15 - Filter bits

pub fn fb16(&self) -> FB16_R[src]

Bit 16 - Filter bits

pub fn fb17(&self) -> FB17_R[src]

Bit 17 - Filter bits

pub fn fb18(&self) -> FB18_R[src]

Bit 18 - Filter bits

pub fn fb19(&self) -> FB19_R[src]

Bit 19 - Filter bits

pub fn fb20(&self) -> FB20_R[src]

Bit 20 - Filter bits

pub fn fb21(&self) -> FB21_R[src]

Bit 21 - Filter bits

pub fn fb22(&self) -> FB22_R[src]

Bit 22 - Filter bits

pub fn fb23(&self) -> FB23_R[src]

Bit 23 - Filter bits

pub fn fb24(&self) -> FB24_R[src]

Bit 24 - Filter bits

pub fn fb25(&self) -> FB25_R[src]

Bit 25 - Filter bits

pub fn fb26(&self) -> FB26_R[src]

Bit 26 - Filter bits

pub fn fb27(&self) -> FB27_R[src]

Bit 27 - Filter bits

pub fn fb28(&self) -> FB28_R[src]

Bit 28 - Filter bits

pub fn fb29(&self) -> FB29_R[src]

Bit 29 - Filter bits

pub fn fb30(&self) -> FB30_R[src]

Bit 30 - Filter bits

pub fn fb31(&self) -> FB31_R[src]

Bit 31 - Filter bits

impl R<u32, Reg<u32, _FR2>>[src]

pub fn fb0(&self) -> FB0_R[src]

Bit 0 - Filter bits

pub fn fb1(&self) -> FB1_R[src]

Bit 1 - Filter bits

pub fn fb2(&self) -> FB2_R[src]

Bit 2 - Filter bits

pub fn fb3(&self) -> FB3_R[src]

Bit 3 - Filter bits

pub fn fb4(&self) -> FB4_R[src]

Bit 4 - Filter bits

pub fn fb5(&self) -> FB5_R[src]

Bit 5 - Filter bits

pub fn fb6(&self) -> FB6_R[src]

Bit 6 - Filter bits

pub fn fb7(&self) -> FB7_R[src]

Bit 7 - Filter bits

pub fn fb8(&self) -> FB8_R[src]

Bit 8 - Filter bits

pub fn fb9(&self) -> FB9_R[src]

Bit 9 - Filter bits

pub fn fb10(&self) -> FB10_R[src]

Bit 10 - Filter bits

pub fn fb11(&self) -> FB11_R[src]

Bit 11 - Filter bits

pub fn fb12(&self) -> FB12_R[src]

Bit 12 - Filter bits

pub fn fb13(&self) -> FB13_R[src]

Bit 13 - Filter bits

pub fn fb14(&self) -> FB14_R[src]

Bit 14 - Filter bits

pub fn fb15(&self) -> FB15_R[src]

Bit 15 - Filter bits

pub fn fb16(&self) -> FB16_R[src]

Bit 16 - Filter bits

pub fn fb17(&self) -> FB17_R[src]

Bit 17 - Filter bits

pub fn fb18(&self) -> FB18_R[src]

Bit 18 - Filter bits

pub fn fb19(&self) -> FB19_R[src]

Bit 19 - Filter bits

pub fn fb20(&self) -> FB20_R[src]

Bit 20 - Filter bits

pub fn fb21(&self) -> FB21_R[src]

Bit 21 - Filter bits

pub fn fb22(&self) -> FB22_R[src]

Bit 22 - Filter bits

pub fn fb23(&self) -> FB23_R[src]

Bit 23 - Filter bits

pub fn fb24(&self) -> FB24_R[src]

Bit 24 - Filter bits

pub fn fb25(&self) -> FB25_R[src]

Bit 25 - Filter bits

pub fn fb26(&self) -> FB26_R[src]

Bit 26 - Filter bits

pub fn fb27(&self) -> FB27_R[src]

Bit 27 - Filter bits

pub fn fb28(&self) -> FB28_R[src]

Bit 28 - Filter bits

pub fn fb29(&self) -> FB29_R[src]

Bit 29 - Filter bits

pub fn fb30(&self) -> FB30_R[src]

Bit 30 - Filter bits

pub fn fb31(&self) -> FB31_R[src]

Bit 31 - Filter bits

impl R<u32, Reg<u32, _MCR>>[src]

pub fn dbf(&self) -> DBF_R[src]

Bit 16 - DBF

pub fn reset(&self) -> RESET_R[src]

Bit 15 - RESET

pub fn ttcm(&self) -> TTCM_R[src]

Bit 7 - TTCM

pub fn abom(&self) -> ABOM_R[src]

Bit 6 - ABOM

pub fn awum(&self) -> AWUM_R[src]

Bit 5 - AWUM

pub fn nart(&self) -> NART_R[src]

Bit 4 - NART

pub fn rflm(&self) -> RFLM_R[src]

Bit 3 - RFLM

pub fn txfp(&self) -> TXFP_R[src]

Bit 2 - TXFP

pub fn sleep(&self) -> SLEEP_R[src]

Bit 1 - SLEEP

pub fn inrq(&self) -> INRQ_R[src]

Bit 0 - INRQ

impl R<u32, Reg<u32, _MSR>>[src]

pub fn rx(&self) -> RX_R[src]

Bit 11 - RX

pub fn samp(&self) -> SAMP_R[src]

Bit 10 - SAMP

pub fn rxm(&self) -> RXM_R[src]

Bit 9 - RXM

pub fn txm(&self) -> TXM_R[src]

Bit 8 - TXM

pub fn slaki(&self) -> SLAKI_R[src]

Bit 4 - SLAKI

pub fn wkui(&self) -> WKUI_R[src]

Bit 3 - WKUI

pub fn erri(&self) -> ERRI_R[src]

Bit 2 - ERRI

pub fn slak(&self) -> SLAK_R[src]

Bit 1 - SLAK

pub fn inak(&self) -> INAK_R[src]

Bit 0 - INAK

impl R<u32, Reg<u32, _TSR>>[src]

pub fn low2(&self) -> LOW2_R[src]

Bit 31 - Lowest priority flag for mailbox 2

pub fn low1(&self) -> LOW1_R[src]

Bit 30 - Lowest priority flag for mailbox 1

pub fn low0(&self) -> LOW0_R[src]

Bit 29 - Lowest priority flag for mailbox 0

pub fn tme2(&self) -> TME2_R[src]

Bit 28 - Lowest priority flag for mailbox 2

pub fn tme1(&self) -> TME1_R[src]

Bit 27 - Lowest priority flag for mailbox 1

pub fn tme0(&self) -> TME0_R[src]

Bit 26 - Lowest priority flag for mailbox 0

pub fn code(&self) -> CODE_R[src]

Bits 24:25 - CODE

pub fn abrq2(&self) -> ABRQ2_R[src]

Bit 23 - ABRQ2

pub fn terr2(&self) -> TERR2_R[src]

Bit 19 - TERR2

pub fn alst2(&self) -> ALST2_R[src]

Bit 18 - ALST2

pub fn txok2(&self) -> TXOK2_R[src]

Bit 17 - TXOK2

pub fn rqcp2(&self) -> RQCP2_R[src]

Bit 16 - RQCP2

pub fn abrq1(&self) -> ABRQ1_R[src]

Bit 15 - ABRQ1

pub fn terr1(&self) -> TERR1_R[src]

Bit 11 - TERR1

pub fn alst1(&self) -> ALST1_R[src]

Bit 10 - ALST1

pub fn txok1(&self) -> TXOK1_R[src]

Bit 9 - TXOK1

pub fn rqcp1(&self) -> RQCP1_R[src]

Bit 8 - RQCP1

pub fn abrq0(&self) -> ABRQ0_R[src]

Bit 7 - ABRQ0

pub fn terr0(&self) -> TERR0_R[src]

Bit 3 - TERR0

pub fn alst0(&self) -> ALST0_R[src]

Bit 2 - ALST0

pub fn txok0(&self) -> TXOK0_R[src]

Bit 1 - TXOK0

pub fn rqcp0(&self) -> RQCP0_R[src]

Bit 0 - RQCP0

impl R<bool, RFOM_A>[src]

pub fn variant(&self) -> Variant<bool, RFOM_A>[src]

Get enumerated values variant

pub fn is_release(&self) -> bool[src]

Checks if the value of the field is RELEASE

impl R<bool, FOVR_A>[src]

pub fn variant(&self) -> FOVR_A[src]

Get enumerated values variant

pub fn is_no_overrun(&self) -> bool[src]

Checks if the value of the field is NOOVERRUN

pub fn is_overrun(&self) -> bool[src]

Checks if the value of the field is OVERRUN

impl R<bool, FULL_A>[src]

pub fn variant(&self) -> FULL_A[src]

Get enumerated values variant

pub fn is_not_full(&self) -> bool[src]

Checks if the value of the field is NOTFULL

pub fn is_full(&self) -> bool[src]

Checks if the value of the field is FULL

impl R<u32, Reg<u32, _RFR>>[src]

pub fn rfom(&self) -> RFOM_R[src]

Bit 5 - RFOM0

pub fn fovr(&self) -> FOVR_R[src]

Bit 4 - FOVR0

pub fn full(&self) -> FULL_R[src]

Bit 3 - FULL0

pub fn fmp(&self) -> FMP_R[src]

Bits 0:1 - FMP0

impl R<bool, SLKIE_A>[src]

pub fn variant(&self) -> SLKIE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, WKUIE_A>[src]

pub fn variant(&self) -> WKUIE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, ERRIE_A>[src]

pub fn variant(&self) -> ERRIE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, LECIE_A>[src]

pub fn variant(&self) -> LECIE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, BOFIE_A>[src]

pub fn variant(&self) -> BOFIE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, EPVIE_A>[src]

pub fn variant(&self) -> EPVIE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, EWGIE_A>[src]

pub fn variant(&self) -> EWGIE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, FOVIE1_A>[src]

pub fn variant(&self) -> FOVIE1_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, FFIE1_A>[src]

pub fn variant(&self) -> FFIE1_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, FMPIE1_A>[src]

pub fn variant(&self) -> FMPIE1_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, FOVIE0_A>[src]

pub fn variant(&self) -> FOVIE0_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, FFIE0_A>[src]

pub fn variant(&self) -> FFIE0_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, FMPIE0_A>[src]

pub fn variant(&self) -> FMPIE0_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, TMEIE_A>[src]

pub fn variant(&self) -> TMEIE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u32, Reg<u32, _IER>>[src]

pub fn slkie(&self) -> SLKIE_R[src]

Bit 17 - SLKIE

pub fn wkuie(&self) -> WKUIE_R[src]

Bit 16 - WKUIE

pub fn errie(&self) -> ERRIE_R[src]

Bit 15 - ERRIE

pub fn lecie(&self) -> LECIE_R[src]

Bit 11 - LECIE

pub fn bofie(&self) -> BOFIE_R[src]

Bit 10 - BOFIE

pub fn epvie(&self) -> EPVIE_R[src]

Bit 9 - EPVIE

pub fn ewgie(&self) -> EWGIE_R[src]

Bit 8 - EWGIE

pub fn fovie1(&self) -> FOVIE1_R[src]

Bit 6 - FOVIE1

pub fn ffie1(&self) -> FFIE1_R[src]

Bit 5 - FFIE1

pub fn fmpie1(&self) -> FMPIE1_R[src]

Bit 4 - FMPIE1

pub fn fovie0(&self) -> FOVIE0_R[src]

Bit 3 - FOVIE0

pub fn ffie0(&self) -> FFIE0_R[src]

Bit 2 - FFIE0

pub fn fmpie0(&self) -> FMPIE0_R[src]

Bit 1 - FMPIE0

pub fn tmeie(&self) -> TMEIE_R[src]

Bit 0 - TMEIE

impl R<u8, LEC_A>[src]

pub fn variant(&self) -> LEC_A[src]

Get enumerated values variant

pub fn is_no_error(&self) -> bool[src]

Checks if the value of the field is NOERROR

pub fn is_stuff(&self) -> bool[src]

Checks if the value of the field is STUFF

pub fn is_form(&self) -> bool[src]

Checks if the value of the field is FORM

pub fn is_ack(&self) -> bool[src]

Checks if the value of the field is ACK

pub fn is_bit_recessive(&self) -> bool[src]

Checks if the value of the field is BITRECESSIVE

pub fn is_bit_dominant(&self) -> bool[src]

Checks if the value of the field is BITDOMINANT

pub fn is_crc(&self) -> bool[src]

Checks if the value of the field is CRC

pub fn is_custom(&self) -> bool[src]

Checks if the value of the field is CUSTOM

impl R<u32, Reg<u32, _ESR>>[src]

pub fn rec(&self) -> REC_R[src]

Bits 24:31 - REC

pub fn tec(&self) -> TEC_R[src]

Bits 16:23 - TEC

pub fn lec(&self) -> LEC_R[src]

Bits 4:6 - LEC

pub fn boff(&self) -> BOFF_R[src]

Bit 2 - BOFF

pub fn epvf(&self) -> EPVF_R[src]

Bit 1 - EPVF

pub fn ewgf(&self) -> EWGF_R[src]

Bit 0 - EWGF

impl R<bool, SILM_A>[src]

pub fn variant(&self) -> SILM_A[src]

Get enumerated values variant

pub fn is_normal(&self) -> bool[src]

Checks if the value of the field is NORMAL

pub fn is_silent(&self) -> bool[src]

Checks if the value of the field is SILENT

impl R<bool, LBKM_A>[src]

pub fn variant(&self) -> LBKM_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u32, Reg<u32, _BTR>>[src]

pub fn silm(&self) -> SILM_R[src]

Bit 31 - SILM

pub fn lbkm(&self) -> LBKM_R[src]

Bit 30 - LBKM

pub fn sjw(&self) -> SJW_R[src]

Bits 24:25 - SJW

pub fn ts2(&self) -> TS2_R[src]

Bits 20:22 - TS2

pub fn ts1(&self) -> TS1_R[src]

Bits 16:19 - TS1

pub fn brp(&self) -> BRP_R[src]

Bits 0:9 - BRP

impl R<u32, Reg<u32, _FMR>>[src]

pub fn can2sb(&self) -> CAN2SB_R[src]

Bits 8:13 - CAN2SB

pub fn finit(&self) -> FINIT_R[src]

Bit 0 - FINIT

impl R<u32, Reg<u32, _FM1R>>[src]

pub fn fbm0(&self) -> FBM0_R[src]

Bit 0 - Filter mode

pub fn fbm1(&self) -> FBM1_R[src]

Bit 1 - Filter mode

pub fn fbm2(&self) -> FBM2_R[src]

Bit 2 - Filter mode

pub fn fbm3(&self) -> FBM3_R[src]

Bit 3 - Filter mode

pub fn fbm4(&self) -> FBM4_R[src]

Bit 4 - Filter mode

pub fn fbm5(&self) -> FBM5_R[src]

Bit 5 - Filter mode

pub fn fbm6(&self) -> FBM6_R[src]

Bit 6 - Filter mode

pub fn fbm7(&self) -> FBM7_R[src]

Bit 7 - Filter mode

pub fn fbm8(&self) -> FBM8_R[src]

Bit 8 - Filter mode

pub fn fbm9(&self) -> FBM9_R[src]

Bit 9 - Filter mode

pub fn fbm10(&self) -> FBM10_R[src]

Bit 10 - Filter mode

pub fn fbm11(&self) -> FBM11_R[src]

Bit 11 - Filter mode

pub fn fbm12(&self) -> FBM12_R[src]

Bit 12 - Filter mode

pub fn fbm13(&self) -> FBM13_R[src]

Bit 13 - Filter mode

pub fn fbm14(&self) -> FBM14_R[src]

Bit 14 - Filter mode

pub fn fbm15(&self) -> FBM15_R[src]

Bit 15 - Filter mode

pub fn fbm16(&self) -> FBM16_R[src]

Bit 16 - Filter mode

pub fn fbm17(&self) -> FBM17_R[src]

Bit 17 - Filter mode

pub fn fbm18(&self) -> FBM18_R[src]

Bit 18 - Filter mode

pub fn fbm19(&self) -> FBM19_R[src]

Bit 19 - Filter mode

pub fn fbm20(&self) -> FBM20_R[src]

Bit 20 - Filter mode

pub fn fbm21(&self) -> FBM21_R[src]

Bit 21 - Filter mode

pub fn fbm22(&self) -> FBM22_R[src]

Bit 22 - Filter mode

pub fn fbm23(&self) -> FBM23_R[src]

Bit 23 - Filter mode

pub fn fbm24(&self) -> FBM24_R[src]

Bit 24 - Filter mode

pub fn fbm25(&self) -> FBM25_R[src]

Bit 25 - Filter mode

pub fn fbm26(&self) -> FBM26_R[src]

Bit 26 - Filter mode

pub fn fbm27(&self) -> FBM27_R[src]

Bit 27 - Filter mode

impl R<u32, Reg<u32, _FS1R>>[src]

pub fn fsc0(&self) -> FSC0_R[src]

Bit 0 - Filter scale configuration

pub fn fsc1(&self) -> FSC1_R[src]

Bit 1 - Filter scale configuration

pub fn fsc2(&self) -> FSC2_R[src]

Bit 2 - Filter scale configuration

pub fn fsc3(&self) -> FSC3_R[src]

Bit 3 - Filter scale configuration

pub fn fsc4(&self) -> FSC4_R[src]

Bit 4 - Filter scale configuration

pub fn fsc5(&self) -> FSC5_R[src]

Bit 5 - Filter scale configuration

pub fn fsc6(&self) -> FSC6_R[src]

Bit 6 - Filter scale configuration

pub fn fsc7(&self) -> FSC7_R[src]

Bit 7 - Filter scale configuration

pub fn fsc8(&self) -> FSC8_R[src]

Bit 8 - Filter scale configuration

pub fn fsc9(&self) -> FSC9_R[src]

Bit 9 - Filter scale configuration

pub fn fsc10(&self) -> FSC10_R[src]

Bit 10 - Filter scale configuration

pub fn fsc11(&self) -> FSC11_R[src]

Bit 11 - Filter scale configuration

pub fn fsc12(&self) -> FSC12_R[src]

Bit 12 - Filter scale configuration

pub fn fsc13(&self) -> FSC13_R[src]

Bit 13 - Filter scale configuration

pub fn fsc14(&self) -> FSC14_R[src]

Bit 14 - Filter scale configuration

pub fn fsc15(&self) -> FSC15_R[src]

Bit 15 - Filter scale configuration

pub fn fsc16(&self) -> FSC16_R[src]

Bit 16 - Filter scale configuration

pub fn fsc17(&self) -> FSC17_R[src]

Bit 17 - Filter scale configuration

pub fn fsc18(&self) -> FSC18_R[src]

Bit 18 - Filter scale configuration

pub fn fsc19(&self) -> FSC19_R[src]

Bit 19 - Filter scale configuration

pub fn fsc20(&self) -> FSC20_R[src]

Bit 20 - Filter scale configuration

pub fn fsc21(&self) -> FSC21_R[src]

Bit 21 - Filter scale configuration

pub fn fsc22(&self) -> FSC22_R[src]

Bit 22 - Filter scale configuration

pub fn fsc23(&self) -> FSC23_R[src]

Bit 23 - Filter scale configuration

pub fn fsc24(&self) -> FSC24_R[src]

Bit 24 - Filter scale configuration

pub fn fsc25(&self) -> FSC25_R[src]

Bit 25 - Filter scale configuration

pub fn fsc26(&self) -> FSC26_R[src]

Bit 26 - Filter scale configuration

pub fn fsc27(&self) -> FSC27_R[src]

Bit 27 - Filter scale configuration

impl R<u32, Reg<u32, _FFA1R>>[src]

pub fn ffa0(&self) -> FFA0_R[src]

Bit 0 - Filter FIFO assignment for filter 0

pub fn ffa1(&self) -> FFA1_R[src]

Bit 1 - Filter FIFO assignment for filter 1

pub fn ffa2(&self) -> FFA2_R[src]

Bit 2 - Filter FIFO assignment for filter 2

pub fn ffa3(&self) -> FFA3_R[src]

Bit 3 - Filter FIFO assignment for filter 3

pub fn ffa4(&self) -> FFA4_R[src]

Bit 4 - Filter FIFO assignment for filter 4

pub fn ffa5(&self) -> FFA5_R[src]

Bit 5 - Filter FIFO assignment for filter 5

pub fn ffa6(&self) -> FFA6_R[src]

Bit 6 - Filter FIFO assignment for filter 6

pub fn ffa7(&self) -> FFA7_R[src]

Bit 7 - Filter FIFO assignment for filter 7

pub fn ffa8(&self) -> FFA8_R[src]

Bit 8 - Filter FIFO assignment for filter 8

pub fn ffa9(&self) -> FFA9_R[src]

Bit 9 - Filter FIFO assignment for filter 9

pub fn ffa10(&self) -> FFA10_R[src]

Bit 10 - Filter FIFO assignment for filter 10

pub fn ffa11(&self) -> FFA11_R[src]

Bit 11 - Filter FIFO assignment for filter 11

pub fn ffa12(&self) -> FFA12_R[src]

Bit 12 - Filter FIFO assignment for filter 12

pub fn ffa13(&self) -> FFA13_R[src]

Bit 13 - Filter FIFO assignment for filter 13

pub fn ffa14(&self) -> FFA14_R[src]

Bit 14 - Filter FIFO assignment for filter 14

pub fn ffa15(&self) -> FFA15_R[src]

Bit 15 - Filter FIFO assignment for filter 15

pub fn ffa16(&self) -> FFA16_R[src]

Bit 16 - Filter FIFO assignment for filter 16

pub fn ffa17(&self) -> FFA17_R[src]

Bit 17 - Filter FIFO assignment for filter 17

pub fn ffa18(&self) -> FFA18_R[src]

Bit 18 - Filter FIFO assignment for filter 18

pub fn ffa19(&self) -> FFA19_R[src]

Bit 19 - Filter FIFO assignment for filter 19

pub fn ffa20(&self) -> FFA20_R[src]

Bit 20 - Filter FIFO assignment for filter 20

pub fn ffa21(&self) -> FFA21_R[src]

Bit 21 - Filter FIFO assignment for filter 21

pub fn ffa22(&self) -> FFA22_R[src]

Bit 22 - Filter FIFO assignment for filter 22

pub fn ffa23(&self) -> FFA23_R[src]

Bit 23 - Filter FIFO assignment for filter 23

pub fn ffa24(&self) -> FFA24_R[src]

Bit 24 - Filter FIFO assignment for filter 24

pub fn ffa25(&self) -> FFA25_R[src]

Bit 25 - Filter FIFO assignment for filter 25

pub fn ffa26(&self) -> FFA26_R[src]

Bit 26 - Filter FIFO assignment for filter 26

pub fn ffa27(&self) -> FFA27_R[src]

Bit 27 - Filter FIFO assignment for filter 27

impl R<u32, Reg<u32, _FA1R>>[src]

pub fn fact0(&self) -> FACT0_R[src]

Bit 0 - Filter active

pub fn fact1(&self) -> FACT1_R[src]

Bit 1 - Filter active

pub fn fact2(&self) -> FACT2_R[src]

Bit 2 - Filter active

pub fn fact3(&self) -> FACT3_R[src]

Bit 3 - Filter active

pub fn fact4(&self) -> FACT4_R[src]

Bit 4 - Filter active

pub fn fact5(&self) -> FACT5_R[src]

Bit 5 - Filter active

pub fn fact6(&self) -> FACT6_R[src]

Bit 6 - Filter active

pub fn fact7(&self) -> FACT7_R[src]

Bit 7 - Filter active

pub fn fact8(&self) -> FACT8_R[src]

Bit 8 - Filter active

pub fn fact9(&self) -> FACT9_R[src]

Bit 9 - Filter active

pub fn fact10(&self) -> FACT10_R[src]

Bit 10 - Filter active

pub fn fact11(&self) -> FACT11_R[src]

Bit 11 - Filter active

pub fn fact12(&self) -> FACT12_R[src]

Bit 12 - Filter active

pub fn fact13(&self) -> FACT13_R[src]

Bit 13 - Filter active

pub fn fact14(&self) -> FACT14_R[src]

Bit 14 - Filter active

pub fn fact15(&self) -> FACT15_R[src]

Bit 15 - Filter active

pub fn fact16(&self) -> FACT16_R[src]

Bit 16 - Filter active

pub fn fact17(&self) -> FACT17_R[src]

Bit 17 - Filter active

pub fn fact18(&self) -> FACT18_R[src]

Bit 18 - Filter active

pub fn fact19(&self) -> FACT19_R[src]

Bit 19 - Filter active

pub fn fact20(&self) -> FACT20_R[src]

Bit 20 - Filter active

pub fn fact21(&self) -> FACT21_R[src]

Bit 21 - Filter active

pub fn fact22(&self) -> FACT22_R[src]

Bit 22 - Filter active

pub fn fact23(&self) -> FACT23_R[src]

Bit 23 - Filter active

pub fn fact24(&self) -> FACT24_R[src]

Bit 24 - Filter active

pub fn fact25(&self) -> FACT25_R[src]

Bit 25 - Filter active

pub fn fact26(&self) -> FACT26_R[src]

Bit 26 - Filter active

pub fn fact27(&self) -> FACT27_R[src]

Bit 27 - Filter active

impl R<u8, STAT_TX_A>[src]

pub fn variant(&self) -> STAT_TX_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_stall(&self) -> bool[src]

Checks if the value of the field is STALL

pub fn is_nak(&self) -> bool[src]

Checks if the value of the field is NAK

pub fn is_valid(&self) -> bool[src]

Checks if the value of the field is VALID

impl R<u8, EP_TYPE_A>[src]

pub fn variant(&self) -> EP_TYPE_A[src]

Get enumerated values variant

pub fn is_bulk(&self) -> bool[src]

Checks if the value of the field is BULK

pub fn is_control(&self) -> bool[src]

Checks if the value of the field is CONTROL

pub fn is_iso(&self) -> bool[src]

Checks if the value of the field is ISO

pub fn is_interrupt(&self) -> bool[src]

Checks if the value of the field is INTERRUPT

impl R<u8, STAT_RX_A>[src]

pub fn variant(&self) -> STAT_RX_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_stall(&self) -> bool[src]

Checks if the value of the field is STALL

pub fn is_nak(&self) -> bool[src]

Checks if the value of the field is NAK

pub fn is_valid(&self) -> bool[src]

Checks if the value of the field is VALID

impl R<u32, Reg<u32, _EP0R>>[src]

pub fn ea(&self) -> EA_R[src]

Bits 0:3 - Endpoint address

pub fn stat_tx(&self) -> STAT_TX_R[src]

Bits 4:5 - Status bits, for transmission transfers

pub fn dtog_tx(&self) -> DTOG_TX_R[src]

Bit 6 - Data Toggle, for transmission transfers

pub fn ctr_tx(&self) -> CTR_TX_R[src]

Bit 7 - Correct Transfer for transmission

pub fn ep_kind(&self) -> EP_KIND_R[src]

Bit 8 - Endpoint kind

pub fn ep_type(&self) -> EP_TYPE_R[src]

Bits 9:10 - Endpoint type

pub fn setup(&self) -> SETUP_R[src]

Bit 11 - Setup transaction completed

pub fn stat_rx(&self) -> STAT_RX_R[src]

Bits 12:13 - Status bits, for reception transfers

pub fn dtog_rx(&self) -> DTOG_RX_R[src]

Bit 14 - Data Toggle, for reception transfers

pub fn ctr_rx(&self) -> CTR_RX_R[src]

Bit 15 - Correct transfer for reception

impl R<u8, STAT_TX_A>[src]

pub fn variant(&self) -> STAT_TX_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_stall(&self) -> bool[src]

Checks if the value of the field is STALL

pub fn is_nak(&self) -> bool[src]

Checks if the value of the field is NAK

pub fn is_valid(&self) -> bool[src]

Checks if the value of the field is VALID

impl R<u8, EP_TYPE_A>[src]

pub fn variant(&self) -> EP_TYPE_A[src]

Get enumerated values variant

pub fn is_bulk(&self) -> bool[src]

Checks if the value of the field is BULK

pub fn is_control(&self) -> bool[src]

Checks if the value of the field is CONTROL

pub fn is_iso(&self) -> bool[src]

Checks if the value of the field is ISO

pub fn is_interrupt(&self) -> bool[src]

Checks if the value of the field is INTERRUPT

impl R<u8, STAT_RX_A>[src]

pub fn variant(&self) -> STAT_RX_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_stall(&self) -> bool[src]

Checks if the value of the field is STALL

pub fn is_nak(&self) -> bool[src]

Checks if the value of the field is NAK

pub fn is_valid(&self) -> bool[src]

Checks if the value of the field is VALID

impl R<u32, Reg<u32, _EP1R>>[src]

pub fn ea(&self) -> EA_R[src]

Bits 0:3 - Endpoint address

pub fn stat_tx(&self) -> STAT_TX_R[src]

Bits 4:5 - Status bits, for transmission transfers

pub fn dtog_tx(&self) -> DTOG_TX_R[src]

Bit 6 - Data Toggle, for transmission transfers

pub fn ctr_tx(&self) -> CTR_TX_R[src]

Bit 7 - Correct Transfer for transmission

pub fn ep_kind(&self) -> EP_KIND_R[src]

Bit 8 - Endpoint kind

pub fn ep_type(&self) -> EP_TYPE_R[src]

Bits 9:10 - Endpoint type

pub fn setup(&self) -> SETUP_R[src]

Bit 11 - Setup transaction completed

pub fn stat_rx(&self) -> STAT_RX_R[src]

Bits 12:13 - Status bits, for reception transfers

pub fn dtog_rx(&self) -> DTOG_RX_R[src]

Bit 14 - Data Toggle, for reception transfers

pub fn ctr_rx(&self) -> CTR_RX_R[src]

Bit 15 - Correct transfer for reception

impl R<u8, STAT_TX_A>[src]

pub fn variant(&self) -> STAT_TX_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_stall(&self) -> bool[src]

Checks if the value of the field is STALL

pub fn is_nak(&self) -> bool[src]

Checks if the value of the field is NAK

pub fn is_valid(&self) -> bool[src]

Checks if the value of the field is VALID

impl R<u8, EP_TYPE_A>[src]

pub fn variant(&self) -> EP_TYPE_A[src]

Get enumerated values variant

pub fn is_bulk(&self) -> bool[src]

Checks if the value of the field is BULK

pub fn is_control(&self) -> bool[src]

Checks if the value of the field is CONTROL

pub fn is_iso(&self) -> bool[src]

Checks if the value of the field is ISO

pub fn is_interrupt(&self) -> bool[src]

Checks if the value of the field is INTERRUPT

impl R<u8, STAT_RX_A>[src]

pub fn variant(&self) -> STAT_RX_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_stall(&self) -> bool[src]

Checks if the value of the field is STALL

pub fn is_nak(&self) -> bool[src]

Checks if the value of the field is NAK

pub fn is_valid(&self) -> bool[src]

Checks if the value of the field is VALID

impl R<u32, Reg<u32, _EP2R>>[src]

pub fn ea(&self) -> EA_R[src]

Bits 0:3 - Endpoint address

pub fn stat_tx(&self) -> STAT_TX_R[src]

Bits 4:5 - Status bits, for transmission transfers

pub fn dtog_tx(&self) -> DTOG_TX_R[src]

Bit 6 - Data Toggle, for transmission transfers

pub fn ctr_tx(&self) -> CTR_TX_R[src]

Bit 7 - Correct Transfer for transmission

pub fn ep_kind(&self) -> EP_KIND_R[src]

Bit 8 - Endpoint kind

pub fn ep_type(&self) -> EP_TYPE_R[src]

Bits 9:10 - Endpoint type

pub fn setup(&self) -> SETUP_R[src]

Bit 11 - Setup transaction completed

pub fn stat_rx(&self) -> STAT_RX_R[src]

Bits 12:13 - Status bits, for reception transfers

pub fn dtog_rx(&self) -> DTOG_RX_R[src]

Bit 14 - Data Toggle, for reception transfers

pub fn ctr_rx(&self) -> CTR_RX_R[src]

Bit 15 - Correct transfer for reception

impl R<u8, STAT_TX_A>[src]

pub fn variant(&self) -> STAT_TX_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_stall(&self) -> bool[src]

Checks if the value of the field is STALL

pub fn is_nak(&self) -> bool[src]

Checks if the value of the field is NAK

pub fn is_valid(&self) -> bool[src]

Checks if the value of the field is VALID

impl R<u8, EP_TYPE_A>[src]

pub fn variant(&self) -> EP_TYPE_A[src]

Get enumerated values variant

pub fn is_bulk(&self) -> bool[src]

Checks if the value of the field is BULK

pub fn is_control(&self) -> bool[src]

Checks if the value of the field is CONTROL

pub fn is_iso(&self) -> bool[src]

Checks if the value of the field is ISO

pub fn is_interrupt(&self) -> bool[src]

Checks if the value of the field is INTERRUPT

impl R<u8, STAT_RX_A>[src]

pub fn variant(&self) -> STAT_RX_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_stall(&self) -> bool[src]

Checks if the value of the field is STALL

pub fn is_nak(&self) -> bool[src]

Checks if the value of the field is NAK

pub fn is_valid(&self) -> bool[src]

Checks if the value of the field is VALID

impl R<u32, Reg<u32, _EP3R>>[src]

pub fn ea(&self) -> EA_R[src]

Bits 0:3 - Endpoint address

pub fn stat_tx(&self) -> STAT_TX_R[src]

Bits 4:5 - Status bits, for transmission transfers

pub fn dtog_tx(&self) -> DTOG_TX_R[src]

Bit 6 - Data Toggle, for transmission transfers

pub fn ctr_tx(&self) -> CTR_TX_R[src]

Bit 7 - Correct Transfer for transmission

pub fn ep_kind(&self) -> EP_KIND_R[src]

Bit 8 - Endpoint kind

pub fn ep_type(&self) -> EP_TYPE_R[src]

Bits 9:10 - Endpoint type

pub fn setup(&self) -> SETUP_R[src]

Bit 11 - Setup transaction completed

pub fn stat_rx(&self) -> STAT_RX_R[src]

Bits 12:13 - Status bits, for reception transfers

pub fn dtog_rx(&self) -> DTOG_RX_R[src]

Bit 14 - Data Toggle, for reception transfers

pub fn ctr_rx(&self) -> CTR_RX_R[src]

Bit 15 - Correct transfer for reception

impl R<u8, STAT_TX_A>[src]

pub fn variant(&self) -> STAT_TX_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_stall(&self) -> bool[src]

Checks if the value of the field is STALL

pub fn is_nak(&self) -> bool[src]

Checks if the value of the field is NAK

pub fn is_valid(&self) -> bool[src]

Checks if the value of the field is VALID

impl R<u8, EP_TYPE_A>[src]

pub fn variant(&self) -> EP_TYPE_A[src]

Get enumerated values variant

pub fn is_bulk(&self) -> bool[src]

Checks if the value of the field is BULK

pub fn is_control(&self) -> bool[src]

Checks if the value of the field is CONTROL

pub fn is_iso(&self) -> bool[src]

Checks if the value of the field is ISO

pub fn is_interrupt(&self) -> bool[src]

Checks if the value of the field is INTERRUPT

impl R<u8, STAT_RX_A>[src]

pub fn variant(&self) -> STAT_RX_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_stall(&self) -> bool[src]

Checks if the value of the field is STALL

pub fn is_nak(&self) -> bool[src]

Checks if the value of the field is NAK

pub fn is_valid(&self) -> bool[src]

Checks if the value of the field is VALID

impl R<u32, Reg<u32, _EP4R>>[src]

pub fn ea(&self) -> EA_R[src]

Bits 0:3 - Endpoint address

pub fn stat_tx(&self) -> STAT_TX_R[src]

Bits 4:5 - Status bits, for transmission transfers

pub fn dtog_tx(&self) -> DTOG_TX_R[src]

Bit 6 - Data Toggle, for transmission transfers

pub fn ctr_tx(&self) -> CTR_TX_R[src]

Bit 7 - Correct Transfer for transmission

pub fn ep_kind(&self) -> EP_KIND_R[src]

Bit 8 - Endpoint kind

pub fn ep_type(&self) -> EP_TYPE_R[src]

Bits 9:10 - Endpoint type

pub fn setup(&self) -> SETUP_R[src]

Bit 11 - Setup transaction completed

pub fn stat_rx(&self) -> STAT_RX_R[src]

Bits 12:13 - Status bits, for reception transfers

pub fn dtog_rx(&self) -> DTOG_RX_R[src]

Bit 14 - Data Toggle, for reception transfers

pub fn ctr_rx(&self) -> CTR_RX_R[src]

Bit 15 - Correct transfer for reception

impl R<u8, STAT_TX_A>[src]

pub fn variant(&self) -> STAT_TX_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_stall(&self) -> bool[src]

Checks if the value of the field is STALL

pub fn is_nak(&self) -> bool[src]

Checks if the value of the field is NAK

pub fn is_valid(&self) -> bool[src]

Checks if the value of the field is VALID

impl R<u8, EP_TYPE_A>[src]

pub fn variant(&self) -> EP_TYPE_A[src]

Get enumerated values variant

pub fn is_bulk(&self) -> bool[src]

Checks if the value of the field is BULK

pub fn is_control(&self) -> bool[src]

Checks if the value of the field is CONTROL

pub fn is_iso(&self) -> bool[src]

Checks if the value of the field is ISO

pub fn is_interrupt(&self) -> bool[src]

Checks if the value of the field is INTERRUPT

impl R<u8, STAT_RX_A>[src]

pub fn variant(&self) -> STAT_RX_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_stall(&self) -> bool[src]

Checks if the value of the field is STALL

pub fn is_nak(&self) -> bool[src]

Checks if the value of the field is NAK

pub fn is_valid(&self) -> bool[src]

Checks if the value of the field is VALID

impl R<u32, Reg<u32, _EP5R>>[src]

pub fn ea(&self) -> EA_R[src]

Bits 0:3 - Endpoint address

pub fn stat_tx(&self) -> STAT_TX_R[src]

Bits 4:5 - Status bits, for transmission transfers

pub fn dtog_tx(&self) -> DTOG_TX_R[src]

Bit 6 - Data Toggle, for transmission transfers

pub fn ctr_tx(&self) -> CTR_TX_R[src]

Bit 7 - Correct Transfer for transmission

pub fn ep_kind(&self) -> EP_KIND_R[src]

Bit 8 - Endpoint kind

pub fn ep_type(&self) -> EP_TYPE_R[src]

Bits 9:10 - Endpoint type

pub fn setup(&self) -> SETUP_R[src]

Bit 11 - Setup transaction completed

pub fn stat_rx(&self) -> STAT_RX_R[src]

Bits 12:13 - Status bits, for reception transfers

pub fn dtog_rx(&self) -> DTOG_RX_R[src]

Bit 14 - Data Toggle, for reception transfers

pub fn ctr_rx(&self) -> CTR_RX_R[src]

Bit 15 - Correct transfer for reception

impl R<u8, STAT_TX_A>[src]

pub fn variant(&self) -> STAT_TX_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_stall(&self) -> bool[src]

Checks if the value of the field is STALL

pub fn is_nak(&self) -> bool[src]

Checks if the value of the field is NAK

pub fn is_valid(&self) -> bool[src]

Checks if the value of the field is VALID

impl R<u8, EP_TYPE_A>[src]

pub fn variant(&self) -> EP_TYPE_A[src]

Get enumerated values variant

pub fn is_bulk(&self) -> bool[src]

Checks if the value of the field is BULK

pub fn is_control(&self) -> bool[src]

Checks if the value of the field is CONTROL

pub fn is_iso(&self) -> bool[src]

Checks if the value of the field is ISO

pub fn is_interrupt(&self) -> bool[src]

Checks if the value of the field is INTERRUPT

impl R<u8, STAT_RX_A>[src]

pub fn variant(&self) -> STAT_RX_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_stall(&self) -> bool[src]

Checks if the value of the field is STALL

pub fn is_nak(&self) -> bool[src]

Checks if the value of the field is NAK

pub fn is_valid(&self) -> bool[src]

Checks if the value of the field is VALID

impl R<u32, Reg<u32, _EP6R>>[src]

pub fn ea(&self) -> EA_R[src]

Bits 0:3 - Endpoint address

pub fn stat_tx(&self) -> STAT_TX_R[src]

Bits 4:5 - Status bits, for transmission transfers

pub fn dtog_tx(&self) -> DTOG_TX_R[src]

Bit 6 - Data Toggle, for transmission transfers

pub fn ctr_tx(&self) -> CTR_TX_R[src]

Bit 7 - Correct Transfer for transmission

pub fn ep_kind(&self) -> EP_KIND_R[src]

Bit 8 - Endpoint kind

pub fn ep_type(&self) -> EP_TYPE_R[src]

Bits 9:10 - Endpoint type

pub fn setup(&self) -> SETUP_R[src]

Bit 11 - Setup transaction completed

pub fn stat_rx(&self) -> STAT_RX_R[src]

Bits 12:13 - Status bits, for reception transfers

pub fn dtog_rx(&self) -> DTOG_RX_R[src]

Bit 14 - Data Toggle, for reception transfers

pub fn ctr_rx(&self) -> CTR_RX_R[src]

Bit 15 - Correct transfer for reception

impl R<u8, STAT_TX_A>[src]

pub fn variant(&self) -> STAT_TX_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_stall(&self) -> bool[src]

Checks if the value of the field is STALL

pub fn is_nak(&self) -> bool[src]

Checks if the value of the field is NAK

pub fn is_valid(&self) -> bool[src]

Checks if the value of the field is VALID

impl R<u8, EP_TYPE_A>[src]

pub fn variant(&self) -> EP_TYPE_A[src]

Get enumerated values variant

pub fn is_bulk(&self) -> bool[src]

Checks if the value of the field is BULK

pub fn is_control(&self) -> bool[src]

Checks if the value of the field is CONTROL

pub fn is_iso(&self) -> bool[src]

Checks if the value of the field is ISO

pub fn is_interrupt(&self) -> bool[src]

Checks if the value of the field is INTERRUPT

impl R<u8, STAT_RX_A>[src]

pub fn variant(&self) -> STAT_RX_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_stall(&self) -> bool[src]

Checks if the value of the field is STALL

pub fn is_nak(&self) -> bool[src]

Checks if the value of the field is NAK

pub fn is_valid(&self) -> bool[src]

Checks if the value of the field is VALID

impl R<u32, Reg<u32, _EP7R>>[src]

pub fn ea(&self) -> EA_R[src]

Bits 0:3 - Endpoint address

pub fn stat_tx(&self) -> STAT_TX_R[src]

Bits 4:5 - Status bits, for transmission transfers

pub fn dtog_tx(&self) -> DTOG_TX_R[src]

Bit 6 - Data Toggle, for transmission transfers

pub fn ctr_tx(&self) -> CTR_TX_R[src]

Bit 7 - Correct Transfer for transmission

pub fn ep_kind(&self) -> EP_KIND_R[src]

Bit 8 - Endpoint kind

pub fn ep_type(&self) -> EP_TYPE_R[src]

Bits 9:10 - Endpoint type

pub fn setup(&self) -> SETUP_R[src]

Bit 11 - Setup transaction completed

pub fn stat_rx(&self) -> STAT_RX_R[src]

Bits 12:13 - Status bits, for reception transfers

pub fn dtog_rx(&self) -> DTOG_RX_R[src]

Bit 14 - Data Toggle, for reception transfers

pub fn ctr_rx(&self) -> CTR_RX_R[src]

Bit 15 - Correct transfer for reception

impl R<bool, FRES_A>[src]

pub fn variant(&self) -> FRES_A[src]

Get enumerated values variant

pub fn is_no_reset(&self) -> bool[src]

Checks if the value of the field is NORESET

pub fn is_reset(&self) -> bool[src]

Checks if the value of the field is RESET

impl R<bool, PDWN_A>[src]

pub fn variant(&self) -> PDWN_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, LPMODE_A>[src]

pub fn variant(&self) -> LPMODE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, FSUSP_A>[src]

pub fn variant(&self) -> FSUSP_A[src]

Get enumerated values variant

pub fn is_no_effect(&self) -> bool[src]

Checks if the value of the field is NOEFFECT

pub fn is_suspend(&self) -> bool[src]

Checks if the value of the field is SUSPEND

impl R<bool, RESUME_A>[src]

pub fn variant(&self) -> Variant<bool, RESUME_A>[src]

Get enumerated values variant

pub fn is_requested(&self) -> bool[src]

Checks if the value of the field is REQUESTED

impl R<bool, ESOFM_A>[src]

pub fn variant(&self) -> ESOFM_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, SOFM_A>[src]

pub fn variant(&self) -> SOFM_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, RESETM_A>[src]

pub fn variant(&self) -> RESETM_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, SUSPM_A>[src]

pub fn variant(&self) -> SUSPM_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, WKUPM_A>[src]

pub fn variant(&self) -> WKUPM_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, ERRM_A>[src]

pub fn variant(&self) -> ERRM_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, PMAOVRM_A>[src]

pub fn variant(&self) -> PMAOVRM_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, CTRM_A>[src]

pub fn variant(&self) -> CTRM_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u32, Reg<u32, _CNTR>>[src]

pub fn fres(&self) -> FRES_R[src]

Bit 0 - Force USB Reset

pub fn pdwn(&self) -> PDWN_R[src]

Bit 1 - Power down

pub fn lpmode(&self) -> LPMODE_R[src]

Bit 2 - Low-power mode

pub fn fsusp(&self) -> FSUSP_R[src]

Bit 3 - Force suspend

pub fn resume(&self) -> RESUME_R[src]

Bit 4 - Resume request

pub fn esofm(&self) -> ESOFM_R[src]

Bit 8 - Expected start of frame interrupt mask

pub fn sofm(&self) -> SOFM_R[src]

Bit 9 - Start of frame interrupt mask

pub fn resetm(&self) -> RESETM_R[src]

Bit 10 - USB reset interrupt mask

pub fn suspm(&self) -> SUSPM_R[src]

Bit 11 - Suspend mode interrupt mask

pub fn wkupm(&self) -> WKUPM_R[src]

Bit 12 - Wakeup interrupt mask

pub fn errm(&self) -> ERRM_R[src]

Bit 13 - Error interrupt mask

pub fn pmaovrm(&self) -> PMAOVRM_R[src]

Bit 14 - Packet memory area over / underrun interrupt mask

pub fn ctrm(&self) -> CTRM_R[src]

Bit 15 - Correct transfer interrupt mask

impl R<bool, DIR_A>[src]

pub fn variant(&self) -> DIR_A[src]

Get enumerated values variant

pub fn is_to(&self) -> bool[src]

Checks if the value of the field is TO

pub fn is_from(&self) -> bool[src]

Checks if the value of the field is FROM

impl R<bool, ESOF_A>[src]

pub fn variant(&self) -> Variant<bool, ESOF_A>[src]

Get enumerated values variant

pub fn is_expected_start_of_frame(&self) -> bool[src]

Checks if the value of the field is EXPECTEDSTARTOFFRAME

impl R<bool, SOF_A>[src]

pub fn variant(&self) -> Variant<bool, SOF_A>[src]

Get enumerated values variant

pub fn is_start_of_frame(&self) -> bool[src]

Checks if the value of the field is STARTOFFRAME

impl R<bool, RESET_A>[src]

pub fn variant(&self) -> Variant<bool, RESET_A>[src]

Get enumerated values variant

pub fn is_reset(&self) -> bool[src]

Checks if the value of the field is RESET

impl R<bool, SUSP_A>[src]

pub fn variant(&self) -> Variant<bool, SUSP_A>[src]

Get enumerated values variant

pub fn is_suspend(&self) -> bool[src]

Checks if the value of the field is SUSPEND

impl R<bool, WKUP_A>[src]

pub fn variant(&self) -> Variant<bool, WKUP_A>[src]

Get enumerated values variant

pub fn is_wakeup(&self) -> bool[src]

Checks if the value of the field is WAKEUP

impl R<bool, ERR_A>[src]

pub fn variant(&self) -> Variant<bool, ERR_A>[src]

Get enumerated values variant

pub fn is_error(&self) -> bool[src]

Checks if the value of the field is ERROR

impl R<bool, PMAOVR_A>[src]

pub fn variant(&self) -> Variant<bool, PMAOVR_A>[src]

Get enumerated values variant

pub fn is_overrun(&self) -> bool[src]

Checks if the value of the field is OVERRUN

impl R<bool, CTR_A>[src]

pub fn variant(&self) -> Variant<bool, CTR_A>[src]

Get enumerated values variant

pub fn is_completed(&self) -> bool[src]

Checks if the value of the field is COMPLETED

impl R<u32, Reg<u32, _ISTR>>[src]

pub fn ep_id(&self) -> EP_ID_R[src]

Bits 0:3 - Endpoint Identifier

pub fn dir(&self) -> DIR_R[src]

Bit 4 - Direction of transaction

pub fn esof(&self) -> ESOF_R[src]

Bit 8 - Expected start frame

pub fn sof(&self) -> SOF_R[src]

Bit 9 - start of frame

pub fn reset(&self) -> RESET_R[src]

Bit 10 - reset request

pub fn susp(&self) -> SUSP_R[src]

Bit 11 - Suspend mode request

pub fn wkup(&self) -> WKUP_R[src]

Bit 12 - Wakeup

pub fn err(&self) -> ERR_R[src]

Bit 13 - Error

pub fn pmaovr(&self) -> PMAOVR_R[src]

Bit 14 - Packet memory area over / underrun

pub fn ctr(&self) -> CTR_R[src]

Bit 15 - Correct transfer

impl R<bool, LCK_A>[src]

pub fn variant(&self) -> Variant<bool, LCK_A>[src]

Get enumerated values variant

pub fn is_locked(&self) -> bool[src]

Checks if the value of the field is LOCKED

impl R<bool, RXDM_A>[src]

pub fn variant(&self) -> Variant<bool, RXDM_A>[src]

Get enumerated values variant

pub fn is_received(&self) -> bool[src]

Checks if the value of the field is RECEIVED

impl R<bool, RXDP_A>[src]

pub fn variant(&self) -> Variant<bool, RXDP_A>[src]

Get enumerated values variant

pub fn is_received(&self) -> bool[src]

Checks if the value of the field is RECEIVED

impl R<u32, Reg<u32, _FNR>>[src]

pub fn fn_(&self) -> FN_R[src]

Bits 0:10 - Frame number

pub fn lsof(&self) -> LSOF_R[src]

Bits 11:12 - Lost SOF

pub fn lck(&self) -> LCK_R[src]

Bit 13 - Locked

pub fn rxdm(&self) -> RXDM_R[src]

Bit 14 - Receive data - line status

pub fn rxdp(&self) -> RXDP_R[src]

Bit 15 - Receive data + line status

impl R<bool, EF_A>[src]

pub fn variant(&self) -> EF_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u32, Reg<u32, _DADDR>>[src]

pub fn add(&self) -> ADD_R[src]

Bit 0 - Device address

pub fn add1(&self) -> ADD1_R[src]

Bit 1 - Device address

pub fn add2(&self) -> ADD2_R[src]

Bit 2 - Device address

pub fn add3(&self) -> ADD3_R[src]

Bit 3 - Device address

pub fn add4(&self) -> ADD4_R[src]

Bit 4 - Device address

pub fn add5(&self) -> ADD5_R[src]

Bit 5 - Device address

pub fn add6(&self) -> ADD6_R[src]

Bit 6 - Device address

pub fn ef(&self) -> EF_R[src]

Bit 7 - Enable function

impl R<u32, Reg<u32, _BTABLE>>[src]

pub fn btable(&self) -> BTABLE_R[src]

Bits 3:15 - Buffer table

impl R<bool, PE_A>[src]

pub fn variant(&self) -> PE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, TXIE_A>[src]

pub fn variant(&self) -> TXIE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, RXIE_A>[src]

pub fn variant(&self) -> RXIE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, ADDRIE_A>[src]

pub fn variant(&self) -> ADDRIE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, NACKIE_A>[src]

pub fn variant(&self) -> NACKIE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, STOPIE_A>[src]

pub fn variant(&self) -> STOPIE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, TCIE_A>[src]

pub fn variant(&self) -> TCIE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, ERRIE_A>[src]

pub fn variant(&self) -> ERRIE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u8, DNF_A>[src]

pub fn variant(&self) -> DNF_A[src]

Get enumerated values variant

pub fn is_no_filter(&self) -> bool[src]

Checks if the value of the field is NOFILTER

pub fn is_filter1(&self) -> bool[src]

Checks if the value of the field is FILTER1

pub fn is_filter2(&self) -> bool[src]

Checks if the value of the field is FILTER2

pub fn is_filter3(&self) -> bool[src]

Checks if the value of the field is FILTER3

pub fn is_filter4(&self) -> bool[src]

Checks if the value of the field is FILTER4

pub fn is_filter5(&self) -> bool[src]

Checks if the value of the field is FILTER5

pub fn is_filter6(&self) -> bool[src]

Checks if the value of the field is FILTER6

pub fn is_filter7(&self) -> bool[src]

Checks if the value of the field is FILTER7

pub fn is_filter8(&self) -> bool[src]

Checks if the value of the field is FILTER8

pub fn is_filter9(&self) -> bool[src]

Checks if the value of the field is FILTER9

pub fn is_filter10(&self) -> bool[src]

Checks if the value of the field is FILTER10

pub fn is_filter11(&self) -> bool[src]

Checks if the value of the field is FILTER11

pub fn is_filter12(&self) -> bool[src]

Checks if the value of the field is FILTER12

pub fn is_filter13(&self) -> bool[src]

Checks if the value of the field is FILTER13

pub fn is_filter14(&self) -> bool[src]

Checks if the value of the field is FILTER14

pub fn is_filter15(&self) -> bool[src]

Checks if the value of the field is FILTER15

impl R<bool, ANFOFF_A>[src]

pub fn variant(&self) -> ANFOFF_A[src]

Get enumerated values variant

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

impl R<bool, TXDMAEN_A>[src]

pub fn variant(&self) -> TXDMAEN_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, RXDMAEN_A>[src]

pub fn variant(&self) -> RXDMAEN_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, SBC_A>[src]

pub fn variant(&self) -> SBC_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, NOSTRETCH_A>[src]

pub fn variant(&self) -> NOSTRETCH_A[src]

Get enumerated values variant

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

impl R<bool, WUPEN_A>[src]

pub fn variant(&self) -> WUPEN_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, GCEN_A>[src]

pub fn variant(&self) -> GCEN_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, SMBHEN_A>[src]

pub fn variant(&self) -> SMBHEN_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, SMBDEN_A>[src]

pub fn variant(&self) -> SMBDEN_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, ALERTEN_A>[src]

pub fn variant(&self) -> ALERTEN_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, PECEN_A>[src]

pub fn variant(&self) -> PECEN_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u32, Reg<u32, _CR1>>[src]

pub fn pe(&self) -> PE_R[src]

Bit 0 - Peripheral enable

pub fn txie(&self) -> TXIE_R[src]

Bit 1 - TX Interrupt enable

pub fn rxie(&self) -> RXIE_R[src]

Bit 2 - RX Interrupt enable

pub fn addrie(&self) -> ADDRIE_R[src]

Bit 3 - Address match interrupt enable (slave only)

pub fn nackie(&self) -> NACKIE_R[src]

Bit 4 - Not acknowledge received interrupt enable

pub fn stopie(&self) -> STOPIE_R[src]

Bit 5 - STOP detection Interrupt enable

pub fn tcie(&self) -> TCIE_R[src]

Bit 6 - Transfer Complete interrupt enable

pub fn errie(&self) -> ERRIE_R[src]

Bit 7 - Error interrupts enable

pub fn dnf(&self) -> DNF_R[src]

Bits 8:11 - Digital noise filter

pub fn anfoff(&self) -> ANFOFF_R[src]

Bit 12 - Analog noise filter OFF

pub fn txdmaen(&self) -> TXDMAEN_R[src]

Bit 14 - DMA transmission requests enable

pub fn rxdmaen(&self) -> RXDMAEN_R[src]

Bit 15 - DMA reception requests enable

pub fn sbc(&self) -> SBC_R[src]

Bit 16 - Slave byte control

pub fn nostretch(&self) -> NOSTRETCH_R[src]

Bit 17 - Clock stretching disable

pub fn wupen(&self) -> WUPEN_R[src]

Bit 18 - Wakeup from STOP enable

pub fn gcen(&self) -> GCEN_R[src]

Bit 19 - General call enable

pub fn smbhen(&self) -> SMBHEN_R[src]

Bit 20 - SMBus Host address enable

pub fn smbden(&self) -> SMBDEN_R[src]

Bit 21 - SMBus Device Default address enable

pub fn alerten(&self) -> ALERTEN_R[src]

Bit 22 - SMBUS alert enable

pub fn pecen(&self) -> PECEN_R[src]

Bit 23 - PEC enable

impl R<bool, PECBYTE_A>[src]

pub fn variant(&self) -> PECBYTE_A[src]

Get enumerated values variant

pub fn is_no_pec(&self) -> bool[src]

Checks if the value of the field is NOPEC

pub fn is_pec(&self) -> bool[src]

Checks if the value of the field is PEC

impl R<bool, AUTOEND_A>[src]

pub fn variant(&self) -> AUTOEND_A[src]

Get enumerated values variant

pub fn is_software(&self) -> bool[src]

Checks if the value of the field is SOFTWARE

pub fn is_automatic(&self) -> bool[src]

Checks if the value of the field is AUTOMATIC

impl R<bool, RELOAD_A>[src]

pub fn variant(&self) -> RELOAD_A[src]

Get enumerated values variant

pub fn is_completed(&self) -> bool[src]

Checks if the value of the field is COMPLETED

pub fn is_not_competed(&self) -> bool[src]

Checks if the value of the field is NOTCOMPETED

impl R<bool, NACK_A>[src]

pub fn variant(&self) -> NACK_A[src]

Get enumerated values variant

pub fn is_ack(&self) -> bool[src]

Checks if the value of the field is ACK

pub fn is_nack(&self) -> bool[src]

Checks if the value of the field is NACK

impl R<bool, STOP_A>[src]

pub fn variant(&self) -> STOP_A[src]

Get enumerated values variant

pub fn is_no_stop(&self) -> bool[src]

Checks if the value of the field is NOSTOP

pub fn is_stop(&self) -> bool[src]

Checks if the value of the field is STOP

impl R<bool, START_A>[src]

pub fn variant(&self) -> START_A[src]

Get enumerated values variant

pub fn is_no_start(&self) -> bool[src]

Checks if the value of the field is NOSTART

pub fn is_start(&self) -> bool[src]

Checks if the value of the field is START

impl R<bool, HEAD10R_A>[src]

pub fn variant(&self) -> HEAD10R_A[src]

Get enumerated values variant

pub fn is_complete(&self) -> bool[src]

Checks if the value of the field is COMPLETE

pub fn is_partial(&self) -> bool[src]

Checks if the value of the field is PARTIAL

impl R<bool, ADD10_A>[src]

pub fn variant(&self) -> ADD10_A[src]

Get enumerated values variant

pub fn is_bit7(&self) -> bool[src]

Checks if the value of the field is BIT7

pub fn is_bit10(&self) -> bool[src]

Checks if the value of the field is BIT10

impl R<bool, RD_WRN_A>[src]

pub fn variant(&self) -> RD_WRN_A[src]

Get enumerated values variant

pub fn is_write(&self) -> bool[src]

Checks if the value of the field is WRITE

pub fn is_read(&self) -> bool[src]

Checks if the value of the field is READ

impl R<u32, Reg<u32, _CR2>>[src]

pub fn pecbyte(&self) -> PECBYTE_R[src]

Bit 26 - Packet error checking byte

pub fn autoend(&self) -> AUTOEND_R[src]

Bit 25 - Automatic end mode (master mode)

pub fn reload(&self) -> RELOAD_R[src]

Bit 24 - NBYTES reload mode

pub fn nbytes(&self) -> NBYTES_R[src]

Bits 16:23 - Number of bytes

pub fn nack(&self) -> NACK_R[src]

Bit 15 - NACK generation (slave mode)

pub fn stop(&self) -> STOP_R[src]

Bit 14 - Stop generation (master mode)

pub fn start(&self) -> START_R[src]

Bit 13 - Start generation

pub fn head10r(&self) -> HEAD10R_R[src]

Bit 12 - 10-bit address header only read direction (master receiver mode)

pub fn add10(&self) -> ADD10_R[src]

Bit 11 - 10-bit addressing mode (master mode)

pub fn rd_wrn(&self) -> RD_WRN_R[src]

Bit 10 - Transfer direction (master mode)

pub fn sadd(&self) -> SADD_R[src]

Bits 0:9 - Slave address bit 9:8 (master mode)

impl R<bool, OA1MODE_A>[src]

pub fn variant(&self) -> OA1MODE_A[src]

Get enumerated values variant

pub fn is_bit7(&self) -> bool[src]

Checks if the value of the field is BIT7

pub fn is_bit10(&self) -> bool[src]

Checks if the value of the field is BIT10

impl R<bool, OA1EN_A>[src]

pub fn variant(&self) -> OA1EN_A[src]

Get enumerated values variant

pub fn is_diasbled(&self) -> bool[src]

Checks if the value of the field is DIASBLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u32, Reg<u32, _OAR1>>[src]

pub fn oa1mode(&self) -> OA1MODE_R[src]

Bit 10 - Own Address 1 10-bit mode

pub fn oa1en(&self) -> OA1EN_R[src]

Bit 15 - Own Address 1 enable

pub fn oa1(&self) -> OA1_R[src]

Bits 0:9 - Interface address

impl R<u8, OA2MSK_A>[src]

pub fn variant(&self) -> OA2MSK_A[src]

Get enumerated values variant

pub fn is_no_mask(&self) -> bool[src]

Checks if the value of the field is NOMASK

pub fn is_mask1(&self) -> bool[src]

Checks if the value of the field is MASK1

pub fn is_mask2(&self) -> bool[src]

Checks if the value of the field is MASK2

pub fn is_mask3(&self) -> bool[src]

Checks if the value of the field is MASK3

pub fn is_mask4(&self) -> bool[src]

Checks if the value of the field is MASK4

pub fn is_mask5(&self) -> bool[src]

Checks if the value of the field is MASK5

pub fn is_mask6(&self) -> bool[src]

Checks if the value of the field is MASK6

pub fn is_mask7(&self) -> bool[src]

Checks if the value of the field is MASK7

impl R<bool, OA2EN_A>[src]

pub fn variant(&self) -> OA2EN_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u32, Reg<u32, _OAR2>>[src]

pub fn oa2(&self) -> OA2_R[src]

Bits 1:7 - Interface address

pub fn oa2msk(&self) -> OA2MSK_R[src]

Bits 8:10 - Own Address 2 masks

pub fn oa2en(&self) -> OA2EN_R[src]

Bit 15 - Own Address 2 enable

impl R<u32, Reg<u32, _TIMINGR>>[src]

pub fn scll(&self) -> SCLL_R[src]

Bits 0:7 - SCL low period (master mode)

pub fn sclh(&self) -> SCLH_R[src]

Bits 8:15 - SCL high period (master mode)

pub fn sdadel(&self) -> SDADEL_R[src]

Bits 16:19 - Data hold time

pub fn scldel(&self) -> SCLDEL_R[src]

Bits 20:23 - Data setup time

pub fn presc(&self) -> PRESC_R[src]

Bits 28:31 - Timing prescaler

impl R<bool, TIDLE_A>[src]

pub fn variant(&self) -> TIDLE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, TIMOUTEN_A>[src]

pub fn variant(&self) -> TIMOUTEN_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, TEXTEN_A>[src]

pub fn variant(&self) -> TEXTEN_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u32, Reg<u32, _TIMEOUTR>>[src]

pub fn timeouta(&self) -> TIMEOUTA_R[src]

Bits 0:11 - Bus timeout A

pub fn tidle(&self) -> TIDLE_R[src]

Bit 12 - Idle clock timeout detection

pub fn timouten(&self) -> TIMOUTEN_R[src]

Bit 15 - Clock timeout enable

pub fn timeoutb(&self) -> TIMEOUTB_R[src]

Bits 16:27 - Bus timeout B

pub fn texten(&self) -> TEXTEN_R[src]

Bit 31 - Extended clock timeout enable

impl R<bool, DIR_A>[src]

pub fn variant(&self) -> DIR_A[src]

Get enumerated values variant

pub fn is_write(&self) -> bool[src]

Checks if the value of the field is WRITE

pub fn is_read(&self) -> bool[src]

Checks if the value of the field is READ

impl R<bool, BUSY_A>[src]

pub fn variant(&self) -> BUSY_A[src]

Get enumerated values variant

pub fn is_not_busy(&self) -> bool[src]

Checks if the value of the field is NOTBUSY

pub fn is_busy(&self) -> bool[src]

Checks if the value of the field is BUSY

impl R<bool, ALERT_A>[src]

pub fn variant(&self) -> ALERT_A[src]

Get enumerated values variant

pub fn is_no_alert(&self) -> bool[src]

Checks if the value of the field is NOALERT

pub fn is_alert(&self) -> bool[src]

Checks if the value of the field is ALERT

impl R<bool, TIMEOUT_A>[src]

pub fn variant(&self) -> TIMEOUT_A[src]

Get enumerated values variant

pub fn is_no_timeout(&self) -> bool[src]

Checks if the value of the field is NOTIMEOUT

pub fn is_timeout(&self) -> bool[src]

Checks if the value of the field is TIMEOUT

impl R<bool, PECERR_A>[src]

pub fn variant(&self) -> PECERR_A[src]

Get enumerated values variant

pub fn is_match_(&self) -> bool[src]

Checks if the value of the field is MATCH

pub fn is_no_match(&self) -> bool[src]

Checks if the value of the field is NOMATCH

impl R<bool, OVR_A>[src]

pub fn variant(&self) -> OVR_A[src]

Get enumerated values variant

pub fn is_no_overrun(&self) -> bool[src]

Checks if the value of the field is NOOVERRUN

pub fn is_overrun(&self) -> bool[src]

Checks if the value of the field is OVERRUN

impl R<bool, ARLO_A>[src]

pub fn variant(&self) -> ARLO_A[src]

Get enumerated values variant

pub fn is_not_lost(&self) -> bool[src]

Checks if the value of the field is NOTLOST

pub fn is_lost(&self) -> bool[src]

Checks if the value of the field is LOST

impl R<bool, BERR_A>[src]

pub fn variant(&self) -> BERR_A[src]

Get enumerated values variant

pub fn is_no_error(&self) -> bool[src]

Checks if the value of the field is NOERROR

pub fn is_error(&self) -> bool[src]

Checks if the value of the field is ERROR

impl R<bool, TCR_A>[src]

pub fn variant(&self) -> TCR_A[src]

Get enumerated values variant

pub fn is_not_complete(&self) -> bool[src]

Checks if the value of the field is NOTCOMPLETE

pub fn is_complete(&self) -> bool[src]

Checks if the value of the field is COMPLETE

impl R<bool, TC_A>[src]

pub fn variant(&self) -> TC_A[src]

Get enumerated values variant

pub fn is_not_complete(&self) -> bool[src]

Checks if the value of the field is NOTCOMPLETE

pub fn is_complete(&self) -> bool[src]

Checks if the value of the field is COMPLETE

impl R<bool, STOPF_A>[src]

pub fn variant(&self) -> STOPF_A[src]

Get enumerated values variant

pub fn is_no_stop(&self) -> bool[src]

Checks if the value of the field is NOSTOP

pub fn is_stop(&self) -> bool[src]

Checks if the value of the field is STOP

impl R<bool, NACKF_A>[src]

pub fn variant(&self) -> NACKF_A[src]

Get enumerated values variant

pub fn is_no_nack(&self) -> bool[src]

Checks if the value of the field is NONACK

pub fn is_nack(&self) -> bool[src]

Checks if the value of the field is NACK

impl R<bool, ADDR_A>[src]

pub fn variant(&self) -> ADDR_A[src]

Get enumerated values variant

pub fn is_not_match(&self) -> bool[src]

Checks if the value of the field is NOTMATCH

pub fn is_match_(&self) -> bool[src]

Checks if the value of the field is MATCH

impl R<bool, RXNE_A>[src]

pub fn variant(&self) -> RXNE_A[src]

Get enumerated values variant

pub fn is_empty(&self) -> bool[src]

Checks if the value of the field is EMPTY

pub fn is_not_empty(&self) -> bool[src]

Checks if the value of the field is NOTEMPTY

impl R<bool, TXIS_A>[src]

pub fn variant(&self) -> TXIS_A[src]

Get enumerated values variant

pub fn is_not_empty(&self) -> bool[src]

Checks if the value of the field is NOTEMPTY

pub fn is_empty(&self) -> bool[src]

Checks if the value of the field is EMPTY

impl R<bool, TXE_A>[src]

pub fn variant(&self) -> TXE_A[src]

Get enumerated values variant

pub fn is_not_empty(&self) -> bool[src]

Checks if the value of the field is NOTEMPTY

pub fn is_empty(&self) -> bool[src]

Checks if the value of the field is EMPTY

impl R<u32, Reg<u32, _ISR>>[src]

pub fn addcode(&self) -> ADDCODE_R[src]

Bits 17:23 - Address match code (Slave mode)

pub fn dir(&self) -> DIR_R[src]

Bit 16 - Transfer direction (Slave mode)

pub fn busy(&self) -> BUSY_R[src]

Bit 15 - Bus busy

pub fn alert(&self) -> ALERT_R[src]

Bit 13 - SMBus alert

pub fn timeout(&self) -> TIMEOUT_R[src]

Bit 12 - Timeout or t_low detection flag

pub fn pecerr(&self) -> PECERR_R[src]

Bit 11 - PEC Error in reception

pub fn ovr(&self) -> OVR_R[src]

Bit 10 - Overrun/Underrun (slave mode)

pub fn arlo(&self) -> ARLO_R[src]

Bit 9 - Arbitration lost

pub fn berr(&self) -> BERR_R[src]

Bit 8 - Bus error

pub fn tcr(&self) -> TCR_R[src]

Bit 7 - Transfer Complete Reload

pub fn tc(&self) -> TC_R[src]

Bit 6 - Transfer Complete (master mode)

pub fn stopf(&self) -> STOPF_R[src]

Bit 5 - Stop detection flag

pub fn nackf(&self) -> NACKF_R[src]

Bit 4 - Not acknowledge received flag

pub fn addr(&self) -> ADDR_R[src]

Bit 3 - Address matched (slave mode)

pub fn rxne(&self) -> RXNE_R[src]

Bit 2 - Receive data register not empty (receivers)

pub fn txis(&self) -> TXIS_R[src]

Bit 1 - Transmit interrupt status (transmitters)

pub fn txe(&self) -> TXE_R[src]

Bit 0 - Transmit data register empty (transmitters)

impl R<u32, Reg<u32, _PECR>>[src]

pub fn pec(&self) -> PEC_R[src]

Bits 0:7 - Packet error checking register

impl R<u32, Reg<u32, _RXDR>>[src]

pub fn rxdata(&self) -> RXDATA_R[src]

Bits 0:7 - 8-bit receive data

impl R<u32, Reg<u32, _TXDR>>[src]

pub fn txdata(&self) -> TXDATA_R[src]

Bits 0:7 - 8-bit transmit data

impl R<u8, PR_A>[src]

pub fn variant(&self) -> PR_A[src]

Get enumerated values variant

pub fn is_divide_by4(&self) -> bool[src]

Checks if the value of the field is DIVIDEBY4

pub fn is_divide_by8(&self) -> bool[src]

Checks if the value of the field is DIVIDEBY8

pub fn is_divide_by16(&self) -> bool[src]

Checks if the value of the field is DIVIDEBY16

pub fn is_divide_by32(&self) -> bool[src]

Checks if the value of the field is DIVIDEBY32

pub fn is_divide_by64(&self) -> bool[src]

Checks if the value of the field is DIVIDEBY64

pub fn is_divide_by128(&self) -> bool[src]

Checks if the value of the field is DIVIDEBY128

pub fn is_divide_by256(&self) -> bool[src]

Checks if the value of the field is DIVIDEBY256

pub fn is_divide_by256bis(&self) -> bool[src]

Checks if the value of the field is DIVIDEBY256BIS

impl R<u32, Reg<u32, _PR>>[src]

pub fn pr(&self) -> PR_R[src]

Bits 0:2 - Prescaler divider

impl R<u32, Reg<u32, _RLR>>[src]

pub fn rl(&self) -> RL_R[src]

Bits 0:11 - Watchdog counter reload value

impl R<u32, Reg<u32, _SR>>[src]

pub fn pvu(&self) -> PVU_R[src]

Bit 0 - Watchdog prescaler value update

pub fn rvu(&self) -> RVU_R[src]

Bit 1 - Watchdog counter reload value update

pub fn wvu(&self) -> WVU_R[src]

Bit 2 - Watchdog counter window value update

impl R<u32, Reg<u32, _WINR>>[src]

pub fn win(&self) -> WIN_R[src]

Bits 0:11 - Watchdog counter window value

impl R<bool, WDGA_A>[src]

pub fn variant(&self) -> WDGA_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u32, Reg<u32, _CR>>[src]

pub fn wdga(&self) -> WDGA_R[src]

Bit 7 - Activation bit

pub fn t(&self) -> T_R[src]

Bits 0:6 - 7-bit counter

impl R<bool, EWI_A>[src]

pub fn variant(&self) -> Variant<bool, EWI_A>[src]

Get enumerated values variant

pub fn is_enable(&self) -> bool[src]

Checks if the value of the field is ENABLE

impl R<u8, WDGTB_A>[src]

pub fn variant(&self) -> WDGTB_A[src]

Get enumerated values variant

pub fn is_div1(&self) -> bool[src]

Checks if the value of the field is DIV1

pub fn is_div2(&self) -> bool[src]

Checks if the value of the field is DIV2

pub fn is_div4(&self) -> bool[src]

Checks if the value of the field is DIV4

pub fn is_div8(&self) -> bool[src]

Checks if the value of the field is DIV8

impl R<u32, Reg<u32, _CFR>>[src]

pub fn ewi(&self) -> EWI_R[src]

Bit 9 - Early wakeup interrupt

pub fn w(&self) -> W_R[src]

Bits 0:6 - 7-bit window value

pub fn wdgtb(&self) -> WDGTB_R[src]

Bits 7:8 - Timer base

impl R<bool, EWIF_A>[src]

pub fn variant(&self) -> EWIF_A[src]

Get enumerated values variant

pub fn is_pending(&self) -> bool[src]

Checks if the value of the field is PENDING

pub fn is_finished(&self) -> bool[src]

Checks if the value of the field is FINISHED

impl R<u32, Reg<u32, _SR>>[src]

pub fn ewif(&self) -> EWIF_R[src]

Bit 0 - Early wakeup interrupt flag

impl R<u32, Reg<u32, _TR>>[src]

pub fn pm(&self) -> PM_R[src]

Bit 22 - AM/PM notation

pub fn ht(&self) -> HT_R[src]

Bits 20:21 - Hour tens in BCD format

pub fn hu(&self) -> HU_R[src]

Bits 16:19 - Hour units in BCD format

pub fn mnt(&self) -> MNT_R[src]

Bits 12:14 - Minute tens in BCD format

pub fn mnu(&self) -> MNU_R[src]

Bits 8:11 - Minute units in BCD format

pub fn st(&self) -> ST_R[src]

Bits 4:6 - Second tens in BCD format

pub fn su(&self) -> SU_R[src]

Bits 0:3 - Second units in BCD format

impl R<u32, Reg<u32, _DR>>[src]

pub fn yt(&self) -> YT_R[src]

Bits 20:23 - Year tens in BCD format

pub fn yu(&self) -> YU_R[src]

Bits 16:19 - Year units in BCD format

pub fn wdu(&self) -> WDU_R[src]

Bits 13:15 - Week day units

pub fn mt(&self) -> MT_R[src]

Bit 12 - Month tens in BCD format

pub fn mu(&self) -> MU_R[src]

Bits 8:11 - Month units in BCD format

pub fn dt(&self) -> DT_R[src]

Bits 4:5 - Date tens in BCD format

pub fn du(&self) -> DU_R[src]

Bits 0:3 - Date units in BCD format

impl R<u32, Reg<u32, _CR>>[src]

pub fn wcksel(&self) -> WCKSEL_R[src]

Bits 0:2 - Wakeup clock selection

pub fn tsedge(&self) -> TSEDGE_R[src]

Bit 3 - Time-stamp event active edge

pub fn refckon(&self) -> REFCKON_R[src]

Bit 4 - Reference clock detection enable (50 or 60 Hz)

pub fn bypshad(&self) -> BYPSHAD_R[src]

Bit 5 - Bypass the shadow registers

pub fn fmt(&self) -> FMT_R[src]

Bit 6 - Hour format

pub fn alrae(&self) -> ALRAE_R[src]

Bit 8 - Alarm A enable

pub fn alrbe(&self) -> ALRBE_R[src]

Bit 9 - Alarm B enable

pub fn wute(&self) -> WUTE_R[src]

Bit 10 - Wakeup timer enable

pub fn tse(&self) -> TSE_R[src]

Bit 11 - Time stamp enable

pub fn alraie(&self) -> ALRAIE_R[src]

Bit 12 - Alarm A interrupt enable

pub fn alrbie(&self) -> ALRBIE_R[src]

Bit 13 - Alarm B interrupt enable

pub fn wutie(&self) -> WUTIE_R[src]

Bit 14 - Wakeup timer interrupt enable

pub fn tsie(&self) -> TSIE_R[src]

Bit 15 - Time-stamp interrupt enable

pub fn add1h(&self) -> ADD1H_R[src]

Bit 16 - Add 1 hour (summer time change)

pub fn sub1h(&self) -> SUB1H_R[src]

Bit 17 - Subtract 1 hour (winter time change)

pub fn bkp(&self) -> BKP_R[src]

Bit 18 - Backup

pub fn cosel(&self) -> COSEL_R[src]

Bit 19 - Calibration output selection

pub fn pol(&self) -> POL_R[src]

Bit 20 - Output polarity

pub fn osel(&self) -> OSEL_R[src]

Bits 21:22 - Output selection

pub fn coe(&self) -> COE_R[src]

Bit 23 - Calibration output enable

impl R<u32, Reg<u32, _ISR>>[src]

pub fn tamp1f(&self) -> TAMP1F_R[src]

Bit 13 - Tamper detection flag

pub fn tsovf(&self) -> TSOVF_R[src]

Bit 12 - Time-stamp overflow flag

pub fn tsf(&self) -> TSF_R[src]

Bit 11 - Time-stamp flag

pub fn wutf(&self) -> WUTF_R[src]

Bit 10 - Wakeup timer flag

pub fn alrbf(&self) -> ALRBF_R[src]

Bit 9 - Alarm B flag

pub fn alraf(&self) -> ALRAF_R[src]

Bit 8 - Alarm A flag

pub fn init(&self) -> INIT_R[src]

Bit 7 - Initialization mode

pub fn initf(&self) -> INITF_R[src]

Bit 6 - Initialization flag

pub fn rsf(&self) -> RSF_R[src]

Bit 5 - Registers synchronization flag

pub fn inits(&self) -> INITS_R[src]

Bit 4 - Initialization status flag

pub fn wutwf(&self) -> WUTWF_R[src]

Bit 2 - Wakeup timer write flag

pub fn alrbwf(&self) -> ALRBWF_R[src]

Bit 1 - Alarm B write flag

pub fn alrawf(&self) -> ALRAWF_R[src]

Bit 0 - Alarm A write flag

pub fn shpf(&self) -> SHPF_R[src]

Bit 3 - Shift operation pending

pub fn tamp2f(&self) -> TAMP2F_R[src]

Bit 14 - RTC_TAMP2 detection flag

pub fn tamp3f(&self) -> TAMP3F_R[src]

Bit 15 - RTC_TAMP3 detection flag

pub fn recalpf(&self) -> RECALPF_R[src]

Bit 16 - Recalibration pending Flag

impl R<u32, Reg<u32, _PRER>>[src]

pub fn prediv_a(&self) -> PREDIV_A_R[src]

Bits 16:22 - Asynchronous prescaler factor

pub fn prediv_s(&self) -> PREDIV_S_R[src]

Bits 0:14 - Synchronous prescaler factor

impl R<u32, Reg<u32, _WUTR>>[src]

pub fn wut(&self) -> WUT_R[src]

Bits 0:15 - Wakeup auto-reload value bits

impl R<u32, Reg<u32, _ALRMAR>>[src]

pub fn msk4(&self) -> MSK4_R[src]

Bit 31 - Alarm A date mask

pub fn wdsel(&self) -> WDSEL_R[src]

Bit 30 - Week day selection

pub fn dt(&self) -> DT_R[src]

Bits 28:29 - Date tens in BCD format

pub fn du(&self) -> DU_R[src]

Bits 24:27 - Date units or day in BCD format

pub fn msk3(&self) -> MSK3_R[src]

Bit 23 - Alarm A hours mask

pub fn pm(&self) -> PM_R[src]

Bit 22 - AM/PM notation

pub fn ht(&self) -> HT_R[src]

Bits 20:21 - Hour tens in BCD format

pub fn hu(&self) -> HU_R[src]

Bits 16:19 - Hour units in BCD format

pub fn msk2(&self) -> MSK2_R[src]

Bit 15 - Alarm A minutes mask

pub fn mnt(&self) -> MNT_R[src]

Bits 12:14 - Minute tens in BCD format

pub fn mnu(&self) -> MNU_R[src]

Bits 8:11 - Minute units in BCD format

pub fn msk1(&self) -> MSK1_R[src]

Bit 7 - Alarm A seconds mask

pub fn st(&self) -> ST_R[src]

Bits 4:6 - Second tens in BCD format

pub fn su(&self) -> SU_R[src]

Bits 0:3 - Second units in BCD format

impl R<u32, Reg<u32, _ALRMBR>>[src]

pub fn msk4(&self) -> MSK4_R[src]

Bit 31 - Alarm B date mask

pub fn wdsel(&self) -> WDSEL_R[src]

Bit 30 - Week day selection

pub fn dt(&self) -> DT_R[src]

Bits 28:29 - Date tens in BCD format

pub fn du(&self) -> DU_R[src]

Bits 24:27 - Date units or day in BCD format

pub fn msk3(&self) -> MSK3_R[src]

Bit 23 - Alarm B hours mask

pub fn pm(&self) -> PM_R[src]

Bit 22 - AM/PM notation

pub fn ht(&self) -> HT_R[src]

Bits 20:21 - Hour tens in BCD format

pub fn hu(&self) -> HU_R[src]

Bits 16:19 - Hour units in BCD format

pub fn msk2(&self) -> MSK2_R[src]

Bit 15 - Alarm B minutes mask

pub fn mnt(&self) -> MNT_R[src]

Bits 12:14 - Minute tens in BCD format

pub fn mnu(&self) -> MNU_R[src]

Bits 8:11 - Minute units in BCD format

pub fn msk1(&self) -> MSK1_R[src]

Bit 7 - Alarm B seconds mask

pub fn st(&self) -> ST_R[src]

Bits 4:6 - Second tens in BCD format

pub fn su(&self) -> SU_R[src]

Bits 0:3 - Second units in BCD format

impl R<u32, Reg<u32, _SSR>>[src]

pub fn ss(&self) -> SS_R[src]

Bits 0:15 - Sub second value

impl R<u32, Reg<u32, _TSTR>>[src]

pub fn su(&self) -> SU_R[src]

Bits 0:3 - Second units in BCD format

pub fn st(&self) -> ST_R[src]

Bits 4:6 - Second tens in BCD format

pub fn mnu(&self) -> MNU_R[src]

Bits 8:11 - Minute units in BCD format

pub fn mnt(&self) -> MNT_R[src]

Bits 12:14 - Minute tens in BCD format

pub fn hu(&self) -> HU_R[src]

Bits 16:19 - Hour units in BCD format

pub fn ht(&self) -> HT_R[src]

Bits 20:21 - Hour tens in BCD format

pub fn pm(&self) -> PM_R[src]

Bit 22 - AM/PM notation

impl R<u32, Reg<u32, _TSDR>>[src]

pub fn wdu(&self) -> WDU_R[src]

Bits 13:15 - Week day units

pub fn mt(&self) -> MT_R[src]

Bit 12 - Month tens in BCD format

pub fn mu(&self) -> MU_R[src]

Bits 8:11 - Month units in BCD format

pub fn dt(&self) -> DT_R[src]

Bits 4:5 - Date tens in BCD format

pub fn du(&self) -> DU_R[src]

Bits 0:3 - Date units in BCD format

impl R<u32, Reg<u32, _TSSSR>>[src]

pub fn ss(&self) -> SS_R[src]

Bits 0:15 - Sub second value

impl R<u32, Reg<u32, _CALR>>[src]

pub fn calp(&self) -> CALP_R[src]

Bit 15 - Increase frequency of RTC by 488.5 ppm

pub fn calw8(&self) -> CALW8_R[src]

Bit 14 - Use an 8-second calibration cycle period

pub fn calw16(&self) -> CALW16_R[src]

Bit 13 - Use a 16-second calibration cycle period

pub fn calm(&self) -> CALM_R[src]

Bits 0:8 - Calibration minus

impl R<u32, Reg<u32, _TAFCR>>[src]

pub fn tamp1e(&self) -> TAMP1E_R[src]

Bit 0 - Tamper 1 detection enable

pub fn tamp1trg(&self) -> TAMP1TRG_R[src]

Bit 1 - Active level for tamper 1

pub fn tampie(&self) -> TAMPIE_R[src]

Bit 2 - Tamper interrupt enable

pub fn tamp2e(&self) -> TAMP2E_R[src]

Bit 3 - Tamper 2 detection enable

pub fn tamp2trg(&self) -> TAMP2TRG_R[src]

Bit 4 - Active level for tamper 2

pub fn tampts(&self) -> TAMPTS_R[src]

Bit 7 - Activate timestamp on tamper detection event

pub fn tampfreq(&self) -> TAMPFREQ_R[src]

Bits 8:10 - Tamper sampling frequency

pub fn tampflt(&self) -> TAMPFLT_R[src]

Bits 11:12 - Tamper filter count

pub fn tampprch(&self) -> TAMPPRCH_R[src]

Bits 13:14 - Tamper precharge duration

pub fn tamppudis(&self) -> TAMPPUDIS_R[src]

Bit 15 - TAMPER pull-up disable

pub fn pc13value(&self) -> PC13VALUE_R[src]

Bit 18 - PC13 value

pub fn pc13mode(&self) -> PC13MODE_R[src]

Bit 19 - PC13 mode

pub fn pc14value(&self) -> PC14VALUE_R[src]

Bit 20 - PC14 value

pub fn pc14mode(&self) -> PC14MODE_R[src]

Bit 21 - PC 14 mode

pub fn pc15value(&self) -> PC15VALUE_R[src]

Bit 22 - PC15 value

pub fn pc15mode(&self) -> PC15MODE_R[src]

Bit 23 - PC15 mode

impl R<u32, Reg<u32, _ALRMASSR>>[src]

pub fn maskss(&self) -> MASKSS_R[src]

Bits 24:27 - Mask the most-significant bits starting at this bit

pub fn ss(&self) -> SS_R[src]

Bits 0:14 - Sub seconds value

impl R<u32, Reg<u32, _ALRMBSSR>>[src]

pub fn maskss(&self) -> MASKSS_R[src]

Bits 24:27 - Mask the most-significant bits starting at this bit

pub fn ss(&self) -> SS_R[src]

Bits 0:14 - Sub seconds value

impl R<u32, Reg<u32, _BKPR>>[src]

pub fn bkp(&self) -> BKP_R[src]

Bits 0:31 - BKP

impl R<u32, Reg<u32, _CR1>>[src]

pub fn eocalie(&self) -> EOCALIE_R[src]

Bit 0 - End of calibration interrupt enable

pub fn jeocie(&self) -> JEOCIE_R[src]

Bit 1 - Injected end of conversion interrupt enable

pub fn jovrie(&self) -> JOVRIE_R[src]

Bit 2 - Injected data overrun interrupt enable

pub fn reocie(&self) -> REOCIE_R[src]

Bit 3 - Regular end of conversion interrupt enable

pub fn rovrie(&self) -> ROVRIE_R[src]

Bit 4 - Regular data overrun interrupt enable

pub fn refv(&self) -> REFV_R[src]

Bits 8:9 - Reference voltage selection

pub fn slowck(&self) -> SLOWCK_R[src]

Bit 10 - Slow clock mode enable

pub fn sbi(&self) -> SBI_R[src]

Bit 11 - Enter Standby mode when idle

pub fn pdi(&self) -> PDI_R[src]

Bit 12 - Enter power down mode when idle

pub fn jsync(&self) -> JSYNC_R[src]

Bit 14 - Launch a injected conversion synchronously with SDADC1

pub fn rsync(&self) -> RSYNC_R[src]

Bit 15 - Launch regular conversion synchronously with SDADC1

pub fn jdmaen(&self) -> JDMAEN_R[src]

Bit 16 - DMA channel enabled to read data for the injected channel group

pub fn rdmaen(&self) -> RDMAEN_R[src]

Bit 17 - DMA channel enabled to read data for the regular channel

pub fn init(&self) -> INIT_R[src]

Bit 31 - Initialization mode request

impl R<u32, Reg<u32, _CR2>>[src]

pub fn fast(&self) -> FAST_R[src]

Bit 24 - Fast conversion mode selection

pub fn rswstart(&self) -> RSWSTART_R[src]

Bit 23 - Software start of a conversion on the regular channel

pub fn rcont(&self) -> RCONT_R[src]

Bit 22 - Continuous mode selection for regular conversions

pub fn rch(&self) -> RCH_R[src]

Bits 16:19 - Regular channel selection

pub fn jswstart(&self) -> JSWSTART_R[src]

Bit 15 - Start a conversion of the injected group of channels

pub fn jexten(&self) -> JEXTEN_R[src]

Bits 13:14 - Trigger enable and trigger edge selection for injected conversions

pub fn jextsel(&self) -> JEXTSEL_R[src]

Bits 8:11 - Trigger signal selection for launching injected conversions

pub fn jds(&self) -> JDS_R[src]

Bit 6 - Delay start of injected conversions.

pub fn jcont(&self) -> JCONT_R[src]

Bit 5 - Continuous mode selection for injected conversions

pub fn startcalib(&self) -> STARTCALIB_R[src]

Bit 4 - Start calibration

pub fn calibcnt(&self) -> CALIBCNT_R[src]

Bits 1:2 - Number of calibration sequences to be performed (number of valid configurations)

pub fn adon(&self) -> ADON_R[src]

Bit 0 - SDADC enable

impl R<u32, Reg<u32, _ISR>>[src]

pub fn initrdy(&self) -> INITRDY_R[src]

Bit 31 - Initialization mode is ready

pub fn stabip(&self) -> STABIP_R[src]

Bit 15 - Stabilization in progress status

pub fn rcip(&self) -> RCIP_R[src]

Bit 14 - Regular conversion in progress status

pub fn jcip(&self) -> JCIP_R[src]

Bit 13 - Injected conversion in progress status

pub fn calibip(&self) -> CALIBIP_R[src]

Bit 12 - Calibration in progress status

pub fn rovrf(&self) -> ROVRF_R[src]

Bit 4 - Regular conversion overrun flag

pub fn reocf(&self) -> REOCF_R[src]

Bit 3 - End of regular conversion flag

pub fn jovrf(&self) -> JOVRF_R[src]

Bit 2 - Injected conversion overrun flag

pub fn jeocf(&self) -> JEOCF_R[src]

Bit 1 - End of injected conversion flag

pub fn eocalf(&self) -> EOCALF_R[src]

Bit 0 - End of calibration flag

impl R<u32, Reg<u32, _CLRISR>>[src]

pub fn clrrovrf(&self) -> CLRROVRF_R[src]

Bit 4 - Clear the regular conversion overrun flag

pub fn clrjovrf(&self) -> CLRJOVRF_R[src]

Bit 2 - Clear the injected conversion overrun flag

pub fn clreocalf(&self) -> CLREOCALF_R[src]

Bit 0 - Clear the end of calibration flag

impl R<u32, Reg<u32, _JCHGR>>[src]

pub fn jchg(&self) -> JCHG_R[src]

Bits 0:8 - Injected channel group selection

impl R<u32, Reg<u32, _CONF0R>>[src]

pub fn common0(&self) -> COMMON0_R[src]

Bits 30:31 - Common mode for configuration 0

pub fn se0(&self) -> SE0_R[src]

Bits 26:27 - Single-ended mode for configuration 0

pub fn gain0(&self) -> GAIN0_R[src]

Bits 20:22 - Gain setting for configuration 0

pub fn offset0(&self) -> OFFSET0_R[src]

Bits 0:11 - Twelve-bit calibration offset for configuration 0

impl R<u32, Reg<u32, _CONF1R>>[src]

pub fn common1(&self) -> COMMON1_R[src]

Bits 30:31 - Common mode for configuration 1

pub fn se1(&self) -> SE1_R[src]

Bits 26:27 - Single-ended mode for configuration 1

pub fn gain1(&self) -> GAIN1_R[src]

Bits 20:22 - Gain setting for configuration 1

pub fn offset1(&self) -> OFFSET1_R[src]

Bits 0:11 - Twelve-bit calibration offset for configuration 1

impl R<u32, Reg<u32, _CONF2R>>[src]

pub fn common2(&self) -> COMMON2_R[src]

Bits 30:31 - Common mode for configuration 2

pub fn se2(&self) -> SE2_R[src]

Bits 26:27 - Single-ended mode for configuration 2

pub fn gain2(&self) -> GAIN2_R[src]

Bits 20:22 - Gain setting for configuration 2

pub fn offset2(&self) -> OFFSET2_R[src]

Bits 0:11 - Twelve-bit calibration offset for configuration 2

impl R<u32, Reg<u32, _CONFCHR1>>[src]

pub fn confch7(&self) -> CONFCH7_R[src]

Bits 28:29 - CONFCH7

pub fn confch6(&self) -> CONFCH6_R[src]

Bits 24:25 - CONFCH6

pub fn confch5(&self) -> CONFCH5_R[src]

Bits 20:21 - CONFCH5

pub fn confch4(&self) -> CONFCH4_R[src]

Bits 16:17 - CONFCH4

pub fn confch3(&self) -> CONFCH3_R[src]

Bits 12:13 - CONFCH3

pub fn confch2(&self) -> CONFCH2_R[src]

Bits 8:9 - CONFCH2

pub fn confch1(&self) -> CONFCH1_R[src]

Bits 4:5 - CONFCH1

pub fn confch0(&self) -> CONFCH0_R[src]

Bits 0:1 - CONFCH0

impl R<u32, Reg<u32, _CONFCHR2>>[src]

pub fn confch8(&self) -> CONFCH8_R[src]

Bits 0:1 - Channel 8 configuration

impl R<u32, Reg<u32, _JDATAR>>[src]

pub fn jdatach(&self) -> JDATACH_R[src]

Bits 25:28 - Injected channel most recently converted

pub fn jdata(&self) -> JDATA_R[src]

Bits 0:15 - Injected group conversion data

impl R<u32, Reg<u32, _RDATAR>>[src]

pub fn rdata(&self) -> RDATA_R[src]

Bits 0:15 - Regular channel conversion data

impl R<u32, Reg<u32, _JDATA12R>>[src]

pub fn jdata2(&self) -> JDATA2_R[src]

Bits 16:31 - Injected group conversion data for SDADC2

pub fn jdata1(&self) -> JDATA1_R[src]

Bits 0:15 - Injected group conversion data for SDADC1

impl R<u32, Reg<u32, _RDATA12R>>[src]

pub fn rdata2(&self) -> RDATA2_R[src]

Bits 16:31 - Regular conversion data for SDADC2

pub fn rdata1(&self) -> RDATA1_R[src]

Bits 0:15 - Regular conversion data for SDADC1

impl R<u32, Reg<u32, _JDATA13R>>[src]

pub fn jdata3(&self) -> JDATA3_R[src]

Bits 16:31 - Injected group conversion data for SDADC3

pub fn jdata1(&self) -> JDATA1_R[src]

Bits 0:15 - Injected group conversion data for SDADC1

impl R<u32, Reg<u32, _RDATA13R>>[src]

pub fn rdata3(&self) -> RDATA3_R[src]

Bits 16:31 - Regular conversion data for SDADC3

pub fn rdata1(&self) -> RDATA1_R[src]

Bits 0:15 - Regular conversion data for SDADC1

impl R<u32, Reg<u32, _CR>>[src]

pub fn dmaudrie1(&self) -> DMAUDRIE1_R[src]

Bit 13 - DAC channel1 DMA Underrun Interrupt enable

pub fn dmaen1(&self) -> DMAEN1_R[src]

Bit 12 - DAC channel1 DMA enable

pub fn mamp13(&self) -> MAMP13_R[src]

Bit 11 - DAC channel1 mask/amplitude selector

pub fn mamp12(&self) -> MAMP12_R[src]

Bit 10 - MAMP12

pub fn mamp11(&self) -> MAMP11_R[src]

Bit 9 - MAMP11

pub fn mamp10(&self) -> MAMP10_R[src]

Bit 8 - MAMP10

pub fn wave1(&self) -> WAVE1_R[src]

Bit 7 - DAC channel1 noise/triangle wave generation enable

pub fn wave2(&self) -> WAVE2_R[src]

Bit 6 - WAVE2

pub fn tsel1(&self) -> TSEL1_R[src]

Bits 3:5 - DAC channel1 trigger selection

pub fn ten1(&self) -> TEN1_R[src]

Bit 2 - DAC channel1 trigger enable

pub fn boff1(&self) -> BOFF1_R[src]

Bit 1 - DAC channel1 output buffer disable

pub fn en1(&self) -> EN1_R[src]

Bit 0 - DAC channel1 enable

impl R<u32, Reg<u32, _DHR12R1>>[src]

pub fn dacc1dhr(&self) -> DACC1DHR_R[src]

Bits 0:11 - DAC channel1 12-bit right-aligned data

impl R<u32, Reg<u32, _DHR12L1>>[src]

pub fn dacc1dhr(&self) -> DACC1DHR_R[src]

Bits 4:15 - DAC channel1 12-bit left-aligned data

impl R<u32, Reg<u32, _DHR8R1>>[src]

pub fn dacc1dhr(&self) -> DACC1DHR_R[src]

Bits 0:7 - DAC channel1 8-bit right-aligned data

impl R<u32, Reg<u32, _DOR1>>[src]

pub fn dacc1dor(&self) -> DACC1DOR_R[src]

Bits 0:11 - DAC channel1 data output

impl R<u32, Reg<u32, _SR>>[src]

pub fn dmaudr1(&self) -> DMAUDR1_R[src]

Bit 13 - DAC channel1 DMA underrun flag

impl R<bool, ARPE_A>[src]

pub fn variant(&self) -> ARPE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, OPM_A>[src]

pub fn variant(&self) -> OPM_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, URS_A>[src]

pub fn variant(&self) -> URS_A[src]

Get enumerated values variant

pub fn is_any_event(&self) -> bool[src]

Checks if the value of the field is ANYEVENT

pub fn is_counter_only(&self) -> bool[src]

Checks if the value of the field is COUNTERONLY

impl R<bool, UDIS_A>[src]

pub fn variant(&self) -> UDIS_A[src]

Get enumerated values variant

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

impl R<bool, CEN_A>[src]

pub fn variant(&self) -> CEN_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u32, Reg<u32, _CR1>>[src]

pub fn arpe(&self) -> ARPE_R[src]

Bit 7 - Auto-reload preload enable

pub fn opm(&self) -> OPM_R[src]

Bit 3 - One-pulse mode

pub fn urs(&self) -> URS_R[src]

Bit 2 - Update request source

pub fn udis(&self) -> UDIS_R[src]

Bit 1 - Update disable

pub fn cen(&self) -> CEN_R[src]

Bit 0 - Counter enable

impl R<u8, MMS_A>[src]

pub fn variant(&self) -> Variant<u8, MMS_A>[src]

Get enumerated values variant

pub fn is_reset(&self) -> bool[src]

Checks if the value of the field is RESET

pub fn is_enable(&self) -> bool[src]

Checks if the value of the field is ENABLE

pub fn is_update(&self) -> bool[src]

Checks if the value of the field is UPDATE

impl R<u32, Reg<u32, _CR2>>[src]

pub fn mms(&self) -> MMS_R[src]

Bits 4:6 - Master mode selection

impl R<bool, UDE_A>[src]

pub fn variant(&self) -> UDE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, UIE_A>[src]

pub fn variant(&self) -> UIE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u32, Reg<u32, _DIER>>[src]

pub fn ude(&self) -> UDE_R[src]

Bit 8 - Update DMA request enable

pub fn uie(&self) -> UIE_R[src]

Bit 0 - Update interrupt enable

impl R<bool, UIF_A>[src]

pub fn variant(&self) -> UIF_A[src]

Get enumerated values variant

pub fn is_clear(&self) -> bool[src]

Checks if the value of the field is CLEAR

pub fn is_update_pending(&self) -> bool[src]

Checks if the value of the field is UPDATEPENDING

impl R<u32, Reg<u32, _SR>>[src]

pub fn uif(&self) -> UIF_R[src]

Bit 0 - Update interrupt flag

impl R<u32, Reg<u32, _CNT>>[src]

pub fn cnt(&self) -> CNT_R[src]

Bits 0:15 - Low counter value

impl R<u32, Reg<u32, _PSC>>[src]

pub fn psc(&self) -> PSC_R[src]

Bits 0:15 - Prescaler value

impl R<u32, Reg<u32, _ARR>>[src]

pub fn arr(&self) -> ARR_R[src]

Bits 0:15 - Low Auto-reload value

impl R<u8, CKD_A>[src]

pub fn variant(&self) -> Variant<u8, CKD_A>[src]

Get enumerated values variant

pub fn is_div1(&self) -> bool[src]

Checks if the value of the field is DIV1

pub fn is_div2(&self) -> bool[src]

Checks if the value of the field is DIV2

pub fn is_div4(&self) -> bool[src]

Checks if the value of the field is DIV4

impl R<bool, ARPE_A>[src]

pub fn variant(&self) -> ARPE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, URS_A>[src]

pub fn variant(&self) -> URS_A[src]

Get enumerated values variant

pub fn is_any_event(&self) -> bool[src]

Checks if the value of the field is ANYEVENT

pub fn is_counter_only(&self) -> bool[src]

Checks if the value of the field is COUNTERONLY

impl R<bool, UDIS_A>[src]

pub fn variant(&self) -> UDIS_A[src]

Get enumerated values variant

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

impl R<bool, CEN_A>[src]

pub fn variant(&self) -> CEN_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u32, Reg<u32, _CR1>>[src]

pub fn ckd(&self) -> CKD_R[src]

Bits 8:9 - Clock division

pub fn arpe(&self) -> ARPE_R[src]

Bit 7 - Auto-reload preload enable

pub fn urs(&self) -> URS_R[src]

Bit 2 - Update request source

pub fn udis(&self) -> UDIS_R[src]

Bit 1 - Update disable

pub fn cen(&self) -> CEN_R[src]

Bit 0 - Counter enable

impl R<bool, UIE_A>[src]

pub fn variant(&self) -> UIE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u32, Reg<u32, _DIER>>[src]

pub fn cc1ie(&self) -> CC1IE_R[src]

Bit 1 - Capture/Compare 1 interrupt enable

pub fn uie(&self) -> UIE_R[src]

Bit 0 - Update interrupt enable

impl R<bool, UIF_A>[src]

pub fn variant(&self) -> UIF_A[src]

Get enumerated values variant

pub fn is_clear(&self) -> bool[src]

Checks if the value of the field is CLEAR

pub fn is_update_pending(&self) -> bool[src]

Checks if the value of the field is UPDATEPENDING

impl R<u32, Reg<u32, _SR>>[src]

pub fn cc1of(&self) -> CC1OF_R[src]

Bit 9 - Capture/Compare 1 overcapture flag

pub fn cc1if(&self) -> CC1IF_R[src]

Bit 1 - Capture/compare 1 interrupt flag

pub fn uif(&self) -> UIF_R[src]

Bit 0 - Update interrupt flag

impl R<u32, Reg<u32, _CCMR1_OUTPUT>>[src]

pub fn cc1s(&self) -> CC1S_R[src]

Bits 0:1 - Capture/Compare 1 selection

pub fn oc1fe(&self) -> OC1FE_R[src]

Bit 2 - Output compare 1 fast enable

pub fn oc1pe(&self) -> OC1PE_R[src]

Bit 3 - Output Compare 1 preload enable

pub fn oc1m(&self) -> OC1M_R[src]

Bits 4:6 - Output Compare 1 mode

impl R<u32, Reg<u32, _CCMR1_INPUT>>[src]

pub fn ic1f(&self) -> IC1F_R[src]

Bits 4:7 - Input capture 1 filter

pub fn ic1psc(&self) -> IC1PSC_R[src]

Bits 2:3 - Input capture 1 prescaler

pub fn cc1s(&self) -> CC1S_R[src]

Bits 0:1 - Capture/Compare 1 selection

impl R<u32, Reg<u32, _CCER>>[src]

pub fn cc1np(&self) -> CC1NP_R[src]

Bit 3 - Capture/Compare 1 output Polarity

pub fn cc1p(&self) -> CC1P_R[src]

Bit 1 - Capture/Compare 1 output Polarity

pub fn cc1e(&self) -> CC1E_R[src]

Bit 0 - Capture/Compare 1 output enable

impl R<u32, Reg<u32, _CNT>>[src]

pub fn cnt(&self) -> CNT_R[src]

Bits 0:15 - counter value

impl R<u32, Reg<u32, _PSC>>[src]

pub fn psc(&self) -> PSC_R[src]

Bits 0:15 - Prescaler value

impl R<u32, Reg<u32, _ARR>>[src]

pub fn arr(&self) -> ARR_R[src]

Bits 0:15 - Auto-reload value

impl R<u32, Reg<u32, _CCR>>[src]

pub fn ccr(&self) -> CCR_R[src]

Bits 0:15 - Capture/Compare 1 value

impl R<u8, CKD_A>[src]

pub fn variant(&self) -> Variant<u8, CKD_A>[src]

Get enumerated values variant

pub fn is_div1(&self) -> bool[src]

Checks if the value of the field is DIV1

pub fn is_div2(&self) -> bool[src]

Checks if the value of the field is DIV2

pub fn is_div4(&self) -> bool[src]

Checks if the value of the field is DIV4

impl R<bool, ARPE_A>[src]

pub fn variant(&self) -> ARPE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, OPM_A>[src]

pub fn variant(&self) -> OPM_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, URS_A>[src]

pub fn variant(&self) -> URS_A[src]

Get enumerated values variant

pub fn is_any_event(&self) -> bool[src]

Checks if the value of the field is ANYEVENT

pub fn is_counter_only(&self) -> bool[src]

Checks if the value of the field is COUNTERONLY

impl R<bool, UDIS_A>[src]

pub fn variant(&self) -> UDIS_A[src]

Get enumerated values variant

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

impl R<bool, CEN_A>[src]

pub fn variant(&self) -> CEN_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u32, Reg<u32, _CR1>>[src]

pub fn ckd(&self) -> CKD_R[src]

Bits 8:9 - Clock division

pub fn arpe(&self) -> ARPE_R[src]

Bit 7 - Auto-reload preload enable

pub fn opm(&self) -> OPM_R[src]

Bit 3 - One-pulse mode

pub fn urs(&self) -> URS_R[src]

Bit 2 - Update request source

pub fn udis(&self) -> UDIS_R[src]

Bit 1 - Update disable

pub fn cen(&self) -> CEN_R[src]

Bit 0 - Counter enable

impl R<u32, Reg<u32, _SMCR>>[src]

pub fn msm(&self) -> MSM_R[src]

Bit 7 - Master/Slave mode

pub fn ts(&self) -> TS_R[src]

Bits 4:6 - Trigger selection

pub fn sms(&self) -> SMS_R[src]

Bits 0:2 - Slave mode selection

impl R<bool, UIE_A>[src]

pub fn variant(&self) -> UIE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u32, Reg<u32, _DIER>>[src]

pub fn tie(&self) -> TIE_R[src]

Bit 6 - Trigger interrupt enable

pub fn cc2ie(&self) -> CC2IE_R[src]

Bit 2 - Capture/Compare 2 interrupt enable

pub fn cc1ie(&self) -> CC1IE_R[src]

Bit 1 - Capture/Compare 1 interrupt enable

pub fn uie(&self) -> UIE_R[src]

Bit 0 - Update interrupt enable

impl R<bool, UIF_A>[src]

pub fn variant(&self) -> UIF_A[src]

Get enumerated values variant

pub fn is_clear(&self) -> bool[src]

Checks if the value of the field is CLEAR

pub fn is_update_pending(&self) -> bool[src]

Checks if the value of the field is UPDATEPENDING

impl R<u32, Reg<u32, _SR>>[src]

pub fn cc2of(&self) -> CC2OF_R[src]

Bit 10 - Capture/compare 2 overcapture flag

pub fn cc1of(&self) -> CC1OF_R[src]

Bit 9 - Capture/Compare 1 overcapture flag

pub fn tif(&self) -> TIF_R[src]

Bit 6 - Trigger interrupt flag

pub fn cc2if(&self) -> CC2IF_R[src]

Bit 2 - Capture/Compare 2 interrupt flag

pub fn cc1if(&self) -> CC1IF_R[src]

Bit 1 - Capture/compare 1 interrupt flag

pub fn uif(&self) -> UIF_R[src]

Bit 0 - Update interrupt flag

impl R<u32, Reg<u32, _CCMR1_OUTPUT>>[src]

pub fn oc2m(&self) -> OC2M_R[src]

Bits 12:14 - Output Compare 2 mode

pub fn oc2pe(&self) -> OC2PE_R[src]

Bit 11 - Output Compare 2 preload enable

pub fn oc2fe(&self) -> OC2FE_R[src]

Bit 10 - Output Compare 2 fast enable

pub fn cc2s(&self) -> CC2S_R[src]

Bits 8:9 - Capture/Compare 2 selection

pub fn oc1m(&self) -> OC1M_R[src]

Bits 4:6 - Output Compare 1 mode

pub fn oc1pe(&self) -> OC1PE_R[src]

Bit 3 - Output Compare 1 preload enable

pub fn oc1fe(&self) -> OC1FE_R[src]

Bit 2 - Output Compare 1 fast enable

pub fn cc1s(&self) -> CC1S_R[src]

Bits 0:1 - Capture/Compare 1 selection

impl R<u32, Reg<u32, _CCMR1_INPUT>>[src]

pub fn ic2f(&self) -> IC2F_R[src]

Bits 12:15 - Input capture 2 filter

pub fn ic2psc(&self) -> IC2PSC_R[src]

Bits 10:11 - Input capture 2 prescaler

pub fn cc2s(&self) -> CC2S_R[src]

Bits 8:9 - Capture/Compare 2 selection

pub fn ic1f(&self) -> IC1F_R[src]

Bits 4:6 - Input capture 1 filter

pub fn ic1psc(&self) -> IC1PSC_R[src]

Bits 2:3 - Input capture 1 prescaler

pub fn cc1s(&self) -> CC1S_R[src]

Bits 0:1 - Capture/Compare 1 selection

impl R<u32, Reg<u32, _CCER>>[src]

pub fn cc2np(&self) -> CC2NP_R[src]

Bit 7 - Capture/Compare 2 output Polarity

pub fn cc2p(&self) -> CC2P_R[src]

Bit 5 - Capture/Compare 2 output Polarity

pub fn cc2e(&self) -> CC2E_R[src]

Bit 4 - Capture/Compare 2 output enable

pub fn cc1np(&self) -> CC1NP_R[src]

Bit 3 - Capture/Compare 1 output Polarity

pub fn cc1p(&self) -> CC1P_R[src]

Bit 1 - Capture/Compare 1 output Polarity

pub fn cc1e(&self) -> CC1E_R[src]

Bit 0 - Capture/Compare 1 output enable

impl R<u32, Reg<u32, _CNT>>[src]

pub fn cnt(&self) -> CNT_R[src]

Bits 0:15 - counter value

impl R<u32, Reg<u32, _PSC>>[src]

pub fn psc(&self) -> PSC_R[src]

Bits 0:15 - Prescaler value

impl R<u32, Reg<u32, _ARR>>[src]

pub fn arr(&self) -> ARR_R[src]

Bits 0:15 - Auto-reload value

impl R<u32, Reg<u32, _CCR>>[src]

pub fn ccr(&self) -> CCR_R[src]

Bits 0:15 - Capture/Compare 1 value

impl R<u32, Reg<u32, _CR>>[src]

pub fn dmaudrie2(&self) -> DMAUDRIE2_R[src]

Bit 29 - DAC channel2 DMA underrun interrupt enable

pub fn dmaen2(&self) -> DMAEN2_R[src]

Bit 28 - DAC channel2 DMA enable

pub fn mamp2(&self) -> MAMP2_R[src]

Bits 24:27 - DAC channel2 mask/amplitude selector

pub fn wave2(&self) -> WAVE2_R[src]

Bits 22:23 - DAC channel2 noise/triangle wave generation enable

pub fn tsel2(&self) -> TSEL2_R[src]

Bits 19:21 - DAC channel2 trigger selection

pub fn ten2(&self) -> TEN2_R[src]

Bit 18 - DAC channel2 trigger enable

pub fn boff2(&self) -> BOFF2_R[src]

Bit 17 - DAC channel2 output buffer disable

pub fn en2(&self) -> EN2_R[src]

Bit 16 - DAC channel2 enable

pub fn dmaudrie1(&self) -> DMAUDRIE1_R[src]

Bit 13 - DAC channel1 DMA Underrun Interrupt enable

pub fn dmaen1(&self) -> DMAEN1_R[src]

Bit 12 - DAC channel1 DMA enable

pub fn mamp1(&self) -> MAMP1_R[src]

Bits 8:11 - DAC channel1 mask/amplitude selector

pub fn wave1(&self) -> WAVE1_R[src]

Bits 6:7 - DAC channel1 noise/triangle wave generation enable

pub fn tsel1(&self) -> TSEL1_R[src]

Bits 3:5 - DAC channel1 trigger selection

pub fn ten1(&self) -> TEN1_R[src]

Bit 2 - DAC channel1 trigger enable

pub fn boff1(&self) -> BOFF1_R[src]

Bit 1 - DAC channel1 output buffer disable

pub fn en1(&self) -> EN1_R[src]

Bit 0 - DAC channel1 enable

impl R<u32, Reg<u32, _DHR12R1>>[src]

pub fn dacc1dhr(&self) -> DACC1DHR_R[src]

Bits 0:11 - DAC channel1 12-bit right-aligned data

impl R<u32, Reg<u32, _DHR12L1>>[src]

pub fn dacc1dhr(&self) -> DACC1DHR_R[src]

Bits 4:15 - DAC channel1 12-bit left-aligned data

impl R<u32, Reg<u32, _DHR8R1>>[src]

pub fn dacc1dhr(&self) -> DACC1DHR_R[src]

Bits 0:7 - DAC channel1 8-bit right-aligned data

impl R<u32, Reg<u32, _DHR12R2>>[src]

pub fn dacc2dhr(&self) -> DACC2DHR_R[src]

Bits 0:11 - DAC channel2 12-bit right-aligned data

impl R<u32, Reg<u32, _DHR12L2>>[src]

pub fn dacc2dhr(&self) -> DACC2DHR_R[src]

Bits 4:15 - DAC channel2 12-bit left-aligned data

impl R<u32, Reg<u32, _DHR8R2>>[src]

pub fn dacc2dhr(&self) -> DACC2DHR_R[src]

Bits 0:7 - DAC channel2 8-bit right-aligned data

impl R<u32, Reg<u32, _DHR12RD>>[src]

pub fn dacc2dhr(&self) -> DACC2DHR_R[src]

Bits 16:27 - DAC channel2 12-bit right-aligned data

pub fn dacc1dhr(&self) -> DACC1DHR_R[src]

Bits 0:11 - DAC channel1 12-bit right-aligned data

impl R<u32, Reg<u32, _DHR12LD>>[src]

pub fn dacc2dhr(&self) -> DACC2DHR_R[src]

Bits 20:31 - DAC channel2 12-bit left-aligned data

pub fn dacc1dhr(&self) -> DACC1DHR_R[src]

Bits 4:15 - DAC channel1 12-bit left-aligned data

impl R<u32, Reg<u32, _DHR8RD>>[src]

pub fn dacc2dhr(&self) -> DACC2DHR_R[src]

Bits 8:15 - DAC channel2 8-bit right-aligned data

pub fn dacc1dhr(&self) -> DACC1DHR_R[src]

Bits 0:7 - DAC channel1 8-bit right-aligned data

impl R<u32, Reg<u32, _DOR1>>[src]

pub fn dacc1dor(&self) -> DACC1DOR_R[src]

Bits 0:11 - DAC channel1 data output

impl R<u32, Reg<u32, _DOR2>>[src]

pub fn dacc2dor(&self) -> DACC2DOR_R[src]

Bits 0:11 - DAC channel2 data output

impl R<u32, Reg<u32, _SR>>[src]

pub fn dmaudr2(&self) -> DMAUDR2_R[src]

Bit 29 - DAC channel2 DMA underrun flag

pub fn dmaudr1(&self) -> DMAUDR1_R[src]

Bit 13 - DAC channel1 DMA underrun flag

impl R<u32, Reg<u32, _FPCCR>>[src]

pub fn lspact(&self) -> LSPACT_R[src]

Bit 0 - LSPACT

pub fn user(&self) -> USER_R[src]

Bit 1 - USER

pub fn thread(&self) -> THREAD_R[src]

Bit 3 - THREAD

pub fn hfrdy(&self) -> HFRDY_R[src]

Bit 4 - HFRDY

pub fn mmrdy(&self) -> MMRDY_R[src]

Bit 5 - MMRDY

pub fn bfrdy(&self) -> BFRDY_R[src]

Bit 6 - BFRDY

pub fn monrdy(&self) -> MONRDY_R[src]

Bit 8 - MONRDY

pub fn lspen(&self) -> LSPEN_R[src]

Bit 30 - LSPEN

pub fn aspen(&self) -> ASPEN_R[src]

Bit 31 - ASPEN

impl R<u32, Reg<u32, _FPCAR>>[src]

pub fn address(&self) -> ADDRESS_R[src]

Bits 3:31 - Location of unpopulated floating-point

impl R<u32, Reg<u32, _FPSCR>>[src]

pub fn ioc(&self) -> IOC_R[src]

Bit 0 - Invalid operation cumulative exception bit

pub fn dzc(&self) -> DZC_R[src]

Bit 1 - Division by zero cumulative exception bit.

pub fn ofc(&self) -> OFC_R[src]

Bit 2 - Overflow cumulative exception bit

pub fn ufc(&self) -> UFC_R[src]

Bit 3 - Underflow cumulative exception bit

pub fn ixc(&self) -> IXC_R[src]

Bit 4 - Inexact cumulative exception bit

pub fn idc(&self) -> IDC_R[src]

Bit 7 - Input denormal cumulative exception bit.

pub fn rmode(&self) -> RMODE_R[src]

Bits 22:23 - Rounding Mode control field

pub fn fz(&self) -> FZ_R[src]

Bit 24 - Flush-to-zero mode control bit:

pub fn dn(&self) -> DN_R[src]

Bit 25 - Default NaN mode control bit

pub fn ahp(&self) -> AHP_R[src]

Bit 26 - Alternative half-precision control bit

pub fn v(&self) -> V_R[src]

Bit 28 - Overflow condition code flag

pub fn c(&self) -> C_R[src]

Bit 29 - Carry condition code flag

pub fn z(&self) -> Z_R[src]

Bit 30 - Zero condition code flag

pub fn n(&self) -> N_R[src]

Bit 31 - Negative condition code flag

impl R<u32, Reg<u32, _IDCODE>>[src]

pub fn dev_id(&self) -> DEV_ID_R[src]

Bits 0:11 - Device Identifier

pub fn rev_id(&self) -> REV_ID_R[src]

Bits 16:31 - Revision Identifier

impl R<u32, Reg<u32, _CR>>[src]

pub fn dbg_sleep(&self) -> DBG_SLEEP_R[src]

Bit 0 - Debug Sleep mode

pub fn dbg_stop(&self) -> DBG_STOP_R[src]

Bit 1 - Debug Stop Mode

pub fn dbg_standby(&self) -> DBG_STANDBY_R[src]

Bit 2 - Debug Standby Mode

pub fn trace_ioen(&self) -> TRACE_IOEN_R[src]

Bit 5 - Trace pin assignment control

pub fn trace_mode(&self) -> TRACE_MODE_R[src]

Bits 6:7 - Trace pin assignment control

impl R<u32, Reg<u32, _APB1_FZ>>[src]

pub fn dbg_tim2_stop(&self) -> DBG_TIM2_STOP_R[src]

Bit 0 - Debug Timer 2 stopped when Core is halted

pub fn dbg_tim3_stop(&self) -> DBG_TIM3_STOP_R[src]

Bit 1 - Debug Timer 3 stopped when Core is halted

pub fn dbg_tim4_stop(&self) -> DBG_TIM4_STOP_R[src]

Bit 2 - Debug Timer 4 stopped when Core is halted

pub fn dbg_tim5_stop(&self) -> DBG_TIM5_STOP_R[src]

Bit 3 - Debug Timer 5 stopped when Core is halted

pub fn dbg_tim6_stop(&self) -> DBG_TIM6_STOP_R[src]

Bit 4 - Debug Timer 6 stopped when Core is halted

pub fn dbg_tim7_stop(&self) -> DBG_TIM7_STOP_R[src]

Bit 5 - Debug Timer 7 stopped when Core is halted

pub fn dbg_tim12_stop(&self) -> DBG_TIM12_STOP_R[src]

Bit 6 - Debug Timer 12 stopped when Core is halted

pub fn dbg_tim13_stop(&self) -> DBG_TIM13_STOP_R[src]

Bit 7 - Debug Timer 13 stopped when Core is halted

pub fn dbg_timer14_stop(&self) -> DBG_TIMER14_STOP_R[src]

Bit 8 - Debug Timer 14 stopped when Core is halted

pub fn dbg_tim18_stop(&self) -> DBG_TIM18_STOP_R[src]

Bit 9 - Debug Timer 18 stopped when Core is halted

pub fn dbg_rtc_stop(&self) -> DBG_RTC_STOP_R[src]

Bit 10 - Debug RTC stopped when Core is halted

pub fn dbg_wwdg_stop(&self) -> DBG_WWDG_STOP_R[src]

Bit 11 - Debug Window Wachdog stopped when Core is halted

pub fn dbg_iwdg_stop(&self) -> DBG_IWDG_STOP_R[src]

Bit 12 - Debug Independent Wachdog stopped when Core is halted

pub fn i2c1_smbus_timeout(&self) -> I2C1_SMBUS_TIMEOUT_R[src]

Bit 21 - SMBUS timeout mode stopped when Core is halted

pub fn i2c2_smbus_timeout(&self) -> I2C2_SMBUS_TIMEOUT_R[src]

Bit 22 - SMBUS timeout mode stopped when Core is halted

pub fn dbg_can_stop(&self) -> DBG_CAN_STOP_R[src]

Bit 25 - Debug CAN stopped when core is halted

impl R<u32, Reg<u32, _APB2FZ>>[src]

pub fn dbg_tim15_stop(&self) -> DBG_TIM15_STOP_R[src]

Bit 2 - Debug Timer 15 stopped when Core is halted

pub fn dbg_tim16_stop(&self) -> DBG_TIM16_STOP_R[src]

Bit 3 - Debug Timer 16 stopped when Core is halted

pub fn dbg_tim17_sto(&self) -> DBG_TIM17_STO_R[src]

Bit 4 - Debug Timer 17 stopped when Core is halted

pub fn dbg_tim19_stop(&self) -> DBG_TIM19_STOP_R[src]

Bit 5 - Debug Timer 19 stopped when Core is halted

impl R<u32, Reg<u32, _CFGR1>>[src]

pub fn mem_mode(&self) -> MEM_MODE_R[src]

Bits 0:1 - Memory mapping selection bits

pub fn tim16_dma_rmp(&self) -> TIM16_DMA_RMP_R[src]

Bit 11 - TIM16 DMA request remapping bit

pub fn tim17_dma_rmp(&self) -> TIM17_DMA_RMP_R[src]

Bit 12 - TIM17 DMA request remapping bit

pub fn tim6_dac1_dma_rmp(&self) -> TIM6_DAC1_DMA_RMP_R[src]

Bit 13 - TIM6 and DAC1 DMA request remapping bit

pub fn tim7_dac2_dma_rmp(&self) -> TIM7_DAC2_DMA_RMP_R[src]

Bit 14 - TIM7 and DAC2 DMA request remapping bit

pub fn i2c_pb6_fmp(&self) -> I2C_PB6_FMP_R[src]

Bit 16 - Fast Mode Plus (FM+) driving capability activation bits.

pub fn i2c_pb7_fmp(&self) -> I2C_PB7_FMP_R[src]

Bit 17 - Fast Mode Plus (FM+) driving capability activation bits.

pub fn i2c_pb8_fmp(&self) -> I2C_PB8_FMP_R[src]

Bit 18 - Fast Mode Plus (FM+) driving capability activation bits.

pub fn i2c_pb9_fmp(&self) -> I2C_PB9_FMP_R[src]

Bit 19 - Fast Mode Plus (FM+) driving capability activation bits.

pub fn i2c1_fmp(&self) -> I2C1_FMP_R[src]

Bit 20 - I2C1 Fast Mode Plus

pub fn i2c2_fmp(&self) -> I2C2_FMP_R[src]

Bit 21 - I2C2 Fast Mode Plus

pub fn fpu_ie(&self) -> FPU_IE_R[src]

Bits 26:31 - Interrupt enable bits from FPU

pub fn vbat_mon(&self) -> VBAT_MON_R[src]

Bit 24 - VBAT monitoring enable

impl R<u32, Reg<u32, _EXTICR1>>[src]

pub fn exti3(&self) -> EXTI3_R[src]

Bits 12:15 - EXTI 3 configuration bits

pub fn exti2(&self) -> EXTI2_R[src]

Bits 8:11 - EXTI 2 configuration bits

pub fn exti1(&self) -> EXTI1_R[src]

Bits 4:7 - EXTI 1 configuration bits

pub fn exti0(&self) -> EXTI0_R[src]

Bits 0:3 - EXTI 0 configuration bits

impl R<u32, Reg<u32, _EXTICR2>>[src]

pub fn exti7(&self) -> EXTI7_R[src]

Bits 12:15 - EXTI 7 configuration bits

pub fn exti6(&self) -> EXTI6_R[src]

Bits 8:11 - EXTI 6 configuration bits

pub fn exti5(&self) -> EXTI5_R[src]

Bits 4:7 - EXTI 5 configuration bits

pub fn exti4(&self) -> EXTI4_R[src]

Bits 0:3 - EXTI 4 configuration bits

impl R<u32, Reg<u32, _EXTICR3>>[src]

pub fn exti11(&self) -> EXTI11_R[src]

Bits 12:15 - EXTI 11 configuration bits

pub fn exti10(&self) -> EXTI10_R[src]

Bits 8:11 - EXTI 10 configuration bits

pub fn exti9(&self) -> EXTI9_R[src]

Bits 4:7 - EXTI 9 configuration bits

pub fn exti8(&self) -> EXTI8_R[src]

Bits 0:3 - EXTI 8 configuration bits

impl R<u32, Reg<u32, _EXTICR4>>[src]

pub fn exti15(&self) -> EXTI15_R[src]

Bits 12:15 - EXTI 15 configuration bits

pub fn exti14(&self) -> EXTI14_R[src]

Bits 8:11 - EXTI 14 configuration bits

pub fn exti13(&self) -> EXTI13_R[src]

Bits 4:7 - EXTI 13 configuration bits

pub fn exti12(&self) -> EXTI12_R[src]

Bits 0:3 - EXTI 12 configuration bits

impl R<u32, Reg<u32, _CFGR2>>[src]

pub fn lockup_lock(&self) -> LOCKUP_LOCK_R[src]

Bit 0 - Cortex-M0 LOCKUP bit enable bit

pub fn sram_parity_lock(&self) -> SRAM_PARITY_LOCK_R[src]

Bit 1 - SRAM parity lock bit

pub fn pvd_lock(&self) -> PVD_LOCK_R[src]

Bit 2 - PVD lock enable bit

pub fn sram_pef(&self) -> SRAM_PEF_R[src]

Bit 8 - SRAM parity flag

impl R<u32, Reg<u32, _CTRL>>[src]

pub fn enable(&self) -> ENABLE_R[src]

Bit 0 - Counter enable

pub fn tickint(&self) -> TICKINT_R[src]

Bit 1 - SysTick exception request enable

pub fn clksource(&self) -> CLKSOURCE_R[src]

Bit 2 - Clock source selection

pub fn countflag(&self) -> COUNTFLAG_R[src]

Bit 16 - COUNTFLAG

impl R<u32, Reg<u32, _LOAD>>[src]

pub fn reload(&self) -> RELOAD_R[src]

Bits 0:23 - RELOAD value

impl R<u32, Reg<u32, _VAL>>[src]

pub fn current(&self) -> CURRENT_R[src]

Bits 0:23 - Current counter value

impl R<u32, Reg<u32, _CALIB>>[src]

pub fn tenms(&self) -> TENMS_R[src]

Bits 0:23 - Calibration value

pub fn skew(&self) -> SKEW_R[src]

Bit 30 - SKEW flag: Indicates whether the TENMS value is exact

pub fn noref(&self) -> NOREF_R[src]

Bit 31 - NOREF flag. Reads as zero

impl R<u32, Reg<u32, _STIR>>[src]

pub fn intid(&self) -> INTID_R[src]

Bits 0:8 - Software generated interrupt ID

impl R<u32, Reg<u32, _CPACR>>[src]

pub fn cp(&self) -> CP_R[src]

Bits 20:23 - CP

impl R<u32, Reg<u32, _ACTRL>>[src]

pub fn dismcycint(&self) -> DISMCYCINT_R[src]

Bit 0 - DISMCYCINT

pub fn disdefwbuf(&self) -> DISDEFWBUF_R[src]

Bit 1 - DISDEFWBUF

pub fn disfold(&self) -> DISFOLD_R[src]

Bit 2 - DISFOLD

pub fn disfpca(&self) -> DISFPCA_R[src]

Bit 8 - DISFPCA

pub fn disoofp(&self) -> DISOOFP_R[src]

Bit 9 - DISOOFP

impl R<u32, Reg<u32, _CSR>>[src]

pub fn comp1en(&self) -> COMP1EN_R[src]

Bit 0 - Comparator 1 enable

pub fn comp1mode(&self) -> COMP1MODE_R[src]

Bits 2:3 - Comparator 1 mode

pub fn comp1insel(&self) -> COMP1INSEL_R[src]

Bits 4:6 - Comparator 1 inverting input selection

pub fn comp1outsel(&self) -> COMP1OUTSEL_R[src]

Bits 8:10 - Comparator 1 output selection

pub fn comp1pol(&self) -> COMP1POL_R[src]

Bit 11 - Comparator 1 output polarity

pub fn comp1hyst(&self) -> COMP1HYST_R[src]

Bits 12:13 - Comparator 1 hysteresis

pub fn comp1out(&self) -> COMP1OUT_R[src]

Bit 14 - Comparator 1 output

pub fn comp1lock(&self) -> COMP1LOCK_R[src]

Bit 15 - Comparator 1 lock

pub fn comp2en(&self) -> COMP2EN_R[src]

Bit 16 - Comparator 2 enable

pub fn comp2mode(&self) -> COMP2MODE_R[src]

Bits 18:19 - Comparator 2 mode

pub fn comp2insel(&self) -> COMP2INSEL_R[src]

Bits 20:22 - Comparator 2 inverting input selection

pub fn wndwen(&self) -> WNDWEN_R[src]

Bit 23 - Window mode enable

pub fn comp2outsel(&self) -> COMP2OUTSEL_R[src]

Bits 24:26 - Comparator 2 output selection

pub fn comp2pol(&self) -> COMP2POL_R[src]

Bit 27 - Comparator 2 output polarity

pub fn comp2hyst(&self) -> COMP2HYST_R[src]

Bits 28:29 - Comparator 2 hysteresis

pub fn comp2out(&self) -> COMP2OUT_R[src]

Bit 30 - Comparator 2 output

pub fn comp2lock(&self) -> COMP2LOCK_R[src]

Bit 31 - Comparator 2 lock

pub fn comp1_inp_dac(&self) -> COMP1_INP_DAC_R[src]

Bit 1 - Comparator 1 non inverting input connection to DAC output

impl R<u8, MODER15_A>[src]

pub fn variant(&self) -> MODER15_A[src]

Get enumerated values variant

pub fn is_input(&self) -> bool[src]

Checks if the value of the field is INPUT

pub fn is_output(&self) -> bool[src]

Checks if the value of the field is OUTPUT

pub fn is_alternate(&self) -> bool[src]

Checks if the value of the field is ALTERNATE

pub fn is_analog(&self) -> bool[src]

Checks if the value of the field is ANALOG

impl R<u32, Reg<u32, _MODER>>[src]

pub fn moder15(&self) -> MODER15_R[src]

Bits 30:31 - Port x configuration bits (y = 0..15)

pub fn moder14(&self) -> MODER14_R[src]

Bits 28:29 - Port x configuration bits (y = 0..15)

pub fn moder13(&self) -> MODER13_R[src]

Bits 26:27 - Port x configuration bits (y = 0..15)

pub fn moder12(&self) -> MODER12_R[src]

Bits 24:25 - Port x configuration bits (y = 0..15)

pub fn moder11(&self) -> MODER11_R[src]

Bits 22:23 - Port x configuration bits (y = 0..15)

pub fn moder10(&self) -> MODER10_R[src]

Bits 20:21 - Port x configuration bits (y = 0..15)

pub fn moder9(&self) -> MODER9_R[src]

Bits 18:19 - Port x configuration bits (y = 0..15)

pub fn moder8(&self) -> MODER8_R[src]

Bits 16:17 - Port x configuration bits (y = 0..15)

pub fn moder7(&self) -> MODER7_R[src]

Bits 14:15 - Port x configuration bits (y = 0..15)

pub fn moder6(&self) -> MODER6_R[src]

Bits 12:13 - Port x configuration bits (y = 0..15)

pub fn moder5(&self) -> MODER5_R[src]

Bits 10:11 - Port x configuration bits (y = 0..15)

pub fn moder4(&self) -> MODER4_R[src]

Bits 8:9 - Port x configuration bits (y = 0..15)

pub fn moder3(&self) -> MODER3_R[src]

Bits 6:7 - Port x configuration bits (y = 0..15)

pub fn moder2(&self) -> MODER2_R[src]

Bits 4:5 - Port x configuration bits (y = 0..15)

pub fn moder1(&self) -> MODER1_R[src]

Bits 2:3 - Port x configuration bits (y = 0..15)

pub fn moder0(&self) -> MODER0_R[src]

Bits 0:1 - Port x configuration bits (y = 0..15)

impl R<bool, OT15_A>[src]

pub fn variant(&self) -> OT15_A[src]

Get enumerated values variant

pub fn is_push_pull(&self) -> bool[src]

Checks if the value of the field is PUSHPULL

pub fn is_open_drain(&self) -> bool[src]

Checks if the value of the field is OPENDRAIN

impl R<u32, Reg<u32, _OTYPER>>[src]

pub fn ot15(&self) -> OT15_R[src]

Bit 15 - Port x configuration bits (y = 0..15)

pub fn ot14(&self) -> OT14_R[src]

Bit 14 - Port x configuration bits (y = 0..15)

pub fn ot13(&self) -> OT13_R[src]

Bit 13 - Port x configuration bits (y = 0..15)

pub fn ot12(&self) -> OT12_R[src]

Bit 12 - Port x configuration bits (y = 0..15)

pub fn ot11(&self) -> OT11_R[src]

Bit 11 - Port x configuration bits (y = 0..15)

pub fn ot10(&self) -> OT10_R[src]

Bit 10 - Port x configuration bits (y = 0..15)

pub fn ot9(&self) -> OT9_R[src]

Bit 9 - Port x configuration bits (y = 0..15)

pub fn ot8(&self) -> OT8_R[src]

Bit 8 - Port x configuration bits (y = 0..15)

pub fn ot7(&self) -> OT7_R[src]

Bit 7 - Port x configuration bits (y = 0..15)

pub fn ot6(&self) -> OT6_R[src]

Bit 6 - Port x configuration bits (y = 0..15)

pub fn ot5(&self) -> OT5_R[src]

Bit 5 - Port x configuration bits (y = 0..15)

pub fn ot4(&self) -> OT4_R[src]

Bit 4 - Port x configuration bits (y = 0..15)

pub fn ot3(&self) -> OT3_R[src]

Bit 3 - Port x configuration bits (y = 0..15)

pub fn ot2(&self) -> OT2_R[src]

Bit 2 - Port x configuration bits (y = 0..15)

pub fn ot1(&self) -> OT1_R[src]

Bit 1 - Port x configuration bits (y = 0..15)

pub fn ot0(&self) -> OT0_R[src]

Bit 0 - Port x configuration bits (y = 0..15)

impl R<u8, OSPEEDR15_A>[src]

pub fn variant(&self) -> OSPEEDR15_A[src]

Get enumerated values variant

pub fn is_low_speed(&self) -> bool[src]

Checks if the value of the field is LOWSPEED

pub fn is_medium_speed(&self) -> bool[src]

Checks if the value of the field is MEDIUMSPEED

pub fn is_high_speed(&self) -> bool[src]

Checks if the value of the field is HIGHSPEED

pub fn is_very_high_speed(&self) -> bool[src]

Checks if the value of the field is VERYHIGHSPEED

impl R<u32, Reg<u32, _OSPEEDR>>[src]

pub fn ospeedr15(&self) -> OSPEEDR15_R[src]

Bits 30:31 - Port x configuration bits (y = 0..15)

pub fn ospeedr14(&self) -> OSPEEDR14_R[src]

Bits 28:29 - Port x configuration bits (y = 0..15)

pub fn ospeedr13(&self) -> OSPEEDR13_R[src]

Bits 26:27 - Port x configuration bits (y = 0..15)

pub fn ospeedr12(&self) -> OSPEEDR12_R[src]

Bits 24:25 - Port x configuration bits (y = 0..15)

pub fn ospeedr11(&self) -> OSPEEDR11_R[src]

Bits 22:23 - Port x configuration bits (y = 0..15)

pub fn ospeedr10(&self) -> OSPEEDR10_R[src]

Bits 20:21 - Port x configuration bits (y = 0..15)

pub fn ospeedr9(&self) -> OSPEEDR9_R[src]

Bits 18:19 - Port x configuration bits (y = 0..15)

pub fn ospeedr8(&self) -> OSPEEDR8_R[src]

Bits 16:17 - Port x configuration bits (y = 0..15)

pub fn ospeedr7(&self) -> OSPEEDR7_R[src]

Bits 14:15 - Port x configuration bits (y = 0..15)

pub fn ospeedr6(&self) -> OSPEEDR6_R[src]

Bits 12:13 - Port x configuration bits (y = 0..15)

pub fn ospeedr5(&self) -> OSPEEDR5_R[src]

Bits 10:11 - Port x configuration bits (y = 0..15)

pub fn ospeedr4(&self) -> OSPEEDR4_R[src]

Bits 8:9 - Port x configuration bits (y = 0..15)

pub fn ospeedr3(&self) -> OSPEEDR3_R[src]

Bits 6:7 - Port x configuration bits (y = 0..15)

pub fn ospeedr2(&self) -> OSPEEDR2_R[src]

Bits 4:5 - Port x configuration bits (y = 0..15)

pub fn ospeedr1(&self) -> OSPEEDR1_R[src]

Bits 2:3 - Port x configuration bits (y = 0..15)

pub fn ospeedr0(&self) -> OSPEEDR0_R[src]

Bits 0:1 - Port x configuration bits (y = 0..15)

impl R<u8, PUPDR15_A>[src]

pub fn variant(&self) -> Variant<u8, PUPDR15_A>[src]

Get enumerated values variant

pub fn is_floating(&self) -> bool[src]

Checks if the value of the field is FLOATING

pub fn is_pull_up(&self) -> bool[src]

Checks if the value of the field is PULLUP

pub fn is_pull_down(&self) -> bool[src]

Checks if the value of the field is PULLDOWN

impl R<u32, Reg<u32, _PUPDR>>[src]

pub fn pupdr15(&self) -> PUPDR15_R[src]

Bits 30:31 - Port x configuration bits (y = 0..15)

pub fn pupdr14(&self) -> PUPDR14_R[src]

Bits 28:29 - Port x configuration bits (y = 0..15)

pub fn pupdr13(&self) -> PUPDR13_R[src]

Bits 26:27 - Port x configuration bits (y = 0..15)

pub fn pupdr12(&self) -> PUPDR12_R[src]

Bits 24:25 - Port x configuration bits (y = 0..15)

pub fn pupdr11(&self) -> PUPDR11_R[src]

Bits 22:23 - Port x configuration bits (y = 0..15)

pub fn pupdr10(&self) -> PUPDR10_R[src]

Bits 20:21 - Port x configuration bits (y = 0..15)

pub fn pupdr9(&self) -> PUPDR9_R[src]

Bits 18:19 - Port x configuration bits (y = 0..15)

pub fn pupdr8(&self) -> PUPDR8_R[src]

Bits 16:17 - Port x configuration bits (y = 0..15)

pub fn pupdr7(&self) -> PUPDR7_R[src]

Bits 14:15 - Port x configuration bits (y = 0..15)

pub fn pupdr6(&self) -> PUPDR6_R[src]

Bits 12:13 - Port x configuration bits (y = 0..15)

pub fn pupdr5(&self) -> PUPDR5_R[src]

Bits 10:11 - Port x configuration bits (y = 0..15)

pub fn pupdr4(&self) -> PUPDR4_R[src]

Bits 8:9 - Port x configuration bits (y = 0..15)

pub fn pupdr3(&self) -> PUPDR3_R[src]

Bits 6:7 - Port x configuration bits (y = 0..15)

pub fn pupdr2(&self) -> PUPDR2_R[src]

Bits 4:5 - Port x configuration bits (y = 0..15)

pub fn pupdr1(&self) -> PUPDR1_R[src]

Bits 2:3 - Port x configuration bits (y = 0..15)

pub fn pupdr0(&self) -> PUPDR0_R[src]

Bits 0:1 - Port x configuration bits (y = 0..15)

impl R<bool, IDR15_A>[src]

pub fn variant(&self) -> IDR15_A[src]

Get enumerated values variant

pub fn is_high(&self) -> bool[src]

Checks if the value of the field is HIGH

pub fn is_low(&self) -> bool[src]

Checks if the value of the field is LOW

impl R<u32, Reg<u32, _IDR>>[src]

pub fn idr15(&self) -> IDR15_R[src]

Bit 15 - Port input data (y = 0..15)

pub fn idr14(&self) -> IDR14_R[src]

Bit 14 - Port input data (y = 0..15)

pub fn idr13(&self) -> IDR13_R[src]

Bit 13 - Port input data (y = 0..15)

pub fn idr12(&self) -> IDR12_R[src]

Bit 12 - Port input data (y = 0..15)

pub fn idr11(&self) -> IDR11_R[src]

Bit 11 - Port input data (y = 0..15)

pub fn idr10(&self) -> IDR10_R[src]

Bit 10 - Port input data (y = 0..15)

pub fn idr9(&self) -> IDR9_R[src]

Bit 9 - Port input data (y = 0..15)

pub fn idr8(&self) -> IDR8_R[src]

Bit 8 - Port input data (y = 0..15)

pub fn idr7(&self) -> IDR7_R[src]

Bit 7 - Port input data (y = 0..15)

pub fn idr6(&self) -> IDR6_R[src]

Bit 6 - Port input data (y = 0..15)

pub fn idr5(&self) -> IDR5_R[src]

Bit 5 - Port input data (y = 0..15)

pub fn idr4(&self) -> IDR4_R[src]

Bit 4 - Port input data (y = 0..15)

pub fn idr3(&self) -> IDR3_R[src]

Bit 3 - Port input data (y = 0..15)

pub fn idr2(&self) -> IDR2_R[src]

Bit 2 - Port input data (y = 0..15)

pub fn idr1(&self) -> IDR1_R[src]

Bit 1 - Port input data (y = 0..15)

pub fn idr0(&self) -> IDR0_R[src]

Bit 0 - Port input data (y = 0..15)

impl R<bool, ODR15_A>[src]

pub fn variant(&self) -> ODR15_A[src]

Get enumerated values variant

pub fn is_high(&self) -> bool[src]

Checks if the value of the field is HIGH

pub fn is_low(&self) -> bool[src]

Checks if the value of the field is LOW

impl R<u32, Reg<u32, _ODR>>[src]

pub fn odr15(&self) -> ODR15_R[src]

Bit 15 - Port output data (y = 0..15)

pub fn odr14(&self) -> ODR14_R[src]

Bit 14 - Port output data (y = 0..15)

pub fn odr13(&self) -> ODR13_R[src]

Bit 13 - Port output data (y = 0..15)

pub fn odr12(&self) -> ODR12_R[src]

Bit 12 - Port output data (y = 0..15)

pub fn odr11(&self) -> ODR11_R[src]

Bit 11 - Port output data (y = 0..15)

pub fn odr10(&self) -> ODR10_R[src]

Bit 10 - Port output data (y = 0..15)

pub fn odr9(&self) -> ODR9_R[src]

Bit 9 - Port output data (y = 0..15)

pub fn odr8(&self) -> ODR8_R[src]

Bit 8 - Port output data (y = 0..15)

pub fn odr7(&self) -> ODR7_R[src]

Bit 7 - Port output data (y = 0..15)

pub fn odr6(&self) -> ODR6_R[src]

Bit 6 - Port output data (y = 0..15)

pub fn odr5(&self) -> ODR5_R[src]

Bit 5 - Port output data (y = 0..15)

pub fn odr4(&self) -> ODR4_R[src]

Bit 4 - Port output data (y = 0..15)

pub fn odr3(&self) -> ODR3_R[src]

Bit 3 - Port output data (y = 0..15)

pub fn odr2(&self) -> ODR2_R[src]

Bit 2 - Port output data (y = 0..15)

pub fn odr1(&self) -> ODR1_R[src]

Bit 1 - Port output data (y = 0..15)

pub fn odr0(&self) -> ODR0_R[src]

Bit 0 - Port output data (y = 0..15)

impl R<bool, LCKK_A>[src]

pub fn variant(&self) -> LCKK_A[src]

Get enumerated values variant

pub fn is_not_active(&self) -> bool[src]

Checks if the value of the field is NOTACTIVE

pub fn is_active(&self) -> bool[src]

Checks if the value of the field is ACTIVE

impl R<bool, LCK15_A>[src]

pub fn variant(&self) -> LCK15_A[src]

Get enumerated values variant

pub fn is_unlocked(&self) -> bool[src]

Checks if the value of the field is UNLOCKED

pub fn is_locked(&self) -> bool[src]

Checks if the value of the field is LOCKED

impl R<bool, LCK9_A>[src]

pub fn variant(&self) -> LCK9_A[src]

Get enumerated values variant

pub fn is_unlocked(&self) -> bool[src]

Checks if the value of the field is UNLOCKED

pub fn is_locked(&self) -> bool[src]

Checks if the value of the field is LOCKED

impl R<u32, Reg<u32, _LCKR>>[src]

pub fn lckk(&self) -> LCKK_R[src]

Bit 16 - Lok Key

pub fn lck15(&self) -> LCK15_R[src]

Bit 15 - Port x lock bit y (y= 0..15)

pub fn lck14(&self) -> LCK14_R[src]

Bit 14 - Port x lock bit y (y= 0..15)

pub fn lck13(&self) -> LCK13_R[src]

Bit 13 - Port x lock bit y (y= 0..15)

pub fn lck12(&self) -> LCK12_R[src]

Bit 12 - Port x lock bit y (y= 0..15)

pub fn lck11(&self) -> LCK11_R[src]

Bit 11 - Port x lock bit y (y= 0..15)

pub fn lck10(&self) -> LCK10_R[src]

Bit 10 - Port x lock bit y (y= 0..15)

pub fn lck9(&self) -> LCK9_R[src]

Bit 9 - Port x lock bit y (y= 0..15)

pub fn lck8(&self) -> LCK8_R[src]

Bit 8 - Port x lock bit y (y= 0..15)

pub fn lck7(&self) -> LCK7_R[src]

Bit 7 - Port x lock bit y (y= 0..15)

pub fn lck6(&self) -> LCK6_R[src]

Bit 6 - Port x lock bit y (y= 0..15)

pub fn lck5(&self) -> LCK5_R[src]

Bit 5 - Port x lock bit y (y= 0..15)

pub fn lck4(&self) -> LCK4_R[src]

Bit 4 - Port x lock bit y (y= 0..15)

pub fn lck3(&self) -> LCK3_R[src]

Bit 3 - Port x lock bit y (y= 0..15)

pub fn lck2(&self) -> LCK2_R[src]

Bit 2 - Port x lock bit y (y= 0..15)

pub fn lck1(&self) -> LCK1_R[src]

Bit 1 - Port x lock bit y (y= 0..15)

pub fn lck0(&self) -> LCK0_R[src]

Bit 0 - Port x lock bit y (y= 0..15)

impl R<u8, AFRL7_A>[src]

pub fn variant(&self) -> AFRL7_A[src]

Get enumerated values variant

pub fn is_af0(&self) -> bool[src]

Checks if the value of the field is AF0

pub fn is_af1(&self) -> bool[src]

Checks if the value of the field is AF1

pub fn is_af2(&self) -> bool[src]

Checks if the value of the field is AF2

pub fn is_af3(&self) -> bool[src]

Checks if the value of the field is AF3

pub fn is_af4(&self) -> bool[src]

Checks if the value of the field is AF4

pub fn is_af5(&self) -> bool[src]

Checks if the value of the field is AF5

pub fn is_af6(&self) -> bool[src]

Checks if the value of the field is AF6

pub fn is_af7(&self) -> bool[src]

Checks if the value of the field is AF7

pub fn is_af8(&self) -> bool[src]

Checks if the value of the field is AF8

pub fn is_af9(&self) -> bool[src]

Checks if the value of the field is AF9

pub fn is_af10(&self) -> bool[src]

Checks if the value of the field is AF10

pub fn is_af11(&self) -> bool[src]

Checks if the value of the field is AF11

pub fn is_af12(&self) -> bool[src]

Checks if the value of the field is AF12

pub fn is_af13(&self) -> bool[src]

Checks if the value of the field is AF13

pub fn is_af14(&self) -> bool[src]

Checks if the value of the field is AF14

pub fn is_af15(&self) -> bool[src]

Checks if the value of the field is AF15

impl R<u32, Reg<u32, _AFRL>>[src]

pub fn afrl7(&self) -> AFRL7_R[src]

Bits 28:31 - Alternate function selection for port x bit y (y = 0..7)

pub fn afrl6(&self) -> AFRL6_R[src]

Bits 24:27 - Alternate function selection for port x bit y (y = 0..7)

pub fn afrl5(&self) -> AFRL5_R[src]

Bits 20:23 - Alternate function selection for port x bit y (y = 0..7)

pub fn afrl4(&self) -> AFRL4_R[src]

Bits 16:19 - Alternate function selection for port x bit y (y = 0..7)

pub fn afrl3(&self) -> AFRL3_R[src]

Bits 12:15 - Alternate function selection for port x bit y (y = 0..7)

pub fn afrl2(&self) -> AFRL2_R[src]

Bits 8:11 - Alternate function selection for port x bit y (y = 0..7)

pub fn afrl1(&self) -> AFRL1_R[src]

Bits 4:7 - Alternate function selection for port x bit y (y = 0..7)

pub fn afrl0(&self) -> AFRL0_R[src]

Bits 0:3 - Alternate function selection for port x bit y (y = 0..7)

impl R<u8, AFRH15_A>[src]

pub fn variant(&self) -> AFRH15_A[src]

Get enumerated values variant

pub fn is_af0(&self) -> bool[src]

Checks if the value of the field is AF0

pub fn is_af1(&self) -> bool[src]

Checks if the value of the field is AF1

pub fn is_af2(&self) -> bool[src]

Checks if the value of the field is AF2

pub fn is_af3(&self) -> bool[src]

Checks if the value of the field is AF3

pub fn is_af4(&self) -> bool[src]

Checks if the value of the field is AF4

pub fn is_af5(&self) -> bool[src]

Checks if the value of the field is AF5

pub fn is_af6(&self) -> bool[src]

Checks if the value of the field is AF6

pub fn is_af7(&self) -> bool[src]

Checks if the value of the field is AF7

pub fn is_af8(&self) -> bool[src]

Checks if the value of the field is AF8

pub fn is_af9(&self) -> bool[src]

Checks if the value of the field is AF9

pub fn is_af10(&self) -> bool[src]

Checks if the value of the field is AF10

pub fn is_af11(&self) -> bool[src]

Checks if the value of the field is AF11

pub fn is_af12(&self) -> bool[src]

Checks if the value of the field is AF12

pub fn is_af13(&self) -> bool[src]

Checks if the value of the field is AF13

pub fn is_af14(&self) -> bool[src]

Checks if the value of the field is AF14

pub fn is_af15(&self) -> bool[src]

Checks if the value of the field is AF15

impl R<u32, Reg<u32, _AFRH>>[src]

pub fn afrh15(&self) -> AFRH15_R[src]

Bits 28:31 - Alternate function selection for port x bit y (y = 8..15)

pub fn afrh14(&self) -> AFRH14_R[src]

Bits 24:27 - Alternate function selection for port x bit y (y = 8..15)

pub fn afrh13(&self) -> AFRH13_R[src]

Bits 20:23 - Alternate function selection for port x bit y (y = 8..15)

pub fn afrh12(&self) -> AFRH12_R[src]

Bits 16:19 - Alternate function selection for port x bit y (y = 8..15)

pub fn afrh11(&self) -> AFRH11_R[src]

Bits 12:15 - Alternate function selection for port x bit y (y = 8..15)

pub fn afrh10(&self) -> AFRH10_R[src]

Bits 8:11 - Alternate function selection for port x bit y (y = 8..15)

pub fn afrh9(&self) -> AFRH9_R[src]

Bits 4:7 - Alternate function selection for port x bit y (y = 8..15)

pub fn afrh8(&self) -> AFRH8_R[src]

Bits 0:3 - Alternate function selection for port x bit y (y = 8..15)

impl R<u8, MODER15_A>[src]

pub fn variant(&self) -> MODER15_A[src]

Get enumerated values variant

pub fn is_input(&self) -> bool[src]

Checks if the value of the field is INPUT

pub fn is_output(&self) -> bool[src]

Checks if the value of the field is OUTPUT

pub fn is_alternate(&self) -> bool[src]

Checks if the value of the field is ALTERNATE

pub fn is_analog(&self) -> bool[src]

Checks if the value of the field is ANALOG

impl R<u32, Reg<u32, _MODER>>[src]

pub fn moder15(&self) -> MODER15_R[src]

Bits 30:31 - Port x configuration bits (y = 0..15)

pub fn moder14(&self) -> MODER14_R[src]

Bits 28:29 - Port x configuration bits (y = 0..15)

pub fn moder13(&self) -> MODER13_R[src]

Bits 26:27 - Port x configuration bits (y = 0..15)

pub fn moder12(&self) -> MODER12_R[src]

Bits 24:25 - Port x configuration bits (y = 0..15)

pub fn moder11(&self) -> MODER11_R[src]

Bits 22:23 - Port x configuration bits (y = 0..15)

pub fn moder10(&self) -> MODER10_R[src]

Bits 20:21 - Port x configuration bits (y = 0..15)

pub fn moder9(&self) -> MODER9_R[src]

Bits 18:19 - Port x configuration bits (y = 0..15)

pub fn moder8(&self) -> MODER8_R[src]

Bits 16:17 - Port x configuration bits (y = 0..15)

pub fn moder7(&self) -> MODER7_R[src]

Bits 14:15 - Port x configuration bits (y = 0..15)

pub fn moder6(&self) -> MODER6_R[src]

Bits 12:13 - Port x configuration bits (y = 0..15)

pub fn moder5(&self) -> MODER5_R[src]

Bits 10:11 - Port x configuration bits (y = 0..15)

pub fn moder4(&self) -> MODER4_R[src]

Bits 8:9 - Port x configuration bits (y = 0..15)

pub fn moder3(&self) -> MODER3_R[src]

Bits 6:7 - Port x configuration bits (y = 0..15)

pub fn moder2(&self) -> MODER2_R[src]

Bits 4:5 - Port x configuration bits (y = 0..15)

pub fn moder1(&self) -> MODER1_R[src]

Bits 2:3 - Port x configuration bits (y = 0..15)

pub fn moder0(&self) -> MODER0_R[src]

Bits 0:1 - Port x configuration bits (y = 0..15)

impl R<bool, OT15_A>[src]

pub fn variant(&self) -> OT15_A[src]

Get enumerated values variant

pub fn is_push_pull(&self) -> bool[src]

Checks if the value of the field is PUSHPULL

pub fn is_open_drain(&self) -> bool[src]

Checks if the value of the field is OPENDRAIN

impl R<u32, Reg<u32, _OTYPER>>[src]

pub fn ot15(&self) -> OT15_R[src]

Bit 15 - Port x configuration bit 15

pub fn ot14(&self) -> OT14_R[src]

Bit 14 - Port x configuration bit 14

pub fn ot13(&self) -> OT13_R[src]

Bit 13 - Port x configuration bit 13

pub fn ot12(&self) -> OT12_R[src]

Bit 12 - Port x configuration bit 12

pub fn ot11(&self) -> OT11_R[src]

Bit 11 - Port x configuration bit 11

pub fn ot10(&self) -> OT10_R[src]

Bit 10 - Port x configuration bit 10

pub fn ot9(&self) -> OT9_R[src]

Bit 9 - Port x configuration bit 9

pub fn ot8(&self) -> OT8_R[src]

Bit 8 - Port x configuration bit 8

pub fn ot7(&self) -> OT7_R[src]

Bit 7 - Port x configuration bit 7

pub fn ot6(&self) -> OT6_R[src]

Bit 6 - Port x configuration bit 6

pub fn ot5(&self) -> OT5_R[src]

Bit 5 - Port x configuration bit 5

pub fn ot4(&self) -> OT4_R[src]

Bit 4 - Port x configuration bit 4

pub fn ot3(&self) -> OT3_R[src]

Bit 3 - Port x configuration bit 3

pub fn ot2(&self) -> OT2_R[src]

Bit 2 - Port x configuration bit 2

pub fn ot1(&self) -> OT1_R[src]

Bit 1 - Port x configuration bit 1

pub fn ot0(&self) -> OT0_R[src]

Bit 0 - Port x configuration bit 0

impl R<u8, OSPEEDR15_A>[src]

pub fn variant(&self) -> OSPEEDR15_A[src]

Get enumerated values variant

pub fn is_low_speed(&self) -> bool[src]

Checks if the value of the field is LOWSPEED

pub fn is_medium_speed(&self) -> bool[src]

Checks if the value of the field is MEDIUMSPEED

pub fn is_high_speed(&self) -> bool[src]

Checks if the value of the field is HIGHSPEED

pub fn is_very_high_speed(&self) -> bool[src]

Checks if the value of the field is VERYHIGHSPEED

impl R<u32, Reg<u32, _OSPEEDR>>[src]

pub fn ospeedr15(&self) -> OSPEEDR15_R[src]

Bits 30:31 - Port x configuration bits (y = 0..15)

pub fn ospeedr14(&self) -> OSPEEDR14_R[src]

Bits 28:29 - Port x configuration bits (y = 0..15)

pub fn ospeedr13(&self) -> OSPEEDR13_R[src]

Bits 26:27 - Port x configuration bits (y = 0..15)

pub fn ospeedr12(&self) -> OSPEEDR12_R[src]

Bits 24:25 - Port x configuration bits (y = 0..15)

pub fn ospeedr11(&self) -> OSPEEDR11_R[src]

Bits 22:23 - Port x configuration bits (y = 0..15)

pub fn ospeedr10(&self) -> OSPEEDR10_R[src]

Bits 20:21 - Port x configuration bits (y = 0..15)

pub fn ospeedr9(&self) -> OSPEEDR9_R[src]

Bits 18:19 - Port x configuration bits (y = 0..15)

pub fn ospeedr8(&self) -> OSPEEDR8_R[src]

Bits 16:17 - Port x configuration bits (y = 0..15)

pub fn ospeedr7(&self) -> OSPEEDR7_R[src]

Bits 14:15 - Port x configuration bits (y = 0..15)

pub fn ospeedr6(&self) -> OSPEEDR6_R[src]

Bits 12:13 - Port x configuration bits (y = 0..15)

pub fn ospeedr5(&self) -> OSPEEDR5_R[src]

Bits 10:11 - Port x configuration bits (y = 0..15)

pub fn ospeedr4(&self) -> OSPEEDR4_R[src]

Bits 8:9 - Port x configuration bits (y = 0..15)

pub fn ospeedr3(&self) -> OSPEEDR3_R[src]

Bits 6:7 - Port x configuration bits (y = 0..15)

pub fn ospeedr2(&self) -> OSPEEDR2_R[src]

Bits 4:5 - Port x configuration bits (y = 0..15)

pub fn ospeedr1(&self) -> OSPEEDR1_R[src]

Bits 2:3 - Port x configuration bits (y = 0..15)

pub fn ospeedr0(&self) -> OSPEEDR0_R[src]

Bits 0:1 - Port x configuration bits (y = 0..15)

impl R<u8, PUPDR15_A>[src]

pub fn variant(&self) -> Variant<u8, PUPDR15_A>[src]

Get enumerated values variant

pub fn is_floating(&self) -> bool[src]

Checks if the value of the field is FLOATING

pub fn is_pull_up(&self) -> bool[src]

Checks if the value of the field is PULLUP

pub fn is_pull_down(&self) -> bool[src]

Checks if the value of the field is PULLDOWN

impl R<u32, Reg<u32, _PUPDR>>[src]

pub fn pupdr15(&self) -> PUPDR15_R[src]

Bits 30:31 - Port x configuration bits (y = 0..15)

pub fn pupdr14(&self) -> PUPDR14_R[src]

Bits 28:29 - Port x configuration bits (y = 0..15)

pub fn pupdr13(&self) -> PUPDR13_R[src]

Bits 26:27 - Port x configuration bits (y = 0..15)

pub fn pupdr12(&self) -> PUPDR12_R[src]

Bits 24:25 - Port x configuration bits (y = 0..15)

pub fn pupdr11(&self) -> PUPDR11_R[src]

Bits 22:23 - Port x configuration bits (y = 0..15)

pub fn pupdr10(&self) -> PUPDR10_R[src]

Bits 20:21 - Port x configuration bits (y = 0..15)

pub fn pupdr9(&self) -> PUPDR9_R[src]

Bits 18:19 - Port x configuration bits (y = 0..15)

pub fn pupdr8(&self) -> PUPDR8_R[src]

Bits 16:17 - Port x configuration bits (y = 0..15)

pub fn pupdr7(&self) -> PUPDR7_R[src]

Bits 14:15 - Port x configuration bits (y = 0..15)

pub fn pupdr6(&self) -> PUPDR6_R[src]

Bits 12:13 - Port x configuration bits (y = 0..15)

pub fn pupdr5(&self) -> PUPDR5_R[src]

Bits 10:11 - Port x configuration bits (y = 0..15)

pub fn pupdr4(&self) -> PUPDR4_R[src]

Bits 8:9 - Port x configuration bits (y = 0..15)

pub fn pupdr3(&self) -> PUPDR3_R[src]

Bits 6:7 - Port x configuration bits (y = 0..15)

pub fn pupdr2(&self) -> PUPDR2_R[src]

Bits 4:5 - Port x configuration bits (y = 0..15)

pub fn pupdr1(&self) -> PUPDR1_R[src]

Bits 2:3 - Port x configuration bits (y = 0..15)

pub fn pupdr0(&self) -> PUPDR0_R[src]

Bits 0:1 - Port x configuration bits (y = 0..15)

impl R<bool, IDR15_A>[src]

pub fn variant(&self) -> IDR15_A[src]

Get enumerated values variant

pub fn is_high(&self) -> bool[src]

Checks if the value of the field is HIGH

pub fn is_low(&self) -> bool[src]

Checks if the value of the field is LOW

impl R<u32, Reg<u32, _IDR>>[src]

pub fn idr15(&self) -> IDR15_R[src]

Bit 15 - Port input data (y = 0..15)

pub fn idr14(&self) -> IDR14_R[src]

Bit 14 - Port input data (y = 0..15)

pub fn idr13(&self) -> IDR13_R[src]

Bit 13 - Port input data (y = 0..15)

pub fn idr12(&self) -> IDR12_R[src]

Bit 12 - Port input data (y = 0..15)

pub fn idr11(&self) -> IDR11_R[src]

Bit 11 - Port input data (y = 0..15)

pub fn idr10(&self) -> IDR10_R[src]

Bit 10 - Port input data (y = 0..15)

pub fn idr9(&self) -> IDR9_R[src]

Bit 9 - Port input data (y = 0..15)

pub fn idr8(&self) -> IDR8_R[src]

Bit 8 - Port input data (y = 0..15)

pub fn idr7(&self) -> IDR7_R[src]

Bit 7 - Port input data (y = 0..15)

pub fn idr6(&self) -> IDR6_R[src]

Bit 6 - Port input data (y = 0..15)

pub fn idr5(&self) -> IDR5_R[src]

Bit 5 - Port input data (y = 0..15)

pub fn idr4(&self) -> IDR4_R[src]

Bit 4 - Port input data (y = 0..15)

pub fn idr3(&self) -> IDR3_R[src]

Bit 3 - Port input data (y = 0..15)

pub fn idr2(&self) -> IDR2_R[src]

Bit 2 - Port input data (y = 0..15)

pub fn idr1(&self) -> IDR1_R[src]

Bit 1 - Port input data (y = 0..15)

pub fn idr0(&self) -> IDR0_R[src]

Bit 0 - Port input data (y = 0..15)

impl R<bool, ODR15_A>[src]

pub fn variant(&self) -> ODR15_A[src]

Get enumerated values variant

pub fn is_high(&self) -> bool[src]

Checks if the value of the field is HIGH

pub fn is_low(&self) -> bool[src]

Checks if the value of the field is LOW

impl R<u32, Reg<u32, _ODR>>[src]

pub fn odr15(&self) -> ODR15_R[src]

Bit 15 - Port output data (y = 0..15)

pub fn odr14(&self) -> ODR14_R[src]

Bit 14 - Port output data (y = 0..15)

pub fn odr13(&self) -> ODR13_R[src]

Bit 13 - Port output data (y = 0..15)

pub fn odr12(&self) -> ODR12_R[src]

Bit 12 - Port output data (y = 0..15)

pub fn odr11(&self) -> ODR11_R[src]

Bit 11 - Port output data (y = 0..15)

pub fn odr10(&self) -> ODR10_R[src]

Bit 10 - Port output data (y = 0..15)

pub fn odr9(&self) -> ODR9_R[src]

Bit 9 - Port output data (y = 0..15)

pub fn odr8(&self) -> ODR8_R[src]

Bit 8 - Port output data (y = 0..15)

pub fn odr7(&self) -> ODR7_R[src]

Bit 7 - Port output data (y = 0..15)

pub fn odr6(&self) -> ODR6_R[src]

Bit 6 - Port output data (y = 0..15)

pub fn odr5(&self) -> ODR5_R[src]

Bit 5 - Port output data (y = 0..15)

pub fn odr4(&self) -> ODR4_R[src]

Bit 4 - Port output data (y = 0..15)

pub fn odr3(&self) -> ODR3_R[src]

Bit 3 - Port output data (y = 0..15)

pub fn odr2(&self) -> ODR2_R[src]

Bit 2 - Port output data (y = 0..15)

pub fn odr1(&self) -> ODR1_R[src]

Bit 1 - Port output data (y = 0..15)

pub fn odr0(&self) -> ODR0_R[src]

Bit 0 - Port output data (y = 0..15)

impl R<bool, LCKK_A>[src]

pub fn variant(&self) -> LCKK_A[src]

Get enumerated values variant

pub fn is_not_active(&self) -> bool[src]

Checks if the value of the field is NOTACTIVE

pub fn is_active(&self) -> bool[src]

Checks if the value of the field is ACTIVE

impl R<bool, LCK15_A>[src]

pub fn variant(&self) -> LCK15_A[src]

Get enumerated values variant

pub fn is_unlocked(&self) -> bool[src]

Checks if the value of the field is UNLOCKED

pub fn is_locked(&self) -> bool[src]

Checks if the value of the field is LOCKED

impl R<bool, LCK9_A>[src]

pub fn variant(&self) -> LCK9_A[src]

Get enumerated values variant

pub fn is_unlocked(&self) -> bool[src]

Checks if the value of the field is UNLOCKED

pub fn is_locked(&self) -> bool[src]

Checks if the value of the field is LOCKED

impl R<u32, Reg<u32, _LCKR>>[src]

pub fn lckk(&self) -> LCKK_R[src]

Bit 16 - Lok Key

pub fn lck15(&self) -> LCK15_R[src]

Bit 15 - Port x lock bit y (y= 0..15)

pub fn lck14(&self) -> LCK14_R[src]

Bit 14 - Port x lock bit y (y= 0..15)

pub fn lck13(&self) -> LCK13_R[src]

Bit 13 - Port x lock bit y (y= 0..15)

pub fn lck12(&self) -> LCK12_R[src]

Bit 12 - Port x lock bit y (y= 0..15)

pub fn lck11(&self) -> LCK11_R[src]

Bit 11 - Port x lock bit y (y= 0..15)

pub fn lck10(&self) -> LCK10_R[src]

Bit 10 - Port x lock bit y (y= 0..15)

pub fn lck9(&self) -> LCK9_R[src]

Bit 9 - Port x lock bit y (y= 0..15)

pub fn lck8(&self) -> LCK8_R[src]

Bit 8 - Port x lock bit y (y= 0..15)

pub fn lck7(&self) -> LCK7_R[src]

Bit 7 - Port x lock bit y (y= 0..15)

pub fn lck6(&self) -> LCK6_R[src]

Bit 6 - Port x lock bit y (y= 0..15)

pub fn lck5(&self) -> LCK5_R[src]

Bit 5 - Port x lock bit y (y= 0..15)

pub fn lck4(&self) -> LCK4_R[src]

Bit 4 - Port x lock bit y (y= 0..15)

pub fn lck3(&self) -> LCK3_R[src]

Bit 3 - Port x lock bit y (y= 0..15)

pub fn lck2(&self) -> LCK2_R[src]

Bit 2 - Port x lock bit y (y= 0..15)

pub fn lck1(&self) -> LCK1_R[src]

Bit 1 - Port x lock bit y (y= 0..15)

pub fn lck0(&self) -> LCK0_R[src]

Bit 0 - Port x lock bit y (y= 0..15)

impl R<u8, AFRL7_A>[src]

pub fn variant(&self) -> AFRL7_A[src]

Get enumerated values variant

pub fn is_af0(&self) -> bool[src]

Checks if the value of the field is AF0

pub fn is_af1(&self) -> bool[src]

Checks if the value of the field is AF1

pub fn is_af2(&self) -> bool[src]

Checks if the value of the field is AF2

pub fn is_af3(&self) -> bool[src]

Checks if the value of the field is AF3

pub fn is_af4(&self) -> bool[src]

Checks if the value of the field is AF4

pub fn is_af5(&self) -> bool[src]

Checks if the value of the field is AF5

pub fn is_af6(&self) -> bool[src]

Checks if the value of the field is AF6

pub fn is_af7(&self) -> bool[src]

Checks if the value of the field is AF7

pub fn is_af8(&self) -> bool[src]

Checks if the value of the field is AF8

pub fn is_af9(&self) -> bool[src]

Checks if the value of the field is AF9

pub fn is_af10(&self) -> bool[src]

Checks if the value of the field is AF10

pub fn is_af11(&self) -> bool[src]

Checks if the value of the field is AF11

pub fn is_af12(&self) -> bool[src]

Checks if the value of the field is AF12

pub fn is_af13(&self) -> bool[src]

Checks if the value of the field is AF13

pub fn is_af14(&self) -> bool[src]

Checks if the value of the field is AF14

pub fn is_af15(&self) -> bool[src]

Checks if the value of the field is AF15

impl R<u32, Reg<u32, _AFRL>>[src]

pub fn afrl7(&self) -> AFRL7_R[src]

Bits 28:31 - Alternate function selection for port x bit y (y = 0..7)

pub fn afrl6(&self) -> AFRL6_R[src]

Bits 24:27 - Alternate function selection for port x bit y (y = 0..7)

pub fn afrl5(&self) -> AFRL5_R[src]

Bits 20:23 - Alternate function selection for port x bit y (y = 0..7)

pub fn afrl4(&self) -> AFRL4_R[src]

Bits 16:19 - Alternate function selection for port x bit y (y = 0..7)

pub fn afrl3(&self) -> AFRL3_R[src]

Bits 12:15 - Alternate function selection for port x bit y (y = 0..7)

pub fn afrl2(&self) -> AFRL2_R[src]

Bits 8:11 - Alternate function selection for port x bit y (y = 0..7)

pub fn afrl1(&self) -> AFRL1_R[src]

Bits 4:7 - Alternate function selection for port x bit y (y = 0..7)

pub fn afrl0(&self) -> AFRL0_R[src]

Bits 0:3 - Alternate function selection for port x bit y (y = 0..7)

impl R<u8, AFRH15_A>[src]

pub fn variant(&self) -> AFRH15_A[src]

Get enumerated values variant

pub fn is_af0(&self) -> bool[src]

Checks if the value of the field is AF0

pub fn is_af1(&self) -> bool[src]

Checks if the value of the field is AF1

pub fn is_af2(&self) -> bool[src]

Checks if the value of the field is AF2

pub fn is_af3(&self) -> bool[src]

Checks if the value of the field is AF3

pub fn is_af4(&self) -> bool[src]

Checks if the value of the field is AF4

pub fn is_af5(&self) -> bool[src]

Checks if the value of the field is AF5

pub fn is_af6(&self) -> bool[src]

Checks if the value of the field is AF6

pub fn is_af7(&self) -> bool[src]

Checks if the value of the field is AF7

pub fn is_af8(&self) -> bool[src]

Checks if the value of the field is AF8

pub fn is_af9(&self) -> bool[src]

Checks if the value of the field is AF9

pub fn is_af10(&self) -> bool[src]

Checks if the value of the field is AF10

pub fn is_af11(&self) -> bool[src]

Checks if the value of the field is AF11

pub fn is_af12(&self) -> bool[src]

Checks if the value of the field is AF12

pub fn is_af13(&self) -> bool[src]

Checks if the value of the field is AF13

pub fn is_af14(&self) -> bool[src]

Checks if the value of the field is AF14

pub fn is_af15(&self) -> bool[src]

Checks if the value of the field is AF15

impl R<u32, Reg<u32, _AFRH>>[src]

pub fn afrh15(&self) -> AFRH15_R[src]

Bits 28:31 - Alternate function selection for port x bit y (y = 8..15)

pub fn afrh14(&self) -> AFRH14_R[src]

Bits 24:27 - Alternate function selection for port x bit y (y = 8..15)

pub fn afrh13(&self) -> AFRH13_R[src]

Bits 20:23 - Alternate function selection for port x bit y (y = 8..15)

pub fn afrh12(&self) -> AFRH12_R[src]

Bits 16:19 - Alternate function selection for port x bit y (y = 8..15)

pub fn afrh11(&self) -> AFRH11_R[src]

Bits 12:15 - Alternate function selection for port x bit y (y = 8..15)

pub fn afrh10(&self) -> AFRH10_R[src]

Bits 8:11 - Alternate function selection for port x bit y (y = 8..15)

pub fn afrh9(&self) -> AFRH9_R[src]

Bits 4:7 - Alternate function selection for port x bit y (y = 8..15)

pub fn afrh8(&self) -> AFRH8_R[src]

Bits 0:3 - Alternate function selection for port x bit y (y = 8..15)

impl R<u8, MODER15_A>[src]

pub fn variant(&self) -> MODER15_A[src]

Get enumerated values variant

pub fn is_input(&self) -> bool[src]

Checks if the value of the field is INPUT

pub fn is_output(&self) -> bool[src]

Checks if the value of the field is OUTPUT

pub fn is_alternate(&self) -> bool[src]

Checks if the value of the field is ALTERNATE

pub fn is_analog(&self) -> bool[src]

Checks if the value of the field is ANALOG

impl R<u32, Reg<u32, _MODER>>[src]

pub fn moder15(&self) -> MODER15_R[src]

Bits 30:31 - Port x configuration bits (y = 0..15)

pub fn moder14(&self) -> MODER14_R[src]

Bits 28:29 - Port x configuration bits (y = 0..15)

pub fn moder13(&self) -> MODER13_R[src]

Bits 26:27 - Port x configuration bits (y = 0..15)

pub fn moder12(&self) -> MODER12_R[src]

Bits 24:25 - Port x configuration bits (y = 0..15)

pub fn moder11(&self) -> MODER11_R[src]

Bits 22:23 - Port x configuration bits (y = 0..15)

pub fn moder10(&self) -> MODER10_R[src]

Bits 20:21 - Port x configuration bits (y = 0..15)

pub fn moder9(&self) -> MODER9_R[src]

Bits 18:19 - Port x configuration bits (y = 0..15)

pub fn moder8(&self) -> MODER8_R[src]

Bits 16:17 - Port x configuration bits (y = 0..15)

pub fn moder7(&self) -> MODER7_R[src]

Bits 14:15 - Port x configuration bits (y = 0..15)

pub fn moder6(&self) -> MODER6_R[src]

Bits 12:13 - Port x configuration bits (y = 0..15)

pub fn moder5(&self) -> MODER5_R[src]

Bits 10:11 - Port x configuration bits (y = 0..15)

pub fn moder4(&self) -> MODER4_R[src]

Bits 8:9 - Port x configuration bits (y = 0..15)

pub fn moder3(&self) -> MODER3_R[src]

Bits 6:7 - Port x configuration bits (y = 0..15)

pub fn moder2(&self) -> MODER2_R[src]

Bits 4:5 - Port x configuration bits (y = 0..15)

pub fn moder1(&self) -> MODER1_R[src]

Bits 2:3 - Port x configuration bits (y = 0..15)

pub fn moder0(&self) -> MODER0_R[src]

Bits 0:1 - Port x configuration bits (y = 0..15)

impl R<bool, OT15_A>[src]

pub fn variant(&self) -> OT15_A[src]

Get enumerated values variant

pub fn is_push_pull(&self) -> bool[src]

Checks if the value of the field is PUSHPULL

pub fn is_open_drain(&self) -> bool[src]

Checks if the value of the field is OPENDRAIN

impl R<u32, Reg<u32, _OTYPER>>[src]

pub fn ot15(&self) -> OT15_R[src]

Bit 15 - Port x configuration bit 15

pub fn ot14(&self) -> OT14_R[src]

Bit 14 - Port x configuration bit 14

pub fn ot13(&self) -> OT13_R[src]

Bit 13 - Port x configuration bit 13

pub fn ot12(&self) -> OT12_R[src]

Bit 12 - Port x configuration bit 12

pub fn ot11(&self) -> OT11_R[src]

Bit 11 - Port x configuration bit 11

pub fn ot10(&self) -> OT10_R[src]

Bit 10 - Port x configuration bit 10

pub fn ot9(&self) -> OT9_R[src]

Bit 9 - Port x configuration bit 9

pub fn ot8(&self) -> OT8_R[src]

Bit 8 - Port x configuration bit 8

pub fn ot7(&self) -> OT7_R[src]

Bit 7 - Port x configuration bit 7

pub fn ot6(&self) -> OT6_R[src]

Bit 6 - Port x configuration bit 6

pub fn ot5(&self) -> OT5_R[src]

Bit 5 - Port x configuration bit 5

pub fn ot4(&self) -> OT4_R[src]

Bit 4 - Port x configuration bit 4

pub fn ot3(&self) -> OT3_R[src]

Bit 3 - Port x configuration bit 3

pub fn ot2(&self) -> OT2_R[src]

Bit 2 - Port x configuration bit 2

pub fn ot1(&self) -> OT1_R[src]

Bit 1 - Port x configuration bit 1

pub fn ot0(&self) -> OT0_R[src]

Bit 0 - Port x configuration bit 0

impl R<u8, OSPEEDR15_A>[src]

pub fn variant(&self) -> OSPEEDR15_A[src]

Get enumerated values variant

pub fn is_low_speed(&self) -> bool[src]

Checks if the value of the field is LOWSPEED

pub fn is_medium_speed(&self) -> bool[src]

Checks if the value of the field is MEDIUMSPEED

pub fn is_high_speed(&self) -> bool[src]

Checks if the value of the field is HIGHSPEED

pub fn is_very_high_speed(&self) -> bool[src]

Checks if the value of the field is VERYHIGHSPEED

impl R<u32, Reg<u32, _OSPEEDR>>[src]

pub fn ospeedr15(&self) -> OSPEEDR15_R[src]

Bits 30:31 - Port x configuration bits (y = 0..15)

pub fn ospeedr14(&self) -> OSPEEDR14_R[src]

Bits 28:29 - Port x configuration bits (y = 0..15)

pub fn ospeedr13(&self) -> OSPEEDR13_R[src]

Bits 26:27 - Port x configuration bits (y = 0..15)

pub fn ospeedr12(&self) -> OSPEEDR12_R[src]

Bits 24:25 - Port x configuration bits (y = 0..15)

pub fn ospeedr11(&self) -> OSPEEDR11_R[src]

Bits 22:23 - Port x configuration bits (y = 0..15)

pub fn ospeedr10(&self) -> OSPEEDR10_R[src]

Bits 20:21 - Port x configuration bits (y = 0..15)

pub fn ospeedr9(&self) -> OSPEEDR9_R[src]

Bits 18:19 - Port x configuration bits (y = 0..15)

pub fn ospeedr8(&self) -> OSPEEDR8_R[src]

Bits 16:17 - Port x configuration bits (y = 0..15)

pub fn ospeedr7(&self) -> OSPEEDR7_R[src]

Bits 14:15 - Port x configuration bits (y = 0..15)

pub fn ospeedr6(&self) -> OSPEEDR6_R[src]

Bits 12:13 - Port x configuration bits (y = 0..15)

pub fn ospeedr5(&self) -> OSPEEDR5_R[src]

Bits 10:11 - Port x configuration bits (y = 0..15)

pub fn ospeedr4(&self) -> OSPEEDR4_R[src]

Bits 8:9 - Port x configuration bits (y = 0..15)

pub fn ospeedr3(&self) -> OSPEEDR3_R[src]

Bits 6:7 - Port x configuration bits (y = 0..15)

pub fn ospeedr2(&self) -> OSPEEDR2_R[src]

Bits 4:5 - Port x configuration bits (y = 0..15)

pub fn ospeedr1(&self) -> OSPEEDR1_R[src]

Bits 2:3 - Port x configuration bits (y = 0..15)

pub fn ospeedr0(&self) -> OSPEEDR0_R[src]

Bits 0:1 - Port x configuration bits (y = 0..15)

impl R<u8, PUPDR15_A>[src]

pub fn variant(&self) -> Variant<u8, PUPDR15_A>[src]

Get enumerated values variant

pub fn is_floating(&self) -> bool[src]

Checks if the value of the field is FLOATING

pub fn is_pull_up(&self) -> bool[src]

Checks if the value of the field is PULLUP

pub fn is_pull_down(&self) -> bool[src]

Checks if the value of the field is PULLDOWN

impl R<u32, Reg<u32, _PUPDR>>[src]

pub fn pupdr15(&self) -> PUPDR15_R[src]

Bits 30:31 - Port x configuration bits (y = 0..15)

pub fn pupdr14(&self) -> PUPDR14_R[src]

Bits 28:29 - Port x configuration bits (y = 0..15)

pub fn pupdr13(&self) -> PUPDR13_R[src]

Bits 26:27 - Port x configuration bits (y = 0..15)

pub fn pupdr12(&self) -> PUPDR12_R[src]

Bits 24:25 - Port x configuration bits (y = 0..15)

pub fn pupdr11(&self) -> PUPDR11_R[src]

Bits 22:23 - Port x configuration bits (y = 0..15)

pub fn pupdr10(&self) -> PUPDR10_R[src]

Bits 20:21 - Port x configuration bits (y = 0..15)

pub fn pupdr9(&self) -> PUPDR9_R[src]

Bits 18:19 - Port x configuration bits (y = 0..15)

pub fn pupdr8(&self) -> PUPDR8_R[src]

Bits 16:17 - Port x configuration bits (y = 0..15)

pub fn pupdr7(&self) -> PUPDR7_R[src]

Bits 14:15 - Port x configuration bits (y = 0..15)

pub fn pupdr6(&self) -> PUPDR6_R[src]

Bits 12:13 - Port x configuration bits (y = 0..15)

pub fn pupdr5(&self) -> PUPDR5_R[src]

Bits 10:11 - Port x configuration bits (y = 0..15)

pub fn pupdr4(&self) -> PUPDR4_R[src]

Bits 8:9 - Port x configuration bits (y = 0..15)

pub fn pupdr3(&self) -> PUPDR3_R[src]

Bits 6:7 - Port x configuration bits (y = 0..15)

pub fn pupdr2(&self) -> PUPDR2_R[src]

Bits 4:5 - Port x configuration bits (y = 0..15)

pub fn pupdr1(&self) -> PUPDR1_R[src]

Bits 2:3 - Port x configuration bits (y = 0..15)

pub fn pupdr0(&self) -> PUPDR0_R[src]

Bits 0:1 - Port x configuration bits (y = 0..15)

impl R<bool, IDR15_A>[src]

pub fn variant(&self) -> IDR15_A[src]

Get enumerated values variant

pub fn is_high(&self) -> bool[src]

Checks if the value of the field is HIGH

pub fn is_low(&self) -> bool[src]

Checks if the value of the field is LOW

impl R<u32, Reg<u32, _IDR>>[src]

pub fn idr15(&self) -> IDR15_R[src]

Bit 15 - Port input data (y = 0..15)

pub fn idr14(&self) -> IDR14_R[src]

Bit 14 - Port input data (y = 0..15)

pub fn idr13(&self) -> IDR13_R[src]

Bit 13 - Port input data (y = 0..15)

pub fn idr12(&self) -> IDR12_R[src]

Bit 12 - Port input data (y = 0..15)

pub fn idr11(&self) -> IDR11_R[src]

Bit 11 - Port input data (y = 0..15)

pub fn idr10(&self) -> IDR10_R[src]

Bit 10 - Port input data (y = 0..15)

pub fn idr9(&self) -> IDR9_R[src]

Bit 9 - Port input data (y = 0..15)

pub fn idr8(&self) -> IDR8_R[src]

Bit 8 - Port input data (y = 0..15)

pub fn idr7(&self) -> IDR7_R[src]

Bit 7 - Port input data (y = 0..15)

pub fn idr6(&self) -> IDR6_R[src]

Bit 6 - Port input data (y = 0..15)

pub fn idr5(&self) -> IDR5_R[src]

Bit 5 - Port input data (y = 0..15)

pub fn idr4(&self) -> IDR4_R[src]

Bit 4 - Port input data (y = 0..15)

pub fn idr3(&self) -> IDR3_R[src]

Bit 3 - Port input data (y = 0..15)

pub fn idr2(&self) -> IDR2_R[src]

Bit 2 - Port input data (y = 0..15)

pub fn idr1(&self) -> IDR1_R[src]

Bit 1 - Port input data (y = 0..15)

pub fn idr0(&self) -> IDR0_R[src]

Bit 0 - Port input data (y = 0..15)

impl R<bool, ODR15_A>[src]

pub fn variant(&self) -> ODR15_A[src]

Get enumerated values variant

pub fn is_high(&self) -> bool[src]

Checks if the value of the field is HIGH

pub fn is_low(&self) -> bool[src]

Checks if the value of the field is LOW

impl R<u32, Reg<u32, _ODR>>[src]

pub fn odr15(&self) -> ODR15_R[src]

Bit 15 - Port output data (y = 0..15)

pub fn odr14(&self) -> ODR14_R[src]

Bit 14 - Port output data (y = 0..15)

pub fn odr13(&self) -> ODR13_R[src]

Bit 13 - Port output data (y = 0..15)

pub fn odr12(&self) -> ODR12_R[src]

Bit 12 - Port output data (y = 0..15)

pub fn odr11(&self) -> ODR11_R[src]

Bit 11 - Port output data (y = 0..15)

pub fn odr10(&self) -> ODR10_R[src]

Bit 10 - Port output data (y = 0..15)

pub fn odr9(&self) -> ODR9_R[src]

Bit 9 - Port output data (y = 0..15)

pub fn odr8(&self) -> ODR8_R[src]

Bit 8 - Port output data (y = 0..15)

pub fn odr7(&self) -> ODR7_R[src]

Bit 7 - Port output data (y = 0..15)

pub fn odr6(&self) -> ODR6_R[src]

Bit 6 - Port output data (y = 0..15)

pub fn odr5(&self) -> ODR5_R[src]

Bit 5 - Port output data (y = 0..15)

pub fn odr4(&self) -> ODR4_R[src]

Bit 4 - Port output data (y = 0..15)

pub fn odr3(&self) -> ODR3_R[src]

Bit 3 - Port output data (y = 0..15)

pub fn odr2(&self) -> ODR2_R[src]

Bit 2 - Port output data (y = 0..15)

pub fn odr1(&self) -> ODR1_R[src]

Bit 1 - Port output data (y = 0..15)

pub fn odr0(&self) -> ODR0_R[src]

Bit 0 - Port output data (y = 0..15)

impl R<u8, AFRL7_A>[src]

pub fn variant(&self) -> AFRL7_A[src]

Get enumerated values variant

pub fn is_af0(&self) -> bool[src]

Checks if the value of the field is AF0

pub fn is_af1(&self) -> bool[src]

Checks if the value of the field is AF1

pub fn is_af2(&self) -> bool[src]

Checks if the value of the field is AF2

pub fn is_af3(&self) -> bool[src]

Checks if the value of the field is AF3

pub fn is_af4(&self) -> bool[src]

Checks if the value of the field is AF4

pub fn is_af5(&self) -> bool[src]

Checks if the value of the field is AF5

pub fn is_af6(&self) -> bool[src]

Checks if the value of the field is AF6

pub fn is_af7(&self) -> bool[src]

Checks if the value of the field is AF7

pub fn is_af8(&self) -> bool[src]

Checks if the value of the field is AF8

pub fn is_af9(&self) -> bool[src]

Checks if the value of the field is AF9

pub fn is_af10(&self) -> bool[src]

Checks if the value of the field is AF10

pub fn is_af11(&self) -> bool[src]

Checks if the value of the field is AF11

pub fn is_af12(&self) -> bool[src]

Checks if the value of the field is AF12

pub fn is_af13(&self) -> bool[src]

Checks if the value of the field is AF13

pub fn is_af14(&self) -> bool[src]

Checks if the value of the field is AF14

pub fn is_af15(&self) -> bool[src]

Checks if the value of the field is AF15

impl R<u32, Reg<u32, _AFRL>>[src]

pub fn afrl7(&self) -> AFRL7_R[src]

Bits 28:31 - Alternate function selection for port x bit y (y = 0..7)

pub fn afrl6(&self) -> AFRL6_R[src]

Bits 24:27 - Alternate function selection for port x bit y (y = 0..7)

pub fn afrl5(&self) -> AFRL5_R[src]

Bits 20:23 - Alternate function selection for port x bit y (y = 0..7)

pub fn afrl4(&self) -> AFRL4_R[src]

Bits 16:19 - Alternate function selection for port x bit y (y = 0..7)

pub fn afrl3(&self) -> AFRL3_R[src]

Bits 12:15 - Alternate function selection for port x bit y (y = 0..7)

pub fn afrl2(&self) -> AFRL2_R[src]

Bits 8:11 - Alternate function selection for port x bit y (y = 0..7)

pub fn afrl1(&self) -> AFRL1_R[src]

Bits 4:7 - Alternate function selection for port x bit y (y = 0..7)

pub fn afrl0(&self) -> AFRL0_R[src]

Bits 0:3 - Alternate function selection for port x bit y (y = 0..7)

impl R<u8, AFRH15_A>[src]

pub fn variant(&self) -> AFRH15_A[src]

Get enumerated values variant

pub fn is_af0(&self) -> bool[src]

Checks if the value of the field is AF0

pub fn is_af1(&self) -> bool[src]

Checks if the value of the field is AF1

pub fn is_af2(&self) -> bool[src]

Checks if the value of the field is AF2

pub fn is_af3(&self) -> bool[src]

Checks if the value of the field is AF3

pub fn is_af4(&self) -> bool[src]

Checks if the value of the field is AF4

pub fn is_af5(&self) -> bool[src]

Checks if the value of the field is AF5

pub fn is_af6(&self) -> bool[src]

Checks if the value of the field is AF6

pub fn is_af7(&self) -> bool[src]

Checks if the value of the field is AF7

pub fn is_af8(&self) -> bool[src]

Checks if the value of the field is AF8

pub fn is_af9(&self) -> bool[src]

Checks if the value of the field is AF9

pub fn is_af10(&self) -> bool[src]

Checks if the value of the field is AF10

pub fn is_af11(&self) -> bool[src]

Checks if the value of the field is AF11

pub fn is_af12(&self) -> bool[src]

Checks if the value of the field is AF12

pub fn is_af13(&self) -> bool[src]

Checks if the value of the field is AF13

pub fn is_af14(&self) -> bool[src]

Checks if the value of the field is AF14

pub fn is_af15(&self) -> bool[src]

Checks if the value of the field is AF15

impl R<u32, Reg<u32, _AFRH>>[src]

pub fn afrh15(&self) -> AFRH15_R[src]

Bits 28:31 - Alternate function selection for port x bit y (y = 8..15)

pub fn afrh14(&self) -> AFRH14_R[src]

Bits 24:27 - Alternate function selection for port x bit y (y = 8..15)

pub fn afrh13(&self) -> AFRH13_R[src]

Bits 20:23 - Alternate function selection for port x bit y (y = 8..15)

pub fn afrh12(&self) -> AFRH12_R[src]

Bits 16:19 - Alternate function selection for port x bit y (y = 8..15)

pub fn afrh11(&self) -> AFRH11_R[src]

Bits 12:15 - Alternate function selection for port x bit y (y = 8..15)

pub fn afrh10(&self) -> AFRH10_R[src]

Bits 8:11 - Alternate function selection for port x bit y (y = 8..15)

pub fn afrh9(&self) -> AFRH9_R[src]

Bits 4:7 - Alternate function selection for port x bit y (y = 8..15)

pub fn afrh8(&self) -> AFRH8_R[src]

Bits 0:3 - Alternate function selection for port x bit y (y = 8..15)

impl R<bool, LCKK_A>[src]

pub fn variant(&self) -> LCKK_A[src]

Get enumerated values variant

pub fn is_not_active(&self) -> bool[src]

Checks if the value of the field is NOTACTIVE

pub fn is_active(&self) -> bool[src]

Checks if the value of the field is ACTIVE

impl R<bool, LCK15_A>[src]

pub fn variant(&self) -> LCK15_A[src]

Get enumerated values variant

pub fn is_unlocked(&self) -> bool[src]

Checks if the value of the field is UNLOCKED

pub fn is_locked(&self) -> bool[src]

Checks if the value of the field is LOCKED

impl R<bool, LCK9_A>[src]

pub fn variant(&self) -> LCK9_A[src]

Get enumerated values variant

pub fn is_unlocked(&self) -> bool[src]

Checks if the value of the field is UNLOCKED

pub fn is_locked(&self) -> bool[src]

Checks if the value of the field is LOCKED

impl R<u32, Reg<u32, _LCKR>>[src]

pub fn lckk(&self) -> LCKK_R[src]

Bit 16 - Lock Key

pub fn lck15(&self) -> LCK15_R[src]

Bit 15 - Port x lock bit y (y=0..15)

pub fn lck14(&self) -> LCK14_R[src]

Bit 14 - Port x lock bit y (y=0..15)

pub fn lck13(&self) -> LCK13_R[src]

Bit 13 - Port x lock bit y (y=0..15)

pub fn lck12(&self) -> LCK12_R[src]

Bit 12 - Port x lock bit y (y=0..15)

pub fn lck11(&self) -> LCK11_R[src]

Bit 11 - Port x lock bit y (y=0..15)

pub fn lck10(&self) -> LCK10_R[src]

Bit 10 - Port x lock bit y (y=0..15)

pub fn lck9(&self) -> LCK9_R[src]

Bit 9 - Port x lock bit y (y=0..15)

pub fn lck8(&self) -> LCK8_R[src]

Bit 8 - Port x lock bit y (y=0..15)

pub fn lck7(&self) -> LCK7_R[src]

Bit 7 - Port x lock bit y (y=0..15)

pub fn lck6(&self) -> LCK6_R[src]

Bit 6 - Port x lock bit y (y=0..15)

pub fn lck5(&self) -> LCK5_R[src]

Bit 5 - Port x lock bit y (y=0..15)

pub fn lck4(&self) -> LCK4_R[src]

Bit 4 - Port x lock bit y (y=0..15)

pub fn lck3(&self) -> LCK3_R[src]

Bit 3 - Port x lock bit y (y=0..15)

pub fn lck2(&self) -> LCK2_R[src]

Bit 2 - Port x lock bit y (y=0..15)

pub fn lck1(&self) -> LCK1_R[src]

Bit 1 - Port x lock bit y (y=0..15)

pub fn lck0(&self) -> LCK0_R[src]

Bit 0 - Port x lock bit y (y=0..15)

impl R<u32, Reg<u32, _CR>>[src]

pub fn ctph(&self) -> CTPH_R[src]

Bits 28:31 - Charge transfer pulse high

pub fn ctpl(&self) -> CTPL_R[src]

Bits 24:27 - Charge transfer pulse low

pub fn ssd(&self) -> SSD_R[src]

Bits 17:23 - Spread spectrum deviation

pub fn sse(&self) -> SSE_R[src]

Bit 16 - Spread spectrum enable

pub fn sspsc(&self) -> SSPSC_R[src]

Bit 15 - Spread spectrum prescaler

pub fn pgpsc(&self) -> PGPSC_R[src]

Bits 12:14 - pulse generator prescaler

pub fn mcv(&self) -> MCV_R[src]

Bits 5:7 - Max count value

pub fn iodef(&self) -> IODEF_R[src]

Bit 4 - I/O Default mode

pub fn syncpol(&self) -> SYNCPOL_R[src]

Bit 3 - Synchronization pin polarity

pub fn am(&self) -> AM_R[src]

Bit 2 - Acquisition mode

pub fn start(&self) -> START_R[src]

Bit 1 - Start a new acquisition

pub fn tsce(&self) -> TSCE_R[src]

Bit 0 - Touch sensing controller enable

impl R<u32, Reg<u32, _IER>>[src]

pub fn mceie(&self) -> MCEIE_R[src]

Bit 1 - Max count error interrupt enable

pub fn eoaie(&self) -> EOAIE_R[src]

Bit 0 - End of acquisition interrupt enable

impl R<u32, Reg<u32, _ICR>>[src]

pub fn mceic(&self) -> MCEIC_R[src]

Bit 1 - Max count error interrupt clear

pub fn eoaic(&self) -> EOAIC_R[src]

Bit 0 - End of acquisition interrupt clear

impl R<u32, Reg<u32, _ISR>>[src]

pub fn mcef(&self) -> MCEF_R[src]

Bit 1 - Max count error flag

pub fn eoaf(&self) -> EOAF_R[src]

Bit 0 - End of acquisition flag

impl R<u32, Reg<u32, _IOHCR>>[src]

pub fn g1_io1(&self) -> G1_IO1_R[src]

Bit 0 - G1_IO1 Schmitt trigger hysteresis mode

pub fn g1_io2(&self) -> G1_IO2_R[src]

Bit 1 - G1_IO2 Schmitt trigger hysteresis mode

pub fn g1_io3(&self) -> G1_IO3_R[src]

Bit 2 - G1_IO3 Schmitt trigger hysteresis mode

pub fn g1_io4(&self) -> G1_IO4_R[src]

Bit 3 - G1_IO4 Schmitt trigger hysteresis mode

pub fn g2_io1(&self) -> G2_IO1_R[src]

Bit 4 - G2_IO1 Schmitt trigger hysteresis mode

pub fn g2_io2(&self) -> G2_IO2_R[src]

Bit 5 - G2_IO2 Schmitt trigger hysteresis mode

pub fn g2_io3(&self) -> G2_IO3_R[src]

Bit 6 - G2_IO3 Schmitt trigger hysteresis mode

pub fn g2_io4(&self) -> G2_IO4_R[src]

Bit 7 - G2_IO4 Schmitt trigger hysteresis mode

pub fn g3_io1(&self) -> G3_IO1_R[src]

Bit 8 - G3_IO1 Schmitt trigger hysteresis mode

pub fn g3_io2(&self) -> G3_IO2_R[src]

Bit 9 - G3_IO2 Schmitt trigger hysteresis mode

pub fn g3_io3(&self) -> G3_IO3_R[src]

Bit 10 - G3_IO3 Schmitt trigger hysteresis mode

pub fn g3_io4(&self) -> G3_IO4_R[src]

Bit 11 - G3_IO4 Schmitt trigger hysteresis mode

pub fn g4_io1(&self) -> G4_IO1_R[src]

Bit 12 - G4_IO1 Schmitt trigger hysteresis mode

pub fn g4_io2(&self) -> G4_IO2_R[src]

Bit 13 - G4_IO2 Schmitt trigger hysteresis mode

pub fn g4_io3(&self) -> G4_IO3_R[src]

Bit 14 - G4_IO3 Schmitt trigger hysteresis mode

pub fn g4_io4(&self) -> G4_IO4_R[src]

Bit 15 - G4_IO4 Schmitt trigger hysteresis mode

pub fn g5_io1(&self) -> G5_IO1_R[src]

Bit 16 - G5_IO1 Schmitt trigger hysteresis mode

pub fn g5_io2(&self) -> G5_IO2_R[src]

Bit 17 - G5_IO2 Schmitt trigger hysteresis mode

pub fn g5_io3(&self) -> G5_IO3_R[src]

Bit 18 - G5_IO3 Schmitt trigger hysteresis mode

pub fn g5_io4(&self) -> G5_IO4_R[src]

Bit 19 - G5_IO4 Schmitt trigger hysteresis mode

pub fn g6_io1(&self) -> G6_IO1_R[src]

Bit 20 - G6_IO1 Schmitt trigger hysteresis mode

pub fn g6_io2(&self) -> G6_IO2_R[src]

Bit 21 - G6_IO2 Schmitt trigger hysteresis mode

pub fn g6_io3(&self) -> G6_IO3_R[src]

Bit 22 - G6_IO3 Schmitt trigger hysteresis mode

pub fn g6_io4(&self) -> G6_IO4_R[src]

Bit 23 - G6_IO4 Schmitt trigger hysteresis mode

pub fn g7_io1(&self) -> G7_IO1_R[src]

Bit 24 - G7_IO1 Schmitt trigger hysteresis mode

pub fn g7_io2(&self) -> G7_IO2_R[src]

Bit 25 - G7_IO2 Schmitt trigger hysteresis mode

pub fn g7_io3(&self) -> G7_IO3_R[src]

Bit 26 - G7_IO3 Schmitt trigger hysteresis mode

pub fn g7_io4(&self) -> G7_IO4_R[src]

Bit 27 - G7_IO4 Schmitt trigger hysteresis mode

pub fn g8_io1(&self) -> G8_IO1_R[src]

Bit 28 - G8_IO1 Schmitt trigger hysteresis mode

pub fn g8_io2(&self) -> G8_IO2_R[src]

Bit 29 - G8_IO2 Schmitt trigger hysteresis mode

pub fn g8_io3(&self) -> G8_IO3_R[src]

Bit 30 - G8_IO3 Schmitt trigger hysteresis mode

pub fn g8_io4(&self) -> G8_IO4_R[src]

Bit 31 - G8_IO4 Schmitt trigger hysteresis mode

impl R<u32, Reg<u32, _IOASCR>>[src]

pub fn g1_io1(&self) -> G1_IO1_R[src]

Bit 0 - G1_IO1 analog switch enable

pub fn g1_io2(&self) -> G1_IO2_R[src]

Bit 1 - G1_IO2 analog switch enable

pub fn g1_io3(&self) -> G1_IO3_R[src]

Bit 2 - G1_IO3 analog switch enable

pub fn g1_io4(&self) -> G1_IO4_R[src]

Bit 3 - G1_IO4 analog switch enable

pub fn g2_io1(&self) -> G2_IO1_R[src]

Bit 4 - G2_IO1 analog switch enable

pub fn g2_io2(&self) -> G2_IO2_R[src]

Bit 5 - G2_IO2 analog switch enable

pub fn g2_io3(&self) -> G2_IO3_R[src]

Bit 6 - G2_IO3 analog switch enable

pub fn g2_io4(&self) -> G2_IO4_R[src]

Bit 7 - G2_IO4 analog switch enable

pub fn g3_io1(&self) -> G3_IO1_R[src]

Bit 8 - G3_IO1 analog switch enable

pub fn g3_io2(&self) -> G3_IO2_R[src]

Bit 9 - G3_IO2 analog switch enable

pub fn g3_io3(&self) -> G3_IO3_R[src]

Bit 10 - G3_IO3 analog switch enable

pub fn g3_io4(&self) -> G3_IO4_R[src]

Bit 11 - G3_IO4 analog switch enable

pub fn g4_io1(&self) -> G4_IO1_R[src]

Bit 12 - G4_IO1 analog switch enable

pub fn g4_io2(&self) -> G4_IO2_R[src]

Bit 13 - G4_IO2 analog switch enable

pub fn g4_io3(&self) -> G4_IO3_R[src]

Bit 14 - G4_IO3 analog switch enable

pub fn g4_io4(&self) -> G4_IO4_R[src]

Bit 15 - G4_IO4 analog switch enable

pub fn g5_io1(&self) -> G5_IO1_R[src]

Bit 16 - G5_IO1 analog switch enable

pub fn g5_io2(&self) -> G5_IO2_R[src]

Bit 17 - G5_IO2 analog switch enable

pub fn g5_io3(&self) -> G5_IO3_R[src]

Bit 18 - G5_IO3 analog switch enable

pub fn g5_io4(&self) -> G5_IO4_R[src]

Bit 19 - G5_IO4 analog switch enable

pub fn g6_io1(&self) -> G6_IO1_R[src]

Bit 20 - G6_IO1 analog switch enable

pub fn g6_io2(&self) -> G6_IO2_R[src]

Bit 21 - G6_IO2 analog switch enable

pub fn g6_io3(&self) -> G6_IO3_R[src]

Bit 22 - G6_IO3 analog switch enable

pub fn g6_io4(&self) -> G6_IO4_R[src]

Bit 23 - G6_IO4 analog switch enable

pub fn g7_io1(&self) -> G7_IO1_R[src]

Bit 24 - G7_IO1 analog switch enable

pub fn g7_io2(&self) -> G7_IO2_R[src]

Bit 25 - G7_IO2 analog switch enable

pub fn g7_io3(&self) -> G7_IO3_R[src]

Bit 26 - G7_IO3 analog switch enable

pub fn g7_io4(&self) -> G7_IO4_R[src]

Bit 27 - G7_IO4 analog switch enable

pub fn g8_io1(&self) -> G8_IO1_R[src]

Bit 28 - G8_IO1 analog switch enable

pub fn g8_io2(&self) -> G8_IO2_R[src]

Bit 29 - G8_IO2 analog switch enable

pub fn g8_io3(&self) -> G8_IO3_R[src]

Bit 30 - G8_IO3 analog switch enable

pub fn g8_io4(&self) -> G8_IO4_R[src]

Bit 31 - G8_IO4 analog switch enable

impl R<u32, Reg<u32, _IOSCR>>[src]

pub fn g1_io1(&self) -> G1_IO1_R[src]

Bit 0 - G1_IO1 sampling mode

pub fn g1_io2(&self) -> G1_IO2_R[src]

Bit 1 - G1_IO2 sampling mode

pub fn g1_io3(&self) -> G1_IO3_R[src]

Bit 2 - G1_IO3 sampling mode

pub fn g1_io4(&self) -> G1_IO4_R[src]

Bit 3 - G1_IO4 sampling mode

pub fn g2_io1(&self) -> G2_IO1_R[src]

Bit 4 - G2_IO1 sampling mode

pub fn g2_io2(&self) -> G2_IO2_R[src]

Bit 5 - G2_IO2 sampling mode

pub fn g2_io3(&self) -> G2_IO3_R[src]

Bit 6 - G2_IO3 sampling mode

pub fn g2_io4(&self) -> G2_IO4_R[src]

Bit 7 - G2_IO4 sampling mode

pub fn g3_io1(&self) -> G3_IO1_R[src]

Bit 8 - G3_IO1 sampling mode

pub fn g3_io2(&self) -> G3_IO2_R[src]

Bit 9 - G3_IO2 sampling mode

pub fn g3_io3(&self) -> G3_IO3_R[src]

Bit 10 - G3_IO3 sampling mode

pub fn g3_io4(&self) -> G3_IO4_R[src]

Bit 11 - G3_IO4 sampling mode

pub fn g4_io1(&self) -> G4_IO1_R[src]

Bit 12 - G4_IO1 sampling mode

pub fn g4_io2(&self) -> G4_IO2_R[src]

Bit 13 - G4_IO2 sampling mode

pub fn g4_io3(&self) -> G4_IO3_R[src]

Bit 14 - G4_IO3 sampling mode

pub fn g4_io4(&self) -> G4_IO4_R[src]

Bit 15 - G4_IO4 sampling mode

pub fn g5_io1(&self) -> G5_IO1_R[src]

Bit 16 - G5_IO1 sampling mode

pub fn g5_io2(&self) -> G5_IO2_R[src]

Bit 17 - G5_IO2 sampling mode

pub fn g5_io3(&self) -> G5_IO3_R[src]

Bit 18 - G5_IO3 sampling mode

pub fn g5_io4(&self) -> G5_IO4_R[src]

Bit 19 - G5_IO4 sampling mode

pub fn g6_io1(&self) -> G6_IO1_R[src]

Bit 20 - G6_IO1 sampling mode

pub fn g6_io2(&self) -> G6_IO2_R[src]

Bit 21 - G6_IO2 sampling mode

pub fn g6_io3(&self) -> G6_IO3_R[src]

Bit 22 - G6_IO3 sampling mode

pub fn g6_io4(&self) -> G6_IO4_R[src]

Bit 23 - G6_IO4 sampling mode

pub fn g7_io1(&self) -> G7_IO1_R[src]

Bit 24 - G7_IO1 sampling mode

pub fn g7_io2(&self) -> G7_IO2_R[src]

Bit 25 - G7_IO2 sampling mode

pub fn g7_io3(&self) -> G7_IO3_R[src]

Bit 26 - G7_IO3 sampling mode

pub fn g7_io4(&self) -> G7_IO4_R[src]

Bit 27 - G7_IO4 sampling mode

pub fn g8_io1(&self) -> G8_IO1_R[src]

Bit 28 - G8_IO1 sampling mode

pub fn g8_io2(&self) -> G8_IO2_R[src]

Bit 29 - G8_IO2 sampling mode

pub fn g8_io3(&self) -> G8_IO3_R[src]

Bit 30 - G8_IO3 sampling mode

pub fn g8_io4(&self) -> G8_IO4_R[src]

Bit 31 - G8_IO4 sampling mode

impl R<u32, Reg<u32, _IOCCR>>[src]

pub fn g1_io1(&self) -> G1_IO1_R[src]

Bit 0 - G1_IO1 channel mode

pub fn g1_io2(&self) -> G1_IO2_R[src]

Bit 1 - G1_IO2 channel mode

pub fn g1_io3(&self) -> G1_IO3_R[src]

Bit 2 - G1_IO3 channel mode

pub fn g1_io4(&self) -> G1_IO4_R[src]

Bit 3 - G1_IO4 channel mode

pub fn g2_io1(&self) -> G2_IO1_R[src]

Bit 4 - G2_IO1 channel mode

pub fn g2_io2(&self) -> G2_IO2_R[src]

Bit 5 - G2_IO2 channel mode

pub fn g2_io3(&self) -> G2_IO3_R[src]

Bit 6 - G2_IO3 channel mode

pub fn g2_io4(&self) -> G2_IO4_R[src]

Bit 7 - G2_IO4 channel mode

pub fn g3_io1(&self) -> G3_IO1_R[src]

Bit 8 - G3_IO1 channel mode

pub fn g3_io2(&self) -> G3_IO2_R[src]

Bit 9 - G3_IO2 channel mode

pub fn g3_io3(&self) -> G3_IO3_R[src]

Bit 10 - G3_IO3 channel mode

pub fn g3_io4(&self) -> G3_IO4_R[src]

Bit 11 - G3_IO4 channel mode

pub fn g4_io1(&self) -> G4_IO1_R[src]

Bit 12 - G4_IO1 channel mode

pub fn g4_io2(&self) -> G4_IO2_R[src]

Bit 13 - G4_IO2 channel mode

pub fn g4_io3(&self) -> G4_IO3_R[src]

Bit 14 - G4_IO3 channel mode

pub fn g4_io4(&self) -> G4_IO4_R[src]

Bit 15 - G4_IO4 channel mode

pub fn g5_io1(&self) -> G5_IO1_R[src]

Bit 16 - G5_IO1 channel mode

pub fn g5_io2(&self) -> G5_IO2_R[src]

Bit 17 - G5_IO2 channel mode

pub fn g5_io3(&self) -> G5_IO3_R[src]

Bit 18 - G5_IO3 channel mode

pub fn g5_io4(&self) -> G5_IO4_R[src]

Bit 19 - G5_IO4 channel mode

pub fn g6_io1(&self) -> G6_IO1_R[src]

Bit 20 - G6_IO1 channel mode

pub fn g6_io2(&self) -> G6_IO2_R[src]

Bit 21 - G6_IO2 channel mode

pub fn g6_io3(&self) -> G6_IO3_R[src]

Bit 22 - G6_IO3 channel mode

pub fn g6_io4(&self) -> G6_IO4_R[src]

Bit 23 - G6_IO4 channel mode

pub fn g7_io1(&self) -> G7_IO1_R[src]

Bit 24 - G7_IO1 channel mode

pub fn g7_io2(&self) -> G7_IO2_R[src]

Bit 25 - G7_IO2 channel mode

pub fn g7_io3(&self) -> G7_IO3_R[src]

Bit 26 - G7_IO3 channel mode

pub fn g7_io4(&self) -> G7_IO4_R[src]

Bit 27 - G7_IO4 channel mode

pub fn g8_io1(&self) -> G8_IO1_R[src]

Bit 28 - G8_IO1 channel mode

pub fn g8_io2(&self) -> G8_IO2_R[src]

Bit 29 - G8_IO2 channel mode

pub fn g8_io3(&self) -> G8_IO3_R[src]

Bit 30 - G8_IO3 channel mode

pub fn g8_io4(&self) -> G8_IO4_R[src]

Bit 31 - G8_IO4 channel mode

impl R<u32, Reg<u32, _IOGCSR>>[src]

pub fn g8s(&self) -> G8S_R[src]

Bit 23 - Analog I/O group x status

pub fn g7s(&self) -> G7S_R[src]

Bit 22 - Analog I/O group x status

pub fn g6s(&self) -> G6S_R[src]

Bit 21 - Analog I/O group x status

pub fn g5s(&self) -> G5S_R[src]

Bit 20 - Analog I/O group x status

pub fn g4s(&self) -> G4S_R[src]

Bit 19 - Analog I/O group x status

pub fn g3s(&self) -> G3S_R[src]

Bit 18 - Analog I/O group x status

pub fn g2s(&self) -> G2S_R[src]

Bit 17 - Analog I/O group x status

pub fn g1s(&self) -> G1S_R[src]

Bit 16 - Analog I/O group x status

pub fn g8e(&self) -> G8E_R[src]

Bit 7 - Analog I/O group x enable

pub fn g7e(&self) -> G7E_R[src]

Bit 6 - Analog I/O group x enable

pub fn g6e(&self) -> G6E_R[src]

Bit 5 - Analog I/O group x enable

pub fn g5e(&self) -> G5E_R[src]

Bit 4 - Analog I/O group x enable

pub fn g4e(&self) -> G4E_R[src]

Bit 3 - Analog I/O group x enable

pub fn g3e(&self) -> G3E_R[src]

Bit 2 - Analog I/O group x enable

pub fn g2e(&self) -> G2E_R[src]

Bit 1 - Analog I/O group x enable

pub fn g1e(&self) -> G1E_R[src]

Bit 0 - Analog I/O group x enable

impl R<u32, Reg<u32, _IOGCR>>[src]

pub fn cnt(&self) -> CNT_R[src]

Bits 0:13 - Counter value

impl R<u32, Reg<u32, _DR>>[src]

pub fn dr(&self) -> DR_R[src]

Bits 0:31 - Data register bits

impl R<u32, Reg<u32, _IDR>>[src]

pub fn idr(&self) -> IDR_R[src]

Bits 0:7 - General-purpose 8-bit data register bits

impl R<bool, RESET_A>[src]

pub fn variant(&self) -> Variant<bool, RESET_A>[src]

Get enumerated values variant

pub fn is_reset(&self) -> bool[src]

Checks if the value of the field is RESET

impl R<u32, Reg<u32, _CR>>[src]

pub fn reset(&self) -> RESET_R[src]

Bit 0 - reset bit

pub fn rev_in(&self) -> REV_IN_R[src]

Bits 5:6 - Reverse input data

pub fn rev_out(&self) -> REV_OUT_R[src]

Bit 7 - Reverse output data

pub fn polysize(&self) -> POLYSIZE_R[src]

Bits 3:4 - Polynomial size

impl R<u32, Reg<u32, _INIT>>[src]

pub fn init(&self) -> INIT_R[src]

Bits 0:31 - Programmable initial CRC value

impl R<u32, Reg<u32, _POL>>[src]

pub fn pol(&self) -> POL_R[src]

Bits 0:31 - Programmable polynomial

impl R<u32, Reg<u32, _ACR>>[src]

pub fn latency(&self) -> LATENCY_R[src]

Bits 0:2 - LATENCY

pub fn prftbe(&self) -> PRFTBE_R[src]

Bit 4 - PRFTBE

pub fn prftbs(&self) -> PRFTBS_R[src]

Bit 5 - PRFTBS

impl R<u32, Reg<u32, _SR>>[src]

pub fn eop(&self) -> EOP_R[src]

Bit 5 - End of operation

pub fn wrprt(&self) -> WRPRT_R[src]

Bit 4 - Write protection error

pub fn pgerr(&self) -> PGERR_R[src]

Bit 2 - Programming error

pub fn bsy(&self) -> BSY_R[src]

Bit 0 - Busy

impl R<u32, Reg<u32, _CR>>[src]

pub fn force_optload(&self) -> FORCE_OPTLOAD_R[src]

Bit 13 - Force option byte loading

pub fn eopie(&self) -> EOPIE_R[src]

Bit 12 - End of operation interrupt enable

pub fn errie(&self) -> ERRIE_R[src]

Bit 10 - Error interrupt enable

pub fn optwre(&self) -> OPTWRE_R[src]

Bit 9 - Option bytes write enable

pub fn lock(&self) -> LOCK_R[src]

Bit 7 - Lock

pub fn strt(&self) -> STRT_R[src]

Bit 6 - Start

pub fn opter(&self) -> OPTER_R[src]

Bit 5 - Option byte erase

pub fn optpg(&self) -> OPTPG_R[src]

Bit 4 - Option byte programming

pub fn mer(&self) -> MER_R[src]

Bit 2 - Mass erase

pub fn per(&self) -> PER_R[src]

Bit 1 - Page erase

pub fn pg(&self) -> PG_R[src]

Bit 0 - Programming

impl R<u32, Reg<u32, _OBR>>[src]

pub fn opterr(&self) -> OPTERR_R[src]

Bit 0 - Option byte error

pub fn level1_prot(&self) -> LEVEL1_PROT_R[src]

Bit 1 - Level 1 protection status

pub fn level2_prot(&self) -> LEVEL2_PROT_R[src]

Bit 2 - Level 2 protection status

pub fn wdg_sw(&self) -> WDG_SW_R[src]

Bit 8 - WDG_SW

pub fn n_rst_stop(&self) -> NRST_STOP_R[src]

Bit 9 - nRST_STOP

pub fn n_rst_stdby(&self) -> NRST_STDBY_R[src]

Bit 10 - nRST_STDBY

pub fn boot1(&self) -> BOOT1_R[src]

Bit 12 - BOOT1

pub fn vdda_monitor(&self) -> VDDA_MONITOR_R[src]

Bit 13 - VDDA_MONITOR

pub fn sram_parity_check(&self) -> SRAM_PARITY_CHECK_R[src]

Bit 14 - SRAM_PARITY_CHECK

pub fn sdadc12_vdd_monitor(&self) -> SDADC12_VDD_MONITOR_R[src]

Bit 15 - SDADC12_VDD_MONITOR

pub fn data0(&self) -> DATA0_R[src]

Bits 16:23 - Data0

pub fn data1(&self) -> DATA1_R[src]

Bits 24:31 - Data1

impl R<u32, Reg<u32, _WRPR>>[src]

pub fn wrp(&self) -> WRP_R[src]

Bits 0:31 - Write protect

impl R<bool, HSION_A>[src]

pub fn variant(&self) -> HSION_A[src]

Get enumerated values variant

pub fn is_off(&self) -> bool[src]

Checks if the value of the field is OFF

pub fn is_on(&self) -> bool[src]

Checks if the value of the field is ON

impl R<bool, HSIRDY_A>[src]

pub fn variant(&self) -> HSIRDY_A[src]

Get enumerated values variant

pub fn is_not_ready(&self) -> bool[src]

Checks if the value of the field is NOTREADY

pub fn is_ready(&self) -> bool[src]

Checks if the value of the field is READY

impl R<bool, HSEBYP_A>[src]

pub fn variant(&self) -> HSEBYP_A[src]

Get enumerated values variant

pub fn is_not_bypassed(&self) -> bool[src]

Checks if the value of the field is NOTBYPASSED

pub fn is_bypassed(&self) -> bool[src]

Checks if the value of the field is BYPASSED

impl R<bool, CSSON_A>[src]

pub fn variant(&self) -> CSSON_A[src]

Get enumerated values variant

pub fn is_off(&self) -> bool[src]

Checks if the value of the field is OFF

pub fn is_on(&self) -> bool[src]

Checks if the value of the field is ON

impl R<u32, Reg<u32, _CR>>[src]

pub fn hsion(&self) -> HSION_R[src]

Bit 0 - Internal High Speed clock enable

pub fn hsirdy(&self) -> HSIRDY_R[src]

Bit 1 - Internal High Speed clock ready flag

pub fn hsitrim(&self) -> HSITRIM_R[src]

Bits 3:7 - Internal High Speed clock trimming

pub fn hsical(&self) -> HSICAL_R[src]

Bits 8:15 - Internal High Speed clock Calibration

pub fn hseon(&self) -> HSEON_R[src]

Bit 16 - External High Speed clock enable

pub fn hserdy(&self) -> HSERDY_R[src]

Bit 17 - External High Speed clock ready flag

pub fn hsebyp(&self) -> HSEBYP_R[src]

Bit 18 - External High Speed clock Bypass

pub fn csson(&self) -> CSSON_R[src]

Bit 19 - Clock Security System enable

pub fn pllon(&self) -> PLLON_R[src]

Bit 24 - PLL enable

pub fn pllrdy(&self) -> PLLRDY_R[src]

Bit 25 - PLL clock ready flag

impl R<u8, SW_A>[src]

pub fn variant(&self) -> Variant<u8, SW_A>[src]

Get enumerated values variant

pub fn is_hsi(&self) -> bool[src]

Checks if the value of the field is HSI

pub fn is_hse(&self) -> bool[src]

Checks if the value of the field is HSE

pub fn is_pll(&self) -> bool[src]

Checks if the value of the field is PLL

impl R<u8, SWS_A>[src]

pub fn variant(&self) -> Variant<u8, SWS_A>[src]

Get enumerated values variant

pub fn is_hsi(&self) -> bool[src]

Checks if the value of the field is HSI

pub fn is_hse(&self) -> bool[src]

Checks if the value of the field is HSE

pub fn is_pll(&self) -> bool[src]

Checks if the value of the field is PLL

impl R<u8, HPRE_A>[src]

pub fn variant(&self) -> Variant<u8, HPRE_A>[src]

Get enumerated values variant

pub fn is_div1(&self) -> bool[src]

Checks if the value of the field is DIV1

pub fn is_div2(&self) -> bool[src]

Checks if the value of the field is DIV2

pub fn is_div4(&self) -> bool[src]

Checks if the value of the field is DIV4

pub fn is_div8(&self) -> bool[src]

Checks if the value of the field is DIV8

pub fn is_div16(&self) -> bool[src]

Checks if the value of the field is DIV16

pub fn is_div64(&self) -> bool[src]

Checks if the value of the field is DIV64

pub fn is_div128(&self) -> bool[src]

Checks if the value of the field is DIV128

pub fn is_div256(&self) -> bool[src]

Checks if the value of the field is DIV256

pub fn is_div512(&self) -> bool[src]

Checks if the value of the field is DIV512

impl R<u8, PPRE1_A>[src]

pub fn variant(&self) -> Variant<u8, PPRE1_A>[src]

Get enumerated values variant

pub fn is_div1(&self) -> bool[src]

Checks if the value of the field is DIV1

pub fn is_div2(&self) -> bool[src]

Checks if the value of the field is DIV2

pub fn is_div4(&self) -> bool[src]

Checks if the value of the field is DIV4

pub fn is_div8(&self) -> bool[src]

Checks if the value of the field is DIV8

pub fn is_div16(&self) -> bool[src]

Checks if the value of the field is DIV16

impl R<u8, PLLSRC_A>[src]

pub fn variant(&self) -> Variant<u8, PLLSRC_A>[src]

Get enumerated values variant

pub fn is_hsi_div2(&self) -> bool[src]

Checks if the value of the field is HSI_DIV2

pub fn is_hsi_div_prediv(&self) -> bool[src]

Checks if the value of the field is HSI_DIV_PREDIV

pub fn is_hse_div_prediv(&self) -> bool[src]

Checks if the value of the field is HSE_DIV_PREDIV

impl R<bool, PLLXTPRE_A>[src]

pub fn variant(&self) -> PLLXTPRE_A[src]

Get enumerated values variant

pub fn is_div1(&self) -> bool[src]

Checks if the value of the field is DIV1

pub fn is_div2(&self) -> bool[src]

Checks if the value of the field is DIV2

impl R<u8, PLLMUL_A>[src]

pub fn variant(&self) -> PLLMUL_A[src]

Get enumerated values variant

pub fn is_mul2(&self) -> bool[src]

Checks if the value of the field is MUL2

pub fn is_mul3(&self) -> bool[src]

Checks if the value of the field is MUL3

pub fn is_mul4(&self) -> bool[src]

Checks if the value of the field is MUL4

pub fn is_mul5(&self) -> bool[src]

Checks if the value of the field is MUL5

pub fn is_mul6(&self) -> bool[src]

Checks if the value of the field is MUL6

pub fn is_mul7(&self) -> bool[src]

Checks if the value of the field is MUL7

pub fn is_mul8(&self) -> bool[src]

Checks if the value of the field is MUL8

pub fn is_mul9(&self) -> bool[src]

Checks if the value of the field is MUL9

pub fn is_mul10(&self) -> bool[src]

Checks if the value of the field is MUL10

pub fn is_mul11(&self) -> bool[src]

Checks if the value of the field is MUL11

pub fn is_mul12(&self) -> bool[src]

Checks if the value of the field is MUL12

pub fn is_mul13(&self) -> bool[src]

Checks if the value of the field is MUL13

pub fn is_mul14(&self) -> bool[src]

Checks if the value of the field is MUL14

pub fn is_mul15(&self) -> bool[src]

Checks if the value of the field is MUL15

pub fn is_mul16(&self) -> bool[src]

Checks if the value of the field is MUL16

pub fn is_mul16x(&self) -> bool[src]

Checks if the value of the field is MUL16X

impl R<bool, USBPRE_A>[src]

pub fn variant(&self) -> USBPRE_A[src]

Get enumerated values variant

pub fn is_div1_5(&self) -> bool[src]

Checks if the value of the field is DIV1_5

pub fn is_div1(&self) -> bool[src]

Checks if the value of the field is DIV1

impl R<u8, MCO_A>[src]

pub fn variant(&self) -> Variant<u8, MCO_A>[src]

Get enumerated values variant

pub fn is_no_mco(&self) -> bool[src]

Checks if the value of the field is NOMCO

pub fn is_lsi(&self) -> bool[src]

Checks if the value of the field is LSI

pub fn is_lse(&self) -> bool[src]

Checks if the value of the field is LSE

pub fn is_sysclk(&self) -> bool[src]

Checks if the value of the field is SYSCLK

pub fn is_hsi(&self) -> bool[src]

Checks if the value of the field is HSI

pub fn is_hse(&self) -> bool[src]

Checks if the value of the field is HSE

pub fn is_pll(&self) -> bool[src]

Checks if the value of the field is PLL

impl R<bool, I2SSRC_A>[src]

pub fn variant(&self) -> I2SSRC_A[src]

Get enumerated values variant

pub fn is_sysclk(&self) -> bool[src]

Checks if the value of the field is SYSCLK

pub fn is_ckin(&self) -> bool[src]

Checks if the value of the field is CKIN

impl R<u8, MCOPRE_A>[src]

pub fn variant(&self) -> MCOPRE_A[src]

Get enumerated values variant

pub fn is_div1(&self) -> bool[src]

Checks if the value of the field is DIV1

pub fn is_div2(&self) -> bool[src]

Checks if the value of the field is DIV2

pub fn is_div4(&self) -> bool[src]

Checks if the value of the field is DIV4

pub fn is_div8(&self) -> bool[src]

Checks if the value of the field is DIV8

pub fn is_div16(&self) -> bool[src]

Checks if the value of the field is DIV16

pub fn is_div32(&self) -> bool[src]

Checks if the value of the field is DIV32

pub fn is_div64(&self) -> bool[src]

Checks if the value of the field is DIV64

pub fn is_div128(&self) -> bool[src]

Checks if the value of the field is DIV128

impl R<bool, PLLNODIV_A>[src]

pub fn variant(&self) -> PLLNODIV_A[src]

Get enumerated values variant

pub fn is_div2(&self) -> bool[src]

Checks if the value of the field is DIV2

pub fn is_div1(&self) -> bool[src]

Checks if the value of the field is DIV1

impl R<u32, Reg<u32, _CFGR>>[src]

pub fn sw(&self) -> SW_R[src]

Bits 0:1 - System clock Switch

pub fn sws(&self) -> SWS_R[src]

Bits 2:3 - System Clock Switch Status

pub fn hpre(&self) -> HPRE_R[src]

Bits 4:7 - AHB prescaler

pub fn ppre1(&self) -> PPRE1_R[src]

Bits 8:10 - APB Low speed prescaler (APB1)

pub fn ppre2(&self) -> PPRE2_R[src]

Bits 11:13 - APB high speed prescaler (APB2)

pub fn pllsrc(&self) -> PLLSRC_R[src]

Bits 15:16 - PLL entry clock source

pub fn pllxtpre(&self) -> PLLXTPRE_R[src]

Bit 17 - HSE divider for PLL entry

pub fn pllmul(&self) -> PLLMUL_R[src]

Bits 18:21 - PLL Multiplication Factor

pub fn usbpre(&self) -> USBPRE_R[src]

Bit 22 - USB prescaler

pub fn mco(&self) -> MCO_R[src]

Bits 24:26 - Microcontroller clock output

pub fn i2ssrc(&self) -> I2SSRC_R[src]

Bit 23 - I2S external clock source selection

pub fn mcopre(&self) -> MCOPRE_R[src]

Bits 28:30 - Microcontroller Clock Output Prescaler

pub fn pllnodiv(&self) -> PLLNODIV_R[src]

Bit 31 - Do not divide PLL to MCO

impl R<bool, LSIRDYF_A>[src]

pub fn variant(&self) -> LSIRDYF_A[src]

Get enumerated values variant

pub fn is_not_interrupted(&self) -> bool[src]

Checks if the value of the field is NOTINTERRUPTED

pub fn is_interrupted(&self) -> bool[src]

Checks if the value of the field is INTERRUPTED

impl R<bool, CSSF_A>[src]

pub fn variant(&self) -> CSSF_A[src]

Get enumerated values variant

pub fn is_not_interrupted(&self) -> bool[src]

Checks if the value of the field is NOTINTERRUPTED

pub fn is_interrupted(&self) -> bool[src]

Checks if the value of the field is INTERRUPTED

impl R<bool, LSIRDYIE_A>[src]

pub fn variant(&self) -> LSIRDYIE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u32, Reg<u32, _CIR>>[src]

pub fn lsirdyf(&self) -> LSIRDYF_R[src]

Bit 0 - LSI Ready Interrupt flag

pub fn lserdyf(&self) -> LSERDYF_R[src]

Bit 1 - LSE Ready Interrupt flag

pub fn hsirdyf(&self) -> HSIRDYF_R[src]

Bit 2 - HSI Ready Interrupt flag

pub fn hserdyf(&self) -> HSERDYF_R[src]

Bit 3 - HSE Ready Interrupt flag

pub fn pllrdyf(&self) -> PLLRDYF_R[src]

Bit 4 - PLL Ready Interrupt flag

pub fn cssf(&self) -> CSSF_R[src]

Bit 7 - Clock Security System Interrupt flag

pub fn lsirdyie(&self) -> LSIRDYIE_R[src]

Bit 8 - LSI Ready Interrupt Enable

pub fn lserdyie(&self) -> LSERDYIE_R[src]

Bit 9 - LSE Ready Interrupt Enable

pub fn hsirdyie(&self) -> HSIRDYIE_R[src]

Bit 10 - HSI Ready Interrupt Enable

pub fn hserdyie(&self) -> HSERDYIE_R[src]

Bit 11 - HSE Ready Interrupt Enable

pub fn pllrdyie(&self) -> PLLRDYIE_R[src]

Bit 12 - PLL Ready Interrupt Enable

impl R<bool, SYSCFGRST_A>[src]

pub fn variant(&self) -> Variant<bool, SYSCFGRST_A>[src]

Get enumerated values variant

pub fn is_reset(&self) -> bool[src]

Checks if the value of the field is RESET

impl R<u32, Reg<u32, _APB2RSTR>>[src]

pub fn syscfgrst(&self) -> SYSCFGRST_R[src]

Bit 0 - SYSCFG and COMP reset

pub fn spi1rst(&self) -> SPI1RST_R[src]

Bit 12 - SPI 1 reset

pub fn usart1rst(&self) -> USART1RST_R[src]

Bit 14 - USART1 reset

pub fn tim15rst(&self) -> TIM15RST_R[src]

Bit 16 - TIM15 timer reset

pub fn tim16rst(&self) -> TIM16RST_R[src]

Bit 17 - TIM16 timer reset

pub fn tim17rst(&self) -> TIM17RST_R[src]

Bit 18 - TIM17 timer reset

pub fn tim1rst(&self) -> TIM1RST_R[src]

Bit 11 - TIM1 timer reset

pub fn tim8rst(&self) -> TIM8RST_R[src]

Bit 13 - TIM8 timer reset

pub fn spi4rst(&self) -> SPI4RST_R[src]

Bit 15 - SPI4 reset

pub fn tim20rst(&self) -> TIM20RST_R[src]

Bit 20 - TIM20 timer reset

impl R<bool, TIM2RST_A>[src]

pub fn variant(&self) -> Variant<bool, TIM2RST_A>[src]

Get enumerated values variant

pub fn is_reset(&self) -> bool[src]

Checks if the value of the field is RESET

impl R<u32, Reg<u32, _APB1RSTR>>[src]

pub fn tim2rst(&self) -> TIM2RST_R[src]

Bit 0 - Timer 2 reset

pub fn tim3rst(&self) -> TIM3RST_R[src]

Bit 1 - Timer 3 reset

pub fn tim4rst(&self) -> TIM4RST_R[src]

Bit 2 - Timer 14 reset

pub fn tim6rst(&self) -> TIM6RST_R[src]

Bit 4 - Timer 6 reset

pub fn tim7rst(&self) -> TIM7RST_R[src]

Bit 5 - Timer 7 reset

pub fn wwdgrst(&self) -> WWDGRST_R[src]

Bit 11 - Window watchdog reset

pub fn spi2rst(&self) -> SPI2RST_R[src]

Bit 14 - SPI2 reset

pub fn spi3rst(&self) -> SPI3RST_R[src]

Bit 15 - SPI3 reset

pub fn usart2rst(&self) -> USART2RST_R[src]

Bit 17 - USART 2 reset

pub fn usart3rst(&self) -> USART3RST_R[src]

Bit 18 - USART3 reset

pub fn i2c1rst(&self) -> I2C1RST_R[src]

Bit 21 - I2C1 reset

pub fn i2c2rst(&self) -> I2C2RST_R[src]

Bit 22 - I2C2 reset

pub fn usbrst(&self) -> USBRST_R[src]

Bit 23 - USB reset

pub fn canrst(&self) -> CANRST_R[src]

Bit 25 - CAN reset

pub fn dac2rst(&self) -> DAC2RST_R[src]

Bit 26 - DAC3 reset

pub fn pwrrst(&self) -> PWRRST_R[src]

Bit 28 - Power interface reset

pub fn dac1rst(&self) -> DAC1RST_R[src]

Bit 29 - DAC interface reset

pub fn uart4rst(&self) -> UART4RST_R[src]

Bit 19 - UART4 reset

pub fn uart5rst(&self) -> UART5RST_R[src]

Bit 20 - UART5 reset

pub fn i2c3rst(&self) -> I2C3RST_R[src]

Bit 30 - I2C3 reset

impl R<bool, DMA1EN_A>[src]

pub fn variant(&self) -> DMA1EN_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u32, Reg<u32, _AHBENR>>[src]

pub fn dma1en(&self) -> DMA1EN_R[src]

Bit 0 - DMA1 clock enable

pub fn dma2en(&self) -> DMA2EN_R[src]

Bit 1 - DMA2 clock enable

pub fn sramen(&self) -> SRAMEN_R[src]

Bit 2 - SRAM interface clock enable

pub fn flitfen(&self) -> FLITFEN_R[src]

Bit 4 - FLITF clock enable

pub fn crcen(&self) -> CRCEN_R[src]

Bit 6 - CRC clock enable

pub fn iopaen(&self) -> IOPAEN_R[src]

Bit 17 - I/O port A clock enable

pub fn iopben(&self) -> IOPBEN_R[src]

Bit 18 - I/O port B clock enable

pub fn iopcen(&self) -> IOPCEN_R[src]

Bit 19 - I/O port C clock enable

pub fn iopden(&self) -> IOPDEN_R[src]

Bit 20 - I/O port D clock enable

pub fn iopeen(&self) -> IOPEEN_R[src]

Bit 21 - I/O port E clock enable

pub fn iopfen(&self) -> IOPFEN_R[src]

Bit 22 - I/O port F clock enable

pub fn tscen(&self) -> TSCEN_R[src]

Bit 24 - Touch sensing controller clock enable

pub fn adc12en(&self) -> ADC12EN_R[src]

Bit 28 - ADC1 and ADC2 enable

pub fn adc34en(&self) -> ADC34EN_R[src]

Bit 29 - ADC3 and ADC4 enable

impl R<bool, SYSCFGEN_A>[src]

pub fn variant(&self) -> SYSCFGEN_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u32, Reg<u32, _APB2ENR>>[src]

pub fn syscfgen(&self) -> SYSCFGEN_R[src]

Bit 0 - SYSCFG clock enable

pub fn tim1en(&self) -> TIM1EN_R[src]

Bit 11 - TIM1 Timer clock enable

pub fn spi1en(&self) -> SPI1EN_R[src]

Bit 12 - SPI 1 clock enable

pub fn usart1en(&self) -> USART1EN_R[src]

Bit 14 - USART1 clock enable

pub fn tim15en(&self) -> TIM15EN_R[src]

Bit 16 - TIM15 timer clock enable

pub fn tim16en(&self) -> TIM16EN_R[src]

Bit 17 - TIM16 timer clock enable

pub fn tim17en(&self) -> TIM17EN_R[src]

Bit 18 - TIM17 timer clock enable

pub fn tim8en(&self) -> TIM8EN_R[src]

Bit 13 - TIM8 timer clock enable

pub fn spi4en(&self) -> SPI4EN_R[src]

Bit 15 - SPI4 clock enable

pub fn tim20en(&self) -> TIM20EN_R[src]

Bit 20 - TIM20 timer clock enable

impl R<bool, TIM2EN_A>[src]

pub fn variant(&self) -> TIM2EN_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u32, Reg<u32, _APB1ENR>>[src]

pub fn tim2en(&self) -> TIM2EN_R[src]

Bit 0 - Timer 2 clock enable

pub fn tim3en(&self) -> TIM3EN_R[src]

Bit 1 - Timer 3 clock enable

pub fn tim4en(&self) -> TIM4EN_R[src]

Bit 2 - Timer 4 clock enable

pub fn tim6en(&self) -> TIM6EN_R[src]

Bit 4 - Timer 6 clock enable

pub fn tim7en(&self) -> TIM7EN_R[src]

Bit 5 - Timer 7 clock enable

pub fn wwdgen(&self) -> WWDGEN_R[src]

Bit 11 - Window watchdog clock enable

pub fn spi2en(&self) -> SPI2EN_R[src]

Bit 14 - SPI 2 clock enable

pub fn spi3en(&self) -> SPI3EN_R[src]

Bit 15 - SPI 3 clock enable

pub fn usart2en(&self) -> USART2EN_R[src]

Bit 17 - USART 2 clock enable

pub fn usart3en(&self) -> USART3EN_R[src]

Bit 18 - USART 3 clock enable

pub fn i2c1en(&self) -> I2C1EN_R[src]

Bit 21 - I2C 1 clock enable

pub fn i2c2en(&self) -> I2C2EN_R[src]

Bit 22 - I2C 2 clock enable

pub fn usben(&self) -> USBEN_R[src]

Bit 23 - USB clock enable

pub fn canen(&self) -> CANEN_R[src]

Bit 25 - CAN clock enable

pub fn dac2en(&self) -> DAC2EN_R[src]

Bit 26 - DAC3 interface clock enable

pub fn pwren(&self) -> PWREN_R[src]

Bit 28 - Power interface clock enable

pub fn dac1en(&self) -> DAC1EN_R[src]

Bit 29 - DAC interface clock enable

pub fn uart4en(&self) -> UART4EN_R[src]

Bit 19 - UART4 clock enable

pub fn uart5en(&self) -> UART5EN_R[src]

Bit 20 - UART5 clock enable

pub fn i2c3en(&self) -> I2C3EN_R[src]

Bit 30 - I2C3 clock enable

impl R<bool, LSEON_A>[src]

pub fn variant(&self) -> LSEON_A[src]

Get enumerated values variant

pub fn is_off(&self) -> bool[src]

Checks if the value of the field is OFF

pub fn is_on(&self) -> bool[src]

Checks if the value of the field is ON

impl R<bool, LSERDY_A>[src]

pub fn variant(&self) -> LSERDY_A[src]

Get enumerated values variant

pub fn is_not_ready(&self) -> bool[src]

Checks if the value of the field is NOTREADY

pub fn is_ready(&self) -> bool[src]

Checks if the value of the field is READY

impl R<bool, LSEBYP_A>[src]

pub fn variant(&self) -> LSEBYP_A[src]

Get enumerated values variant

pub fn is_not_bypassed(&self) -> bool[src]

Checks if the value of the field is NOTBYPASSED

pub fn is_bypassed(&self) -> bool[src]

Checks if the value of the field is BYPASSED

impl R<u8, LSEDRV_A>[src]

pub fn variant(&self) -> LSEDRV_A[src]

Get enumerated values variant

pub fn is_low(&self) -> bool[src]

Checks if the value of the field is LOW

pub fn is_medium_high(&self) -> bool[src]

Checks if the value of the field is MEDIUMHIGH

pub fn is_medium_low(&self) -> bool[src]

Checks if the value of the field is MEDIUMLOW

pub fn is_high(&self) -> bool[src]

Checks if the value of the field is HIGH

impl R<u8, RTCSEL_A>[src]

pub fn variant(&self) -> RTCSEL_A[src]

Get enumerated values variant

pub fn is_no_clock(&self) -> bool[src]

Checks if the value of the field is NOCLOCK

pub fn is_lse(&self) -> bool[src]

Checks if the value of the field is LSE

pub fn is_lsi(&self) -> bool[src]

Checks if the value of the field is LSI

pub fn is_hse(&self) -> bool[src]

Checks if the value of the field is HSE

impl R<bool, RTCEN_A>[src]

pub fn variant(&self) -> RTCEN_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, BDRST_A>[src]

pub fn variant(&self) -> BDRST_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u32, Reg<u32, _BDCR>>[src]

pub fn lseon(&self) -> LSEON_R[src]

Bit 0 - External Low Speed oscillator enable

pub fn lserdy(&self) -> LSERDY_R[src]

Bit 1 - External Low Speed oscillator ready

pub fn lsebyp(&self) -> LSEBYP_R[src]

Bit 2 - External Low Speed oscillator bypass

pub fn lsedrv(&self) -> LSEDRV_R[src]

Bits 3:4 - LSE oscillator drive capability

pub fn rtcsel(&self) -> RTCSEL_R[src]

Bits 8:9 - RTC clock source selection

pub fn rtcen(&self) -> RTCEN_R[src]

Bit 15 - RTC clock enable

pub fn bdrst(&self) -> BDRST_R[src]

Bit 16 - Backup domain software reset

impl R<bool, LSION_A>[src]

pub fn variant(&self) -> LSION_A[src]

Get enumerated values variant

pub fn is_off(&self) -> bool[src]

Checks if the value of the field is OFF

pub fn is_on(&self) -> bool[src]

Checks if the value of the field is ON

impl R<bool, LSIRDY_A>[src]

pub fn variant(&self) -> LSIRDY_A[src]

Get enumerated values variant

pub fn is_not_ready(&self) -> bool[src]

Checks if the value of the field is NOTREADY

pub fn is_ready(&self) -> bool[src]

Checks if the value of the field is READY

impl R<bool, RMVF_A>[src]

pub fn variant(&self) -> Variant<bool, RMVF_A>[src]

Get enumerated values variant

pub fn is_clear(&self) -> bool[src]

Checks if the value of the field is CLEAR

impl R<bool, OBLRSTF_A>[src]

pub fn variant(&self) -> OBLRSTF_A[src]

Get enumerated values variant

pub fn is_no_reset(&self) -> bool[src]

Checks if the value of the field is NORESET

pub fn is_reset(&self) -> bool[src]

Checks if the value of the field is RESET

impl R<u32, Reg<u32, _CSR>>[src]

pub fn lsion(&self) -> LSION_R[src]

Bit 0 - Internal low speed oscillator enable

pub fn lsirdy(&self) -> LSIRDY_R[src]

Bit 1 - Internal low speed oscillator ready

pub fn rmvf(&self) -> RMVF_R[src]

Bit 24 - Remove reset flag

pub fn oblrstf(&self) -> OBLRSTF_R[src]

Bit 25 - Option byte loader reset flag

pub fn pinrstf(&self) -> PINRSTF_R[src]

Bit 26 - PIN reset flag

pub fn porrstf(&self) -> PORRSTF_R[src]

Bit 27 - POR/PDR reset flag

pub fn sftrstf(&self) -> SFTRSTF_R[src]

Bit 28 - Software reset flag

pub fn iwdgrstf(&self) -> IWDGRSTF_R[src]

Bit 29 - Independent watchdog reset flag

pub fn wwdgrstf(&self) -> WWDGRSTF_R[src]

Bit 30 - Window watchdog reset flag

pub fn lpwrrstf(&self) -> LPWRRSTF_R[src]

Bit 31 - Low-power reset flag

pub fn v18pwrrstf(&self) -> V18PWRRSTF_R[src]

Bit 23 - Reset flag of the 1.8 V domain

impl R<bool, IOPARST_A>[src]

pub fn variant(&self) -> Variant<bool, IOPARST_A>[src]

Get enumerated values variant

pub fn is_reset(&self) -> bool[src]

Checks if the value of the field is RESET

impl R<u32, Reg<u32, _AHBRSTR>>[src]

pub fn ioparst(&self) -> IOPARST_R[src]

Bit 17 - I/O port A reset

pub fn iopbrst(&self) -> IOPBRST_R[src]

Bit 18 - I/O port B reset

pub fn iopcrst(&self) -> IOPCRST_R[src]

Bit 19 - I/O port C reset

pub fn iopdrst(&self) -> IOPDRST_R[src]

Bit 20 - I/O port D reset

pub fn ioperst(&self) -> IOPERST_R[src]

Bit 21 - I/O port E reset

pub fn iopfrst(&self) -> IOPFRST_R[src]

Bit 22 - I/O port F reset

pub fn tscrst(&self) -> TSCRST_R[src]

Bit 24 - Touch sensing controller reset

pub fn adc12rst(&self) -> ADC12RST_R[src]

Bit 28 - ADC1 and ADC2 reset

pub fn adc34rst(&self) -> ADC34RST_R[src]

Bit 29 - ADC3 and ADC4 reset

impl R<u8, PREDIV_A>[src]

pub fn variant(&self) -> PREDIV_A[src]

Get enumerated values variant

pub fn is_div1(&self) -> bool[src]

Checks if the value of the field is DIV1

pub fn is_div2(&self) -> bool[src]

Checks if the value of the field is DIV2

pub fn is_div3(&self) -> bool[src]

Checks if the value of the field is DIV3

pub fn is_div4(&self) -> bool[src]

Checks if the value of the field is DIV4

pub fn is_div5(&self) -> bool[src]

Checks if the value of the field is DIV5

pub fn is_div6(&self) -> bool[src]

Checks if the value of the field is DIV6

pub fn is_div7(&self) -> bool[src]

Checks if the value of the field is DIV7

pub fn is_div8(&self) -> bool[src]

Checks if the value of the field is DIV8

pub fn is_div9(&self) -> bool[src]

Checks if the value of the field is DIV9

pub fn is_div10(&self) -> bool[src]

Checks if the value of the field is DIV10

pub fn is_div11(&self) -> bool[src]

Checks if the value of the field is DIV11

pub fn is_div12(&self) -> bool[src]

Checks if the value of the field is DIV12

pub fn is_div13(&self) -> bool[src]

Checks if the value of the field is DIV13

pub fn is_div14(&self) -> bool[src]

Checks if the value of the field is DIV14

pub fn is_div15(&self) -> bool[src]

Checks if the value of the field is DIV15

pub fn is_div16(&self) -> bool[src]

Checks if the value of the field is DIV16

impl R<u8, ADC12PRES_A>[src]

pub fn variant(&self) -> Variant<u8, ADC12PRES_A>[src]

Get enumerated values variant

pub fn is_no_clock(&self) -> bool[src]

Checks if the value of the field is NOCLOCK

pub fn is_div1(&self) -> bool[src]

Checks if the value of the field is DIV1

pub fn is_div2(&self) -> bool[src]

Checks if the value of the field is DIV2

pub fn is_div4(&self) -> bool[src]

Checks if the value of the field is DIV4

pub fn is_div6(&self) -> bool[src]

Checks if the value of the field is DIV6

pub fn is_div8(&self) -> bool[src]

Checks if the value of the field is DIV8

pub fn is_div10(&self) -> bool[src]

Checks if the value of the field is DIV10

pub fn is_div12(&self) -> bool[src]

Checks if the value of the field is DIV12

pub fn is_div16(&self) -> bool[src]

Checks if the value of the field is DIV16

pub fn is_div32(&self) -> bool[src]

Checks if the value of the field is DIV32

pub fn is_div64(&self) -> bool[src]

Checks if the value of the field is DIV64

pub fn is_div128(&self) -> bool[src]

Checks if the value of the field is DIV128

pub fn is_div256(&self) -> bool[src]

Checks if the value of the field is DIV256

impl R<u32, Reg<u32, _CFGR2>>[src]

pub fn prediv(&self) -> PREDIV_R[src]

Bits 0:3 - PREDIV division factor

pub fn adc12pres(&self) -> ADC12PRES_R[src]

Bits 4:8 - ADC1 and ADC2 reset

pub fn adc34pres(&self) -> ADC34PRES_R[src]

Bits 9:13 - ADC3 and ADC4 reset

impl R<u8, USART1SW_A>[src]

pub fn variant(&self) -> USART1SW_A[src]

Get enumerated values variant

pub fn is_pclk(&self) -> bool[src]

Checks if the value of the field is PCLK

pub fn is_sysclk(&self) -> bool[src]

Checks if the value of the field is SYSCLK

pub fn is_lse(&self) -> bool[src]

Checks if the value of the field is LSE

pub fn is_hsi(&self) -> bool[src]

Checks if the value of the field is HSI

impl R<bool, I2C1SW_A>[src]

pub fn variant(&self) -> I2C1SW_A[src]

Get enumerated values variant

pub fn is_hsi(&self) -> bool[src]

Checks if the value of the field is HSI

pub fn is_sysclk(&self) -> bool[src]

Checks if the value of the field is SYSCLK

impl R<bool, TIM1SW_A>[src]

pub fn variant(&self) -> TIM1SW_A[src]

Get enumerated values variant

pub fn is_pclk2(&self) -> bool[src]

Checks if the value of the field is PCLK2

pub fn is_pll(&self) -> bool[src]

Checks if the value of the field is PLL

impl R<u32, Reg<u32, _CFGR3>>[src]

pub fn usart1sw(&self) -> USART1SW_R[src]

Bits 0:1 - USART1 clock source selection

pub fn i2c1sw(&self) -> I2C1SW_R[src]

Bit 4 - I2C1 clock source selection

pub fn i2c2sw(&self) -> I2C2SW_R[src]

Bit 5 - I2C2 clock source selection

pub fn usart2sw(&self) -> USART2SW_R[src]

Bits 16:17 - USART2 clock source selection

pub fn usart3sw(&self) -> USART3SW_R[src]

Bits 18:19 - USART3 clock source selection

pub fn tim1sw(&self) -> TIM1SW_R[src]

Bit 8 - Timer1 clock source selection

pub fn tim8sw(&self) -> TIM8SW_R[src]

Bit 9 - Timer8 clock source selection

pub fn uart4sw(&self) -> UART4SW_R[src]

Bits 20:21 - UART4 clock source selection

pub fn uart5sw(&self) -> UART5SW_R[src]

Bits 22:23 - UART5 clock source selection

pub fn i2c3sw(&self) -> I2C3SW_R[src]

Bit 6 - I2C3 clock source selection

pub fn tim20sw(&self) -> TIM20SW_R[src]

Bit 15 - Timer20 clock source selection

pub fn tim15sw(&self) -> TIM15SW_R[src]

Bit 10 - Timer15 clock source selection

pub fn tim16sw(&self) -> TIM16SW_R[src]

Bit 11 - Timer16 clock source selection

pub fn tim17sw(&self) -> TIM17SW_R[src]

Bit 13 - Timer17 clock source selection

pub fn tim2sw(&self) -> TIM2SW_R[src]

Bit 24 - Timer2 clock source selection

pub fn tim34sw(&self) -> TIM34SW_R[src]

Bit 25 - Timer34 clock source selection

impl R<bool, EN_A>[src]

pub fn variant(&self) -> EN_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, TCIE_A>[src]

pub fn variant(&self) -> TCIE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, HTIE_A>[src]

pub fn variant(&self) -> HTIE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, TEIE_A>[src]

pub fn variant(&self) -> TEIE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, DIR_A>[src]

pub fn variant(&self) -> DIR_A[src]

Get enumerated values variant

pub fn is_from_peripheral(&self) -> bool[src]

Checks if the value of the field is FROMPERIPHERAL

pub fn is_from_memory(&self) -> bool[src]

Checks if the value of the field is FROMMEMORY

impl R<bool, CIRC_A>[src]

pub fn variant(&self) -> CIRC_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, PINC_A>[src]

pub fn variant(&self) -> PINC_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u8, PSIZE_A>[src]

pub fn variant(&self) -> Variant<u8, PSIZE_A>[src]

Get enumerated values variant

pub fn is_bits8(&self) -> bool[src]

Checks if the value of the field is BITS8

pub fn is_bits16(&self) -> bool[src]

Checks if the value of the field is BITS16

pub fn is_bits32(&self) -> bool[src]

Checks if the value of the field is BITS32

impl R<u8, PL_A>[src]

pub fn variant(&self) -> PL_A[src]

Get enumerated values variant

pub fn is_low(&self) -> bool[src]

Checks if the value of the field is LOW

pub fn is_medium(&self) -> bool[src]

Checks if the value of the field is MEDIUM

pub fn is_high(&self) -> bool[src]

Checks if the value of the field is HIGH

pub fn is_very_high(&self) -> bool[src]

Checks if the value of the field is VERYHIGH

impl R<bool, MEM2MEM_A>[src]

pub fn variant(&self) -> MEM2MEM_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u32, Reg<u32, _CR>>[src]

pub fn en(&self) -> EN_R[src]

Bit 0 - Channel enable

pub fn tcie(&self) -> TCIE_R[src]

Bit 1 - Transfer complete interrupt enable

pub fn htie(&self) -> HTIE_R[src]

Bit 2 - Half Transfer interrupt enable

pub fn teie(&self) -> TEIE_R[src]

Bit 3 - Transfer error interrupt enable

pub fn dir(&self) -> DIR_R[src]

Bit 4 - Data transfer direction

pub fn circ(&self) -> CIRC_R[src]

Bit 5 - Circular mode

pub fn pinc(&self) -> PINC_R[src]

Bit 6 - Peripheral increment mode

pub fn minc(&self) -> MINC_R[src]

Bit 7 - Memory increment mode

pub fn psize(&self) -> PSIZE_R[src]

Bits 8:9 - Peripheral size

pub fn msize(&self) -> MSIZE_R[src]

Bits 10:11 - Memory size

pub fn pl(&self) -> PL_R[src]

Bits 12:13 - Channel Priority level

pub fn mem2mem(&self) -> MEM2MEM_R[src]

Bit 14 - Memory to memory mode

impl R<u32, Reg<u32, _NDTR>>[src]

pub fn ndt(&self) -> NDT_R[src]

Bits 0:15 - Number of data to transfer

impl R<u32, Reg<u32, _PAR>>[src]

pub fn pa(&self) -> PA_R[src]

Bits 0:31 - Peripheral address

impl R<u32, Reg<u32, _MAR>>[src]

pub fn ma(&self) -> MA_R[src]

Bits 0:31 - Memory address

impl R<bool, GIF1_A>[src]

pub fn variant(&self) -> GIF1_A[src]

Get enumerated values variant

pub fn is_no_event(&self) -> bool[src]

Checks if the value of the field is NOEVENT

pub fn is_event(&self) -> bool[src]

Checks if the value of the field is EVENT

impl R<bool, TCIF1_A>[src]

pub fn variant(&self) -> TCIF1_A[src]

Get enumerated values variant

pub fn is_not_complete(&self) -> bool[src]

Checks if the value of the field is NOTCOMPLETE

pub fn is_complete(&self) -> bool[src]

Checks if the value of the field is COMPLETE

impl R<bool, HTIF1_A>[src]

pub fn variant(&self) -> HTIF1_A[src]

Get enumerated values variant

pub fn is_not_half(&self) -> bool[src]

Checks if the value of the field is NOTHALF

pub fn is_half(&self) -> bool[src]

Checks if the value of the field is HALF

impl R<bool, TEIF1_A>[src]

pub fn variant(&self) -> TEIF1_A[src]

Get enumerated values variant

pub fn is_no_error(&self) -> bool[src]

Checks if the value of the field is NOERROR

pub fn is_error(&self) -> bool[src]

Checks if the value of the field is ERROR

impl R<u32, Reg<u32, _ISR>>[src]

pub fn gif1(&self) -> GIF1_R[src]

Bit 0 - Channel 1 Global interrupt flag

pub fn tcif1(&self) -> TCIF1_R[src]

Bit 1 - Channel 1 Transfer Complete flag

pub fn htif1(&self) -> HTIF1_R[src]

Bit 2 - Channel 1 Half Transfer Complete flag

pub fn teif1(&self) -> TEIF1_R[src]

Bit 3 - Channel 1 Transfer Error flag

pub fn gif2(&self) -> GIF2_R[src]

Bit 4 - Channel 2 Global interrupt flag

pub fn tcif2(&self) -> TCIF2_R[src]

Bit 5 - Channel 2 Transfer Complete flag

pub fn htif2(&self) -> HTIF2_R[src]

Bit 6 - Channel 2 Half Transfer Complete flag

pub fn teif2(&self) -> TEIF2_R[src]

Bit 7 - Channel 2 Transfer Error flag

pub fn gif3(&self) -> GIF3_R[src]

Bit 8 - Channel 3 Global interrupt flag

pub fn tcif3(&self) -> TCIF3_R[src]

Bit 9 - Channel 3 Transfer Complete flag

pub fn htif3(&self) -> HTIF3_R[src]

Bit 10 - Channel 3 Half Transfer Complete flag

pub fn teif3(&self) -> TEIF3_R[src]

Bit 11 - Channel 3 Transfer Error flag

pub fn gif4(&self) -> GIF4_R[src]

Bit 12 - Channel 4 Global interrupt flag

pub fn tcif4(&self) -> TCIF4_R[src]

Bit 13 - Channel 4 Transfer Complete flag

pub fn htif4(&self) -> HTIF4_R[src]

Bit 14 - Channel 4 Half Transfer Complete flag

pub fn teif4(&self) -> TEIF4_R[src]

Bit 15 - Channel 4 Transfer Error flag

pub fn gif5(&self) -> GIF5_R[src]

Bit 16 - Channel 5 Global interrupt flag

pub fn tcif5(&self) -> TCIF5_R[src]

Bit 17 - Channel 5 Transfer Complete flag

pub fn htif5(&self) -> HTIF5_R[src]

Bit 18 - Channel 5 Half Transfer Complete flag

pub fn teif5(&self) -> TEIF5_R[src]

Bit 19 - Channel 5 Transfer Error flag

pub fn gif6(&self) -> GIF6_R[src]

Bit 20 - Channel 6 Global interrupt flag

pub fn tcif6(&self) -> TCIF6_R[src]

Bit 21 - Channel 6 Transfer Complete flag

pub fn htif6(&self) -> HTIF6_R[src]

Bit 22 - Channel 6 Half Transfer Complete flag

pub fn teif6(&self) -> TEIF6_R[src]

Bit 23 - Channel 6 Transfer Error flag

pub fn gif7(&self) -> GIF7_R[src]

Bit 24 - Channel 7 Global interrupt flag

pub fn tcif7(&self) -> TCIF7_R[src]

Bit 25 - Channel 7 Transfer Complete flag

pub fn htif7(&self) -> HTIF7_R[src]

Bit 26 - Channel 7 Half Transfer Complete flag

pub fn teif7(&self) -> TEIF7_R[src]

Bit 27 - Channel 7 Transfer Error flag

impl R<u8, CKD_A>[src]

pub fn variant(&self) -> Variant<u8, CKD_A>[src]

Get enumerated values variant

pub fn is_div1(&self) -> bool[src]

Checks if the value of the field is DIV1

pub fn is_div2(&self) -> bool[src]

Checks if the value of the field is DIV2

pub fn is_div4(&self) -> bool[src]

Checks if the value of the field is DIV4

impl R<bool, ARPE_A>[src]

pub fn variant(&self) -> ARPE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u8, CMS_A>[src]

pub fn variant(&self) -> CMS_A[src]

Get enumerated values variant

pub fn is_edge_aligned(&self) -> bool[src]

Checks if the value of the field is EDGEALIGNED

pub fn is_center_aligned1(&self) -> bool[src]

Checks if the value of the field is CENTERALIGNED1

pub fn is_center_aligned2(&self) -> bool[src]

Checks if the value of the field is CENTERALIGNED2

pub fn is_center_aligned3(&self) -> bool[src]

Checks if the value of the field is CENTERALIGNED3

impl R<bool, DIR_A>[src]

pub fn variant(&self) -> DIR_A[src]

Get enumerated values variant

pub fn is_up(&self) -> bool[src]

Checks if the value of the field is UP

pub fn is_down(&self) -> bool[src]

Checks if the value of the field is DOWN

impl R<bool, OPM_A>[src]

pub fn variant(&self) -> OPM_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, URS_A>[src]

pub fn variant(&self) -> URS_A[src]

Get enumerated values variant

pub fn is_any_event(&self) -> bool[src]

Checks if the value of the field is ANYEVENT

pub fn is_counter_only(&self) -> bool[src]

Checks if the value of the field is COUNTERONLY

impl R<bool, UDIS_A>[src]

pub fn variant(&self) -> UDIS_A[src]

Get enumerated values variant

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

impl R<bool, CEN_A>[src]

pub fn variant(&self) -> CEN_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u32, Reg<u32, _CR1>>[src]

pub fn ckd(&self) -> CKD_R[src]

Bits 8:9 - Clock division

pub fn arpe(&self) -> ARPE_R[src]

Bit 7 - Auto-reload preload enable

pub fn cms(&self) -> CMS_R[src]

Bits 5:6 - Center-aligned mode selection

pub fn dir(&self) -> DIR_R[src]

Bit 4 - Direction

pub fn opm(&self) -> OPM_R[src]

Bit 3 - One-pulse mode

pub fn urs(&self) -> URS_R[src]

Bit 2 - Update request source

pub fn udis(&self) -> UDIS_R[src]

Bit 1 - Update disable

pub fn cen(&self) -> CEN_R[src]

Bit 0 - Counter enable

impl R<bool, TI1S_A>[src]

pub fn variant(&self) -> TI1S_A[src]

Get enumerated values variant

pub fn is_normal(&self) -> bool[src]

Checks if the value of the field is NORMAL

pub fn is_xor(&self) -> bool[src]

Checks if the value of the field is XOR

impl R<u8, MMS_A>[src]

pub fn variant(&self) -> MMS_A[src]

Get enumerated values variant

pub fn is_reset(&self) -> bool[src]

Checks if the value of the field is RESET

pub fn is_enable(&self) -> bool[src]

Checks if the value of the field is ENABLE

pub fn is_update(&self) -> bool[src]

Checks if the value of the field is UPDATE

pub fn is_compare_pulse(&self) -> bool[src]

Checks if the value of the field is COMPAREPULSE

pub fn is_compare_oc1(&self) -> bool[src]

Checks if the value of the field is COMPAREOC1

pub fn is_compare_oc2(&self) -> bool[src]

Checks if the value of the field is COMPAREOC2

pub fn is_compare_oc3(&self) -> bool[src]

Checks if the value of the field is COMPAREOC3

pub fn is_compare_oc4(&self) -> bool[src]

Checks if the value of the field is COMPAREOC4

impl R<bool, CCDS_A>[src]

pub fn variant(&self) -> CCDS_A[src]

Get enumerated values variant

pub fn is_on_compare(&self) -> bool[src]

Checks if the value of the field is ONCOMPARE

pub fn is_on_update(&self) -> bool[src]

Checks if the value of the field is ONUPDATE

impl R<u32, Reg<u32, _CR2>>[src]

pub fn ti1s(&self) -> TI1S_R[src]

Bit 7 - TI1 selection

pub fn mms(&self) -> MMS_R[src]

Bits 4:6 - Master mode selection

pub fn ccds(&self) -> CCDS_R[src]

Bit 3 - Capture/compare DMA selection

impl R<bool, ETP_A>[src]

pub fn variant(&self) -> ETP_A[src]

Get enumerated values variant

pub fn is_not_inverted(&self) -> bool[src]

Checks if the value of the field is NOTINVERTED

pub fn is_inverted(&self) -> bool[src]

Checks if the value of the field is INVERTED

impl R<bool, ECE_A>[src]

pub fn variant(&self) -> ECE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u8, ETPS_A>[src]

pub fn variant(&self) -> ETPS_A[src]

Get enumerated values variant

pub fn is_div1(&self) -> bool[src]

Checks if the value of the field is DIV1

pub fn is_div2(&self) -> bool[src]

Checks if the value of the field is DIV2

pub fn is_div4(&self) -> bool[src]

Checks if the value of the field is DIV4

pub fn is_div8(&self) -> bool[src]

Checks if the value of the field is DIV8

impl R<u8, ETF_A>[src]

pub fn variant(&self) -> ETF_A[src]

Get enumerated values variant

pub fn is_no_filter(&self) -> bool[src]

Checks if the value of the field is NOFILTER

pub fn is_fck_int_n2(&self) -> bool[src]

Checks if the value of the field is FCK_INT_N2

pub fn is_fck_int_n4(&self) -> bool[src]

Checks if the value of the field is FCK_INT_N4

pub fn is_fck_int_n8(&self) -> bool[src]

Checks if the value of the field is FCK_INT_N8

pub fn is_fdts_div2_n6(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV2_N6

pub fn is_fdts_div2_n8(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV2_N8

pub fn is_fdts_div4_n6(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV4_N6

pub fn is_fdts_div4_n8(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV4_N8

pub fn is_fdts_div8_n6(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV8_N6

pub fn is_fdts_div8_n8(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV8_N8

pub fn is_fdts_div16_n5(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV16_N5

pub fn is_fdts_div16_n6(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV16_N6

pub fn is_fdts_div16_n8(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV16_N8

pub fn is_fdts_div32_n5(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV32_N5

pub fn is_fdts_div32_n6(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV32_N6

pub fn is_fdts_div32_n8(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV32_N8

impl R<bool, MSM_A>[src]

pub fn variant(&self) -> MSM_A[src]

Get enumerated values variant

pub fn is_no_sync(&self) -> bool[src]

Checks if the value of the field is NOSYNC

pub fn is_sync(&self) -> bool[src]

Checks if the value of the field is SYNC

impl R<u8, TS_A>[src]

pub fn variant(&self) -> Variant<u8, TS_A>[src]

Get enumerated values variant

pub fn is_itr0(&self) -> bool[src]

Checks if the value of the field is ITR0

pub fn is_itr1(&self) -> bool[src]

Checks if the value of the field is ITR1

pub fn is_itr2(&self) -> bool[src]

Checks if the value of the field is ITR2

pub fn is_ti1f_ed(&self) -> bool[src]

Checks if the value of the field is TI1F_ED

pub fn is_ti1fp1(&self) -> bool[src]

Checks if the value of the field is TI1FP1

pub fn is_ti2fp2(&self) -> bool[src]

Checks if the value of the field is TI2FP2

pub fn is_etrf(&self) -> bool[src]

Checks if the value of the field is ETRF

impl R<u8, SMS_A>[src]

pub fn variant(&self) -> SMS_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_encoder_mode_1(&self) -> bool[src]

Checks if the value of the field is ENCODER_MODE_1

pub fn is_encoder_mode_2(&self) -> bool[src]

Checks if the value of the field is ENCODER_MODE_2

pub fn is_encoder_mode_3(&self) -> bool[src]

Checks if the value of the field is ENCODER_MODE_3

pub fn is_reset_mode(&self) -> bool[src]

Checks if the value of the field is RESET_MODE

pub fn is_gated_mode(&self) -> bool[src]

Checks if the value of the field is GATED_MODE

pub fn is_trigger_mode(&self) -> bool[src]

Checks if the value of the field is TRIGGER_MODE

pub fn is_ext_clock_mode(&self) -> bool[src]

Checks if the value of the field is EXT_CLOCK_MODE

impl R<u32, Reg<u32, _SMCR>>[src]

pub fn etp(&self) -> ETP_R[src]

Bit 15 - External trigger polarity

pub fn ece(&self) -> ECE_R[src]

Bit 14 - External clock enable

pub fn etps(&self) -> ETPS_R[src]

Bits 12:13 - External trigger prescaler

pub fn etf(&self) -> ETF_R[src]

Bits 8:11 - External trigger filter

pub fn msm(&self) -> MSM_R[src]

Bit 7 - Master/Slave mode

pub fn ts(&self) -> TS_R[src]

Bits 4:6 - Trigger selection

pub fn sms(&self) -> SMS_R[src]

Bits 0:2 - Slave mode selection

impl R<bool, TDE_A>[src]

pub fn variant(&self) -> TDE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, CC4DE_A>[src]

pub fn variant(&self) -> CC4DE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, UDE_A>[src]

pub fn variant(&self) -> UDE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, TIE_A>[src]

pub fn variant(&self) -> TIE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, CC4IE_A>[src]

pub fn variant(&self) -> CC4IE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, UIE_A>[src]

pub fn variant(&self) -> UIE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u32, Reg<u32, _DIER>>[src]

pub fn tde(&self) -> TDE_R[src]

Bit 14 - Trigger DMA request enable

pub fn cc4de(&self) -> CC4DE_R[src]

Bit 12 - Capture/Compare 4 DMA request enable

pub fn cc3de(&self) -> CC3DE_R[src]

Bit 11 - Capture/Compare 3 DMA request enable

pub fn cc2de(&self) -> CC2DE_R[src]

Bit 10 - Capture/Compare 2 DMA request enable

pub fn cc1de(&self) -> CC1DE_R[src]

Bit 9 - Capture/Compare 1 DMA request enable

pub fn ude(&self) -> UDE_R[src]

Bit 8 - Update DMA request enable

pub fn tie(&self) -> TIE_R[src]

Bit 6 - Trigger interrupt enable

pub fn cc4ie(&self) -> CC4IE_R[src]

Bit 4 - Capture/Compare 4 interrupt enable

pub fn cc3ie(&self) -> CC3IE_R[src]

Bit 3 - Capture/Compare 3 interrupt enable

pub fn cc2ie(&self) -> CC2IE_R[src]

Bit 2 - Capture/Compare 2 interrupt enable

pub fn cc1ie(&self) -> CC1IE_R[src]

Bit 1 - Capture/Compare 1 interrupt enable

pub fn uie(&self) -> UIE_R[src]

Bit 0 - Update interrupt enable

impl R<bool, CC4OF_A>[src]

pub fn variant(&self) -> Variant<bool, CC4OF_A>[src]

Get enumerated values variant

pub fn is_overcapture(&self) -> bool[src]

Checks if the value of the field is OVERCAPTURE

impl R<bool, TIF_A>[src]

pub fn variant(&self) -> TIF_A[src]

Get enumerated values variant

pub fn is_no_trigger(&self) -> bool[src]

Checks if the value of the field is NOTRIGGER

pub fn is_trigger(&self) -> bool[src]

Checks if the value of the field is TRIGGER

impl R<bool, CC4IF_A>[src]

pub fn variant(&self) -> Variant<bool, CC4IF_A>[src]

Get enumerated values variant

pub fn is_match_(&self) -> bool[src]

Checks if the value of the field is MATCH

impl R<bool, UIF_A>[src]

pub fn variant(&self) -> UIF_A[src]

Get enumerated values variant

pub fn is_clear(&self) -> bool[src]

Checks if the value of the field is CLEAR

pub fn is_update_pending(&self) -> bool[src]

Checks if the value of the field is UPDATEPENDING

impl R<u32, Reg<u32, _SR>>[src]

pub fn cc4of(&self) -> CC4OF_R[src]

Bit 12 - Capture/Compare 4 overcapture flag

pub fn cc3of(&self) -> CC3OF_R[src]

Bit 11 - Capture/Compare 3 overcapture flag

pub fn cc2of(&self) -> CC2OF_R[src]

Bit 10 - Capture/compare 2 overcapture flag

pub fn cc1of(&self) -> CC1OF_R[src]

Bit 9 - Capture/Compare 1 overcapture flag

pub fn tif(&self) -> TIF_R[src]

Bit 6 - Trigger interrupt flag

pub fn cc4if(&self) -> CC4IF_R[src]

Bit 4 - Capture/Compare 4 interrupt flag

pub fn cc3if(&self) -> CC3IF_R[src]

Bit 3 - Capture/Compare 3 interrupt flag

pub fn cc2if(&self) -> CC2IF_R[src]

Bit 2 - Capture/Compare 2 interrupt flag

pub fn cc1if(&self) -> CC1IF_R[src]

Bit 1 - Capture/compare 1 interrupt flag

pub fn uif(&self) -> UIF_R[src]

Bit 0 - Update interrupt flag

impl R<u8, OC2M_A>[src]

pub fn variant(&self) -> OC2M_A[src]

Get enumerated values variant

pub fn is_frozen(&self) -> bool[src]

Checks if the value of the field is FROZEN

pub fn is_active_on_match(&self) -> bool[src]

Checks if the value of the field is ACTIVEONMATCH

pub fn is_inactive_on_match(&self) -> bool[src]

Checks if the value of the field is INACTIVEONMATCH

pub fn is_toggle(&self) -> bool[src]

Checks if the value of the field is TOGGLE

pub fn is_force_inactive(&self) -> bool[src]

Checks if the value of the field is FORCEINACTIVE

pub fn is_force_active(&self) -> bool[src]

Checks if the value of the field is FORCEACTIVE

pub fn is_pwm_mode1(&self) -> bool[src]

Checks if the value of the field is PWMMODE1

pub fn is_pwm_mode2(&self) -> bool[src]

Checks if the value of the field is PWMMODE2

impl R<bool, OC2PE_A>[src]

pub fn variant(&self) -> OC2PE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u8, CC2S_A>[src]

pub fn variant(&self) -> Variant<u8, CC2S_A>[src]

Get enumerated values variant

pub fn is_output(&self) -> bool[src]

Checks if the value of the field is OUTPUT

impl R<bool, OC1PE_A>[src]

pub fn variant(&self) -> OC1PE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u8, CC1S_A>[src]

pub fn variant(&self) -> Variant<u8, CC1S_A>[src]

Get enumerated values variant

pub fn is_output(&self) -> bool[src]

Checks if the value of the field is OUTPUT

impl R<u32, Reg<u32, _CCMR1_OUTPUT>>[src]

pub fn oc2ce(&self) -> OC2CE_R[src]

Bit 15 - Output compare 2 clear enable

pub fn oc2m(&self) -> OC2M_R[src]

Bits 12:14 - Output compare 2 mode

pub fn oc2pe(&self) -> OC2PE_R[src]

Bit 11 - Output compare 2 preload enable

pub fn oc2fe(&self) -> OC2FE_R[src]

Bit 10 - Output compare 2 fast enable

pub fn cc2s(&self) -> CC2S_R[src]

Bits 8:9 - Capture/Compare 2 selection

pub fn oc1ce(&self) -> OC1CE_R[src]

Bit 7 - Output compare 1 clear enable

pub fn oc1m(&self) -> OC1M_R[src]

Bits 4:6 - Output compare 1 mode

pub fn oc1pe(&self) -> OC1PE_R[src]

Bit 3 - Output compare 1 preload enable

pub fn oc1fe(&self) -> OC1FE_R[src]

Bit 2 - Output compare 1 fast enable

pub fn cc1s(&self) -> CC1S_R[src]

Bits 0:1 - Capture/Compare 1 selection

impl R<u8, CC2S_A>[src]

pub fn variant(&self) -> Variant<u8, CC2S_A>[src]

Get enumerated values variant

pub fn is_ti2(&self) -> bool[src]

Checks if the value of the field is TI2

pub fn is_ti1(&self) -> bool[src]

Checks if the value of the field is TI1

pub fn is_trc(&self) -> bool[src]

Checks if the value of the field is TRC

impl R<u8, IC1F_A>[src]

pub fn variant(&self) -> IC1F_A[src]

Get enumerated values variant

pub fn is_no_filter(&self) -> bool[src]

Checks if the value of the field is NOFILTER

pub fn is_fck_int_n2(&self) -> bool[src]

Checks if the value of the field is FCK_INT_N2

pub fn is_fck_int_n4(&self) -> bool[src]

Checks if the value of the field is FCK_INT_N4

pub fn is_fck_int_n8(&self) -> bool[src]

Checks if the value of the field is FCK_INT_N8

pub fn is_fdts_div2_n6(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV2_N6

pub fn is_fdts_div2_n8(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV2_N8

pub fn is_fdts_div4_n6(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV4_N6

pub fn is_fdts_div4_n8(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV4_N8

pub fn is_fdts_div8_n6(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV8_N6

pub fn is_fdts_div8_n8(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV8_N8

pub fn is_fdts_div16_n5(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV16_N5

pub fn is_fdts_div16_n6(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV16_N6

pub fn is_fdts_div16_n8(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV16_N8

pub fn is_fdts_div32_n5(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV32_N5

pub fn is_fdts_div32_n6(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV32_N6

pub fn is_fdts_div32_n8(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV32_N8

impl R<u8, CC1S_A>[src]

pub fn variant(&self) -> Variant<u8, CC1S_A>[src]

Get enumerated values variant

pub fn is_ti1(&self) -> bool[src]

Checks if the value of the field is TI1

pub fn is_ti2(&self) -> bool[src]

Checks if the value of the field is TI2

pub fn is_trc(&self) -> bool[src]

Checks if the value of the field is TRC

impl R<u32, Reg<u32, _CCMR1_INPUT>>[src]

pub fn ic2f(&self) -> IC2F_R[src]

Bits 12:15 - Input capture 2 filter

pub fn ic2psc(&self) -> IC2PSC_R[src]

Bits 10:11 - Input capture 2 prescaler

pub fn cc2s(&self) -> CC2S_R[src]

Bits 8:9 - Capture/compare 2 selection

pub fn ic1f(&self) -> IC1F_R[src]

Bits 4:7 - Input capture 1 filter

pub fn ic1psc(&self) -> IC1PSC_R[src]

Bits 2:3 - Input capture 1 prescaler

pub fn cc1s(&self) -> CC1S_R[src]

Bits 0:1 - Capture/Compare 1 selection

impl R<u8, OC4M_A>[src]

pub fn variant(&self) -> OC4M_A[src]

Get enumerated values variant

pub fn is_frozen(&self) -> bool[src]

Checks if the value of the field is FROZEN

pub fn is_active_on_match(&self) -> bool[src]

Checks if the value of the field is ACTIVEONMATCH

pub fn is_inactive_on_match(&self) -> bool[src]

Checks if the value of the field is INACTIVEONMATCH

pub fn is_toggle(&self) -> bool[src]

Checks if the value of the field is TOGGLE

pub fn is_force_inactive(&self) -> bool[src]

Checks if the value of the field is FORCEINACTIVE

pub fn is_force_active(&self) -> bool[src]

Checks if the value of the field is FORCEACTIVE

pub fn is_pwm_mode1(&self) -> bool[src]

Checks if the value of the field is PWMMODE1

pub fn is_pwm_mode2(&self) -> bool[src]

Checks if the value of the field is PWMMODE2

impl R<bool, OC4PE_A>[src]

pub fn variant(&self) -> OC4PE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u8, CC4S_A>[src]

pub fn variant(&self) -> Variant<u8, CC4S_A>[src]

Get enumerated values variant

pub fn is_output(&self) -> bool[src]

Checks if the value of the field is OUTPUT

impl R<bool, OC3PE_A>[src]

pub fn variant(&self) -> OC3PE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u8, CC3S_A>[src]

pub fn variant(&self) -> Variant<u8, CC3S_A>[src]

Get enumerated values variant

pub fn is_output(&self) -> bool[src]

Checks if the value of the field is OUTPUT

impl R<u32, Reg<u32, _CCMR2_OUTPUT>>[src]

pub fn oc4ce(&self) -> OC4CE_R[src]

Bit 15 - Output compare 4 clear enable

pub fn oc4m(&self) -> OC4M_R[src]

Bits 12:14 - Output compare 4 mode

pub fn oc4pe(&self) -> OC4PE_R[src]

Bit 11 - Output compare 4 preload enable

pub fn oc4fe(&self) -> OC4FE_R[src]

Bit 10 - Output compare 4 fast enable

pub fn cc4s(&self) -> CC4S_R[src]

Bits 8:9 - Capture/Compare 4 selection

pub fn oc3ce(&self) -> OC3CE_R[src]

Bit 7 - Output compare 3 clear enable

pub fn oc3m(&self) -> OC3M_R[src]

Bits 4:6 - Output compare 3 mode

pub fn oc3pe(&self) -> OC3PE_R[src]

Bit 3 - Output compare 3 preload enable

pub fn oc3fe(&self) -> OC3FE_R[src]

Bit 2 - Output compare 3 fast enable

pub fn cc3s(&self) -> CC3S_R[src]

Bits 0:1 - Capture/Compare 3 selection

impl R<u8, CC4S_A>[src]

pub fn variant(&self) -> Variant<u8, CC4S_A>[src]

Get enumerated values variant

pub fn is_ti4(&self) -> bool[src]

Checks if the value of the field is TI4

pub fn is_ti3(&self) -> bool[src]

Checks if the value of the field is TI3

pub fn is_trc(&self) -> bool[src]

Checks if the value of the field is TRC

impl R<u8, CC3S_A>[src]

pub fn variant(&self) -> Variant<u8, CC3S_A>[src]

Get enumerated values variant

pub fn is_ti3(&self) -> bool[src]

Checks if the value of the field is TI3

pub fn is_ti4(&self) -> bool[src]

Checks if the value of the field is TI4

pub fn is_trc(&self) -> bool[src]

Checks if the value of the field is TRC

impl R<u32, Reg<u32, _CCMR2_INPUT>>[src]

pub fn ic4f(&self) -> IC4F_R[src]

Bits 12:15 - Input capture 4 filter

pub fn ic4psc(&self) -> IC4PSC_R[src]

Bits 10:11 - Input capture 4 prescaler

pub fn cc4s(&self) -> CC4S_R[src]

Bits 8:9 - Capture/Compare 4 selection

pub fn ic3f(&self) -> IC3F_R[src]

Bits 4:7 - Input capture 3 filter

pub fn ic3psc(&self) -> IC3PSC_R[src]

Bits 2:3 - Input capture 3 prescaler

pub fn cc3s(&self) -> CC3S_R[src]

Bits 0:1 - Capture/Compare 3 selection

impl R<u32, Reg<u32, _CCER>>[src]

pub fn cc1e(&self) -> CC1E_R[src]

Bit 0 - Capture/Compare 1 output enable

pub fn cc1p(&self) -> CC1P_R[src]

Bit 1 - Capture/Compare 1 output Polarity

pub fn cc1np(&self) -> CC1NP_R[src]

Bit 3 - Capture/Compare 1 output Polarity

pub fn cc2e(&self) -> CC2E_R[src]

Bit 4 - Capture/Compare 2 output enable

pub fn cc2p(&self) -> CC2P_R[src]

Bit 5 - Capture/Compare 2 output Polarity

pub fn cc2np(&self) -> CC2NP_R[src]

Bit 7 - Capture/Compare 2 output Polarity

pub fn cc3e(&self) -> CC3E_R[src]

Bit 8 - Capture/Compare 3 output enable

pub fn cc3p(&self) -> CC3P_R[src]

Bit 9 - Capture/Compare 3 output Polarity

pub fn cc3np(&self) -> CC3NP_R[src]

Bit 11 - Capture/Compare 3 output Polarity

pub fn cc4e(&self) -> CC4E_R[src]

Bit 12 - Capture/Compare 4 output enable

pub fn cc4p(&self) -> CC4P_R[src]

Bit 13 - Capture/Compare 3 output Polarity

pub fn cc4np(&self) -> CC4NP_R[src]

Bit 15 - Capture/Compare 3 output Polarity

impl R<u32, Reg<u32, _CNT>>[src]

pub fn cnt(&self) -> CNT_R[src]

Bits 0:31 - Low counter value

impl R<u32, Reg<u32, _PSC>>[src]

pub fn psc(&self) -> PSC_R[src]

Bits 0:15 - Prescaler value

impl R<u32, Reg<u32, _ARR>>[src]

pub fn arr(&self) -> ARR_R[src]

Bits 0:31 - Low Auto-reload value

impl R<u32, Reg<u32, _CCR>>[src]

pub fn ccr(&self) -> CCR_R[src]

Bits 0:31 - Low Capture/Compare 1 value

impl R<u32, Reg<u32, _DCR>>[src]

pub fn dbl(&self) -> DBL_R[src]

Bits 8:12 - DMA burst length

pub fn dba(&self) -> DBA_R[src]

Bits 0:4 - DMA base address

impl R<u32, Reg<u32, _DMAR>>[src]

pub fn dmab(&self) -> DMAB_R[src]

Bits 0:15 - DMA register for burst accesses

impl R<u32, Reg<u32, _OR>>[src]

pub fn itr1_rmp(&self) -> ITR1_RMP_R[src]

Bits 10:11 - Internal trigger 1 remap

impl R<u8, CKD_A>[src]

pub fn variant(&self) -> Variant<u8, CKD_A>[src]

Get enumerated values variant

pub fn is_div1(&self) -> bool[src]

Checks if the value of the field is DIV1

pub fn is_div2(&self) -> bool[src]

Checks if the value of the field is DIV2

pub fn is_div4(&self) -> bool[src]

Checks if the value of the field is DIV4

impl R<bool, ARPE_A>[src]

pub fn variant(&self) -> ARPE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u8, CMS_A>[src]

pub fn variant(&self) -> CMS_A[src]

Get enumerated values variant

pub fn is_edge_aligned(&self) -> bool[src]

Checks if the value of the field is EDGEALIGNED

pub fn is_center_aligned1(&self) -> bool[src]

Checks if the value of the field is CENTERALIGNED1

pub fn is_center_aligned2(&self) -> bool[src]

Checks if the value of the field is CENTERALIGNED2

pub fn is_center_aligned3(&self) -> bool[src]

Checks if the value of the field is CENTERALIGNED3

impl R<bool, DIR_A>[src]

pub fn variant(&self) -> DIR_A[src]

Get enumerated values variant

pub fn is_up(&self) -> bool[src]

Checks if the value of the field is UP

pub fn is_down(&self) -> bool[src]

Checks if the value of the field is DOWN

impl R<bool, OPM_A>[src]

pub fn variant(&self) -> OPM_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, URS_A>[src]

pub fn variant(&self) -> URS_A[src]

Get enumerated values variant

pub fn is_any_event(&self) -> bool[src]

Checks if the value of the field is ANYEVENT

pub fn is_counter_only(&self) -> bool[src]

Checks if the value of the field is COUNTERONLY

impl R<bool, UDIS_A>[src]

pub fn variant(&self) -> UDIS_A[src]

Get enumerated values variant

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

impl R<bool, CEN_A>[src]

pub fn variant(&self) -> CEN_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u32, Reg<u32, _CR1>>[src]

pub fn ckd(&self) -> CKD_R[src]

Bits 8:9 - Clock division

pub fn arpe(&self) -> ARPE_R[src]

Bit 7 - Auto-reload preload enable

pub fn cms(&self) -> CMS_R[src]

Bits 5:6 - Center-aligned mode selection

pub fn dir(&self) -> DIR_R[src]

Bit 4 - Direction

pub fn opm(&self) -> OPM_R[src]

Bit 3 - One-pulse mode

pub fn urs(&self) -> URS_R[src]

Bit 2 - Update request source

pub fn udis(&self) -> UDIS_R[src]

Bit 1 - Update disable

pub fn cen(&self) -> CEN_R[src]

Bit 0 - Counter enable

impl R<bool, TI1S_A>[src]

pub fn variant(&self) -> TI1S_A[src]

Get enumerated values variant

pub fn is_normal(&self) -> bool[src]

Checks if the value of the field is NORMAL

pub fn is_xor(&self) -> bool[src]

Checks if the value of the field is XOR

impl R<u8, MMS_A>[src]

pub fn variant(&self) -> MMS_A[src]

Get enumerated values variant

pub fn is_reset(&self) -> bool[src]

Checks if the value of the field is RESET

pub fn is_enable(&self) -> bool[src]

Checks if the value of the field is ENABLE

pub fn is_update(&self) -> bool[src]

Checks if the value of the field is UPDATE

pub fn is_compare_pulse(&self) -> bool[src]

Checks if the value of the field is COMPAREPULSE

pub fn is_compare_oc1(&self) -> bool[src]

Checks if the value of the field is COMPAREOC1

pub fn is_compare_oc2(&self) -> bool[src]

Checks if the value of the field is COMPAREOC2

pub fn is_compare_oc3(&self) -> bool[src]

Checks if the value of the field is COMPAREOC3

pub fn is_compare_oc4(&self) -> bool[src]

Checks if the value of the field is COMPAREOC4

impl R<bool, CCDS_A>[src]

pub fn variant(&self) -> CCDS_A[src]

Get enumerated values variant

pub fn is_on_compare(&self) -> bool[src]

Checks if the value of the field is ONCOMPARE

pub fn is_on_update(&self) -> bool[src]

Checks if the value of the field is ONUPDATE

impl R<u32, Reg<u32, _CR2>>[src]

pub fn ti1s(&self) -> TI1S_R[src]

Bit 7 - TI1 selection

pub fn mms(&self) -> MMS_R[src]

Bits 4:6 - Master mode selection

pub fn ccds(&self) -> CCDS_R[src]

Bit 3 - Capture/compare DMA selection

impl R<bool, ETP_A>[src]

pub fn variant(&self) -> ETP_A[src]

Get enumerated values variant

pub fn is_not_inverted(&self) -> bool[src]

Checks if the value of the field is NOTINVERTED

pub fn is_inverted(&self) -> bool[src]

Checks if the value of the field is INVERTED

impl R<bool, ECE_A>[src]

pub fn variant(&self) -> ECE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u8, ETPS_A>[src]

pub fn variant(&self) -> ETPS_A[src]

Get enumerated values variant

pub fn is_div1(&self) -> bool[src]

Checks if the value of the field is DIV1

pub fn is_div2(&self) -> bool[src]

Checks if the value of the field is DIV2

pub fn is_div4(&self) -> bool[src]

Checks if the value of the field is DIV4

pub fn is_div8(&self) -> bool[src]

Checks if the value of the field is DIV8

impl R<u8, ETF_A>[src]

pub fn variant(&self) -> ETF_A[src]

Get enumerated values variant

pub fn is_no_filter(&self) -> bool[src]

Checks if the value of the field is NOFILTER

pub fn is_fck_int_n2(&self) -> bool[src]

Checks if the value of the field is FCK_INT_N2

pub fn is_fck_int_n4(&self) -> bool[src]

Checks if the value of the field is FCK_INT_N4

pub fn is_fck_int_n8(&self) -> bool[src]

Checks if the value of the field is FCK_INT_N8

pub fn is_fdts_div2_n6(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV2_N6

pub fn is_fdts_div2_n8(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV2_N8

pub fn is_fdts_div4_n6(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV4_N6

pub fn is_fdts_div4_n8(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV4_N8

pub fn is_fdts_div8_n6(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV8_N6

pub fn is_fdts_div8_n8(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV8_N8

pub fn is_fdts_div16_n5(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV16_N5

pub fn is_fdts_div16_n6(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV16_N6

pub fn is_fdts_div16_n8(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV16_N8

pub fn is_fdts_div32_n5(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV32_N5

pub fn is_fdts_div32_n6(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV32_N6

pub fn is_fdts_div32_n8(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV32_N8

impl R<bool, MSM_A>[src]

pub fn variant(&self) -> MSM_A[src]

Get enumerated values variant

pub fn is_no_sync(&self) -> bool[src]

Checks if the value of the field is NOSYNC

pub fn is_sync(&self) -> bool[src]

Checks if the value of the field is SYNC

impl R<u8, TS_A>[src]

pub fn variant(&self) -> Variant<u8, TS_A>[src]

Get enumerated values variant

pub fn is_itr0(&self) -> bool[src]

Checks if the value of the field is ITR0

pub fn is_itr1(&self) -> bool[src]

Checks if the value of the field is ITR1

pub fn is_itr2(&self) -> bool[src]

Checks if the value of the field is ITR2

pub fn is_ti1f_ed(&self) -> bool[src]

Checks if the value of the field is TI1F_ED

pub fn is_ti1fp1(&self) -> bool[src]

Checks if the value of the field is TI1FP1

pub fn is_ti2fp2(&self) -> bool[src]

Checks if the value of the field is TI2FP2

pub fn is_etrf(&self) -> bool[src]

Checks if the value of the field is ETRF

impl R<u8, SMS_A>[src]

pub fn variant(&self) -> SMS_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_encoder_mode_1(&self) -> bool[src]

Checks if the value of the field is ENCODER_MODE_1

pub fn is_encoder_mode_2(&self) -> bool[src]

Checks if the value of the field is ENCODER_MODE_2

pub fn is_encoder_mode_3(&self) -> bool[src]

Checks if the value of the field is ENCODER_MODE_3

pub fn is_reset_mode(&self) -> bool[src]

Checks if the value of the field is RESET_MODE

pub fn is_gated_mode(&self) -> bool[src]

Checks if the value of the field is GATED_MODE

pub fn is_trigger_mode(&self) -> bool[src]

Checks if the value of the field is TRIGGER_MODE

pub fn is_ext_clock_mode(&self) -> bool[src]

Checks if the value of the field is EXT_CLOCK_MODE

impl R<u32, Reg<u32, _SMCR>>[src]

pub fn etp(&self) -> ETP_R[src]

Bit 15 - External trigger polarity

pub fn ece(&self) -> ECE_R[src]

Bit 14 - External clock enable

pub fn etps(&self) -> ETPS_R[src]

Bits 12:13 - External trigger prescaler

pub fn etf(&self) -> ETF_R[src]

Bits 8:11 - External trigger filter

pub fn msm(&self) -> MSM_R[src]

Bit 7 - Master/Slave mode

pub fn ts(&self) -> TS_R[src]

Bits 4:6 - Trigger selection

pub fn sms(&self) -> SMS_R[src]

Bits 0:2 - Slave mode selection

impl R<bool, TDE_A>[src]

pub fn variant(&self) -> TDE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, CC4DE_A>[src]

pub fn variant(&self) -> CC4DE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, UDE_A>[src]

pub fn variant(&self) -> UDE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, TIE_A>[src]

pub fn variant(&self) -> TIE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, CC4IE_A>[src]

pub fn variant(&self) -> CC4IE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, UIE_A>[src]

pub fn variant(&self) -> UIE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u32, Reg<u32, _DIER>>[src]

pub fn tde(&self) -> TDE_R[src]

Bit 14 - Trigger DMA request enable

pub fn cc4de(&self) -> CC4DE_R[src]

Bit 12 - Capture/Compare 4 DMA request enable

pub fn cc3de(&self) -> CC3DE_R[src]

Bit 11 - Capture/Compare 3 DMA request enable

pub fn cc2de(&self) -> CC2DE_R[src]

Bit 10 - Capture/Compare 2 DMA request enable

pub fn cc1de(&self) -> CC1DE_R[src]

Bit 9 - Capture/Compare 1 DMA request enable

pub fn ude(&self) -> UDE_R[src]

Bit 8 - Update DMA request enable

pub fn tie(&self) -> TIE_R[src]

Bit 6 - Trigger interrupt enable

pub fn cc4ie(&self) -> CC4IE_R[src]

Bit 4 - Capture/Compare 4 interrupt enable

pub fn cc3ie(&self) -> CC3IE_R[src]

Bit 3 - Capture/Compare 3 interrupt enable

pub fn cc2ie(&self) -> CC2IE_R[src]

Bit 2 - Capture/Compare 2 interrupt enable

pub fn cc1ie(&self) -> CC1IE_R[src]

Bit 1 - Capture/Compare 1 interrupt enable

pub fn uie(&self) -> UIE_R[src]

Bit 0 - Update interrupt enable

impl R<bool, CC4OF_A>[src]

pub fn variant(&self) -> Variant<bool, CC4OF_A>[src]

Get enumerated values variant

pub fn is_overcapture(&self) -> bool[src]

Checks if the value of the field is OVERCAPTURE

impl R<bool, TIF_A>[src]

pub fn variant(&self) -> TIF_A[src]

Get enumerated values variant

pub fn is_no_trigger(&self) -> bool[src]

Checks if the value of the field is NOTRIGGER

pub fn is_trigger(&self) -> bool[src]

Checks if the value of the field is TRIGGER

impl R<bool, CC4IF_A>[src]

pub fn variant(&self) -> Variant<bool, CC4IF_A>[src]

Get enumerated values variant

pub fn is_match_(&self) -> bool[src]

Checks if the value of the field is MATCH

impl R<bool, UIF_A>[src]

pub fn variant(&self) -> UIF_A[src]

Get enumerated values variant

pub fn is_clear(&self) -> bool[src]

Checks if the value of the field is CLEAR

pub fn is_update_pending(&self) -> bool[src]

Checks if the value of the field is UPDATEPENDING

impl R<u32, Reg<u32, _SR>>[src]

pub fn cc4of(&self) -> CC4OF_R[src]

Bit 12 - Capture/Compare 4 overcapture flag

pub fn cc3of(&self) -> CC3OF_R[src]

Bit 11 - Capture/Compare 3 overcapture flag

pub fn cc2of(&self) -> CC2OF_R[src]

Bit 10 - Capture/compare 2 overcapture flag

pub fn cc1of(&self) -> CC1OF_R[src]

Bit 9 - Capture/Compare 1 overcapture flag

pub fn tif(&self) -> TIF_R[src]

Bit 6 - Trigger interrupt flag

pub fn cc4if(&self) -> CC4IF_R[src]

Bit 4 - Capture/Compare 4 interrupt flag

pub fn cc3if(&self) -> CC3IF_R[src]

Bit 3 - Capture/Compare 3 interrupt flag

pub fn cc2if(&self) -> CC2IF_R[src]

Bit 2 - Capture/Compare 2 interrupt flag

pub fn cc1if(&self) -> CC1IF_R[src]

Bit 1 - Capture/compare 1 interrupt flag

pub fn uif(&self) -> UIF_R[src]

Bit 0 - Update interrupt flag

impl R<u8, OC2M_A>[src]

pub fn variant(&self) -> OC2M_A[src]

Get enumerated values variant

pub fn is_frozen(&self) -> bool[src]

Checks if the value of the field is FROZEN

pub fn is_active_on_match(&self) -> bool[src]

Checks if the value of the field is ACTIVEONMATCH

pub fn is_inactive_on_match(&self) -> bool[src]

Checks if the value of the field is INACTIVEONMATCH

pub fn is_toggle(&self) -> bool[src]

Checks if the value of the field is TOGGLE

pub fn is_force_inactive(&self) -> bool[src]

Checks if the value of the field is FORCEINACTIVE

pub fn is_force_active(&self) -> bool[src]

Checks if the value of the field is FORCEACTIVE

pub fn is_pwm_mode1(&self) -> bool[src]

Checks if the value of the field is PWMMODE1

pub fn is_pwm_mode2(&self) -> bool[src]

Checks if the value of the field is PWMMODE2

impl R<bool, OC2PE_A>[src]

pub fn variant(&self) -> OC2PE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u8, CC2S_A>[src]

pub fn variant(&self) -> Variant<u8, CC2S_A>[src]

Get enumerated values variant

pub fn is_output(&self) -> bool[src]

Checks if the value of the field is OUTPUT

impl R<bool, OC1PE_A>[src]

pub fn variant(&self) -> OC1PE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u8, CC1S_A>[src]

pub fn variant(&self) -> Variant<u8, CC1S_A>[src]

Get enumerated values variant

pub fn is_output(&self) -> bool[src]

Checks if the value of the field is OUTPUT

impl R<u32, Reg<u32, _CCMR1_OUTPUT>>[src]

pub fn oc2ce(&self) -> OC2CE_R[src]

Bit 15 - Output compare 2 clear enable

pub fn oc2m(&self) -> OC2M_R[src]

Bits 12:14 - Output compare 2 mode

pub fn oc2pe(&self) -> OC2PE_R[src]

Bit 11 - Output compare 2 preload enable

pub fn oc2fe(&self) -> OC2FE_R[src]

Bit 10 - Output compare 2 fast enable

pub fn cc2s(&self) -> CC2S_R[src]

Bits 8:9 - Capture/Compare 2 selection

pub fn oc1ce(&self) -> OC1CE_R[src]

Bit 7 - Output compare 1 clear enable

pub fn oc1m(&self) -> OC1M_R[src]

Bits 4:6 - Output compare 1 mode

pub fn oc1pe(&self) -> OC1PE_R[src]

Bit 3 - Output compare 1 preload enable

pub fn oc1fe(&self) -> OC1FE_R[src]

Bit 2 - Output compare 1 fast enable

pub fn cc1s(&self) -> CC1S_R[src]

Bits 0:1 - Capture/Compare 1 selection

impl R<u8, CC2S_A>[src]

pub fn variant(&self) -> Variant<u8, CC2S_A>[src]

Get enumerated values variant

pub fn is_ti2(&self) -> bool[src]

Checks if the value of the field is TI2

pub fn is_ti1(&self) -> bool[src]

Checks if the value of the field is TI1

pub fn is_trc(&self) -> bool[src]

Checks if the value of the field is TRC

impl R<u8, IC1F_A>[src]

pub fn variant(&self) -> IC1F_A[src]

Get enumerated values variant

pub fn is_no_filter(&self) -> bool[src]

Checks if the value of the field is NOFILTER

pub fn is_fck_int_n2(&self) -> bool[src]

Checks if the value of the field is FCK_INT_N2

pub fn is_fck_int_n4(&self) -> bool[src]

Checks if the value of the field is FCK_INT_N4

pub fn is_fck_int_n8(&self) -> bool[src]

Checks if the value of the field is FCK_INT_N8

pub fn is_fdts_div2_n6(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV2_N6

pub fn is_fdts_div2_n8(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV2_N8

pub fn is_fdts_div4_n6(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV4_N6

pub fn is_fdts_div4_n8(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV4_N8

pub fn is_fdts_div8_n6(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV8_N6

pub fn is_fdts_div8_n8(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV8_N8

pub fn is_fdts_div16_n5(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV16_N5

pub fn is_fdts_div16_n6(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV16_N6

pub fn is_fdts_div16_n8(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV16_N8

pub fn is_fdts_div32_n5(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV32_N5

pub fn is_fdts_div32_n6(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV32_N6

pub fn is_fdts_div32_n8(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV32_N8

impl R<u8, CC1S_A>[src]

pub fn variant(&self) -> Variant<u8, CC1S_A>[src]

Get enumerated values variant

pub fn is_ti1(&self) -> bool[src]

Checks if the value of the field is TI1

pub fn is_ti2(&self) -> bool[src]

Checks if the value of the field is TI2

pub fn is_trc(&self) -> bool[src]

Checks if the value of the field is TRC

impl R<u32, Reg<u32, _CCMR1_INPUT>>[src]

pub fn ic2f(&self) -> IC2F_R[src]

Bits 12:15 - Input capture 2 filter

pub fn ic2psc(&self) -> IC2PSC_R[src]

Bits 10:11 - Input capture 2 prescaler

pub fn cc2s(&self) -> CC2S_R[src]

Bits 8:9 - Capture/compare 2 selection

pub fn ic1f(&self) -> IC1F_R[src]

Bits 4:7 - Input capture 1 filter

pub fn ic1psc(&self) -> IC1PSC_R[src]

Bits 2:3 - Input capture 1 prescaler

pub fn cc1s(&self) -> CC1S_R[src]

Bits 0:1 - Capture/Compare 1 selection

impl R<u8, OC4M_A>[src]

pub fn variant(&self) -> OC4M_A[src]

Get enumerated values variant

pub fn is_frozen(&self) -> bool[src]

Checks if the value of the field is FROZEN

pub fn is_active_on_match(&self) -> bool[src]

Checks if the value of the field is ACTIVEONMATCH

pub fn is_inactive_on_match(&self) -> bool[src]

Checks if the value of the field is INACTIVEONMATCH

pub fn is_toggle(&self) -> bool[src]

Checks if the value of the field is TOGGLE

pub fn is_force_inactive(&self) -> bool[src]

Checks if the value of the field is FORCEINACTIVE

pub fn is_force_active(&self) -> bool[src]

Checks if the value of the field is FORCEACTIVE

pub fn is_pwm_mode1(&self) -> bool[src]

Checks if the value of the field is PWMMODE1

pub fn is_pwm_mode2(&self) -> bool[src]

Checks if the value of the field is PWMMODE2

impl R<bool, OC4PE_A>[src]

pub fn variant(&self) -> OC4PE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u8, CC4S_A>[src]

pub fn variant(&self) -> Variant<u8, CC4S_A>[src]

Get enumerated values variant

pub fn is_output(&self) -> bool[src]

Checks if the value of the field is OUTPUT

impl R<bool, OC3PE_A>[src]

pub fn variant(&self) -> OC3PE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u8, CC3S_A>[src]

pub fn variant(&self) -> Variant<u8, CC3S_A>[src]

Get enumerated values variant

pub fn is_output(&self) -> bool[src]

Checks if the value of the field is OUTPUT

impl R<u32, Reg<u32, _CCMR2_OUTPUT>>[src]

pub fn oc4ce(&self) -> OC4CE_R[src]

Bit 15 - Output compare 4 clear enable

pub fn oc4m(&self) -> OC4M_R[src]

Bits 12:14 - Output compare 4 mode

pub fn oc4pe(&self) -> OC4PE_R[src]

Bit 11 - Output compare 4 preload enable

pub fn oc4fe(&self) -> OC4FE_R[src]

Bit 10 - Output compare 4 fast enable

pub fn cc4s(&self) -> CC4S_R[src]

Bits 8:9 - Capture/Compare 4 selection

pub fn oc3ce(&self) -> OC3CE_R[src]

Bit 7 - Output compare 3 clear enable

pub fn oc3m(&self) -> OC3M_R[src]

Bits 4:6 - Output compare 3 mode

pub fn oc3pe(&self) -> OC3PE_R[src]

Bit 3 - Output compare 3 preload enable

pub fn oc3fe(&self) -> OC3FE_R[src]

Bit 2 - Output compare 3 fast enable

pub fn cc3s(&self) -> CC3S_R[src]

Bits 0:1 - Capture/Compare 3 selection

impl R<u8, CC4S_A>[src]

pub fn variant(&self) -> Variant<u8, CC4S_A>[src]

Get enumerated values variant

pub fn is_ti4(&self) -> bool[src]

Checks if the value of the field is TI4

pub fn is_ti3(&self) -> bool[src]

Checks if the value of the field is TI3

pub fn is_trc(&self) -> bool[src]

Checks if the value of the field is TRC

impl R<u8, CC3S_A>[src]

pub fn variant(&self) -> Variant<u8, CC3S_A>[src]

Get enumerated values variant

pub fn is_ti3(&self) -> bool[src]

Checks if the value of the field is TI3

pub fn is_ti4(&self) -> bool[src]

Checks if the value of the field is TI4

pub fn is_trc(&self) -> bool[src]

Checks if the value of the field is TRC

impl R<u32, Reg<u32, _CCMR2_INPUT>>[src]

pub fn ic4f(&self) -> IC4F_R[src]

Bits 12:15 - Input capture 4 filter

pub fn ic4psc(&self) -> IC4PSC_R[src]

Bits 10:11 - Input capture 4 prescaler

pub fn cc4s(&self) -> CC4S_R[src]

Bits 8:9 - Capture/Compare 4 selection

pub fn ic3f(&self) -> IC3F_R[src]

Bits 4:7 - Input capture 3 filter

pub fn ic3psc(&self) -> IC3PSC_R[src]

Bits 2:3 - Input capture 3 prescaler

pub fn cc3s(&self) -> CC3S_R[src]

Bits 0:1 - Capture/Compare 3 selection

impl R<u32, Reg<u32, _CCER>>[src]

pub fn cc1e(&self) -> CC1E_R[src]

Bit 0 - Capture/Compare 1 output enable

pub fn cc1p(&self) -> CC1P_R[src]

Bit 1 - Capture/Compare 1 output Polarity

pub fn cc1np(&self) -> CC1NP_R[src]

Bit 3 - Capture/Compare 1 output Polarity

pub fn cc2e(&self) -> CC2E_R[src]

Bit 4 - Capture/Compare 2 output enable

pub fn cc2p(&self) -> CC2P_R[src]

Bit 5 - Capture/Compare 2 output Polarity

pub fn cc2np(&self) -> CC2NP_R[src]

Bit 7 - Capture/Compare 2 output Polarity

pub fn cc3e(&self) -> CC3E_R[src]

Bit 8 - Capture/Compare 3 output enable

pub fn cc3p(&self) -> CC3P_R[src]

Bit 9 - Capture/Compare 3 output Polarity

pub fn cc3np(&self) -> CC3NP_R[src]

Bit 11 - Capture/Compare 3 output Polarity

pub fn cc4e(&self) -> CC4E_R[src]

Bit 12 - Capture/Compare 4 output enable

pub fn cc4p(&self) -> CC4P_R[src]

Bit 13 - Capture/Compare 3 output Polarity

pub fn cc4np(&self) -> CC4NP_R[src]

Bit 15 - Capture/Compare 3 output Polarity

impl R<u32, Reg<u32, _CNT>>[src]

pub fn cnt(&self) -> CNT_R[src]

Bits 0:31 - Low counter value

impl R<u32, Reg<u32, _PSC>>[src]

pub fn psc(&self) -> PSC_R[src]

Bits 0:15 - Prescaler value

impl R<u32, Reg<u32, _ARR>>[src]

pub fn arr(&self) -> ARR_R[src]

Bits 0:31 - Low Auto-reload value

impl R<u32, Reg<u32, _CCR>>[src]

pub fn ccr(&self) -> CCR_R[src]

Bits 0:31 - Low Capture/Compare 1 value

impl R<u32, Reg<u32, _DCR>>[src]

pub fn dbl(&self) -> DBL_R[src]

Bits 8:12 - DMA burst length

pub fn dba(&self) -> DBA_R[src]

Bits 0:4 - DMA base address

impl R<u32, Reg<u32, _DMAR>>[src]

pub fn dmab(&self) -> DMAB_R[src]

Bits 0:15 - DMA register for burst accesses

impl R<u32, Reg<u32, _OR>>[src]

pub fn it4_rmp(&self) -> IT4_RMP_R[src]

Bits 6:7 - Timer Input 4 remap

impl R<u8, CKD_A>[src]

pub fn variant(&self) -> Variant<u8, CKD_A>[src]

Get enumerated values variant

pub fn is_div1(&self) -> bool[src]

Checks if the value of the field is DIV1

pub fn is_div2(&self) -> bool[src]

Checks if the value of the field is DIV2

pub fn is_div4(&self) -> bool[src]

Checks if the value of the field is DIV4

impl R<bool, ARPE_A>[src]

pub fn variant(&self) -> ARPE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u8, CMS_A>[src]

pub fn variant(&self) -> CMS_A[src]

Get enumerated values variant

pub fn is_edge_aligned(&self) -> bool[src]

Checks if the value of the field is EDGEALIGNED

pub fn is_center_aligned1(&self) -> bool[src]

Checks if the value of the field is CENTERALIGNED1

pub fn is_center_aligned2(&self) -> bool[src]

Checks if the value of the field is CENTERALIGNED2

pub fn is_center_aligned3(&self) -> bool[src]

Checks if the value of the field is CENTERALIGNED3

impl R<bool, DIR_A>[src]

pub fn variant(&self) -> DIR_A[src]

Get enumerated values variant

pub fn is_up(&self) -> bool[src]

Checks if the value of the field is UP

pub fn is_down(&self) -> bool[src]

Checks if the value of the field is DOWN

impl R<bool, OPM_A>[src]

pub fn variant(&self) -> OPM_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, URS_A>[src]

pub fn variant(&self) -> URS_A[src]

Get enumerated values variant

pub fn is_any_event(&self) -> bool[src]

Checks if the value of the field is ANYEVENT

pub fn is_counter_only(&self) -> bool[src]

Checks if the value of the field is COUNTERONLY

impl R<bool, UDIS_A>[src]

pub fn variant(&self) -> UDIS_A[src]

Get enumerated values variant

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

impl R<bool, CEN_A>[src]

pub fn variant(&self) -> CEN_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u32, Reg<u32, _CR1>>[src]

pub fn ckd(&self) -> CKD_R[src]

Bits 8:9 - Clock division

pub fn arpe(&self) -> ARPE_R[src]

Bit 7 - Auto-reload preload enable

pub fn cms(&self) -> CMS_R[src]

Bits 5:6 - Center-aligned mode selection

pub fn dir(&self) -> DIR_R[src]

Bit 4 - Direction

pub fn opm(&self) -> OPM_R[src]

Bit 3 - One-pulse mode

pub fn urs(&self) -> URS_R[src]

Bit 2 - Update request source

pub fn udis(&self) -> UDIS_R[src]

Bit 1 - Update disable

pub fn cen(&self) -> CEN_R[src]

Bit 0 - Counter enable

impl R<bool, TI1S_A>[src]

pub fn variant(&self) -> TI1S_A[src]

Get enumerated values variant

pub fn is_normal(&self) -> bool[src]

Checks if the value of the field is NORMAL

pub fn is_xor(&self) -> bool[src]

Checks if the value of the field is XOR

impl R<u8, MMS_A>[src]

pub fn variant(&self) -> MMS_A[src]

Get enumerated values variant

pub fn is_reset(&self) -> bool[src]

Checks if the value of the field is RESET

pub fn is_enable(&self) -> bool[src]

Checks if the value of the field is ENABLE

pub fn is_update(&self) -> bool[src]

Checks if the value of the field is UPDATE

pub fn is_compare_pulse(&self) -> bool[src]

Checks if the value of the field is COMPAREPULSE

pub fn is_compare_oc1(&self) -> bool[src]

Checks if the value of the field is COMPAREOC1

pub fn is_compare_oc2(&self) -> bool[src]

Checks if the value of the field is COMPAREOC2

pub fn is_compare_oc3(&self) -> bool[src]

Checks if the value of the field is COMPAREOC3

pub fn is_compare_oc4(&self) -> bool[src]

Checks if the value of the field is COMPAREOC4

impl R<bool, CCDS_A>[src]

pub fn variant(&self) -> CCDS_A[src]

Get enumerated values variant

pub fn is_on_compare(&self) -> bool[src]

Checks if the value of the field is ONCOMPARE

pub fn is_on_update(&self) -> bool[src]

Checks if the value of the field is ONUPDATE

impl R<u32, Reg<u32, _CR2>>[src]

pub fn ti1s(&self) -> TI1S_R[src]

Bit 7 - TI1 selection

pub fn mms(&self) -> MMS_R[src]

Bits 4:6 - Master mode selection

pub fn ccds(&self) -> CCDS_R[src]

Bit 3 - Capture/compare DMA selection

impl R<bool, ETP_A>[src]

pub fn variant(&self) -> ETP_A[src]

Get enumerated values variant

pub fn is_not_inverted(&self) -> bool[src]

Checks if the value of the field is NOTINVERTED

pub fn is_inverted(&self) -> bool[src]

Checks if the value of the field is INVERTED

impl R<bool, ECE_A>[src]

pub fn variant(&self) -> ECE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u8, ETPS_A>[src]

pub fn variant(&self) -> ETPS_A[src]

Get enumerated values variant

pub fn is_div1(&self) -> bool[src]

Checks if the value of the field is DIV1

pub fn is_div2(&self) -> bool[src]

Checks if the value of the field is DIV2

pub fn is_div4(&self) -> bool[src]

Checks if the value of the field is DIV4

pub fn is_div8(&self) -> bool[src]

Checks if the value of the field is DIV8

impl R<u8, ETF_A>[src]

pub fn variant(&self) -> ETF_A[src]

Get enumerated values variant

pub fn is_no_filter(&self) -> bool[src]

Checks if the value of the field is NOFILTER

pub fn is_fck_int_n2(&self) -> bool[src]

Checks if the value of the field is FCK_INT_N2

pub fn is_fck_int_n4(&self) -> bool[src]

Checks if the value of the field is FCK_INT_N4

pub fn is_fck_int_n8(&self) -> bool[src]

Checks if the value of the field is FCK_INT_N8

pub fn is_fdts_div2_n6(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV2_N6

pub fn is_fdts_div2_n8(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV2_N8

pub fn is_fdts_div4_n6(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV4_N6

pub fn is_fdts_div4_n8(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV4_N8

pub fn is_fdts_div8_n6(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV8_N6

pub fn is_fdts_div8_n8(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV8_N8

pub fn is_fdts_div16_n5(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV16_N5

pub fn is_fdts_div16_n6(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV16_N6

pub fn is_fdts_div16_n8(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV16_N8

pub fn is_fdts_div32_n5(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV32_N5

pub fn is_fdts_div32_n6(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV32_N6

pub fn is_fdts_div32_n8(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV32_N8

impl R<bool, MSM_A>[src]

pub fn variant(&self) -> MSM_A[src]

Get enumerated values variant

pub fn is_no_sync(&self) -> bool[src]

Checks if the value of the field is NOSYNC

pub fn is_sync(&self) -> bool[src]

Checks if the value of the field is SYNC

impl R<u8, TS_A>[src]

pub fn variant(&self) -> Variant<u8, TS_A>[src]

Get enumerated values variant

pub fn is_itr0(&self) -> bool[src]

Checks if the value of the field is ITR0

pub fn is_itr1(&self) -> bool[src]

Checks if the value of the field is ITR1

pub fn is_itr2(&self) -> bool[src]

Checks if the value of the field is ITR2

pub fn is_ti1f_ed(&self) -> bool[src]

Checks if the value of the field is TI1F_ED

pub fn is_ti1fp1(&self) -> bool[src]

Checks if the value of the field is TI1FP1

pub fn is_ti2fp2(&self) -> bool[src]

Checks if the value of the field is TI2FP2

pub fn is_etrf(&self) -> bool[src]

Checks if the value of the field is ETRF

impl R<u8, SMS_A>[src]

pub fn variant(&self) -> SMS_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_encoder_mode_1(&self) -> bool[src]

Checks if the value of the field is ENCODER_MODE_1

pub fn is_encoder_mode_2(&self) -> bool[src]

Checks if the value of the field is ENCODER_MODE_2

pub fn is_encoder_mode_3(&self) -> bool[src]

Checks if the value of the field is ENCODER_MODE_3

pub fn is_reset_mode(&self) -> bool[src]

Checks if the value of the field is RESET_MODE

pub fn is_gated_mode(&self) -> bool[src]

Checks if the value of the field is GATED_MODE

pub fn is_trigger_mode(&self) -> bool[src]

Checks if the value of the field is TRIGGER_MODE

pub fn is_ext_clock_mode(&self) -> bool[src]

Checks if the value of the field is EXT_CLOCK_MODE

impl R<u32, Reg<u32, _SMCR>>[src]

pub fn etp(&self) -> ETP_R[src]

Bit 15 - External trigger polarity

pub fn ece(&self) -> ECE_R[src]

Bit 14 - External clock enable

pub fn etps(&self) -> ETPS_R[src]

Bits 12:13 - External trigger prescaler

pub fn etf(&self) -> ETF_R[src]

Bits 8:11 - External trigger filter

pub fn msm(&self) -> MSM_R[src]

Bit 7 - Master/Slave mode

pub fn ts(&self) -> TS_R[src]

Bits 4:6 - Trigger selection

pub fn sms(&self) -> SMS_R[src]

Bits 0:2 - Slave mode selection

impl R<bool, TDE_A>[src]

pub fn variant(&self) -> TDE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, CC4DE_A>[src]

pub fn variant(&self) -> CC4DE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, UDE_A>[src]

pub fn variant(&self) -> UDE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, TIE_A>[src]

pub fn variant(&self) -> TIE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, CC4IE_A>[src]

pub fn variant(&self) -> CC4IE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, UIE_A>[src]

pub fn variant(&self) -> UIE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u32, Reg<u32, _DIER>>[src]

pub fn tde(&self) -> TDE_R[src]

Bit 14 - Trigger DMA request enable

pub fn cc4de(&self) -> CC4DE_R[src]

Bit 12 - Capture/Compare 4 DMA request enable

pub fn cc3de(&self) -> CC3DE_R[src]

Bit 11 - Capture/Compare 3 DMA request enable

pub fn cc2de(&self) -> CC2DE_R[src]

Bit 10 - Capture/Compare 2 DMA request enable

pub fn cc1de(&self) -> CC1DE_R[src]

Bit 9 - Capture/Compare 1 DMA request enable

pub fn ude(&self) -> UDE_R[src]

Bit 8 - Update DMA request enable

pub fn tie(&self) -> TIE_R[src]

Bit 6 - Trigger interrupt enable

pub fn cc4ie(&self) -> CC4IE_R[src]

Bit 4 - Capture/Compare 4 interrupt enable

pub fn cc3ie(&self) -> CC3IE_R[src]

Bit 3 - Capture/Compare 3 interrupt enable

pub fn cc2ie(&self) -> CC2IE_R[src]

Bit 2 - Capture/Compare 2 interrupt enable

pub fn cc1ie(&self) -> CC1IE_R[src]

Bit 1 - Capture/Compare 1 interrupt enable

pub fn uie(&self) -> UIE_R[src]

Bit 0 - Update interrupt enable

impl R<bool, CC4OF_A>[src]

pub fn variant(&self) -> Variant<bool, CC4OF_A>[src]

Get enumerated values variant

pub fn is_overcapture(&self) -> bool[src]

Checks if the value of the field is OVERCAPTURE

impl R<bool, TIF_A>[src]

pub fn variant(&self) -> TIF_A[src]

Get enumerated values variant

pub fn is_no_trigger(&self) -> bool[src]

Checks if the value of the field is NOTRIGGER

pub fn is_trigger(&self) -> bool[src]

Checks if the value of the field is TRIGGER

impl R<bool, CC4IF_A>[src]

pub fn variant(&self) -> Variant<bool, CC4IF_A>[src]

Get enumerated values variant

pub fn is_match_(&self) -> bool[src]

Checks if the value of the field is MATCH

impl R<bool, UIF_A>[src]

pub fn variant(&self) -> UIF_A[src]

Get enumerated values variant

pub fn is_clear(&self) -> bool[src]

Checks if the value of the field is CLEAR

pub fn is_update_pending(&self) -> bool[src]

Checks if the value of the field is UPDATEPENDING

impl R<u32, Reg<u32, _SR>>[src]

pub fn cc4of(&self) -> CC4OF_R[src]

Bit 12 - Capture/Compare 4 overcapture flag

pub fn cc3of(&self) -> CC3OF_R[src]

Bit 11 - Capture/Compare 3 overcapture flag

pub fn cc2of(&self) -> CC2OF_R[src]

Bit 10 - Capture/compare 2 overcapture flag

pub fn cc1of(&self) -> CC1OF_R[src]

Bit 9 - Capture/Compare 1 overcapture flag

pub fn tif(&self) -> TIF_R[src]

Bit 6 - Trigger interrupt flag

pub fn cc4if(&self) -> CC4IF_R[src]

Bit 4 - Capture/Compare 4 interrupt flag

pub fn cc3if(&self) -> CC3IF_R[src]

Bit 3 - Capture/Compare 3 interrupt flag

pub fn cc2if(&self) -> CC2IF_R[src]

Bit 2 - Capture/Compare 2 interrupt flag

pub fn cc1if(&self) -> CC1IF_R[src]

Bit 1 - Capture/compare 1 interrupt flag

pub fn uif(&self) -> UIF_R[src]

Bit 0 - Update interrupt flag

impl R<u8, OC2M_A>[src]

pub fn variant(&self) -> OC2M_A[src]

Get enumerated values variant

pub fn is_frozen(&self) -> bool[src]

Checks if the value of the field is FROZEN

pub fn is_active_on_match(&self) -> bool[src]

Checks if the value of the field is ACTIVEONMATCH

pub fn is_inactive_on_match(&self) -> bool[src]

Checks if the value of the field is INACTIVEONMATCH

pub fn is_toggle(&self) -> bool[src]

Checks if the value of the field is TOGGLE

pub fn is_force_inactive(&self) -> bool[src]

Checks if the value of the field is FORCEINACTIVE

pub fn is_force_active(&self) -> bool[src]

Checks if the value of the field is FORCEACTIVE

pub fn is_pwm_mode1(&self) -> bool[src]

Checks if the value of the field is PWMMODE1

pub fn is_pwm_mode2(&self) -> bool[src]

Checks if the value of the field is PWMMODE2

impl R<bool, OC2PE_A>[src]

pub fn variant(&self) -> OC2PE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u8, CC2S_A>[src]

pub fn variant(&self) -> Variant<u8, CC2S_A>[src]

Get enumerated values variant

pub fn is_output(&self) -> bool[src]

Checks if the value of the field is OUTPUT

impl R<bool, OC1PE_A>[src]

pub fn variant(&self) -> OC1PE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u8, CC1S_A>[src]

pub fn variant(&self) -> Variant<u8, CC1S_A>[src]

Get enumerated values variant

pub fn is_output(&self) -> bool[src]

Checks if the value of the field is OUTPUT

impl R<u32, Reg<u32, _CCMR1_OUTPUT>>[src]

pub fn oc2ce(&self) -> OC2CE_R[src]

Bit 15 - Output compare 2 clear enable

pub fn oc2m(&self) -> OC2M_R[src]

Bits 12:14 - Output compare 2 mode

pub fn oc2pe(&self) -> OC2PE_R[src]

Bit 11 - Output compare 2 preload enable

pub fn oc2fe(&self) -> OC2FE_R[src]

Bit 10 - Output compare 2 fast enable

pub fn cc2s(&self) -> CC2S_R[src]

Bits 8:9 - Capture/Compare 2 selection

pub fn oc1ce(&self) -> OC1CE_R[src]

Bit 7 - Output compare 1 clear enable

pub fn oc1m(&self) -> OC1M_R[src]

Bits 4:6 - Output compare 1 mode

pub fn oc1pe(&self) -> OC1PE_R[src]

Bit 3 - Output compare 1 preload enable

pub fn oc1fe(&self) -> OC1FE_R[src]

Bit 2 - Output compare 1 fast enable

pub fn cc1s(&self) -> CC1S_R[src]

Bits 0:1 - Capture/Compare 1 selection

impl R<u8, CC2S_A>[src]

pub fn variant(&self) -> Variant<u8, CC2S_A>[src]

Get enumerated values variant

pub fn is_ti2(&self) -> bool[src]

Checks if the value of the field is TI2

pub fn is_ti1(&self) -> bool[src]

Checks if the value of the field is TI1

pub fn is_trc(&self) -> bool[src]

Checks if the value of the field is TRC

impl R<u8, IC1F_A>[src]

pub fn variant(&self) -> IC1F_A[src]

Get enumerated values variant

pub fn is_no_filter(&self) -> bool[src]

Checks if the value of the field is NOFILTER

pub fn is_fck_int_n2(&self) -> bool[src]

Checks if the value of the field is FCK_INT_N2

pub fn is_fck_int_n4(&self) -> bool[src]

Checks if the value of the field is FCK_INT_N4

pub fn is_fck_int_n8(&self) -> bool[src]

Checks if the value of the field is FCK_INT_N8

pub fn is_fdts_div2_n6(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV2_N6

pub fn is_fdts_div2_n8(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV2_N8

pub fn is_fdts_div4_n6(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV4_N6

pub fn is_fdts_div4_n8(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV4_N8

pub fn is_fdts_div8_n6(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV8_N6

pub fn is_fdts_div8_n8(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV8_N8

pub fn is_fdts_div16_n5(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV16_N5

pub fn is_fdts_div16_n6(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV16_N6

pub fn is_fdts_div16_n8(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV16_N8

pub fn is_fdts_div32_n5(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV32_N5

pub fn is_fdts_div32_n6(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV32_N6

pub fn is_fdts_div32_n8(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV32_N8

impl R<u8, CC1S_A>[src]

pub fn variant(&self) -> Variant<u8, CC1S_A>[src]

Get enumerated values variant

pub fn is_ti1(&self) -> bool[src]

Checks if the value of the field is TI1

pub fn is_ti2(&self) -> bool[src]

Checks if the value of the field is TI2

pub fn is_trc(&self) -> bool[src]

Checks if the value of the field is TRC

impl R<u32, Reg<u32, _CCMR1_INPUT>>[src]

pub fn ic2f(&self) -> IC2F_R[src]

Bits 12:15 - Input capture 2 filter

pub fn ic2psc(&self) -> IC2PSC_R[src]

Bits 10:11 - Input capture 2 prescaler

pub fn cc2s(&self) -> CC2S_R[src]

Bits 8:9 - Capture/compare 2 selection

pub fn ic1f(&self) -> IC1F_R[src]

Bits 4:7 - Input capture 1 filter

pub fn ic1psc(&self) -> IC1PSC_R[src]

Bits 2:3 - Input capture 1 prescaler

pub fn cc1s(&self) -> CC1S_R[src]

Bits 0:1 - Capture/Compare 1 selection

impl R<u8, OC4M_A>[src]

pub fn variant(&self) -> OC4M_A[src]

Get enumerated values variant

pub fn is_frozen(&self) -> bool[src]

Checks if the value of the field is FROZEN

pub fn is_active_on_match(&self) -> bool[src]

Checks if the value of the field is ACTIVEONMATCH

pub fn is_inactive_on_match(&self) -> bool[src]

Checks if the value of the field is INACTIVEONMATCH

pub fn is_toggle(&self) -> bool[src]

Checks if the value of the field is TOGGLE

pub fn is_force_inactive(&self) -> bool[src]

Checks if the value of the field is FORCEINACTIVE

pub fn is_force_active(&self) -> bool[src]

Checks if the value of the field is FORCEACTIVE

pub fn is_pwm_mode1(&self) -> bool[src]

Checks if the value of the field is PWMMODE1

pub fn is_pwm_mode2(&self) -> bool[src]

Checks if the value of the field is PWMMODE2

impl R<bool, OC4PE_A>[src]

pub fn variant(&self) -> OC4PE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u8, CC4S_A>[src]

pub fn variant(&self) -> Variant<u8, CC4S_A>[src]

Get enumerated values variant

pub fn is_output(&self) -> bool[src]

Checks if the value of the field is OUTPUT

impl R<bool, OC3PE_A>[src]

pub fn variant(&self) -> OC3PE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u8, CC3S_A>[src]

pub fn variant(&self) -> Variant<u8, CC3S_A>[src]

Get enumerated values variant

pub fn is_output(&self) -> bool[src]

Checks if the value of the field is OUTPUT

impl R<u32, Reg<u32, _CCMR2_OUTPUT>>[src]

pub fn oc4ce(&self) -> OC4CE_R[src]

Bit 15 - Output compare 4 clear enable

pub fn oc4m(&self) -> OC4M_R[src]

Bits 12:14 - Output compare 4 mode

pub fn oc4pe(&self) -> OC4PE_R[src]

Bit 11 - Output compare 4 preload enable

pub fn oc4fe(&self) -> OC4FE_R[src]

Bit 10 - Output compare 4 fast enable

pub fn cc4s(&self) -> CC4S_R[src]

Bits 8:9 - Capture/Compare 4 selection

pub fn oc3ce(&self) -> OC3CE_R[src]

Bit 7 - Output compare 3 clear enable

pub fn oc3m(&self) -> OC3M_R[src]

Bits 4:6 - Output compare 3 mode

pub fn oc3pe(&self) -> OC3PE_R[src]

Bit 3 - Output compare 3 preload enable

pub fn oc3fe(&self) -> OC3FE_R[src]

Bit 2 - Output compare 3 fast enable

pub fn cc3s(&self) -> CC3S_R[src]

Bits 0:1 - Capture/Compare 3 selection

impl R<u8, CC4S_A>[src]

pub fn variant(&self) -> Variant<u8, CC4S_A>[src]

Get enumerated values variant

pub fn is_ti4(&self) -> bool[src]

Checks if the value of the field is TI4

pub fn is_ti3(&self) -> bool[src]

Checks if the value of the field is TI3

pub fn is_trc(&self) -> bool[src]

Checks if the value of the field is TRC

impl R<u8, CC3S_A>[src]

pub fn variant(&self) -> Variant<u8, CC3S_A>[src]

Get enumerated values variant

pub fn is_ti3(&self) -> bool[src]

Checks if the value of the field is TI3

pub fn is_ti4(&self) -> bool[src]

Checks if the value of the field is TI4

pub fn is_trc(&self) -> bool[src]

Checks if the value of the field is TRC

impl R<u32, Reg<u32, _CCMR2_INPUT>>[src]

pub fn ic4f(&self) -> IC4F_R[src]

Bits 12:15 - Input capture 4 filter

pub fn ic4psc(&self) -> IC4PSC_R[src]

Bits 10:11 - Input capture 4 prescaler

pub fn cc4s(&self) -> CC4S_R[src]

Bits 8:9 - Capture/Compare 4 selection

pub fn ic3f(&self) -> IC3F_R[src]

Bits 4:7 - Input capture 3 filter

pub fn ic3psc(&self) -> IC3PSC_R[src]

Bits 2:3 - Input capture 3 prescaler

pub fn cc3s(&self) -> CC3S_R[src]

Bits 0:1 - Capture/Compare 3 selection

impl R<u32, Reg<u32, _CCER>>[src]

pub fn cc1e(&self) -> CC1E_R[src]

Bit 0 - Capture/Compare 1 output enable

pub fn cc1p(&self) -> CC1P_R[src]

Bit 1 - Capture/Compare 1 output Polarity

pub fn cc1np(&self) -> CC1NP_R[src]

Bit 3 - Capture/Compare 1 output Polarity

pub fn cc2e(&self) -> CC2E_R[src]

Bit 4 - Capture/Compare 2 output enable

pub fn cc2p(&self) -> CC2P_R[src]

Bit 5 - Capture/Compare 2 output Polarity

pub fn cc2np(&self) -> CC2NP_R[src]

Bit 7 - Capture/Compare 2 output Polarity

pub fn cc3e(&self) -> CC3E_R[src]

Bit 8 - Capture/Compare 3 output enable

pub fn cc3p(&self) -> CC3P_R[src]

Bit 9 - Capture/Compare 3 output Polarity

pub fn cc3np(&self) -> CC3NP_R[src]

Bit 11 - Capture/Compare 3 output Polarity

pub fn cc4e(&self) -> CC4E_R[src]

Bit 12 - Capture/Compare 4 output enable

pub fn cc4p(&self) -> CC4P_R[src]

Bit 13 - Capture/Compare 3 output Polarity

pub fn cc4np(&self) -> CC4NP_R[src]

Bit 15 - Capture/Compare 3 output Polarity

impl R<u32, Reg<u32, _CNT>>[src]

pub fn cnt(&self) -> CNT_R[src]

Bits 0:15 - counter value

impl R<u32, Reg<u32, _PSC>>[src]

pub fn psc(&self) -> PSC_R[src]

Bits 0:15 - Prescaler value

impl R<u32, Reg<u32, _ARR>>[src]

pub fn arr(&self) -> ARR_R[src]

Bits 0:15 - Auto-reload value

impl R<u32, Reg<u32, _CCR>>[src]

pub fn ccr(&self) -> CCR_R[src]

Bits 0:15 - Capture/Compare 1 value

impl R<u32, Reg<u32, _DCR>>[src]

pub fn dbl(&self) -> DBL_R[src]

Bits 8:12 - DMA burst length

pub fn dba(&self) -> DBA_R[src]

Bits 0:4 - DMA base address

impl R<u32, Reg<u32, _DMAR>>[src]

pub fn dmab(&self) -> DMAB_R[src]

Bits 0:15 - DMA register for burst accesses

impl R<u8, CKD_A>[src]

pub fn variant(&self) -> Variant<u8, CKD_A>[src]

Get enumerated values variant

pub fn is_div1(&self) -> bool[src]

Checks if the value of the field is DIV1

pub fn is_div2(&self) -> bool[src]

Checks if the value of the field is DIV2

pub fn is_div4(&self) -> bool[src]

Checks if the value of the field is DIV4

impl R<bool, ARPE_A>[src]

pub fn variant(&self) -> ARPE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, URS_A>[src]

pub fn variant(&self) -> URS_A[src]

Get enumerated values variant

pub fn is_any_event(&self) -> bool[src]

Checks if the value of the field is ANYEVENT

pub fn is_counter_only(&self) -> bool[src]

Checks if the value of the field is COUNTERONLY

impl R<bool, UDIS_A>[src]

pub fn variant(&self) -> UDIS_A[src]

Get enumerated values variant

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

impl R<bool, CEN_A>[src]

pub fn variant(&self) -> CEN_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u32, Reg<u32, _CR1>>[src]

pub fn ckd(&self) -> CKD_R[src]

Bits 8:9 - Clock division

pub fn arpe(&self) -> ARPE_R[src]

Bit 7 - Auto-reload preload enable

pub fn opm(&self) -> OPM_R[src]

Bit 3 - One-pulse mode

pub fn urs(&self) -> URS_R[src]

Bit 2 - Update request source

pub fn udis(&self) -> UDIS_R[src]

Bit 1 - Update disable

pub fn cen(&self) -> CEN_R[src]

Bit 0 - Counter enable

impl R<u32, Reg<u32, _CR2>>[src]

pub fn ois2(&self) -> OIS2_R[src]

Bit 10 - Output Idle state 2

pub fn ois1n(&self) -> OIS1N_R[src]

Bit 9 - Output Idle state 1

pub fn ois1(&self) -> OIS1_R[src]

Bit 8 - Output Idle state 1

pub fn mms(&self) -> MMS_R[src]

Bits 4:6 - Master mode selection

pub fn ccds(&self) -> CCDS_R[src]

Bit 3 - Capture/compare DMA selection

pub fn ccus(&self) -> CCUS_R[src]

Bit 2 - Capture/compare control update selection

pub fn ccpc(&self) -> CCPC_R[src]

Bit 0 - Capture/compare preloaded control

impl R<u32, Reg<u32, _SMCR>>[src]

pub fn msm(&self) -> MSM_R[src]

Bit 7 - Master/Slave mode

pub fn ts(&self) -> TS_R[src]

Bits 4:6 - Trigger selection

pub fn sms(&self) -> SMS_R[src]

Bits 0:2 - Slave mode selection

impl R<bool, UIE_A>[src]

pub fn variant(&self) -> UIE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u32, Reg<u32, _DIER>>[src]

pub fn tde(&self) -> TDE_R[src]

Bit 14 - Trigger DMA request enable

pub fn cc2de(&self) -> CC2DE_R[src]

Bit 10 - Capture/Compare 2 DMA request enable

pub fn cc1de(&self) -> CC1DE_R[src]

Bit 9 - Capture/Compare 1 DMA request enable

pub fn ude(&self) -> UDE_R[src]

Bit 8 - Update DMA request enable

pub fn bie(&self) -> BIE_R[src]

Bit 7 - Break interrupt enable

pub fn tie(&self) -> TIE_R[src]

Bit 6 - Trigger interrupt enable

pub fn comie(&self) -> COMIE_R[src]

Bit 5 - COM interrupt enable

pub fn cc2ie(&self) -> CC2IE_R[src]

Bit 2 - Capture/Compare 2 interrupt enable

pub fn cc1ie(&self) -> CC1IE_R[src]

Bit 1 - Capture/Compare 1 interrupt enable

pub fn uie(&self) -> UIE_R[src]

Bit 0 - Update interrupt enable

impl R<bool, UIF_A>[src]

pub fn variant(&self) -> UIF_A[src]

Get enumerated values variant

pub fn is_clear(&self) -> bool[src]

Checks if the value of the field is CLEAR

pub fn is_update_pending(&self) -> bool[src]

Checks if the value of the field is UPDATEPENDING

impl R<u32, Reg<u32, _SR>>[src]

pub fn cc2of(&self) -> CC2OF_R[src]

Bit 10 - Capture/compare 2 overcapture flag

pub fn cc1of(&self) -> CC1OF_R[src]

Bit 9 - Capture/Compare 1 overcapture flag

pub fn bif(&self) -> BIF_R[src]

Bit 7 - Break interrupt flag

pub fn tif(&self) -> TIF_R[src]

Bit 6 - Trigger interrupt flag

pub fn comif(&self) -> COMIF_R[src]

Bit 5 - COM interrupt flag

pub fn cc2if(&self) -> CC2IF_R[src]

Bit 2 - Capture/Compare 2 interrupt flag

pub fn cc1if(&self) -> CC1IF_R[src]

Bit 1 - Capture/compare 1 interrupt flag

pub fn uif(&self) -> UIF_R[src]

Bit 0 - Update interrupt flag

impl R<u32, Reg<u32, _CCMR1_OUTPUT>>[src]

pub fn oc2m(&self) -> OC2M_R[src]

Bits 12:14 - Output Compare 2 mode

pub fn oc2pe(&self) -> OC2PE_R[src]

Bit 11 - Output Compare 2 preload enable

pub fn oc2fe(&self) -> OC2FE_R[src]

Bit 10 - Output Compare 2 fast enable

pub fn cc2s(&self) -> CC2S_R[src]

Bits 8:9 - Capture/Compare 2 selection

pub fn oc1m(&self) -> OC1M_R[src]

Bits 4:6 - Output Compare 1 mode

pub fn oc1pe(&self) -> OC1PE_R[src]

Bit 3 - Output Compare 1 preload enable

pub fn oc1fe(&self) -> OC1FE_R[src]

Bit 2 - Output Compare 1 fast enable

pub fn cc1s(&self) -> CC1S_R[src]

Bits 0:1 - Capture/Compare 1 selection

impl R<u32, Reg<u32, _CCMR1_INPUT>>[src]

pub fn ic2f(&self) -> IC2F_R[src]

Bits 12:15 - Input capture 2 filter

pub fn ic2psc(&self) -> IC2PSC_R[src]

Bits 10:11 - Input capture 2 prescaler

pub fn cc2s(&self) -> CC2S_R[src]

Bits 8:9 - Capture/Compare 2 selection

pub fn ic1f(&self) -> IC1F_R[src]

Bits 4:7 - Input capture 1 filter

pub fn ic1psc(&self) -> IC1PSC_R[src]

Bits 2:3 - Input capture 1 prescaler

pub fn cc1s(&self) -> CC1S_R[src]

Bits 0:1 - Capture/Compare 1 selection

impl R<u32, Reg<u32, _CCER>>[src]

pub fn cc2np(&self) -> CC2NP_R[src]

Bit 7 - Capture/Compare 2 output Polarity

pub fn cc2p(&self) -> CC2P_R[src]

Bit 5 - Capture/Compare 2 output Polarity

pub fn cc2e(&self) -> CC2E_R[src]

Bit 4 - Capture/Compare 2 output enable

pub fn cc1np(&self) -> CC1NP_R[src]

Bit 3 - Capture/Compare 1 output Polarity

pub fn cc1ne(&self) -> CC1NE_R[src]

Bit 2 - Capture/Compare 1 complementary output enable

pub fn cc1p(&self) -> CC1P_R[src]

Bit 1 - Capture/Compare 1 output Polarity

pub fn cc1e(&self) -> CC1E_R[src]

Bit 0 - Capture/Compare 1 output enable

impl R<u32, Reg<u32, _CNT>>[src]

pub fn cnt(&self) -> CNT_R[src]

Bits 0:15 - counter value

impl R<u32, Reg<u32, _PSC>>[src]

pub fn psc(&self) -> PSC_R[src]

Bits 0:15 - Prescaler value

impl R<u32, Reg<u32, _ARR>>[src]

pub fn arr(&self) -> ARR_R[src]

Bits 0:15 - Auto-reload value

impl R<u32, Reg<u32, _RCR>>[src]

pub fn rep(&self) -> REP_R[src]

Bits 0:7 - Repetition counter value

impl R<u32, Reg<u32, _CCR1>>[src]

pub fn ccr1(&self) -> CCR1_R[src]

Bits 0:15 - Capture/Compare 1 value

impl R<u32, Reg<u32, _CCR2>>[src]

pub fn ccr2(&self) -> CCR2_R[src]

Bits 0:15 - Capture/Compare 2 value

impl R<u32, Reg<u32, _BDTR>>[src]

pub fn moe(&self) -> MOE_R[src]

Bit 15 - Main output enable

pub fn aoe(&self) -> AOE_R[src]

Bit 14 - Automatic output enable

pub fn bkp(&self) -> BKP_R[src]

Bit 13 - Break polarity

pub fn bke(&self) -> BKE_R[src]

Bit 12 - Break enable

pub fn ossr(&self) -> OSSR_R[src]

Bit 11 - Off-state selection for Run mode

pub fn ossi(&self) -> OSSI_R[src]

Bit 10 - Off-state selection for Idle mode

pub fn lock(&self) -> LOCK_R[src]

Bits 8:9 - Lock configuration

pub fn dtg(&self) -> DTG_R[src]

Bits 0:7 - Dead-time generator setup

impl R<u32, Reg<u32, _DCR>>[src]

pub fn dbl(&self) -> DBL_R[src]

Bits 8:12 - DMA burst length

pub fn dba(&self) -> DBA_R[src]

Bits 0:4 - DMA base address

impl R<u32, Reg<u32, _DMAR>>[src]

pub fn dmab(&self) -> DMAB_R[src]

Bits 0:15 - DMA register for burst accesses

impl R<u8, CKD_A>[src]

pub fn variant(&self) -> Variant<u8, CKD_A>[src]

Get enumerated values variant

pub fn is_div1(&self) -> bool[src]

Checks if the value of the field is DIV1

pub fn is_div2(&self) -> bool[src]

Checks if the value of the field is DIV2

pub fn is_div4(&self) -> bool[src]

Checks if the value of the field is DIV4

impl R<bool, ARPE_A>[src]

pub fn variant(&self) -> ARPE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, OPM_A>[src]

pub fn variant(&self) -> OPM_A[src]

Get enumerated values variant

pub fn is_not_stopped(&self) -> bool[src]

Checks if the value of the field is NOTSTOPPED

pub fn is_stopped(&self) -> bool[src]

Checks if the value of the field is STOPPED

impl R<bool, URS_A>[src]

pub fn variant(&self) -> URS_A[src]

Get enumerated values variant

pub fn is_any_event(&self) -> bool[src]

Checks if the value of the field is ANYEVENT

pub fn is_counter_only(&self) -> bool[src]

Checks if the value of the field is COUNTERONLY

impl R<bool, UDIS_A>[src]

pub fn variant(&self) -> UDIS_A[src]

Get enumerated values variant

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

impl R<bool, CEN_A>[src]

pub fn variant(&self) -> CEN_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u32, Reg<u32, _CR1>>[src]

pub fn ckd(&self) -> CKD_R[src]

Bits 8:9 - Clock division

pub fn arpe(&self) -> ARPE_R[src]

Bit 7 - Auto-reload preload enable

pub fn opm(&self) -> OPM_R[src]

Bit 3 - One-pulse mode

pub fn urs(&self) -> URS_R[src]

Bit 2 - Update request source

pub fn udis(&self) -> UDIS_R[src]

Bit 1 - Update disable

pub fn cen(&self) -> CEN_R[src]

Bit 0 - Counter enable

impl R<bool, OIS1N_A>[src]

pub fn variant(&self) -> OIS1N_A[src]

Get enumerated values variant

pub fn is_low(&self) -> bool[src]

Checks if the value of the field is LOW

pub fn is_high(&self) -> bool[src]

Checks if the value of the field is HIGH

impl R<bool, OIS1_A>[src]

pub fn variant(&self) -> OIS1_A[src]

Get enumerated values variant

pub fn is_low(&self) -> bool[src]

Checks if the value of the field is LOW

pub fn is_high(&self) -> bool[src]

Checks if the value of the field is HIGH

impl R<bool, CCDS_A>[src]

pub fn variant(&self) -> CCDS_A[src]

Get enumerated values variant

pub fn is_on_compare(&self) -> bool[src]

Checks if the value of the field is ONCOMPARE

pub fn is_on_update(&self) -> bool[src]

Checks if the value of the field is ONUPDATE

impl R<bool, CCUS_A>[src]

pub fn variant(&self) -> CCUS_A[src]

Get enumerated values variant

pub fn is_default(&self) -> bool[src]

Checks if the value of the field is DEFAULT

pub fn is_with_rising_edge(&self) -> bool[src]

Checks if the value of the field is WITHRISINGEDGE

impl R<bool, CCPC_A>[src]

pub fn variant(&self) -> CCPC_A[src]

Get enumerated values variant

pub fn is_not_preloaded(&self) -> bool[src]

Checks if the value of the field is NOTPRELOADED

pub fn is_preloaded(&self) -> bool[src]

Checks if the value of the field is PRELOADED

impl R<u32, Reg<u32, _CR2>>[src]

pub fn ois1n(&self) -> OIS1N_R[src]

Bit 9 - Output Idle state 1

pub fn ois1(&self) -> OIS1_R[src]

Bit 8 - Output Idle state 1

pub fn ccds(&self) -> CCDS_R[src]

Bit 3 - Capture/compare DMA selection

pub fn ccus(&self) -> CCUS_R[src]

Bit 2 - Capture/compare control update selection

pub fn ccpc(&self) -> CCPC_R[src]

Bit 0 - Capture/compare preloaded control

impl R<bool, CC1DE_A>[src]

pub fn variant(&self) -> CC1DE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, BIE_A>[src]

pub fn variant(&self) -> BIE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, COMIE_A>[src]

pub fn variant(&self) -> COMIE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, CC1IE_A>[src]

pub fn variant(&self) -> CC1IE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, UIE_A>[src]

pub fn variant(&self) -> UIE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u32, Reg<u32, _DIER>>[src]

pub fn tde(&self) -> TDE_R[src]

Bit 14 - Trigger DMA request enable

pub fn cc1de(&self) -> CC1DE_R[src]

Bit 9 - Capture/Compare 1 DMA request enable

pub fn ude(&self) -> UDE_R[src]

Bit 8 - Update DMA request enable

pub fn bie(&self) -> BIE_R[src]

Bit 7 - Break interrupt enable

pub fn tie(&self) -> TIE_R[src]

Bit 6 - Trigger interrupt enable

pub fn comie(&self) -> COMIE_R[src]

Bit 5 - COM interrupt enable

pub fn cc1ie(&self) -> CC1IE_R[src]

Bit 1 - Capture/Compare 1 interrupt enable

pub fn uie(&self) -> UIE_R[src]

Bit 0 - Update interrupt enable

impl R<bool, UIF_A>[src]

pub fn variant(&self) -> UIF_A[src]

Get enumerated values variant

pub fn is_clear(&self) -> bool[src]

Checks if the value of the field is CLEAR

pub fn is_update_pending(&self) -> bool[src]

Checks if the value of the field is UPDATEPENDING

impl R<u32, Reg<u32, _SR>>[src]

pub fn cc1of(&self) -> CC1OF_R[src]

Bit 9 - Capture/Compare 1 overcapture flag

pub fn bif(&self) -> BIF_R[src]

Bit 7 - Break interrupt flag

pub fn tif(&self) -> TIF_R[src]

Bit 6 - Trigger interrupt flag

pub fn comif(&self) -> COMIF_R[src]

Bit 5 - COM interrupt flag

pub fn cc1if(&self) -> CC1IF_R[src]

Bit 1 - Capture/compare 1 interrupt flag

pub fn uif(&self) -> UIF_R[src]

Bit 0 - Update interrupt flag

impl R<u32, Reg<u32, _CCMR1_OUTPUT>>[src]

pub fn oc1m(&self) -> OC1M_R[src]

Bits 4:6 - Output Compare 1 mode

pub fn oc1pe(&self) -> OC1PE_R[src]

Bit 3 - Output Compare 1 preload enable

pub fn oc1fe(&self) -> OC1FE_R[src]

Bit 2 - Output Compare 1 fast enable

pub fn cc1s(&self) -> CC1S_R[src]

Bits 0:1 - Capture/Compare 1 selection

impl R<u32, Reg<u32, _CCMR1_INPUT>>[src]

pub fn ic1f(&self) -> IC1F_R[src]

Bits 4:7 - Input capture 1 filter

pub fn ic1psc(&self) -> IC1PSC_R[src]

Bits 2:3 - Input capture 1 prescaler

pub fn cc1s(&self) -> CC1S_R[src]

Bits 0:1 - Capture/Compare 1 selection

impl R<u32, Reg<u32, _CCER>>[src]

pub fn cc1np(&self) -> CC1NP_R[src]

Bit 3 - Capture/Compare 1 output Polarity

pub fn cc1ne(&self) -> CC1NE_R[src]

Bit 2 - Capture/Compare 1 complementary output enable

pub fn cc1p(&self) -> CC1P_R[src]

Bit 1 - Capture/Compare 1 output Polarity

pub fn cc1e(&self) -> CC1E_R[src]

Bit 0 - Capture/Compare 1 output enable

impl R<u32, Reg<u32, _CNT>>[src]

pub fn cnt(&self) -> CNT_R[src]

Bits 0:15 - counter value

impl R<u32, Reg<u32, _PSC>>[src]

pub fn psc(&self) -> PSC_R[src]

Bits 0:15 - Prescaler value

impl R<u32, Reg<u32, _ARR>>[src]

pub fn arr(&self) -> ARR_R[src]

Bits 0:15 - Auto-reload value

impl R<u32, Reg<u32, _RCR>>[src]

pub fn rep(&self) -> REP_R[src]

Bits 0:7 - Repetition counter value

impl R<u32, Reg<u32, _CCR1>>[src]

pub fn ccr1(&self) -> CCR1_R[src]

Bits 0:15 - Capture/Compare 1 value

impl R<u32, Reg<u32, _BDTR>>[src]

pub fn moe(&self) -> MOE_R[src]

Bit 15 - Main output enable

pub fn aoe(&self) -> AOE_R[src]

Bit 14 - Automatic output enable

pub fn bkp(&self) -> BKP_R[src]

Bit 13 - Break polarity

pub fn bke(&self) -> BKE_R[src]

Bit 12 - Break enable

pub fn ossr(&self) -> OSSR_R[src]

Bit 11 - Off-state selection for Run mode

pub fn ossi(&self) -> OSSI_R[src]

Bit 10 - Off-state selection for Idle mode

pub fn lock(&self) -> LOCK_R[src]

Bits 8:9 - Lock configuration

pub fn dtg(&self) -> DTG_R[src]

Bits 0:7 - Dead-time generator setup

impl R<u32, Reg<u32, _DCR>>[src]

pub fn dbl(&self) -> DBL_R[src]

Bits 8:12 - DMA burst length

pub fn dba(&self) -> DBA_R[src]

Bits 0:4 - DMA base address

impl R<u32, Reg<u32, _DMAR>>[src]

pub fn dmab(&self) -> DMAB_R[src]

Bits 0:15 - DMA register for burst accesses

impl R<bool, EOBIE_A>[src]

pub fn variant(&self) -> EOBIE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, RTOIE_A>[src]

pub fn variant(&self) -> RTOIE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, OVER8_A>[src]

pub fn variant(&self) -> OVER8_A[src]

Get enumerated values variant

pub fn is_oversampling16(&self) -> bool[src]

Checks if the value of the field is OVERSAMPLING16

pub fn is_oversampling8(&self) -> bool[src]

Checks if the value of the field is OVERSAMPLING8

impl R<bool, CMIE_A>[src]

pub fn variant(&self) -> CMIE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, MME_A>[src]

pub fn variant(&self) -> MME_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, M_A>[src]

pub fn variant(&self) -> M_A[src]

Get enumerated values variant

pub fn is_bit8(&self) -> bool[src]

Checks if the value of the field is BIT8

pub fn is_bit9(&self) -> bool[src]

Checks if the value of the field is BIT9

impl R<bool, WAKE_A>[src]

pub fn variant(&self) -> WAKE_A[src]

Get enumerated values variant

pub fn is_idle(&self) -> bool[src]

Checks if the value of the field is IDLE

pub fn is_address(&self) -> bool[src]

Checks if the value of the field is ADDRESS

impl R<bool, PCE_A>[src]

pub fn variant(&self) -> PCE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, PS_A>[src]

pub fn variant(&self) -> PS_A[src]

Get enumerated values variant

pub fn is_even(&self) -> bool[src]

Checks if the value of the field is EVEN

pub fn is_odd(&self) -> bool[src]

Checks if the value of the field is ODD

impl R<bool, PEIE_A>[src]

pub fn variant(&self) -> PEIE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, TXEIE_A>[src]

pub fn variant(&self) -> TXEIE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, TCIE_A>[src]

pub fn variant(&self) -> TCIE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, RXNEIE_A>[src]

pub fn variant(&self) -> RXNEIE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, IDLEIE_A>[src]

pub fn variant(&self) -> IDLEIE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, TE_A>[src]

pub fn variant(&self) -> TE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, RE_A>[src]

pub fn variant(&self) -> RE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, UESM_A>[src]

pub fn variant(&self) -> UESM_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, UE_A>[src]

pub fn variant(&self) -> UE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u32, Reg<u32, _CR1>>[src]

pub fn eobie(&self) -> EOBIE_R[src]

Bit 27 - End of Block interrupt enable

pub fn rtoie(&self) -> RTOIE_R[src]

Bit 26 - Receiver timeout interrupt enable

pub fn deat(&self) -> DEAT_R[src]

Bits 21:25 - Driver Enable assertion time

pub fn dedt(&self) -> DEDT_R[src]

Bits 16:20 - Driver Enable deassertion time

pub fn over8(&self) -> OVER8_R[src]

Bit 15 - Oversampling mode

pub fn cmie(&self) -> CMIE_R[src]

Bit 14 - Character match interrupt enable

pub fn mme(&self) -> MME_R[src]

Bit 13 - Mute mode enable

pub fn m(&self) -> M_R[src]

Bit 12 - Word length

pub fn wake(&self) -> WAKE_R[src]

Bit 11 - Receiver wakeup method

pub fn pce(&self) -> PCE_R[src]

Bit 10 - Parity control enable

pub fn ps(&self) -> PS_R[src]

Bit 9 - Parity selection

pub fn peie(&self) -> PEIE_R[src]

Bit 8 - PE interrupt enable

pub fn txeie(&self) -> TXEIE_R[src]

Bit 7 - interrupt enable

pub fn tcie(&self) -> TCIE_R[src]

Bit 6 - Transmission complete interrupt enable

pub fn rxneie(&self) -> RXNEIE_R[src]

Bit 5 - RXNE interrupt enable

pub fn idleie(&self) -> IDLEIE_R[src]

Bit 4 - IDLE interrupt enable

pub fn te(&self) -> TE_R[src]

Bit 3 - Transmitter enable

pub fn re(&self) -> RE_R[src]

Bit 2 - Receiver enable

pub fn uesm(&self) -> UESM_R[src]

Bit 1 - USART enable in Stop mode

pub fn ue(&self) -> UE_R[src]

Bit 0 - USART enable

impl R<bool, RTOEN_A>[src]

pub fn variant(&self) -> RTOEN_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u8, ABRMOD_A>[src]

pub fn variant(&self) -> ABRMOD_A[src]

Get enumerated values variant

pub fn is_start(&self) -> bool[src]

Checks if the value of the field is START

pub fn is_edge(&self) -> bool[src]

Checks if the value of the field is EDGE

pub fn is_frame7f(&self) -> bool[src]

Checks if the value of the field is FRAME7F

pub fn is_frame55(&self) -> bool[src]

Checks if the value of the field is FRAME55

impl R<bool, ABREN_A>[src]

pub fn variant(&self) -> ABREN_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, MSBFIRST_A>[src]

pub fn variant(&self) -> MSBFIRST_A[src]

Get enumerated values variant

pub fn is_lsb(&self) -> bool[src]

Checks if the value of the field is LSB

pub fn is_msb(&self) -> bool[src]

Checks if the value of the field is MSB

impl R<bool, DATAINV_A>[src]

pub fn variant(&self) -> DATAINV_A[src]

Get enumerated values variant

pub fn is_positive(&self) -> bool[src]

Checks if the value of the field is POSITIVE

pub fn is_negative(&self) -> bool[src]

Checks if the value of the field is NEGATIVE

impl R<bool, TXINV_A>[src]

pub fn variant(&self) -> TXINV_A[src]

Get enumerated values variant

pub fn is_standard(&self) -> bool[src]

Checks if the value of the field is STANDARD

pub fn is_inverted(&self) -> bool[src]

Checks if the value of the field is INVERTED

impl R<bool, RXINV_A>[src]

pub fn variant(&self) -> RXINV_A[src]

Get enumerated values variant

pub fn is_standard(&self) -> bool[src]

Checks if the value of the field is STANDARD

pub fn is_inverted(&self) -> bool[src]

Checks if the value of the field is INVERTED

impl R<bool, SWAP_A>[src]

pub fn variant(&self) -> SWAP_A[src]

Get enumerated values variant

pub fn is_standard(&self) -> bool[src]

Checks if the value of the field is STANDARD

pub fn is_swapped(&self) -> bool[src]

Checks if the value of the field is SWAPPED

impl R<bool, LINEN_A>[src]

pub fn variant(&self) -> LINEN_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u8, STOP_A>[src]

pub fn variant(&self) -> STOP_A[src]

Get enumerated values variant

pub fn is_stop1(&self) -> bool[src]

Checks if the value of the field is STOP1

pub fn is_stop0p5(&self) -> bool[src]

Checks if the value of the field is STOP0P5

pub fn is_stop2(&self) -> bool[src]

Checks if the value of the field is STOP2

pub fn is_stop1p5(&self) -> bool[src]

Checks if the value of the field is STOP1P5

impl R<bool, CLKEN_A>[src]

pub fn variant(&self) -> CLKEN_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, CPOL_A>[src]

pub fn variant(&self) -> CPOL_A[src]

Get enumerated values variant

pub fn is_low(&self) -> bool[src]

Checks if the value of the field is LOW

pub fn is_high(&self) -> bool[src]

Checks if the value of the field is HIGH

impl R<bool, CPHA_A>[src]

pub fn variant(&self) -> CPHA_A[src]

Get enumerated values variant

pub fn is_first(&self) -> bool[src]

Checks if the value of the field is FIRST

pub fn is_second(&self) -> bool[src]

Checks if the value of the field is SECOND

impl R<bool, LBCL_A>[src]

pub fn variant(&self) -> LBCL_A[src]

Get enumerated values variant

pub fn is_not_output(&self) -> bool[src]

Checks if the value of the field is NOTOUTPUT

pub fn is_output(&self) -> bool[src]

Checks if the value of the field is OUTPUT

impl R<bool, LBDIE_A>[src]

pub fn variant(&self) -> LBDIE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, LBDL_A>[src]

pub fn variant(&self) -> LBDL_A[src]

Get enumerated values variant

pub fn is_bit10(&self) -> bool[src]

Checks if the value of the field is BIT10

pub fn is_bit11(&self) -> bool[src]

Checks if the value of the field is BIT11

impl R<bool, ADDM7_A>[src]

pub fn variant(&self) -> ADDM7_A[src]

Get enumerated values variant

pub fn is_bit4(&self) -> bool[src]

Checks if the value of the field is BIT4

pub fn is_bit7(&self) -> bool[src]

Checks if the value of the field is BIT7

impl R<u32, Reg<u32, _CR2>>[src]

pub fn rtoen(&self) -> RTOEN_R[src]

Bit 23 - Receiver timeout enable

pub fn abrmod(&self) -> ABRMOD_R[src]

Bits 21:22 - Auto baud rate mode

pub fn abren(&self) -> ABREN_R[src]

Bit 20 - Auto baud rate enable

pub fn msbfirst(&self) -> MSBFIRST_R[src]

Bit 19 - Most significant bit first

pub fn datainv(&self) -> DATAINV_R[src]

Bit 18 - Binary data inversion

pub fn txinv(&self) -> TXINV_R[src]

Bit 17 - TX pin active level inversion

pub fn rxinv(&self) -> RXINV_R[src]

Bit 16 - RX pin active level inversion

pub fn swap(&self) -> SWAP_R[src]

Bit 15 - Swap TX/RX pins

pub fn linen(&self) -> LINEN_R[src]

Bit 14 - LIN mode enable

pub fn stop(&self) -> STOP_R[src]

Bits 12:13 - STOP bits

pub fn clken(&self) -> CLKEN_R[src]

Bit 11 - Clock enable

pub fn cpol(&self) -> CPOL_R[src]

Bit 10 - Clock polarity

pub fn cpha(&self) -> CPHA_R[src]

Bit 9 - Clock phase

pub fn lbcl(&self) -> LBCL_R[src]

Bit 8 - Last bit clock pulse

pub fn lbdie(&self) -> LBDIE_R[src]

Bit 6 - LIN break detection interrupt enable

pub fn lbdl(&self) -> LBDL_R[src]

Bit 5 - LIN break detection length

pub fn addm7(&self) -> ADDM7_R[src]

Bit 4 - 7-bit Address Detection/4-bit Address Detection

pub fn add(&self) -> ADD_R[src]

Bits 24:31 - Address of the USART node

impl R<bool, WUFIE_A>[src]

pub fn variant(&self) -> WUFIE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u8, WUS_A>[src]

pub fn variant(&self) -> Variant<u8, WUS_A>[src]

Get enumerated values variant

pub fn is_address(&self) -> bool[src]

Checks if the value of the field is ADDRESS

pub fn is_start(&self) -> bool[src]

Checks if the value of the field is START

pub fn is_rxne(&self) -> bool[src]

Checks if the value of the field is RXNE

impl R<bool, DEP_A>[src]

pub fn variant(&self) -> DEP_A[src]

Get enumerated values variant

pub fn is_high(&self) -> bool[src]

Checks if the value of the field is HIGH

pub fn is_low(&self) -> bool[src]

Checks if the value of the field is LOW

impl R<bool, DEM_A>[src]

pub fn variant(&self) -> DEM_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, DDRE_A>[src]

pub fn variant(&self) -> DDRE_A[src]

Get enumerated values variant

pub fn is_not_disabled(&self) -> bool[src]

Checks if the value of the field is NOTDISABLED

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

impl R<bool, OVRDIS_A>[src]

pub fn variant(&self) -> OVRDIS_A[src]

Get enumerated values variant

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

impl R<bool, ONEBIT_A>[src]

pub fn variant(&self) -> ONEBIT_A[src]

Get enumerated values variant

pub fn is_sample3(&self) -> bool[src]

Checks if the value of the field is SAMPLE3

pub fn is_sample1(&self) -> bool[src]

Checks if the value of the field is SAMPLE1

impl R<bool, CTSIE_A>[src]

pub fn variant(&self) -> CTSIE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, CTSE_A>[src]

pub fn variant(&self) -> CTSE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, RTSE_A>[src]

pub fn variant(&self) -> RTSE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, DMAT_A>[src]

pub fn variant(&self) -> DMAT_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, DMAR_A>[src]

pub fn variant(&self) -> DMAR_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, SCEN_A>[src]

pub fn variant(&self) -> SCEN_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, NACK_A>[src]

pub fn variant(&self) -> NACK_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, HDSEL_A>[src]

pub fn variant(&self) -> HDSEL_A[src]

Get enumerated values variant

pub fn is_not_selected(&self) -> bool[src]

Checks if the value of the field is NOTSELECTED

pub fn is_selected(&self) -> bool[src]

Checks if the value of the field is SELECTED

impl R<bool, IRLP_A>[src]

pub fn variant(&self) -> IRLP_A[src]

Get enumerated values variant

pub fn is_normal(&self) -> bool[src]

Checks if the value of the field is NORMAL

pub fn is_low_power(&self) -> bool[src]

Checks if the value of the field is LOWPOWER

impl R<bool, IREN_A>[src]

pub fn variant(&self) -> IREN_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, EIE_A>[src]

pub fn variant(&self) -> EIE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u32, Reg<u32, _CR3>>[src]

pub fn wufie(&self) -> WUFIE_R[src]

Bit 22 - Wakeup from Stop mode interrupt enable

pub fn wus(&self) -> WUS_R[src]

Bits 20:21 - Wakeup from Stop mode interrupt flag selection

pub fn scarcnt(&self) -> SCARCNT_R[src]

Bits 17:19 - Smartcard auto-retry count

pub fn dep(&self) -> DEP_R[src]

Bit 15 - Driver enable polarity selection

pub fn dem(&self) -> DEM_R[src]

Bit 14 - Driver enable mode

pub fn ddre(&self) -> DDRE_R[src]

Bit 13 - DMA Disable on Reception Error

pub fn ovrdis(&self) -> OVRDIS_R[src]

Bit 12 - Overrun Disable

pub fn onebit(&self) -> ONEBIT_R[src]

Bit 11 - One sample bit method enable

pub fn ctsie(&self) -> CTSIE_R[src]

Bit 10 - CTS interrupt enable

pub fn ctse(&self) -> CTSE_R[src]

Bit 9 - CTS enable

pub fn rtse(&self) -> RTSE_R[src]

Bit 8 - RTS enable

pub fn dmat(&self) -> DMAT_R[src]

Bit 7 - DMA enable transmitter

pub fn dmar(&self) -> DMAR_R[src]

Bit 6 - DMA enable receiver

pub fn scen(&self) -> SCEN_R[src]

Bit 5 - Smartcard mode enable

pub fn nack(&self) -> NACK_R[src]

Bit 4 - Smartcard NACK enable

pub fn hdsel(&self) -> HDSEL_R[src]

Bit 3 - Half-duplex selection

pub fn irlp(&self) -> IRLP_R[src]

Bit 2 - IrDA low-power

pub fn iren(&self) -> IREN_R[src]

Bit 1 - IrDA mode enable

pub fn eie(&self) -> EIE_R[src]

Bit 0 - Error interrupt enable

impl R<u32, Reg<u32, _BRR>>[src]

pub fn brr(&self) -> BRR_R[src]

Bits 0:15 - mantissa of USARTDIV

impl R<u32, Reg<u32, _GTPR>>[src]

pub fn gt(&self) -> GT_R[src]

Bits 8:15 - Guard time value

pub fn psc(&self) -> PSC_R[src]

Bits 0:7 - Prescaler value

impl R<u32, Reg<u32, _RTOR>>[src]

pub fn blen(&self) -> BLEN_R[src]

Bits 24:31 - Block Length

pub fn rto(&self) -> RTO_R[src]

Bits 0:23 - Receiver timeout value

impl R<bool, TXFRQ_A>[src]

pub fn variant(&self) -> Variant<bool, TXFRQ_A>[src]

Get enumerated values variant

pub fn is_discard(&self) -> bool[src]

Checks if the value of the field is DISCARD

impl R<bool, RXFRQ_A>[src]

pub fn variant(&self) -> Variant<bool, RXFRQ_A>[src]

Get enumerated values variant

pub fn is_discard(&self) -> bool[src]

Checks if the value of the field is DISCARD

impl R<bool, MMRQ_A>[src]

pub fn variant(&self) -> Variant<bool, MMRQ_A>[src]

Get enumerated values variant

pub fn is_mute(&self) -> bool[src]

Checks if the value of the field is MUTE

impl R<bool, SBKRQ_A>[src]

pub fn variant(&self) -> Variant<bool, SBKRQ_A>[src]

Get enumerated values variant

pub fn is_break_(&self) -> bool[src]

Checks if the value of the field is BREAK

impl R<bool, ABRRQ_A>[src]

pub fn variant(&self) -> Variant<bool, ABRRQ_A>[src]

Get enumerated values variant

pub fn is_request(&self) -> bool[src]

Checks if the value of the field is REQUEST

impl R<u32, Reg<u32, _RQR>>[src]

pub fn txfrq(&self) -> TXFRQ_R[src]

Bit 4 - Transmit data flush request

pub fn rxfrq(&self) -> RXFRQ_R[src]

Bit 3 - Receive data flush request

pub fn mmrq(&self) -> MMRQ_R[src]

Bit 2 - Mute mode request

pub fn sbkrq(&self) -> SBKRQ_R[src]

Bit 1 - Send break request

pub fn abrrq(&self) -> ABRRQ_R[src]

Bit 0 - Auto baud rate request

impl R<u32, Reg<u32, _ISR>>[src]

pub fn reack(&self) -> REACK_R[src]

Bit 22 - Receive enable acknowledge flag

pub fn teack(&self) -> TEACK_R[src]

Bit 21 - Transmit enable acknowledge flag

pub fn wuf(&self) -> WUF_R[src]

Bit 20 - Wakeup from Stop mode flag

pub fn rwu(&self) -> RWU_R[src]

Bit 19 - Receiver wakeup from Mute mode

pub fn sbkf(&self) -> SBKF_R[src]

Bit 18 - Send break flag

pub fn cmf(&self) -> CMF_R[src]

Bit 17 - character match flag

pub fn busy(&self) -> BUSY_R[src]

Bit 16 - Busy flag

pub fn abrf(&self) -> ABRF_R[src]

Bit 15 - Auto baud rate flag

pub fn abre(&self) -> ABRE_R[src]

Bit 14 - Auto baud rate error

pub fn eobf(&self) -> EOBF_R[src]

Bit 12 - End of block flag

pub fn rtof(&self) -> RTOF_R[src]

Bit 11 - Receiver timeout

pub fn cts(&self) -> CTS_R[src]

Bit 10 - CTS flag

pub fn ctsif(&self) -> CTSIF_R[src]

Bit 9 - CTS interrupt flag

pub fn lbdf(&self) -> LBDF_R[src]

Bit 8 - LIN break detection flag

pub fn txe(&self) -> TXE_R[src]

Bit 7 - Transmit data register empty

pub fn tc(&self) -> TC_R[src]

Bit 6 - Transmission complete

pub fn rxne(&self) -> RXNE_R[src]

Bit 5 - Read data register not empty

pub fn idle(&self) -> IDLE_R[src]

Bit 4 - Idle line detected

pub fn ore(&self) -> ORE_R[src]

Bit 3 - Overrun error

pub fn nf(&self) -> NF_R[src]

Bit 2 - Noise detected flag

pub fn fe(&self) -> FE_R[src]

Bit 1 - Framing error

pub fn pe(&self) -> PE_R[src]

Bit 0 - Parity error

impl R<bool, WUCF_A>[src]

pub fn variant(&self) -> Variant<bool, WUCF_A>[src]

Get enumerated values variant

pub fn is_clear(&self) -> bool[src]

Checks if the value of the field is CLEAR

impl R<bool, CMCF_A>[src]

pub fn variant(&self) -> Variant<bool, CMCF_A>[src]

Get enumerated values variant

pub fn is_clear(&self) -> bool[src]

Checks if the value of the field is CLEAR

impl R<bool, EOBCF_A>[src]

pub fn variant(&self) -> Variant<bool, EOBCF_A>[src]

Get enumerated values variant

pub fn is_clear(&self) -> bool[src]

Checks if the value of the field is CLEAR

impl R<bool, RTOCF_A>[src]

pub fn variant(&self) -> Variant<bool, RTOCF_A>[src]

Get enumerated values variant

pub fn is_clear(&self) -> bool[src]

Checks if the value of the field is CLEAR

impl R<bool, CTSCF_A>[src]

pub fn variant(&self) -> Variant<bool, CTSCF_A>[src]

Get enumerated values variant

pub fn is_clear(&self) -> bool[src]

Checks if the value of the field is CLEAR

impl R<bool, LBDCF_A>[src]

pub fn variant(&self) -> Variant<bool, LBDCF_A>[src]

Get enumerated values variant

pub fn is_clear(&self) -> bool[src]

Checks if the value of the field is CLEAR

impl R<bool, TCCF_A>[src]

pub fn variant(&self) -> Variant<bool, TCCF_A>[src]

Get enumerated values variant

pub fn is_clear(&self) -> bool[src]

Checks if the value of the field is CLEAR

impl R<bool, IDLECF_A>[src]

pub fn variant(&self) -> Variant<bool, IDLECF_A>[src]

Get enumerated values variant

pub fn is_clear(&self) -> bool[src]

Checks if the value of the field is CLEAR

impl R<bool, ORECF_A>[src]

pub fn variant(&self) -> Variant<bool, ORECF_A>[src]

Get enumerated values variant

pub fn is_clear(&self) -> bool[src]

Checks if the value of the field is CLEAR

impl R<bool, NCF_A>[src]

pub fn variant(&self) -> Variant<bool, NCF_A>[src]

Get enumerated values variant

pub fn is_clear(&self) -> bool[src]

Checks if the value of the field is CLEAR

impl R<bool, FECF_A>[src]

pub fn variant(&self) -> Variant<bool, FECF_A>[src]

Get enumerated values variant

pub fn is_clear(&self) -> bool[src]

Checks if the value of the field is CLEAR

impl R<bool, PECF_A>[src]

pub fn variant(&self) -> Variant<bool, PECF_A>[src]

Get enumerated values variant

pub fn is_clear(&self) -> bool[src]

Checks if the value of the field is CLEAR

impl R<u32, Reg<u32, _ICR>>[src]

pub fn wucf(&self) -> WUCF_R[src]

Bit 20 - Wakeup from Stop mode clear flag

pub fn cmcf(&self) -> CMCF_R[src]

Bit 17 - Character match clear flag

pub fn eobcf(&self) -> EOBCF_R[src]

Bit 12 - End of timeout clear flag

pub fn rtocf(&self) -> RTOCF_R[src]

Bit 11 - Receiver timeout clear flag

pub fn ctscf(&self) -> CTSCF_R[src]

Bit 9 - CTS clear flag

pub fn lbdcf(&self) -> LBDCF_R[src]

Bit 8 - LIN break detection clear flag

pub fn tccf(&self) -> TCCF_R[src]

Bit 6 - Transmission complete clear flag

pub fn idlecf(&self) -> IDLECF_R[src]

Bit 4 - Idle line detected clear flag

pub fn orecf(&self) -> ORECF_R[src]

Bit 3 - Overrun error clear flag

pub fn ncf(&self) -> NCF_R[src]

Bit 2 - Noise detected clear flag

pub fn fecf(&self) -> FECF_R[src]

Bit 1 - Framing error clear flag

pub fn pecf(&self) -> PECF_R[src]

Bit 0 - Parity error clear flag

impl R<u32, Reg<u32, _RDR>>[src]

pub fn rdr(&self) -> RDR_R[src]

Bits 0:8 - Receive data value

impl R<u32, Reg<u32, _TDR>>[src]

pub fn tdr(&self) -> TDR_R[src]

Bits 0:8 - Transmit data value

impl R<bool, BIDIMODE_A>[src]

pub fn variant(&self) -> BIDIMODE_A[src]

Get enumerated values variant

pub fn is_unidirectional(&self) -> bool[src]

Checks if the value of the field is UNIDIRECTIONAL

pub fn is_bidirectional(&self) -> bool[src]

Checks if the value of the field is BIDIRECTIONAL

impl R<bool, BIDIOE_A>[src]

pub fn variant(&self) -> BIDIOE_A[src]

Get enumerated values variant

pub fn is_output_disabled(&self) -> bool[src]

Checks if the value of the field is OUTPUTDISABLED

pub fn is_output_enabled(&self) -> bool[src]

Checks if the value of the field is OUTPUTENABLED

impl R<bool, CRCEN_A>[src]

pub fn variant(&self) -> CRCEN_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, CRCNEXT_A>[src]

pub fn variant(&self) -> CRCNEXT_A[src]

Get enumerated values variant

pub fn is_tx_buffer(&self) -> bool[src]

Checks if the value of the field is TXBUFFER

pub fn is_crc(&self) -> bool[src]

Checks if the value of the field is CRC

impl R<bool, CRCL_A>[src]

pub fn variant(&self) -> CRCL_A[src]

Get enumerated values variant

pub fn is_eight_bit(&self) -> bool[src]

Checks if the value of the field is EIGHTBIT

pub fn is_sixteen_bit(&self) -> bool[src]

Checks if the value of the field is SIXTEENBIT

impl R<bool, RXONLY_A>[src]

pub fn variant(&self) -> RXONLY_A[src]

Get enumerated values variant

pub fn is_full_duplex(&self) -> bool[src]

Checks if the value of the field is FULLDUPLEX

pub fn is_output_disabled(&self) -> bool[src]

Checks if the value of the field is OUTPUTDISABLED

impl R<bool, SSM_A>[src]

pub fn variant(&self) -> SSM_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, SSI_A>[src]

pub fn variant(&self) -> SSI_A[src]

Get enumerated values variant

pub fn is_slave_selected(&self) -> bool[src]

Checks if the value of the field is SLAVESELECTED

pub fn is_slave_not_selected(&self) -> bool[src]

Checks if the value of the field is SLAVENOTSELECTED

impl R<bool, LSBFIRST_A>[src]

pub fn variant(&self) -> LSBFIRST_A[src]

Get enumerated values variant

pub fn is_msbfirst(&self) -> bool[src]

Checks if the value of the field is MSBFIRST

pub fn is_lsbfirst(&self) -> bool[src]

Checks if the value of the field is LSBFIRST

impl R<bool, SPE_A>[src]

pub fn variant(&self) -> SPE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u8, BR_A>[src]

pub fn variant(&self) -> BR_A[src]

Get enumerated values variant

pub fn is_div2(&self) -> bool[src]

Checks if the value of the field is DIV2

pub fn is_div4(&self) -> bool[src]

Checks if the value of the field is DIV4

pub fn is_div8(&self) -> bool[src]

Checks if the value of the field is DIV8

pub fn is_div16(&self) -> bool[src]

Checks if the value of the field is DIV16

pub fn is_div32(&self) -> bool[src]

Checks if the value of the field is DIV32

pub fn is_div64(&self) -> bool[src]

Checks if the value of the field is DIV64

pub fn is_div128(&self) -> bool[src]

Checks if the value of the field is DIV128

pub fn is_div256(&self) -> bool[src]

Checks if the value of the field is DIV256

impl R<bool, MSTR_A>[src]

pub fn variant(&self) -> MSTR_A[src]

Get enumerated values variant

pub fn is_slave(&self) -> bool[src]

Checks if the value of the field is SLAVE

pub fn is_master(&self) -> bool[src]

Checks if the value of the field is MASTER

impl R<bool, CPOL_A>[src]

pub fn variant(&self) -> CPOL_A[src]

Get enumerated values variant

pub fn is_idle_low(&self) -> bool[src]

Checks if the value of the field is IDLELOW

pub fn is_idle_high(&self) -> bool[src]

Checks if the value of the field is IDLEHIGH

impl R<bool, CPHA_A>[src]

pub fn variant(&self) -> CPHA_A[src]

Get enumerated values variant

pub fn is_first_edge(&self) -> bool[src]

Checks if the value of the field is FIRSTEDGE

pub fn is_second_edge(&self) -> bool[src]

Checks if the value of the field is SECONDEDGE

impl R<u32, Reg<u32, _CR1>>[src]

pub fn bidimode(&self) -> BIDIMODE_R[src]

Bit 15 - Bidirectional data mode enable

pub fn bidioe(&self) -> BIDIOE_R[src]

Bit 14 - Output enable in bidirectional mode

pub fn crcen(&self) -> CRCEN_R[src]

Bit 13 - Hardware CRC calculation enable

pub fn crcnext(&self) -> CRCNEXT_R[src]

Bit 12 - CRC transfer next

pub fn crcl(&self) -> CRCL_R[src]

Bit 11 - CRC length

pub fn rxonly(&self) -> RXONLY_R[src]

Bit 10 - Receive only

pub fn ssm(&self) -> SSM_R[src]

Bit 9 - Software slave management

pub fn ssi(&self) -> SSI_R[src]

Bit 8 - Internal slave select

pub fn lsbfirst(&self) -> LSBFIRST_R[src]

Bit 7 - Frame format

pub fn spe(&self) -> SPE_R[src]

Bit 6 - SPI enable

pub fn br(&self) -> BR_R[src]

Bits 3:5 - Baud rate control

pub fn mstr(&self) -> MSTR_R[src]

Bit 2 - Master selection

pub fn cpol(&self) -> CPOL_R[src]

Bit 1 - Clock polarity

pub fn cpha(&self) -> CPHA_R[src]

Bit 0 - Clock phase

impl R<bool, RXDMAEN_A>[src]

pub fn variant(&self) -> RXDMAEN_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, TXDMAEN_A>[src]

pub fn variant(&self) -> TXDMAEN_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, SSOE_A>[src]

pub fn variant(&self) -> SSOE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, NSSP_A>[src]

pub fn variant(&self) -> NSSP_A[src]

Get enumerated values variant

pub fn is_no_pulse(&self) -> bool[src]

Checks if the value of the field is NOPULSE

pub fn is_pulse_generated(&self) -> bool[src]

Checks if the value of the field is PULSEGENERATED

impl R<bool, FRF_A>[src]

pub fn variant(&self) -> FRF_A[src]

Get enumerated values variant

pub fn is_motorola(&self) -> bool[src]

Checks if the value of the field is MOTOROLA

pub fn is_ti(&self) -> bool[src]

Checks if the value of the field is TI

impl R<bool, ERRIE_A>[src]

pub fn variant(&self) -> ERRIE_A[src]

Get enumerated values variant

pub fn is_masked(&self) -> bool[src]

Checks if the value of the field is MASKED

pub fn is_not_masked(&self) -> bool[src]

Checks if the value of the field is NOTMASKED

impl R<bool, RXNEIE_A>[src]

pub fn variant(&self) -> RXNEIE_A[src]

Get enumerated values variant

pub fn is_masked(&self) -> bool[src]

Checks if the value of the field is MASKED

pub fn is_not_masked(&self) -> bool[src]

Checks if the value of the field is NOTMASKED

impl R<bool, TXEIE_A>[src]

pub fn variant(&self) -> TXEIE_A[src]

Get enumerated values variant

pub fn is_masked(&self) -> bool[src]

Checks if the value of the field is MASKED

pub fn is_not_masked(&self) -> bool[src]

Checks if the value of the field is NOTMASKED

impl R<u8, DS_A>[src]

pub fn variant(&self) -> Variant<u8, DS_A>[src]

Get enumerated values variant

pub fn is_four_bit(&self) -> bool[src]

Checks if the value of the field is FOURBIT

pub fn is_five_bit(&self) -> bool[src]

Checks if the value of the field is FIVEBIT

pub fn is_six_bit(&self) -> bool[src]

Checks if the value of the field is SIXBIT

pub fn is_seven_bit(&self) -> bool[src]

Checks if the value of the field is SEVENBIT

pub fn is_eight_bit(&self) -> bool[src]

Checks if the value of the field is EIGHTBIT

pub fn is_nine_bit(&self) -> bool[src]

Checks if the value of the field is NINEBIT

pub fn is_ten_bit(&self) -> bool[src]

Checks if the value of the field is TENBIT

pub fn is_eleven_bit(&self) -> bool[src]

Checks if the value of the field is ELEVENBIT

pub fn is_twelve_bit(&self) -> bool[src]

Checks if the value of the field is TWELVEBIT

pub fn is_thirteen_bit(&self) -> bool[src]

Checks if the value of the field is THIRTEENBIT

pub fn is_fourteen_bit(&self) -> bool[src]

Checks if the value of the field is FOURTEENBIT

pub fn is_fifteen_bit(&self) -> bool[src]

Checks if the value of the field is FIFTEENBIT

pub fn is_sixteen_bit(&self) -> bool[src]

Checks if the value of the field is SIXTEENBIT

impl R<bool, FRXTH_A>[src]

pub fn variant(&self) -> FRXTH_A[src]

Get enumerated values variant

pub fn is_half(&self) -> bool[src]

Checks if the value of the field is HALF

pub fn is_quarter(&self) -> bool[src]

Checks if the value of the field is QUARTER

impl R<bool, LDMA_RX_A>[src]

pub fn variant(&self) -> LDMA_RX_A[src]

Get enumerated values variant

pub fn is_even(&self) -> bool[src]

Checks if the value of the field is EVEN

pub fn is_odd(&self) -> bool[src]

Checks if the value of the field is ODD

impl R<bool, LDMA_TX_A>[src]

pub fn variant(&self) -> LDMA_TX_A[src]

Get enumerated values variant

pub fn is_even(&self) -> bool[src]

Checks if the value of the field is EVEN

pub fn is_odd(&self) -> bool[src]

Checks if the value of the field is ODD

impl R<u32, Reg<u32, _CR2>>[src]

pub fn rxdmaen(&self) -> RXDMAEN_R[src]

Bit 0 - Rx buffer DMA enable

pub fn txdmaen(&self) -> TXDMAEN_R[src]

Bit 1 - Tx buffer DMA enable

pub fn ssoe(&self) -> SSOE_R[src]

Bit 2 - SS output enable

pub fn nssp(&self) -> NSSP_R[src]

Bit 3 - NSS pulse management

pub fn frf(&self) -> FRF_R[src]

Bit 4 - Frame format

pub fn errie(&self) -> ERRIE_R[src]

Bit 5 - Error interrupt enable

pub fn rxneie(&self) -> RXNEIE_R[src]

Bit 6 - RX buffer not empty interrupt enable

pub fn txeie(&self) -> TXEIE_R[src]

Bit 7 - Tx buffer empty interrupt enable

pub fn ds(&self) -> DS_R[src]

Bits 8:11 - Data size

pub fn frxth(&self) -> FRXTH_R[src]

Bit 12 - FIFO reception threshold

pub fn ldma_rx(&self) -> LDMA_RX_R[src]

Bit 13 - Last DMA transfer for reception

pub fn ldma_tx(&self) -> LDMA_TX_R[src]

Bit 14 - Last DMA transfer for transmission

impl R<bool, RXNE_A>[src]

pub fn variant(&self) -> RXNE_A[src]

Get enumerated values variant

pub fn is_empty(&self) -> bool[src]

Checks if the value of the field is EMPTY

pub fn is_not_empty(&self) -> bool[src]

Checks if the value of the field is NOTEMPTY

impl R<bool, TXE_A>[src]

pub fn variant(&self) -> TXE_A[src]

Get enumerated values variant

pub fn is_not_empty(&self) -> bool[src]

Checks if the value of the field is NOTEMPTY

pub fn is_empty(&self) -> bool[src]

Checks if the value of the field is EMPTY

impl R<bool, CHSIDE_A>[src]

pub fn variant(&self) -> CHSIDE_A[src]

Get enumerated values variant

pub fn is_left(&self) -> bool[src]

Checks if the value of the field is LEFT

pub fn is_right(&self) -> bool[src]

Checks if the value of the field is RIGHT

impl R<bool, UDR_A>[src]

pub fn variant(&self) -> UDR_A[src]

Get enumerated values variant

pub fn is_no_underrun(&self) -> bool[src]

Checks if the value of the field is NOUNDERRUN

pub fn is_underrun(&self) -> bool[src]

Checks if the value of the field is UNDERRUN

impl R<bool, CRCERR_A>[src]

pub fn variant(&self) -> CRCERR_A[src]

Get enumerated values variant

pub fn is_match_(&self) -> bool[src]

Checks if the value of the field is MATCH

pub fn is_no_match(&self) -> bool[src]

Checks if the value of the field is NOMATCH

impl R<bool, MODF_A>[src]

pub fn variant(&self) -> MODF_A[src]

Get enumerated values variant

pub fn is_no_fault(&self) -> bool[src]

Checks if the value of the field is NOFAULT

pub fn is_fault(&self) -> bool[src]

Checks if the value of the field is FAULT

impl R<bool, OVR_A>[src]

pub fn variant(&self) -> OVR_A[src]

Get enumerated values variant

pub fn is_no_overrun(&self) -> bool[src]

Checks if the value of the field is NOOVERRUN

pub fn is_overrun(&self) -> bool[src]

Checks if the value of the field is OVERRUN

impl R<bool, BSY_A>[src]

pub fn variant(&self) -> BSY_A[src]

Get enumerated values variant

pub fn is_not_busy(&self) -> bool[src]

Checks if the value of the field is NOTBUSY

pub fn is_busy(&self) -> bool[src]

Checks if the value of the field is BUSY

impl R<bool, TIFRFE_A>[src]

pub fn variant(&self) -> TIFRFE_A[src]

Get enumerated values variant

pub fn is_no_error(&self) -> bool[src]

Checks if the value of the field is NOERROR

pub fn is_error(&self) -> bool[src]

Checks if the value of the field is ERROR

impl R<u8, FRLVL_A>[src]

pub fn variant(&self) -> FRLVL_A[src]

Get enumerated values variant

pub fn is_empty(&self) -> bool[src]

Checks if the value of the field is EMPTY

pub fn is_quarter(&self) -> bool[src]

Checks if the value of the field is QUARTER

pub fn is_half(&self) -> bool[src]

Checks if the value of the field is HALF

pub fn is_full(&self) -> bool[src]

Checks if the value of the field is FULL

impl R<u8, FTLVL_A>[src]

pub fn variant(&self) -> FTLVL_A[src]

Get enumerated values variant

pub fn is_empty(&self) -> bool[src]

Checks if the value of the field is EMPTY

pub fn is_quarter(&self) -> bool[src]

Checks if the value of the field is QUARTER

pub fn is_half(&self) -> bool[src]

Checks if the value of the field is HALF

pub fn is_full(&self) -> bool[src]

Checks if the value of the field is FULL

impl R<u32, Reg<u32, _SR>>[src]

pub fn rxne(&self) -> RXNE_R[src]

Bit 0 - Receive buffer not empty

pub fn txe(&self) -> TXE_R[src]

Bit 1 - Transmit buffer empty

pub fn chside(&self) -> CHSIDE_R[src]

Bit 2 - Channel side

pub fn udr(&self) -> UDR_R[src]

Bit 3 - Underrun flag

pub fn crcerr(&self) -> CRCERR_R[src]

Bit 4 - CRC error flag

pub fn modf(&self) -> MODF_R[src]

Bit 5 - Mode fault

pub fn ovr(&self) -> OVR_R[src]

Bit 6 - Overrun flag

pub fn bsy(&self) -> BSY_R[src]

Bit 7 - Busy flag

pub fn tifrfe(&self) -> TIFRFE_R[src]

Bit 8 - TI frame format error

pub fn frlvl(&self) -> FRLVL_R[src]

Bits 9:10 - FIFO reception level

pub fn ftlvl(&self) -> FTLVL_R[src]

Bits 11:12 - FIFO transmission level

impl R<u32, Reg<u32, _DR>>[src]

pub fn dr(&self) -> DR_R[src]

Bits 0:15 - Data register

impl R<u32, Reg<u32, _CRCPR>>[src]

pub fn crcpoly(&self) -> CRCPOLY_R[src]

Bits 0:15 - CRC polynomial register

impl R<u32, Reg<u32, _RXCRCR>>[src]

pub fn rx_crc(&self) -> RXCRC_R[src]

Bits 0:15 - Rx CRC register

impl R<u32, Reg<u32, _TXCRCR>>[src]

pub fn tx_crc(&self) -> TXCRC_R[src]

Bits 0:15 - Tx CRC register

impl R<bool, I2SMOD_A>[src]

pub fn variant(&self) -> I2SMOD_A[src]

Get enumerated values variant

pub fn is_spimode(&self) -> bool[src]

Checks if the value of the field is SPIMODE

pub fn is_i2smode(&self) -> bool[src]

Checks if the value of the field is I2SMODE

impl R<bool, I2SE_A>[src]

pub fn variant(&self) -> I2SE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u8, I2SCFG_A>[src]

pub fn variant(&self) -> I2SCFG_A[src]

Get enumerated values variant

pub fn is_slave_tx(&self) -> bool[src]

Checks if the value of the field is SLAVETX

pub fn is_slave_rx(&self) -> bool[src]

Checks if the value of the field is SLAVERX

pub fn is_master_tx(&self) -> bool[src]

Checks if the value of the field is MASTERTX

pub fn is_master_rx(&self) -> bool[src]

Checks if the value of the field is MASTERRX

impl R<bool, PCMSYNC_A>[src]

pub fn variant(&self) -> PCMSYNC_A[src]

Get enumerated values variant

pub fn is_short(&self) -> bool[src]

Checks if the value of the field is SHORT

pub fn is_long(&self) -> bool[src]

Checks if the value of the field is LONG

impl R<u8, I2SSTD_A>[src]

pub fn variant(&self) -> I2SSTD_A[src]

Get enumerated values variant

pub fn is_philips(&self) -> bool[src]

Checks if the value of the field is PHILIPS

pub fn is_msb(&self) -> bool[src]

Checks if the value of the field is MSB

pub fn is_lsb(&self) -> bool[src]

Checks if the value of the field is LSB

pub fn is_pcm(&self) -> bool[src]

Checks if the value of the field is PCM

impl R<bool, CKPOL_A>[src]

pub fn variant(&self) -> CKPOL_A[src]

Get enumerated values variant

pub fn is_idle_low(&self) -> bool[src]

Checks if the value of the field is IDLELOW

pub fn is_idle_high(&self) -> bool[src]

Checks if the value of the field is IDLEHIGH

impl R<u8, DATLEN_A>[src]

pub fn variant(&self) -> Variant<u8, DATLEN_A>[src]

Get enumerated values variant

pub fn is_sixteen_bit(&self) -> bool[src]

Checks if the value of the field is SIXTEENBIT

pub fn is_twenty_four_bit(&self) -> bool[src]

Checks if the value of the field is TWENTYFOURBIT

pub fn is_thirty_two_bit(&self) -> bool[src]

Checks if the value of the field is THIRTYTWOBIT

impl R<bool, CHLEN_A>[src]

pub fn variant(&self) -> CHLEN_A[src]

Get enumerated values variant

pub fn is_sixteen_bit(&self) -> bool[src]

Checks if the value of the field is SIXTEENBIT

pub fn is_thirty_two_bit(&self) -> bool[src]

Checks if the value of the field is THIRTYTWOBIT

impl R<u32, Reg<u32, _I2SCFGR>>[src]

pub fn i2smod(&self) -> I2SMOD_R[src]

Bit 11 - I2S mode selection

pub fn i2se(&self) -> I2SE_R[src]

Bit 10 - I2S Enable

pub fn i2scfg(&self) -> I2SCFG_R[src]

Bits 8:9 - I2S configuration mode

pub fn pcmsync(&self) -> PCMSYNC_R[src]

Bit 7 - PCM frame synchronization

pub fn i2sstd(&self) -> I2SSTD_R[src]

Bits 4:5 - I2S standard selection

pub fn ckpol(&self) -> CKPOL_R[src]

Bit 3 - Steady state clock polarity

pub fn datlen(&self) -> DATLEN_R[src]

Bits 1:2 - Data length to be transferred

pub fn chlen(&self) -> CHLEN_R[src]

Bit 0 - Channel length (number of bits per audio channel)

impl R<bool, MCKOE_A>[src]

pub fn variant(&self) -> MCKOE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, ODD_A>[src]

pub fn variant(&self) -> ODD_A[src]

Get enumerated values variant

pub fn is_even(&self) -> bool[src]

Checks if the value of the field is EVEN

pub fn is_odd(&self) -> bool[src]

Checks if the value of the field is ODD

impl R<u32, Reg<u32, _I2SPR>>[src]

pub fn mckoe(&self) -> MCKOE_R[src]

Bit 9 - Master clock output enable

pub fn odd(&self) -> ODD_R[src]

Bit 8 - Odd factor for the prescaler

pub fn i2sdiv(&self) -> I2SDIV_R[src]

Bits 0:7 - I2S Linear prescaler

impl R<bool, MR0_A>[src]

pub fn variant(&self) -> MR0_A[src]

Get enumerated values variant

pub fn is_masked(&self) -> bool[src]

Checks if the value of the field is MASKED

pub fn is_unmasked(&self) -> bool[src]

Checks if the value of the field is UNMASKED

impl R<u32, Reg<u32, _IMR>>[src]

pub fn mr0(&self) -> MR0_R[src]

Bit 0 - Interrupt Mask on line 0

pub fn mr1(&self) -> MR1_R[src]

Bit 1 - Interrupt Mask on line 1

pub fn mr2(&self) -> MR2_R[src]

Bit 2 - Interrupt Mask on line 2

pub fn mr3(&self) -> MR3_R[src]

Bit 3 - Interrupt Mask on line 3

pub fn mr4(&self) -> MR4_R[src]

Bit 4 - Interrupt Mask on line 4

pub fn mr5(&self) -> MR5_R[src]

Bit 5 - Interrupt Mask on line 5

pub fn mr6(&self) -> MR6_R[src]

Bit 6 - Interrupt Mask on line 6

pub fn mr7(&self) -> MR7_R[src]

Bit 7 - Interrupt Mask on line 7

pub fn mr8(&self) -> MR8_R[src]

Bit 8 - Interrupt Mask on line 8

pub fn mr9(&self) -> MR9_R[src]

Bit 9 - Interrupt Mask on line 9

pub fn mr10(&self) -> MR10_R[src]

Bit 10 - Interrupt Mask on line 10

pub fn mr11(&self) -> MR11_R[src]

Bit 11 - Interrupt Mask on line 11

pub fn mr12(&self) -> MR12_R[src]

Bit 12 - Interrupt Mask on line 12

pub fn mr13(&self) -> MR13_R[src]

Bit 13 - Interrupt Mask on line 13

pub fn mr14(&self) -> MR14_R[src]

Bit 14 - Interrupt Mask on line 14

pub fn mr15(&self) -> MR15_R[src]

Bit 15 - Interrupt Mask on line 15

pub fn mr16(&self) -> MR16_R[src]

Bit 16 - Interrupt Mask on line 16

pub fn mr17(&self) -> MR17_R[src]

Bit 17 - Interrupt Mask on line 17

pub fn mr18(&self) -> MR18_R[src]

Bit 18 - Interrupt Mask on line 18

pub fn mr19(&self) -> MR19_R[src]

Bit 19 - Interrupt Mask on line 19

pub fn mr20(&self) -> MR20_R[src]

Bit 20 - Interrupt Mask on line 20

pub fn mr21(&self) -> MR21_R[src]

Bit 21 - Interrupt Mask on line 21

pub fn mr22(&self) -> MR22_R[src]

Bit 22 - Interrupt Mask on line 22

pub fn mr23(&self) -> MR23_R[src]

Bit 23 - Interrupt Mask on line 23

pub fn mr24(&self) -> MR24_R[src]

Bit 24 - Interrupt Mask on line 24

pub fn mr25(&self) -> MR25_R[src]

Bit 25 - Interrupt Mask on line 25

pub fn mr26(&self) -> MR26_R[src]

Bit 26 - Interrupt Mask on line 26

pub fn mr27(&self) -> MR27_R[src]

Bit 27 - Interrupt Mask on line 27

pub fn mr28(&self) -> MR28_R[src]

Bit 28 - Interrupt Mask on line 28

impl R<bool, MR0_A>[src]

pub fn variant(&self) -> MR0_A[src]

Get enumerated values variant

pub fn is_masked(&self) -> bool[src]

Checks if the value of the field is MASKED

pub fn is_unmasked(&self) -> bool[src]

Checks if the value of the field is UNMASKED

impl R<u32, Reg<u32, _EMR>>[src]

pub fn mr0(&self) -> MR0_R[src]

Bit 0 - Event Mask on line 0

pub fn mr1(&self) -> MR1_R[src]

Bit 1 - Event Mask on line 1

pub fn mr2(&self) -> MR2_R[src]

Bit 2 - Event Mask on line 2

pub fn mr3(&self) -> MR3_R[src]

Bit 3 - Event Mask on line 3

pub fn mr4(&self) -> MR4_R[src]

Bit 4 - Event Mask on line 4

pub fn mr5(&self) -> MR5_R[src]

Bit 5 - Event Mask on line 5

pub fn mr6(&self) -> MR6_R[src]

Bit 6 - Event Mask on line 6

pub fn mr7(&self) -> MR7_R[src]

Bit 7 - Event Mask on line 7

pub fn mr8(&self) -> MR8_R[src]

Bit 8 - Event Mask on line 8

pub fn mr9(&self) -> MR9_R[src]

Bit 9 - Event Mask on line 9

pub fn mr10(&self) -> MR10_R[src]

Bit 10 - Event Mask on line 10

pub fn mr11(&self) -> MR11_R[src]

Bit 11 - Event Mask on line 11

pub fn mr12(&self) -> MR12_R[src]

Bit 12 - Event Mask on line 12

pub fn mr13(&self) -> MR13_R[src]

Bit 13 - Event Mask on line 13

pub fn mr14(&self) -> MR14_R[src]

Bit 14 - Event Mask on line 14

pub fn mr15(&self) -> MR15_R[src]

Bit 15 - Event Mask on line 15

pub fn mr16(&self) -> MR16_R[src]

Bit 16 - Event Mask on line 16

pub fn mr17(&self) -> MR17_R[src]

Bit 17 - Event Mask on line 17

pub fn mr18(&self) -> MR18_R[src]

Bit 18 - Event Mask on line 18

pub fn mr19(&self) -> MR19_R[src]

Bit 19 - Event Mask on line 19

pub fn mr20(&self) -> MR20_R[src]

Bit 20 - Event Mask on line 20

pub fn mr21(&self) -> MR21_R[src]

Bit 21 - Event Mask on line 21

pub fn mr22(&self) -> MR22_R[src]

Bit 22 - Event Mask on line 22

pub fn mr23(&self) -> MR23_R[src]

Bit 23 - Event Mask on line 23

pub fn mr24(&self) -> MR24_R[src]

Bit 24 - Event Mask on line 24

pub fn mr25(&self) -> MR25_R[src]

Bit 25 - Event Mask on line 25

pub fn mr26(&self) -> MR26_R[src]

Bit 26 - Event Mask on line 26

pub fn mr27(&self) -> MR27_R[src]

Bit 27 - Event Mask on line 27

pub fn mr28(&self) -> MR28_R[src]

Bit 28 - Event Mask on line 28

impl R<bool, TR0_A>[src]

pub fn variant(&self) -> TR0_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u32, Reg<u32, _RTSR>>[src]

pub fn tr0(&self) -> TR0_R[src]

Bit 0 - Rising trigger event configuration of line 0

pub fn tr1(&self) -> TR1_R[src]

Bit 1 - Rising trigger event configuration of line 1

pub fn tr2(&self) -> TR2_R[src]

Bit 2 - Rising trigger event configuration of line 2

pub fn tr3(&self) -> TR3_R[src]

Bit 3 - Rising trigger event configuration of line 3

pub fn tr4(&self) -> TR4_R[src]

Bit 4 - Rising trigger event configuration of line 4

pub fn tr5(&self) -> TR5_R[src]

Bit 5 - Rising trigger event configuration of line 5

pub fn tr6(&self) -> TR6_R[src]

Bit 6 - Rising trigger event configuration of line 6

pub fn tr7(&self) -> TR7_R[src]

Bit 7 - Rising trigger event configuration of line 7

pub fn tr8(&self) -> TR8_R[src]

Bit 8 - Rising trigger event configuration of line 8

pub fn tr9(&self) -> TR9_R[src]

Bit 9 - Rising trigger event configuration of line 9

pub fn tr10(&self) -> TR10_R[src]

Bit 10 - Rising trigger event configuration of line 10

pub fn tr11(&self) -> TR11_R[src]

Bit 11 - Rising trigger event configuration of line 11

pub fn tr12(&self) -> TR12_R[src]

Bit 12 - Rising trigger event configuration of line 12

pub fn tr13(&self) -> TR13_R[src]

Bit 13 - Rising trigger event configuration of line 13

pub fn tr14(&self) -> TR14_R[src]

Bit 14 - Rising trigger event configuration of line 14

pub fn tr15(&self) -> TR15_R[src]

Bit 15 - Rising trigger event configuration of line 15

pub fn tr16(&self) -> TR16_R[src]

Bit 16 - Rising trigger event configuration of line 16

pub fn tr17(&self) -> TR17_R[src]

Bit 17 - Rising trigger event configuration of line 17

pub fn tr19(&self) -> TR19_R[src]

Bit 19 - Rising trigger event configuration of line 19

impl R<bool, TR0_A>[src]

pub fn variant(&self) -> TR0_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u32, Reg<u32, _FTSR>>[src]

pub fn tr0(&self) -> TR0_R[src]

Bit 0 - Falling trigger event configuration of line 0

pub fn tr1(&self) -> TR1_R[src]

Bit 1 - Falling trigger event configuration of line 1

pub fn tr2(&self) -> TR2_R[src]

Bit 2 - Falling trigger event configuration of line 2

pub fn tr3(&self) -> TR3_R[src]

Bit 3 - Falling trigger event configuration of line 3

pub fn tr4(&self) -> TR4_R[src]

Bit 4 - Falling trigger event configuration of line 4

pub fn tr5(&self) -> TR5_R[src]

Bit 5 - Falling trigger event configuration of line 5

pub fn tr6(&self) -> TR6_R[src]

Bit 6 - Falling trigger event configuration of line 6

pub fn tr7(&self) -> TR7_R[src]

Bit 7 - Falling trigger event configuration of line 7

pub fn tr8(&self) -> TR8_R[src]

Bit 8 - Falling trigger event configuration of line 8

pub fn tr9(&self) -> TR9_R[src]

Bit 9 - Falling trigger event configuration of line 9

pub fn tr10(&self) -> TR10_R[src]

Bit 10 - Falling trigger event configuration of line 10

pub fn tr11(&self) -> TR11_R[src]

Bit 11 - Falling trigger event configuration of line 11

pub fn tr12(&self) -> TR12_R[src]

Bit 12 - Falling trigger event configuration of line 12

pub fn tr13(&self) -> TR13_R[src]

Bit 13 - Falling trigger event configuration of line 13

pub fn tr14(&self) -> TR14_R[src]

Bit 14 - Falling trigger event configuration of line 14

pub fn tr15(&self) -> TR15_R[src]

Bit 15 - Falling trigger event configuration of line 15

pub fn tr16(&self) -> TR16_R[src]

Bit 16 - Falling trigger event configuration of line 16

pub fn tr17(&self) -> TR17_R[src]

Bit 17 - Falling trigger event configuration of line 17

pub fn tr19(&self) -> TR19_R[src]

Bit 19 - Falling trigger event configuration of line 19

impl R<bool, SWIER0_A>[src]

pub fn variant(&self) -> Variant<bool, SWIER0_A>[src]

Get enumerated values variant

pub fn is_pend(&self) -> bool[src]

Checks if the value of the field is PEND

impl R<u32, Reg<u32, _SWIER>>[src]

pub fn swier0(&self) -> SWIER0_R[src]

Bit 0 - Software Interrupt on line 0

pub fn swier1(&self) -> SWIER1_R[src]

Bit 1 - Software Interrupt on line 1

pub fn swier2(&self) -> SWIER2_R[src]

Bit 2 - Software Interrupt on line 2

pub fn swier3(&self) -> SWIER3_R[src]

Bit 3 - Software Interrupt on line 3

pub fn swier4(&self) -> SWIER4_R[src]

Bit 4 - Software Interrupt on line 4

pub fn swier5(&self) -> SWIER5_R[src]

Bit 5 - Software Interrupt on line 5

pub fn swier6(&self) -> SWIER6_R[src]

Bit 6 - Software Interrupt on line 6

pub fn swier7(&self) -> SWIER7_R[src]

Bit 7 - Software Interrupt on line 7

pub fn swier8(&self) -> SWIER8_R[src]

Bit 8 - Software Interrupt on line 8

pub fn swier9(&self) -> SWIER9_R[src]

Bit 9 - Software Interrupt on line 9

pub fn swier10(&self) -> SWIER10_R[src]

Bit 10 - Software Interrupt on line 10

pub fn swier11(&self) -> SWIER11_R[src]

Bit 11 - Software Interrupt on line 11

pub fn swier12(&self) -> SWIER12_R[src]

Bit 12 - Software Interrupt on line 12

pub fn swier13(&self) -> SWIER13_R[src]

Bit 13 - Software Interrupt on line 13

pub fn swier14(&self) -> SWIER14_R[src]

Bit 14 - Software Interrupt on line 14

pub fn swier15(&self) -> SWIER15_R[src]

Bit 15 - Software Interrupt on line 15

pub fn swier16(&self) -> SWIER16_R[src]

Bit 16 - Software Interrupt on line 16

pub fn swier17(&self) -> SWIER17_R[src]

Bit 17 - Software Interrupt on line 17

pub fn swier19(&self) -> SWIER19_R[src]

Bit 19 - Software Interrupt on line 19

impl R<bool, PR0_A>[src]

pub fn variant(&self) -> PR0_A[src]

Get enumerated values variant

pub fn is_not_pending(&self) -> bool[src]

Checks if the value of the field is NOTPENDING

pub fn is_pending(&self) -> bool[src]

Checks if the value of the field is PENDING

impl R<u32, Reg<u32, _PR>>[src]

pub fn pr0(&self) -> PR0_R[src]

Bit 0 - Pending bit 0

pub fn pr1(&self) -> PR1_R[src]

Bit 1 - Pending bit 1

pub fn pr2(&self) -> PR2_R[src]

Bit 2 - Pending bit 2

pub fn pr3(&self) -> PR3_R[src]

Bit 3 - Pending bit 3

pub fn pr4(&self) -> PR4_R[src]

Bit 4 - Pending bit 4

pub fn pr5(&self) -> PR5_R[src]

Bit 5 - Pending bit 5

pub fn pr6(&self) -> PR6_R[src]

Bit 6 - Pending bit 6

pub fn pr7(&self) -> PR7_R[src]

Bit 7 - Pending bit 7

pub fn pr8(&self) -> PR8_R[src]

Bit 8 - Pending bit 8

pub fn pr9(&self) -> PR9_R[src]

Bit 9 - Pending bit 9

pub fn pr10(&self) -> PR10_R[src]

Bit 10 - Pending bit 10

pub fn pr11(&self) -> PR11_R[src]

Bit 11 - Pending bit 11

pub fn pr12(&self) -> PR12_R[src]

Bit 12 - Pending bit 12

pub fn pr13(&self) -> PR13_R[src]

Bit 13 - Pending bit 13

pub fn pr14(&self) -> PR14_R[src]

Bit 14 - Pending bit 14

pub fn pr15(&self) -> PR15_R[src]

Bit 15 - Pending bit 15

pub fn pr16(&self) -> PR16_R[src]

Bit 16 - Pending bit 16

pub fn pr17(&self) -> PR17_R[src]

Bit 17 - Pending bit 17

pub fn pr19(&self) -> PR19_R[src]

Bit 19 - Pending bit 19

impl R<bool, PDDS_A>[src]

pub fn variant(&self) -> PDDS_A[src]

Get enumerated values variant

pub fn is_stop_mode(&self) -> bool[src]

Checks if the value of the field is STOP_MODE

pub fn is_standby_mode(&self) -> bool[src]

Checks if the value of the field is STANDBY_MODE

impl R<u32, Reg<u32, _CR>>[src]

pub fn lpds(&self) -> LPDS_R[src]

Bit 0 - Low-power deep sleep

pub fn pdds(&self) -> PDDS_R[src]

Bit 1 - Power down deepsleep

pub fn cwuf(&self) -> CWUF_R[src]

Bit 2 - Clear wakeup flag

pub fn csbf(&self) -> CSBF_R[src]

Bit 3 - Clear standby flag

pub fn pvde(&self) -> PVDE_R[src]

Bit 4 - Power voltage detector enable

pub fn pls(&self) -> PLS_R[src]

Bits 5:7 - PVD level selection

pub fn dbp(&self) -> DBP_R[src]

Bit 8 - Disable backup domain write protection

pub fn ensd1(&self) -> ENSD1_R[src]

Bit 9 - ENable SD1 ADC

pub fn ensd2(&self) -> ENSD2_R[src]

Bit 10 - ENable SD2 ADC

pub fn ensd3(&self) -> ENSD3_R[src]

Bit 11 - ENable SD3 ADC

impl R<u32, Reg<u32, _CSR>>[src]

pub fn wuf(&self) -> WUF_R[src]

Bit 0 - Wakeup flag

pub fn sbf(&self) -> SBF_R[src]

Bit 1 - Standby flag

pub fn pvdo(&self) -> PVDO_R[src]

Bit 2 - PVD output

pub fn ewup1(&self) -> EWUP1_R[src]

Bit 8 - Enable WKUP1 pin

pub fn ewup2(&self) -> EWUP2_R[src]

Bit 9 - Enable WKUP2 pin

pub fn ewup3(&self) -> EWUP3_R[src]

Bit 10 - Enable WKUP3 pin

impl R<bool, IDE_A>[src]

pub fn variant(&self) -> IDE_A[src]

Get enumerated values variant

pub fn is_standard(&self) -> bool[src]

Checks if the value of the field is STANDARD

pub fn is_extended(&self) -> bool[src]

Checks if the value of the field is EXTENDED

impl R<bool, RTR_A>[src]

pub fn variant(&self) -> RTR_A[src]

Get enumerated values variant

pub fn is_data(&self) -> bool[src]

Checks if the value of the field is DATA

pub fn is_remote(&self) -> bool[src]

Checks if the value of the field is REMOTE

impl R<u32, Reg<u32, _TIR>>[src]

pub fn stid(&self) -> STID_R[src]

Bits 21:31 - STID

pub fn exid(&self) -> EXID_R[src]

Bits 3:20 - EXID

pub fn ide(&self) -> IDE_R[src]

Bit 2 - IDE

pub fn rtr(&self) -> RTR_R[src]

Bit 1 - RTR

pub fn txrq(&self) -> TXRQ_R[src]

Bit 0 - TXRQ

impl R<u32, Reg<u32, _TDTR>>[src]

pub fn time(&self) -> TIME_R[src]

Bits 16:31 - TIME

pub fn tgt(&self) -> TGT_R[src]

Bit 8 - TGT

pub fn dlc(&self) -> DLC_R[src]

Bits 0:3 - DLC

impl R<u32, Reg<u32, _TDLR>>[src]

pub fn data3(&self) -> DATA3_R[src]

Bits 24:31 - DATA3

pub fn data2(&self) -> DATA2_R[src]

Bits 16:23 - DATA2

pub fn data1(&self) -> DATA1_R[src]

Bits 8:15 - DATA1

pub fn data0(&self) -> DATA0_R[src]

Bits 0:7 - DATA0

impl R<u32, Reg<u32, _TDHR>>[src]

pub fn data7(&self) -> DATA7_R[src]

Bits 24:31 - DATA7

pub fn data6(&self) -> DATA6_R[src]

Bits 16:23 - DATA6

pub fn data5(&self) -> DATA5_R[src]

Bits 8:15 - DATA5

pub fn data4(&self) -> DATA4_R[src]

Bits 0:7 - DATA4

impl R<bool, IDE_A>[src]

pub fn variant(&self) -> IDE_A[src]

Get enumerated values variant

pub fn is_standard(&self) -> bool[src]

Checks if the value of the field is STANDARD

pub fn is_extended(&self) -> bool[src]

Checks if the value of the field is EXTENDED

impl R<bool, RTR_A>[src]

pub fn variant(&self) -> RTR_A[src]

Get enumerated values variant

pub fn is_data(&self) -> bool[src]

Checks if the value of the field is DATA

pub fn is_remote(&self) -> bool[src]

Checks if the value of the field is REMOTE

impl R<u32, Reg<u32, _RIR>>[src]

pub fn stid(&self) -> STID_R[src]

Bits 21:31 - STID

pub fn exid(&self) -> EXID_R[src]

Bits 3:20 - EXID

pub fn ide(&self) -> IDE_R[src]

Bit 2 - IDE

pub fn rtr(&self) -> RTR_R[src]

Bit 1 - RTR

impl R<u32, Reg<u32, _RDTR>>[src]

pub fn time(&self) -> TIME_R[src]

Bits 16:31 - TIME

pub fn fmi(&self) -> FMI_R[src]

Bits 8:15 - FMI

pub fn dlc(&self) -> DLC_R[src]

Bits 0:3 - DLC

impl R<u32, Reg<u32, _RDLR>>[src]

pub fn data3(&self) -> DATA3_R[src]

Bits 24:31 - DATA3

pub fn data2(&self) -> DATA2_R[src]

Bits 16:23 - DATA2

pub fn data1(&self) -> DATA1_R[src]

Bits 8:15 - DATA1

pub fn data0(&self) -> DATA0_R[src]

Bits 0:7 - DATA0

impl R<u32, Reg<u32, _RDHR>>[src]

pub fn data7(&self) -> DATA7_R[src]

Bits 24:31 - DATA7

pub fn data6(&self) -> DATA6_R[src]

Bits 16:23 - DATA6

pub fn data5(&self) -> DATA5_R[src]

Bits 8:15 - DATA5

pub fn data4(&self) -> DATA4_R[src]

Bits 0:7 - DATA4

impl R<u32, Reg<u32, _FR1>>[src]

pub fn fb0(&self) -> FB0_R[src]

Bit 0 - Filter bits

pub fn fb1(&self) -> FB1_R[src]

Bit 1 - Filter bits

pub fn fb2(&self) -> FB2_R[src]

Bit 2 - Filter bits

pub fn fb3(&self) -> FB3_R[src]

Bit 3 - Filter bits

pub fn fb4(&self) -> FB4_R[src]

Bit 4 - Filter bits

pub fn fb5(&self) -> FB5_R[src]

Bit 5 - Filter bits

pub fn fb6(&self) -> FB6_R[src]

Bit 6 - Filter bits

pub fn fb7(&self) -> FB7_R[src]

Bit 7 - Filter bits

pub fn fb8(&self) -> FB8_R[src]

Bit 8 - Filter bits

pub fn fb9(&self) -> FB9_R[src]

Bit 9 - Filter bits

pub fn fb10(&self) -> FB10_R[src]

Bit 10 - Filter bits

pub fn fb11(&self) -> FB11_R[src]

Bit 11 - Filter bits

pub fn fb12(&self) -> FB12_R[src]

Bit 12 - Filter bits

pub fn fb13(&self) -> FB13_R[src]

Bit 13 - Filter bits

pub fn fb14(&self) -> FB14_R[src]

Bit 14 - Filter bits

pub fn fb15(&self) -> FB15_R[src]

Bit 15 - Filter bits

pub fn fb16(&self) -> FB16_R[src]

Bit 16 - Filter bits

pub fn fb17(&self) -> FB17_R[src]

Bit 17 - Filter bits

pub fn fb18(&self) -> FB18_R[src]

Bit 18 - Filter bits

pub fn fb19(&self) -> FB19_R[src]

Bit 19 - Filter bits

pub fn fb20(&self) -> FB20_R[src]

Bit 20 - Filter bits

pub fn fb21(&self) -> FB21_R[src]

Bit 21 - Filter bits

pub fn fb22(&self) -> FB22_R[src]

Bit 22 - Filter bits

pub fn fb23(&self) -> FB23_R[src]

Bit 23 - Filter bits

pub fn fb24(&self) -> FB24_R[src]

Bit 24 - Filter bits

pub fn fb25(&self) -> FB25_R[src]

Bit 25 - Filter bits

pub fn fb26(&self) -> FB26_R[src]

Bit 26 - Filter bits

pub fn fb27(&self) -> FB27_R[src]

Bit 27 - Filter bits

pub fn fb28(&self) -> FB28_R[src]

Bit 28 - Filter bits

pub fn fb29(&self) -> FB29_R[src]

Bit 29 - Filter bits

pub fn fb30(&self) -> FB30_R[src]

Bit 30 - Filter bits

pub fn fb31(&self) -> FB31_R[src]

Bit 31 - Filter bits

impl R<u32, Reg<u32, _FR2>>[src]

pub fn fb0(&self) -> FB0_R[src]

Bit 0 - Filter bits

pub fn fb1(&self) -> FB1_R[src]

Bit 1 - Filter bits

pub fn fb2(&self) -> FB2_R[src]

Bit 2 - Filter bits

pub fn fb3(&self) -> FB3_R[src]

Bit 3 - Filter bits

pub fn fb4(&self) -> FB4_R[src]

Bit 4 - Filter bits

pub fn fb5(&self) -> FB5_R[src]

Bit 5 - Filter bits

pub fn fb6(&self) -> FB6_R[src]

Bit 6 - Filter bits

pub fn fb7(&self) -> FB7_R[src]

Bit 7 - Filter bits

pub fn fb8(&self) -> FB8_R[src]

Bit 8 - Filter bits

pub fn fb9(&self) -> FB9_R[src]

Bit 9 - Filter bits

pub fn fb10(&self) -> FB10_R[src]

Bit 10 - Filter bits

pub fn fb11(&self) -> FB11_R[src]

Bit 11 - Filter bits

pub fn fb12(&self) -> FB12_R[src]

Bit 12 - Filter bits

pub fn fb13(&self) -> FB13_R[src]

Bit 13 - Filter bits

pub fn fb14(&self) -> FB14_R[src]

Bit 14 - Filter bits

pub fn fb15(&self) -> FB15_R[src]

Bit 15 - Filter bits

pub fn fb16(&self) -> FB16_R[src]

Bit 16 - Filter bits

pub fn fb17(&self) -> FB17_R[src]

Bit 17 - Filter bits

pub fn fb18(&self) -> FB18_R[src]

Bit 18 - Filter bits

pub fn fb19(&self) -> FB19_R[src]

Bit 19 - Filter bits

pub fn fb20(&self) -> FB20_R[src]

Bit 20 - Filter bits

pub fn fb21(&self) -> FB21_R[src]

Bit 21 - Filter bits

pub fn fb22(&self) -> FB22_R[src]

Bit 22 - Filter bits

pub fn fb23(&self) -> FB23_R[src]

Bit 23 - Filter bits

pub fn fb24(&self) -> FB24_R[src]

Bit 24 - Filter bits

pub fn fb25(&self) -> FB25_R[src]

Bit 25 - Filter bits

pub fn fb26(&self) -> FB26_R[src]

Bit 26 - Filter bits

pub fn fb27(&self) -> FB27_R[src]

Bit 27 - Filter bits

pub fn fb28(&self) -> FB28_R[src]

Bit 28 - Filter bits

pub fn fb29(&self) -> FB29_R[src]

Bit 29 - Filter bits

pub fn fb30(&self) -> FB30_R[src]

Bit 30 - Filter bits

pub fn fb31(&self) -> FB31_R[src]

Bit 31 - Filter bits

impl R<u32, Reg<u32, _MCR>>[src]

pub fn dbf(&self) -> DBF_R[src]

Bit 16 - DBF

pub fn reset(&self) -> RESET_R[src]

Bit 15 - RESET

pub fn ttcm(&self) -> TTCM_R[src]

Bit 7 - TTCM

pub fn abom(&self) -> ABOM_R[src]

Bit 6 - ABOM

pub fn awum(&self) -> AWUM_R[src]

Bit 5 - AWUM

pub fn nart(&self) -> NART_R[src]

Bit 4 - NART

pub fn rflm(&self) -> RFLM_R[src]

Bit 3 - RFLM

pub fn txfp(&self) -> TXFP_R[src]

Bit 2 - TXFP

pub fn sleep(&self) -> SLEEP_R[src]

Bit 1 - SLEEP

pub fn inrq(&self) -> INRQ_R[src]

Bit 0 - INRQ

impl R<u32, Reg<u32, _MSR>>[src]

pub fn rx(&self) -> RX_R[src]

Bit 11 - RX

pub fn samp(&self) -> SAMP_R[src]

Bit 10 - SAMP

pub fn rxm(&self) -> RXM_R[src]

Bit 9 - RXM

pub fn txm(&self) -> TXM_R[src]

Bit 8 - TXM

pub fn slaki(&self) -> SLAKI_R[src]

Bit 4 - SLAKI

pub fn wkui(&self) -> WKUI_R[src]

Bit 3 - WKUI

pub fn erri(&self) -> ERRI_R[src]

Bit 2 - ERRI

pub fn slak(&self) -> SLAK_R[src]

Bit 1 - SLAK

pub fn inak(&self) -> INAK_R[src]

Bit 0 - INAK

impl R<u32, Reg<u32, _TSR>>[src]

pub fn low2(&self) -> LOW2_R[src]

Bit 31 - Lowest priority flag for mailbox 2

pub fn low1(&self) -> LOW1_R[src]

Bit 30 - Lowest priority flag for mailbox 1

pub fn low0(&self) -> LOW0_R[src]

Bit 29 - Lowest priority flag for mailbox 0

pub fn tme2(&self) -> TME2_R[src]

Bit 28 - Lowest priority flag for mailbox 2

pub fn tme1(&self) -> TME1_R[src]

Bit 27 - Lowest priority flag for mailbox 1

pub fn tme0(&self) -> TME0_R[src]

Bit 26 - Lowest priority flag for mailbox 0

pub fn code(&self) -> CODE_R[src]

Bits 24:25 - CODE

pub fn abrq2(&self) -> ABRQ2_R[src]

Bit 23 - ABRQ2

pub fn terr2(&self) -> TERR2_R[src]

Bit 19 - TERR2

pub fn alst2(&self) -> ALST2_R[src]

Bit 18 - ALST2

pub fn txok2(&self) -> TXOK2_R[src]

Bit 17 - TXOK2

pub fn rqcp2(&self) -> RQCP2_R[src]

Bit 16 - RQCP2

pub fn abrq1(&self) -> ABRQ1_R[src]

Bit 15 - ABRQ1

pub fn terr1(&self) -> TERR1_R[src]

Bit 11 - TERR1

pub fn alst1(&self) -> ALST1_R[src]

Bit 10 - ALST1

pub fn txok1(&self) -> TXOK1_R[src]

Bit 9 - TXOK1

pub fn rqcp1(&self) -> RQCP1_R[src]

Bit 8 - RQCP1

pub fn abrq0(&self) -> ABRQ0_R[src]

Bit 7 - ABRQ0

pub fn terr0(&self) -> TERR0_R[src]

Bit 3 - TERR0

pub fn alst0(&self) -> ALST0_R[src]

Bit 2 - ALST0

pub fn txok0(&self) -> TXOK0_R[src]

Bit 1 - TXOK0

pub fn rqcp0(&self) -> RQCP0_R[src]

Bit 0 - RQCP0

impl R<bool, RFOM_A>[src]

pub fn variant(&self) -> Variant<bool, RFOM_A>[src]

Get enumerated values variant

pub fn is_release(&self) -> bool[src]

Checks if the value of the field is RELEASE

impl R<bool, FOVR_A>[src]

pub fn variant(&self) -> FOVR_A[src]

Get enumerated values variant

pub fn is_no_overrun(&self) -> bool[src]

Checks if the value of the field is NOOVERRUN

pub fn is_overrun(&self) -> bool[src]

Checks if the value of the field is OVERRUN

impl R<bool, FULL_A>[src]

pub fn variant(&self) -> FULL_A[src]

Get enumerated values variant

pub fn is_not_full(&self) -> bool[src]

Checks if the value of the field is NOTFULL

pub fn is_full(&self) -> bool[src]

Checks if the value of the field is FULL

impl R<u32, Reg<u32, _RFR>>[src]

pub fn rfom(&self) -> RFOM_R[src]

Bit 5 - RFOM0

pub fn fovr(&self) -> FOVR_R[src]

Bit 4 - FOVR0

pub fn full(&self) -> FULL_R[src]

Bit 3 - FULL0

pub fn fmp(&self) -> FMP_R[src]

Bits 0:1 - FMP0

impl R<bool, SLKIE_A>[src]

pub fn variant(&self) -> SLKIE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, WKUIE_A>[src]

pub fn variant(&self) -> WKUIE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, ERRIE_A>[src]

pub fn variant(&self) -> ERRIE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, LECIE_A>[src]

pub fn variant(&self) -> LECIE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, BOFIE_A>[src]

pub fn variant(&self) -> BOFIE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, EPVIE_A>[src]

pub fn variant(&self) -> EPVIE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, EWGIE_A>[src]

pub fn variant(&self) -> EWGIE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, FOVIE1_A>[src]

pub fn variant(&self) -> FOVIE1_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, FFIE1_A>[src]

pub fn variant(&self) -> FFIE1_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, FMPIE1_A>[src]

pub fn variant(&self) -> FMPIE1_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, FOVIE0_A>[src]

pub fn variant(&self) -> FOVIE0_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, FFIE0_A>[src]

pub fn variant(&self) -> FFIE0_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, FMPIE0_A>[src]

pub fn variant(&self) -> FMPIE0_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, TMEIE_A>[src]

pub fn variant(&self) -> TMEIE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u32, Reg<u32, _IER>>[src]

pub fn slkie(&self) -> SLKIE_R[src]

Bit 17 - SLKIE

pub fn wkuie(&self) -> WKUIE_R[src]

Bit 16 - WKUIE

pub fn errie(&self) -> ERRIE_R[src]

Bit 15 - ERRIE

pub fn lecie(&self) -> LECIE_R[src]

Bit 11 - LECIE

pub fn bofie(&self) -> BOFIE_R[src]

Bit 10 - BOFIE

pub fn epvie(&self) -> EPVIE_R[src]

Bit 9 - EPVIE

pub fn ewgie(&self) -> EWGIE_R[src]

Bit 8 - EWGIE

pub fn fovie1(&self) -> FOVIE1_R[src]

Bit 6 - FOVIE1

pub fn ffie1(&self) -> FFIE1_R[src]

Bit 5 - FFIE1

pub fn fmpie1(&self) -> FMPIE1_R[src]

Bit 4 - FMPIE1

pub fn fovie0(&self) -> FOVIE0_R[src]

Bit 3 - FOVIE0

pub fn ffie0(&self) -> FFIE0_R[src]

Bit 2 - FFIE0

pub fn fmpie0(&self) -> FMPIE0_R[src]

Bit 1 - FMPIE0

pub fn tmeie(&self) -> TMEIE_R[src]

Bit 0 - TMEIE

impl R<u8, LEC_A>[src]

pub fn variant(&self) -> LEC_A[src]

Get enumerated values variant

pub fn is_no_error(&self) -> bool[src]

Checks if the value of the field is NOERROR

pub fn is_stuff(&self) -> bool[src]

Checks if the value of the field is STUFF

pub fn is_form(&self) -> bool[src]

Checks if the value of the field is FORM

pub fn is_ack(&self) -> bool[src]

Checks if the value of the field is ACK

pub fn is_bit_recessive(&self) -> bool[src]

Checks if the value of the field is BITRECESSIVE

pub fn is_bit_dominant(&self) -> bool[src]

Checks if the value of the field is BITDOMINANT

pub fn is_crc(&self) -> bool[src]

Checks if the value of the field is CRC

pub fn is_custom(&self) -> bool[src]

Checks if the value of the field is CUSTOM

impl R<u32, Reg<u32, _ESR>>[src]

pub fn rec(&self) -> REC_R[src]

Bits 24:31 - REC

pub fn tec(&self) -> TEC_R[src]

Bits 16:23 - TEC

pub fn lec(&self) -> LEC_R[src]

Bits 4:6 - LEC

pub fn boff(&self) -> BOFF_R[src]

Bit 2 - BOFF

pub fn epvf(&self) -> EPVF_R[src]

Bit 1 - EPVF

pub fn ewgf(&self) -> EWGF_R[src]

Bit 0 - EWGF

impl R<bool, SILM_A>[src]

pub fn variant(&self) -> SILM_A[src]

Get enumerated values variant

pub fn is_normal(&self) -> bool[src]

Checks if the value of the field is NORMAL

pub fn is_silent(&self) -> bool[src]

Checks if the value of the field is SILENT

impl R<bool, LBKM_A>[src]

pub fn variant(&self) -> LBKM_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u32, Reg<u32, _BTR>>[src]

pub fn silm(&self) -> SILM_R[src]

Bit 31 - SILM

pub fn lbkm(&self) -> LBKM_R[src]

Bit 30 - LBKM

pub fn sjw(&self) -> SJW_R[src]

Bits 24:25 - SJW

pub fn ts2(&self) -> TS2_R[src]

Bits 20:22 - TS2

pub fn ts1(&self) -> TS1_R[src]

Bits 16:19 - TS1

pub fn brp(&self) -> BRP_R[src]

Bits 0:9 - BRP

impl R<u32, Reg<u32, _FMR>>[src]

pub fn can2sb(&self) -> CAN2SB_R[src]

Bits 8:13 - CAN2SB

pub fn finit(&self) -> FINIT_R[src]

Bit 0 - FINIT

impl R<u32, Reg<u32, _FM1R>>[src]

pub fn fbm0(&self) -> FBM0_R[src]

Bit 0 - Filter mode

pub fn fbm1(&self) -> FBM1_R[src]

Bit 1 - Filter mode

pub fn fbm2(&self) -> FBM2_R[src]

Bit 2 - Filter mode

pub fn fbm3(&self) -> FBM3_R[src]

Bit 3 - Filter mode

pub fn fbm4(&self) -> FBM4_R[src]

Bit 4 - Filter mode

pub fn fbm5(&self) -> FBM5_R[src]

Bit 5 - Filter mode

pub fn fbm6(&self) -> FBM6_R[src]

Bit 6 - Filter mode

pub fn fbm7(&self) -> FBM7_R[src]

Bit 7 - Filter mode

pub fn fbm8(&self) -> FBM8_R[src]

Bit 8 - Filter mode

pub fn fbm9(&self) -> FBM9_R[src]

Bit 9 - Filter mode

pub fn fbm10(&self) -> FBM10_R[src]

Bit 10 - Filter mode

pub fn fbm11(&self) -> FBM11_R[src]

Bit 11 - Filter mode

pub fn fbm12(&self) -> FBM12_R[src]

Bit 12 - Filter mode

pub fn fbm13(&self) -> FBM13_R[src]

Bit 13 - Filter mode

pub fn fbm14(&self) -> FBM14_R[src]

Bit 14 - Filter mode

pub fn fbm15(&self) -> FBM15_R[src]

Bit 15 - Filter mode

pub fn fbm16(&self) -> FBM16_R[src]

Bit 16 - Filter mode

pub fn fbm17(&self) -> FBM17_R[src]

Bit 17 - Filter mode

pub fn fbm18(&self) -> FBM18_R[src]

Bit 18 - Filter mode

pub fn fbm19(&self) -> FBM19_R[src]

Bit 19 - Filter mode

pub fn fbm20(&self) -> FBM20_R[src]

Bit 20 - Filter mode

pub fn fbm21(&self) -> FBM21_R[src]

Bit 21 - Filter mode

pub fn fbm22(&self) -> FBM22_R[src]

Bit 22 - Filter mode

pub fn fbm23(&self) -> FBM23_R[src]

Bit 23 - Filter mode

pub fn fbm24(&self) -> FBM24_R[src]

Bit 24 - Filter mode

pub fn fbm25(&self) -> FBM25_R[src]

Bit 25 - Filter mode

pub fn fbm26(&self) -> FBM26_R[src]

Bit 26 - Filter mode

pub fn fbm27(&self) -> FBM27_R[src]

Bit 27 - Filter mode

impl R<u32, Reg<u32, _FS1R>>[src]

pub fn fsc0(&self) -> FSC0_R[src]

Bit 0 - Filter scale configuration

pub fn fsc1(&self) -> FSC1_R[src]

Bit 1 - Filter scale configuration

pub fn fsc2(&self) -> FSC2_R[src]

Bit 2 - Filter scale configuration

pub fn fsc3(&self) -> FSC3_R[src]

Bit 3 - Filter scale configuration

pub fn fsc4(&self) -> FSC4_R[src]

Bit 4 - Filter scale configuration

pub fn fsc5(&self) -> FSC5_R[src]

Bit 5 - Filter scale configuration

pub fn fsc6(&self) -> FSC6_R[src]

Bit 6 - Filter scale configuration

pub fn fsc7(&self) -> FSC7_R[src]

Bit 7 - Filter scale configuration

pub fn fsc8(&self) -> FSC8_R[src]

Bit 8 - Filter scale configuration

pub fn fsc9(&self) -> FSC9_R[src]

Bit 9 - Filter scale configuration

pub fn fsc10(&self) -> FSC10_R[src]

Bit 10 - Filter scale configuration

pub fn fsc11(&self) -> FSC11_R[src]

Bit 11 - Filter scale configuration

pub fn fsc12(&self) -> FSC12_R[src]

Bit 12 - Filter scale configuration

pub fn fsc13(&self) -> FSC13_R[src]

Bit 13 - Filter scale configuration

pub fn fsc14(&self) -> FSC14_R[src]

Bit 14 - Filter scale configuration

pub fn fsc15(&self) -> FSC15_R[src]

Bit 15 - Filter scale configuration

pub fn fsc16(&self) -> FSC16_R[src]

Bit 16 - Filter scale configuration

pub fn fsc17(&self) -> FSC17_R[src]

Bit 17 - Filter scale configuration

pub fn fsc18(&self) -> FSC18_R[src]

Bit 18 - Filter scale configuration

pub fn fsc19(&self) -> FSC19_R[src]

Bit 19 - Filter scale configuration

pub fn fsc20(&self) -> FSC20_R[src]

Bit 20 - Filter scale configuration

pub fn fsc21(&self) -> FSC21_R[src]

Bit 21 - Filter scale configuration

pub fn fsc22(&self) -> FSC22_R[src]

Bit 22 - Filter scale configuration

pub fn fsc23(&self) -> FSC23_R[src]

Bit 23 - Filter scale configuration

pub fn fsc24(&self) -> FSC24_R[src]

Bit 24 - Filter scale configuration

pub fn fsc25(&self) -> FSC25_R[src]

Bit 25 - Filter scale configuration

pub fn fsc26(&self) -> FSC26_R[src]

Bit 26 - Filter scale configuration

pub fn fsc27(&self) -> FSC27_R[src]

Bit 27 - Filter scale configuration

impl R<u32, Reg<u32, _FFA1R>>[src]

pub fn ffa0(&self) -> FFA0_R[src]

Bit 0 - Filter FIFO assignment for filter 0

pub fn ffa1(&self) -> FFA1_R[src]

Bit 1 - Filter FIFO assignment for filter 1

pub fn ffa2(&self) -> FFA2_R[src]

Bit 2 - Filter FIFO assignment for filter 2

pub fn ffa3(&self) -> FFA3_R[src]

Bit 3 - Filter FIFO assignment for filter 3

pub fn ffa4(&self) -> FFA4_R[src]

Bit 4 - Filter FIFO assignment for filter 4

pub fn ffa5(&self) -> FFA5_R[src]

Bit 5 - Filter FIFO assignment for filter 5

pub fn ffa6(&self) -> FFA6_R[src]

Bit 6 - Filter FIFO assignment for filter 6

pub fn ffa7(&self) -> FFA7_R[src]

Bit 7 - Filter FIFO assignment for filter 7

pub fn ffa8(&self) -> FFA8_R[src]

Bit 8 - Filter FIFO assignment for filter 8

pub fn ffa9(&self) -> FFA9_R[src]

Bit 9 - Filter FIFO assignment for filter 9

pub fn ffa10(&self) -> FFA10_R[src]

Bit 10 - Filter FIFO assignment for filter 10

pub fn ffa11(&self) -> FFA11_R[src]

Bit 11 - Filter FIFO assignment for filter 11

pub fn ffa12(&self) -> FFA12_R[src]

Bit 12 - Filter FIFO assignment for filter 12

pub fn ffa13(&self) -> FFA13_R[src]

Bit 13 - Filter FIFO assignment for filter 13

pub fn ffa14(&self) -> FFA14_R[src]

Bit 14 - Filter FIFO assignment for filter 14

pub fn ffa15(&self) -> FFA15_R[src]

Bit 15 - Filter FIFO assignment for filter 15

pub fn ffa16(&self) -> FFA16_R[src]

Bit 16 - Filter FIFO assignment for filter 16

pub fn ffa17(&self) -> FFA17_R[src]

Bit 17 - Filter FIFO assignment for filter 17

pub fn ffa18(&self) -> FFA18_R[src]

Bit 18 - Filter FIFO assignment for filter 18

pub fn ffa19(&self) -> FFA19_R[src]

Bit 19 - Filter FIFO assignment for filter 19

pub fn ffa20(&self) -> FFA20_R[src]

Bit 20 - Filter FIFO assignment for filter 20

pub fn ffa21(&self) -> FFA21_R[src]

Bit 21 - Filter FIFO assignment for filter 21

pub fn ffa22(&self) -> FFA22_R[src]

Bit 22 - Filter FIFO assignment for filter 22

pub fn ffa23(&self) -> FFA23_R[src]

Bit 23 - Filter FIFO assignment for filter 23

pub fn ffa24(&self) -> FFA24_R[src]

Bit 24 - Filter FIFO assignment for filter 24

pub fn ffa25(&self) -> FFA25_R[src]

Bit 25 - Filter FIFO assignment for filter 25

pub fn ffa26(&self) -> FFA26_R[src]

Bit 26 - Filter FIFO assignment for filter 26

pub fn ffa27(&self) -> FFA27_R[src]

Bit 27 - Filter FIFO assignment for filter 27

impl R<u32, Reg<u32, _FA1R>>[src]

pub fn fact0(&self) -> FACT0_R[src]

Bit 0 - Filter active

pub fn fact1(&self) -> FACT1_R[src]

Bit 1 - Filter active

pub fn fact2(&self) -> FACT2_R[src]

Bit 2 - Filter active

pub fn fact3(&self) -> FACT3_R[src]

Bit 3 - Filter active

pub fn fact4(&self) -> FACT4_R[src]

Bit 4 - Filter active

pub fn fact5(&self) -> FACT5_R[src]

Bit 5 - Filter active

pub fn fact6(&self) -> FACT6_R[src]

Bit 6 - Filter active

pub fn fact7(&self) -> FACT7_R[src]

Bit 7 - Filter active

pub fn fact8(&self) -> FACT8_R[src]

Bit 8 - Filter active

pub fn fact9(&self) -> FACT9_R[src]

Bit 9 - Filter active

pub fn fact10(&self) -> FACT10_R[src]

Bit 10 - Filter active

pub fn fact11(&self) -> FACT11_R[src]

Bit 11 - Filter active

pub fn fact12(&self) -> FACT12_R[src]

Bit 12 - Filter active

pub fn fact13(&self) -> FACT13_R[src]

Bit 13 - Filter active

pub fn fact14(&self) -> FACT14_R[src]

Bit 14 - Filter active

pub fn fact15(&self) -> FACT15_R[src]

Bit 15 - Filter active

pub fn fact16(&self) -> FACT16_R[src]

Bit 16 - Filter active

pub fn fact17(&self) -> FACT17_R[src]

Bit 17 - Filter active

pub fn fact18(&self) -> FACT18_R[src]

Bit 18 - Filter active

pub fn fact19(&self) -> FACT19_R[src]

Bit 19 - Filter active

pub fn fact20(&self) -> FACT20_R[src]

Bit 20 - Filter active

pub fn fact21(&self) -> FACT21_R[src]

Bit 21 - Filter active

pub fn fact22(&self) -> FACT22_R[src]

Bit 22 - Filter active

pub fn fact23(&self) -> FACT23_R[src]

Bit 23 - Filter active

pub fn fact24(&self) -> FACT24_R[src]

Bit 24 - Filter active

pub fn fact25(&self) -> FACT25_R[src]

Bit 25 - Filter active

pub fn fact26(&self) -> FACT26_R[src]

Bit 26 - Filter active

pub fn fact27(&self) -> FACT27_R[src]

Bit 27 - Filter active

impl R<u8, STAT_TX_A>[src]

pub fn variant(&self) -> STAT_TX_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_stall(&self) -> bool[src]

Checks if the value of the field is STALL

pub fn is_nak(&self) -> bool[src]

Checks if the value of the field is NAK

pub fn is_valid(&self) -> bool[src]

Checks if the value of the field is VALID

impl R<u8, EP_TYPE_A>[src]

pub fn variant(&self) -> EP_TYPE_A[src]

Get enumerated values variant

pub fn is_bulk(&self) -> bool[src]

Checks if the value of the field is BULK

pub fn is_control(&self) -> bool[src]

Checks if the value of the field is CONTROL

pub fn is_iso(&self) -> bool[src]

Checks if the value of the field is ISO

pub fn is_interrupt(&self) -> bool[src]

Checks if the value of the field is INTERRUPT

impl R<u8, STAT_RX_A>[src]

pub fn variant(&self) -> STAT_RX_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_stall(&self) -> bool[src]

Checks if the value of the field is STALL

pub fn is_nak(&self) -> bool[src]

Checks if the value of the field is NAK

pub fn is_valid(&self) -> bool[src]

Checks if the value of the field is VALID

impl R<u32, Reg<u32, _EP0R>>[src]

pub fn ea(&self) -> EA_R[src]

Bits 0:3 - Endpoint address

pub fn stat_tx(&self) -> STAT_TX_R[src]

Bits 4:5 - Status bits, for transmission transfers

pub fn dtog_tx(&self) -> DTOG_TX_R[src]

Bit 6 - Data Toggle, for transmission transfers

pub fn ctr_tx(&self) -> CTR_TX_R[src]

Bit 7 - Correct Transfer for transmission

pub fn ep_kind(&self) -> EP_KIND_R[src]

Bit 8 - Endpoint kind

pub fn ep_type(&self) -> EP_TYPE_R[src]

Bits 9:10 - Endpoint type

pub fn setup(&self) -> SETUP_R[src]

Bit 11 - Setup transaction completed

pub fn stat_rx(&self) -> STAT_RX_R[src]

Bits 12:13 - Status bits, for reception transfers

pub fn dtog_rx(&self) -> DTOG_RX_R[src]

Bit 14 - Data Toggle, for reception transfers

pub fn ctr_rx(&self) -> CTR_RX_R[src]

Bit 15 - Correct transfer for reception

impl R<u8, STAT_TX_A>[src]

pub fn variant(&self) -> STAT_TX_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_stall(&self) -> bool[src]

Checks if the value of the field is STALL

pub fn is_nak(&self) -> bool[src]

Checks if the value of the field is NAK

pub fn is_valid(&self) -> bool[src]

Checks if the value of the field is VALID

impl R<u8, EP_TYPE_A>[src]

pub fn variant(&self) -> EP_TYPE_A[src]

Get enumerated values variant

pub fn is_bulk(&self) -> bool[src]

Checks if the value of the field is BULK

pub fn is_control(&self) -> bool[src]

Checks if the value of the field is CONTROL

pub fn is_iso(&self) -> bool[src]

Checks if the value of the field is ISO

pub fn is_interrupt(&self) -> bool[src]

Checks if the value of the field is INTERRUPT

impl R<u8, STAT_RX_A>[src]

pub fn variant(&self) -> STAT_RX_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_stall(&self) -> bool[src]

Checks if the value of the field is STALL

pub fn is_nak(&self) -> bool[src]

Checks if the value of the field is NAK

pub fn is_valid(&self) -> bool[src]

Checks if the value of the field is VALID

impl R<u32, Reg<u32, _EP1R>>[src]

pub fn ea(&self) -> EA_R[src]

Bits 0:3 - Endpoint address

pub fn stat_tx(&self) -> STAT_TX_R[src]

Bits 4:5 - Status bits, for transmission transfers

pub fn dtog_tx(&self) -> DTOG_TX_R[src]

Bit 6 - Data Toggle, for transmission transfers

pub fn ctr_tx(&self) -> CTR_TX_R[src]

Bit 7 - Correct Transfer for transmission

pub fn ep_kind(&self) -> EP_KIND_R[src]

Bit 8 - Endpoint kind

pub fn ep_type(&self) -> EP_TYPE_R[src]

Bits 9:10 - Endpoint type

pub fn setup(&self) -> SETUP_R[src]

Bit 11 - Setup transaction completed

pub fn stat_rx(&self) -> STAT_RX_R[src]

Bits 12:13 - Status bits, for reception transfers

pub fn dtog_rx(&self) -> DTOG_RX_R[src]

Bit 14 - Data Toggle, for reception transfers

pub fn ctr_rx(&self) -> CTR_RX_R[src]

Bit 15 - Correct transfer for reception

impl R<u8, STAT_TX_A>[src]

pub fn variant(&self) -> STAT_TX_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_stall(&self) -> bool[src]

Checks if the value of the field is STALL

pub fn is_nak(&self) -> bool[src]

Checks if the value of the field is NAK

pub fn is_valid(&self) -> bool[src]

Checks if the value of the field is VALID

impl R<u8, EP_TYPE_A>[src]

pub fn variant(&self) -> EP_TYPE_A[src]

Get enumerated values variant

pub fn is_bulk(&self) -> bool[src]

Checks if the value of the field is BULK

pub fn is_control(&self) -> bool[src]

Checks if the value of the field is CONTROL

pub fn is_iso(&self) -> bool[src]

Checks if the value of the field is ISO

pub fn is_interrupt(&self) -> bool[src]

Checks if the value of the field is INTERRUPT

impl R<u8, STAT_RX_A>[src]

pub fn variant(&self) -> STAT_RX_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_stall(&self) -> bool[src]

Checks if the value of the field is STALL

pub fn is_nak(&self) -> bool[src]

Checks if the value of the field is NAK

pub fn is_valid(&self) -> bool[src]

Checks if the value of the field is VALID

impl R<u32, Reg<u32, _EP2R>>[src]

pub fn ea(&self) -> EA_R[src]

Bits 0:3 - Endpoint address

pub fn stat_tx(&self) -> STAT_TX_R[src]

Bits 4:5 - Status bits, for transmission transfers

pub fn dtog_tx(&self) -> DTOG_TX_R[src]

Bit 6 - Data Toggle, for transmission transfers

pub fn ctr_tx(&self) -> CTR_TX_R[src]

Bit 7 - Correct Transfer for transmission

pub fn ep_kind(&self) -> EP_KIND_R[src]

Bit 8 - Endpoint kind

pub fn ep_type(&self) -> EP_TYPE_R[src]

Bits 9:10 - Endpoint type

pub fn setup(&self) -> SETUP_R[src]

Bit 11 - Setup transaction completed

pub fn stat_rx(&self) -> STAT_RX_R[src]

Bits 12:13 - Status bits, for reception transfers

pub fn dtog_rx(&self) -> DTOG_RX_R[src]

Bit 14 - Data Toggle, for reception transfers

pub fn ctr_rx(&self) -> CTR_RX_R[src]

Bit 15 - Correct transfer for reception

impl R<u8, STAT_TX_A>[src]

pub fn variant(&self) -> STAT_TX_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_stall(&self) -> bool[src]

Checks if the value of the field is STALL

pub fn is_nak(&self) -> bool[src]

Checks if the value of the field is NAK

pub fn is_valid(&self) -> bool[src]

Checks if the value of the field is VALID

impl R<u8, EP_TYPE_A>[src]

pub fn variant(&self) -> EP_TYPE_A[src]

Get enumerated values variant

pub fn is_bulk(&self) -> bool[src]

Checks if the value of the field is BULK

pub fn is_control(&self) -> bool[src]

Checks if the value of the field is CONTROL

pub fn is_iso(&self) -> bool[src]

Checks if the value of the field is ISO

pub fn is_interrupt(&self) -> bool[src]

Checks if the value of the field is INTERRUPT

impl R<u8, STAT_RX_A>[src]

pub fn variant(&self) -> STAT_RX_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_stall(&self) -> bool[src]

Checks if the value of the field is STALL

pub fn is_nak(&self) -> bool[src]

Checks if the value of the field is NAK

pub fn is_valid(&self) -> bool[src]

Checks if the value of the field is VALID

impl R<u32, Reg<u32, _EP3R>>[src]

pub fn ea(&self) -> EA_R[src]

Bits 0:3 - Endpoint address

pub fn stat_tx(&self) -> STAT_TX_R[src]

Bits 4:5 - Status bits, for transmission transfers

pub fn dtog_tx(&self) -> DTOG_TX_R[src]

Bit 6 - Data Toggle, for transmission transfers

pub fn ctr_tx(&self) -> CTR_TX_R[src]

Bit 7 - Correct Transfer for transmission

pub fn ep_kind(&self) -> EP_KIND_R[src]

Bit 8 - Endpoint kind

pub fn ep_type(&self) -> EP_TYPE_R[src]

Bits 9:10 - Endpoint type

pub fn setup(&self) -> SETUP_R[src]

Bit 11 - Setup transaction completed

pub fn stat_rx(&self) -> STAT_RX_R[src]

Bits 12:13 - Status bits, for reception transfers

pub fn dtog_rx(&self) -> DTOG_RX_R[src]

Bit 14 - Data Toggle, for reception transfers

pub fn ctr_rx(&self) -> CTR_RX_R[src]

Bit 15 - Correct transfer for reception

impl R<u8, STAT_TX_A>[src]

pub fn variant(&self) -> STAT_TX_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_stall(&self) -> bool[src]

Checks if the value of the field is STALL

pub fn is_nak(&self) -> bool[src]

Checks if the value of the field is NAK

pub fn is_valid(&self) -> bool[src]

Checks if the value of the field is VALID

impl R<u8, EP_TYPE_A>[src]

pub fn variant(&self) -> EP_TYPE_A[src]

Get enumerated values variant

pub fn is_bulk(&self) -> bool[src]

Checks if the value of the field is BULK

pub fn is_control(&self) -> bool[src]

Checks if the value of the field is CONTROL

pub fn is_iso(&self) -> bool[src]

Checks if the value of the field is ISO

pub fn is_interrupt(&self) -> bool[src]

Checks if the value of the field is INTERRUPT

impl R<u8, STAT_RX_A>[src]

pub fn variant(&self) -> STAT_RX_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_stall(&self) -> bool[src]

Checks if the value of the field is STALL

pub fn is_nak(&self) -> bool[src]

Checks if the value of the field is NAK

pub fn is_valid(&self) -> bool[src]

Checks if the value of the field is VALID

impl R<u32, Reg<u32, _EP4R>>[src]

pub fn ea(&self) -> EA_R[src]

Bits 0:3 - Endpoint address

pub fn stat_tx(&self) -> STAT_TX_R[src]

Bits 4:5 - Status bits, for transmission transfers

pub fn dtog_tx(&self) -> DTOG_TX_R[src]

Bit 6 - Data Toggle, for transmission transfers

pub fn ctr_tx(&self) -> CTR_TX_R[src]

Bit 7 - Correct Transfer for transmission

pub fn ep_kind(&self) -> EP_KIND_R[src]

Bit 8 - Endpoint kind

pub fn ep_type(&self) -> EP_TYPE_R[src]

Bits 9:10 - Endpoint type

pub fn setup(&self) -> SETUP_R[src]

Bit 11 - Setup transaction completed

pub fn stat_rx(&self) -> STAT_RX_R[src]

Bits 12:13 - Status bits, for reception transfers

pub fn dtog_rx(&self) -> DTOG_RX_R[src]

Bit 14 - Data Toggle, for reception transfers

pub fn ctr_rx(&self) -> CTR_RX_R[src]

Bit 15 - Correct transfer for reception

impl R<u8, STAT_TX_A>[src]

pub fn variant(&self) -> STAT_TX_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_stall(&self) -> bool[src]

Checks if the value of the field is STALL

pub fn is_nak(&self) -> bool[src]

Checks if the value of the field is NAK

pub fn is_valid(&self) -> bool[src]

Checks if the value of the field is VALID

impl R<u8, EP_TYPE_A>[src]

pub fn variant(&self) -> EP_TYPE_A[src]

Get enumerated values variant

pub fn is_bulk(&self) -> bool[src]

Checks if the value of the field is BULK

pub fn is_control(&self) -> bool[src]

Checks if the value of the field is CONTROL

pub fn is_iso(&self) -> bool[src]

Checks if the value of the field is ISO

pub fn is_interrupt(&self) -> bool[src]

Checks if the value of the field is INTERRUPT

impl R<u8, STAT_RX_A>[src]

pub fn variant(&self) -> STAT_RX_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_stall(&self) -> bool[src]

Checks if the value of the field is STALL

pub fn is_nak(&self) -> bool[src]

Checks if the value of the field is NAK

pub fn is_valid(&self) -> bool[src]

Checks if the value of the field is VALID

impl R<u32, Reg<u32, _EP5R>>[src]

pub fn ea(&self) -> EA_R[src]

Bits 0:3 - Endpoint address

pub fn stat_tx(&self) -> STAT_TX_R[src]

Bits 4:5 - Status bits, for transmission transfers

pub fn dtog_tx(&self) -> DTOG_TX_R[src]

Bit 6 - Data Toggle, for transmission transfers

pub fn ctr_tx(&self) -> CTR_TX_R[src]

Bit 7 - Correct Transfer for transmission

pub fn ep_kind(&self) -> EP_KIND_R[src]

Bit 8 - Endpoint kind

pub fn ep_type(&self) -> EP_TYPE_R[src]

Bits 9:10 - Endpoint type

pub fn setup(&self) -> SETUP_R[src]

Bit 11 - Setup transaction completed

pub fn stat_rx(&self) -> STAT_RX_R[src]

Bits 12:13 - Status bits, for reception transfers

pub fn dtog_rx(&self) -> DTOG_RX_R[src]

Bit 14 - Data Toggle, for reception transfers

pub fn ctr_rx(&self) -> CTR_RX_R[src]

Bit 15 - Correct transfer for reception

impl R<u8, STAT_TX_A>[src]

pub fn variant(&self) -> STAT_TX_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_stall(&self) -> bool[src]

Checks if the value of the field is STALL

pub fn is_nak(&self) -> bool[src]

Checks if the value of the field is NAK

pub fn is_valid(&self) -> bool[src]

Checks if the value of the field is VALID

impl R<u8, EP_TYPE_A>[src]

pub fn variant(&self) -> EP_TYPE_A[src]

Get enumerated values variant

pub fn is_bulk(&self) -> bool[src]

Checks if the value of the field is BULK

pub fn is_control(&self) -> bool[src]

Checks if the value of the field is CONTROL

pub fn is_iso(&self) -> bool[src]

Checks if the value of the field is ISO

pub fn is_interrupt(&self) -> bool[src]

Checks if the value of the field is INTERRUPT

impl R<u8, STAT_RX_A>[src]

pub fn variant(&self) -> STAT_RX_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_stall(&self) -> bool[src]

Checks if the value of the field is STALL

pub fn is_nak(&self) -> bool[src]

Checks if the value of the field is NAK

pub fn is_valid(&self) -> bool[src]

Checks if the value of the field is VALID

impl R<u32, Reg<u32, _EP6R>>[src]

pub fn ea(&self) -> EA_R[src]

Bits 0:3 - Endpoint address

pub fn stat_tx(&self) -> STAT_TX_R[src]

Bits 4:5 - Status bits, for transmission transfers

pub fn dtog_tx(&self) -> DTOG_TX_R[src]

Bit 6 - Data Toggle, for transmission transfers

pub fn ctr_tx(&self) -> CTR_TX_R[src]

Bit 7 - Correct Transfer for transmission

pub fn ep_kind(&self) -> EP_KIND_R[src]

Bit 8 - Endpoint kind

pub fn ep_type(&self) -> EP_TYPE_R[src]

Bits 9:10 - Endpoint type

pub fn setup(&self) -> SETUP_R[src]

Bit 11 - Setup transaction completed

pub fn stat_rx(&self) -> STAT_RX_R[src]

Bits 12:13 - Status bits, for reception transfers

pub fn dtog_rx(&self) -> DTOG_RX_R[src]

Bit 14 - Data Toggle, for reception transfers

pub fn ctr_rx(&self) -> CTR_RX_R[src]

Bit 15 - Correct transfer for reception

impl R<u8, STAT_TX_A>[src]

pub fn variant(&self) -> STAT_TX_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_stall(&self) -> bool[src]

Checks if the value of the field is STALL

pub fn is_nak(&self) -> bool[src]

Checks if the value of the field is NAK

pub fn is_valid(&self) -> bool[src]

Checks if the value of the field is VALID

impl R<u8, EP_TYPE_A>[src]

pub fn variant(&self) -> EP_TYPE_A[src]

Get enumerated values variant

pub fn is_bulk(&self) -> bool[src]

Checks if the value of the field is BULK

pub fn is_control(&self) -> bool[src]

Checks if the value of the field is CONTROL

pub fn is_iso(&self) -> bool[src]

Checks if the value of the field is ISO

pub fn is_interrupt(&self) -> bool[src]

Checks if the value of the field is INTERRUPT

impl R<u8, STAT_RX_A>[src]

pub fn variant(&self) -> STAT_RX_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_stall(&self) -> bool[src]

Checks if the value of the field is STALL

pub fn is_nak(&self) -> bool[src]

Checks if the value of the field is NAK

pub fn is_valid(&self) -> bool[src]

Checks if the value of the field is VALID

impl R<u32, Reg<u32, _EP7R>>[src]

pub fn ea(&self) -> EA_R[src]

Bits 0:3 - Endpoint address

pub fn stat_tx(&self) -> STAT_TX_R[src]

Bits 4:5 - Status bits, for transmission transfers

pub fn dtog_tx(&self) -> DTOG_TX_R[src]

Bit 6 - Data Toggle, for transmission transfers

pub fn ctr_tx(&self) -> CTR_TX_R[src]

Bit 7 - Correct Transfer for transmission

pub fn ep_kind(&self) -> EP_KIND_R[src]

Bit 8 - Endpoint kind

pub fn ep_type(&self) -> EP_TYPE_R[src]

Bits 9:10 - Endpoint type

pub fn setup(&self) -> SETUP_R[src]

Bit 11 - Setup transaction completed

pub fn stat_rx(&self) -> STAT_RX_R[src]

Bits 12:13 - Status bits, for reception transfers

pub fn dtog_rx(&self) -> DTOG_RX_R[src]

Bit 14 - Data Toggle, for reception transfers

pub fn ctr_rx(&self) -> CTR_RX_R[src]

Bit 15 - Correct transfer for reception

impl R<bool, FRES_A>[src]

pub fn variant(&self) -> FRES_A[src]

Get enumerated values variant

pub fn is_no_reset(&self) -> bool[src]

Checks if the value of the field is NORESET

pub fn is_reset(&self) -> bool[src]

Checks if the value of the field is RESET

impl R<bool, PDWN_A>[src]

pub fn variant(&self) -> PDWN_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, LPMODE_A>[src]

pub fn variant(&self) -> LPMODE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, FSUSP_A>[src]

pub fn variant(&self) -> FSUSP_A[src]

Get enumerated values variant

pub fn is_no_effect(&self) -> bool[src]

Checks if the value of the field is NOEFFECT

pub fn is_suspend(&self) -> bool[src]

Checks if the value of the field is SUSPEND

impl R<bool, RESUME_A>[src]

pub fn variant(&self) -> Variant<bool, RESUME_A>[src]

Get enumerated values variant

pub fn is_requested(&self) -> bool[src]

Checks if the value of the field is REQUESTED

impl R<bool, ESOFM_A>[src]

pub fn variant(&self) -> ESOFM_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, SOFM_A>[src]

pub fn variant(&self) -> SOFM_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, RESETM_A>[src]

pub fn variant(&self) -> RESETM_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, SUSPM_A>[src]

pub fn variant(&self) -> SUSPM_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, WKUPM_A>[src]

pub fn variant(&self) -> WKUPM_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, ERRM_A>[src]

pub fn variant(&self) -> ERRM_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, PMAOVRM_A>[src]

pub fn variant(&self) -> PMAOVRM_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, CTRM_A>[src]

pub fn variant(&self) -> CTRM_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u32, Reg<u32, _CNTR>>[src]

pub fn fres(&self) -> FRES_R[src]

Bit 0 - Force USB Reset

pub fn pdwn(&self) -> PDWN_R[src]

Bit 1 - Power down

pub fn lpmode(&self) -> LPMODE_R[src]

Bit 2 - Low-power mode

pub fn fsusp(&self) -> FSUSP_R[src]

Bit 3 - Force suspend

pub fn resume(&self) -> RESUME_R[src]

Bit 4 - Resume request

pub fn esofm(&self) -> ESOFM_R[src]

Bit 8 - Expected start of frame interrupt mask

pub fn sofm(&self) -> SOFM_R[src]

Bit 9 - Start of frame interrupt mask

pub fn resetm(&self) -> RESETM_R[src]

Bit 10 - USB reset interrupt mask

pub fn suspm(&self) -> SUSPM_R[src]

Bit 11 - Suspend mode interrupt mask

pub fn wkupm(&self) -> WKUPM_R[src]

Bit 12 - Wakeup interrupt mask

pub fn errm(&self) -> ERRM_R[src]

Bit 13 - Error interrupt mask

pub fn pmaovrm(&self) -> PMAOVRM_R[src]

Bit 14 - Packet memory area over / underrun interrupt mask

pub fn ctrm(&self) -> CTRM_R[src]

Bit 15 - Correct transfer interrupt mask

impl R<bool, DIR_A>[src]

pub fn variant(&self) -> DIR_A[src]

Get enumerated values variant

pub fn is_to(&self) -> bool[src]

Checks if the value of the field is TO

pub fn is_from(&self) -> bool[src]

Checks if the value of the field is FROM

impl R<bool, ESOF_A>[src]

pub fn variant(&self) -> Variant<bool, ESOF_A>[src]

Get enumerated values variant

pub fn is_expected_start_of_frame(&self) -> bool[src]

Checks if the value of the field is EXPECTEDSTARTOFFRAME

impl R<bool, SOF_A>[src]

pub fn variant(&self) -> Variant<bool, SOF_A>[src]

Get enumerated values variant

pub fn is_start_of_frame(&self) -> bool[src]

Checks if the value of the field is STARTOFFRAME

impl R<bool, RESET_A>[src]

pub fn variant(&self) -> Variant<bool, RESET_A>[src]

Get enumerated values variant

pub fn is_reset(&self) -> bool[src]

Checks if the value of the field is RESET

impl R<bool, SUSP_A>[src]

pub fn variant(&self) -> Variant<bool, SUSP_A>[src]

Get enumerated values variant

pub fn is_suspend(&self) -> bool[src]

Checks if the value of the field is SUSPEND

impl R<bool, WKUP_A>[src]

pub fn variant(&self) -> Variant<bool, WKUP_A>[src]

Get enumerated values variant

pub fn is_wakeup(&self) -> bool[src]

Checks if the value of the field is WAKEUP

impl R<bool, ERR_A>[src]

pub fn variant(&self) -> Variant<bool, ERR_A>[src]

Get enumerated values variant

pub fn is_error(&self) -> bool[src]

Checks if the value of the field is ERROR

impl R<bool, PMAOVR_A>[src]

pub fn variant(&self) -> Variant<bool, PMAOVR_A>[src]

Get enumerated values variant

pub fn is_overrun(&self) -> bool[src]

Checks if the value of the field is OVERRUN

impl R<bool, CTR_A>[src]

pub fn variant(&self) -> Variant<bool, CTR_A>[src]

Get enumerated values variant

pub fn is_completed(&self) -> bool[src]

Checks if the value of the field is COMPLETED

impl R<u32, Reg<u32, _ISTR>>[src]

pub fn ep_id(&self) -> EP_ID_R[src]

Bits 0:3 - Endpoint Identifier

pub fn dir(&self) -> DIR_R[src]

Bit 4 - Direction of transaction

pub fn esof(&self) -> ESOF_R[src]

Bit 8 - Expected start frame

pub fn sof(&self) -> SOF_R[src]

Bit 9 - start of frame

pub fn reset(&self) -> RESET_R[src]

Bit 10 - reset request

pub fn susp(&self) -> SUSP_R[src]

Bit 11 - Suspend mode request

pub fn wkup(&self) -> WKUP_R[src]

Bit 12 - Wakeup

pub fn err(&self) -> ERR_R[src]

Bit 13 - Error

pub fn pmaovr(&self) -> PMAOVR_R[src]

Bit 14 - Packet memory area over / underrun

pub fn ctr(&self) -> CTR_R[src]

Bit 15 - Correct transfer

impl R<bool, LCK_A>[src]

pub fn variant(&self) -> Variant<bool, LCK_A>[src]

Get enumerated values variant

pub fn is_locked(&self) -> bool[src]

Checks if the value of the field is LOCKED

impl R<bool, RXDM_A>[src]

pub fn variant(&self) -> Variant<bool, RXDM_A>[src]

Get enumerated values variant

pub fn is_received(&self) -> bool[src]

Checks if the value of the field is RECEIVED

impl R<bool, RXDP_A>[src]

pub fn variant(&self) -> Variant<bool, RXDP_A>[src]

Get enumerated values variant

pub fn is_received(&self) -> bool[src]

Checks if the value of the field is RECEIVED

impl R<u32, Reg<u32, _FNR>>[src]

pub fn fn_(&self) -> FN_R[src]

Bits 0:10 - Frame number

pub fn lsof(&self) -> LSOF_R[src]

Bits 11:12 - Lost SOF

pub fn lck(&self) -> LCK_R[src]

Bit 13 - Locked

pub fn rxdm(&self) -> RXDM_R[src]

Bit 14 - Receive data - line status

pub fn rxdp(&self) -> RXDP_R[src]

Bit 15 - Receive data + line status

impl R<bool, EF_A>[src]

pub fn variant(&self) -> EF_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u32, Reg<u32, _DADDR>>[src]

pub fn add(&self) -> ADD_R[src]

Bit 0 - Device address

pub fn add1(&self) -> ADD1_R[src]

Bit 1 - Device address

pub fn add2(&self) -> ADD2_R[src]

Bit 2 - Device address

pub fn add3(&self) -> ADD3_R[src]

Bit 3 - Device address

pub fn add4(&self) -> ADD4_R[src]

Bit 4 - Device address

pub fn add5(&self) -> ADD5_R[src]

Bit 5 - Device address

pub fn add6(&self) -> ADD6_R[src]

Bit 6 - Device address

pub fn ef(&self) -> EF_R[src]

Bit 7 - Enable function

impl R<u32, Reg<u32, _BTABLE>>[src]

pub fn btable(&self) -> BTABLE_R[src]

Bits 3:15 - Buffer table

impl R<bool, PE_A>[src]

pub fn variant(&self) -> PE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, TXIE_A>[src]

pub fn variant(&self) -> TXIE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, RXIE_A>[src]

pub fn variant(&self) -> RXIE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, ADDRIE_A>[src]

pub fn variant(&self) -> ADDRIE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, NACKIE_A>[src]

pub fn variant(&self) -> NACKIE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, STOPIE_A>[src]

pub fn variant(&self) -> STOPIE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, TCIE_A>[src]

pub fn variant(&self) -> TCIE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, ERRIE_A>[src]

pub fn variant(&self) -> ERRIE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u8, DNF_A>[src]

pub fn variant(&self) -> DNF_A[src]

Get enumerated values variant

pub fn is_no_filter(&self) -> bool[src]

Checks if the value of the field is NOFILTER

pub fn is_filter1(&self) -> bool[src]

Checks if the value of the field is FILTER1

pub fn is_filter2(&self) -> bool[src]

Checks if the value of the field is FILTER2

pub fn is_filter3(&self) -> bool[src]

Checks if the value of the field is FILTER3

pub fn is_filter4(&self) -> bool[src]

Checks if the value of the field is FILTER4

pub fn is_filter5(&self) -> bool[src]

Checks if the value of the field is FILTER5

pub fn is_filter6(&self) -> bool[src]

Checks if the value of the field is FILTER6

pub fn is_filter7(&self) -> bool[src]

Checks if the value of the field is FILTER7

pub fn is_filter8(&self) -> bool[src]

Checks if the value of the field is FILTER8

pub fn is_filter9(&self) -> bool[src]

Checks if the value of the field is FILTER9

pub fn is_filter10(&self) -> bool[src]

Checks if the value of the field is FILTER10

pub fn is_filter11(&self) -> bool[src]

Checks if the value of the field is FILTER11

pub fn is_filter12(&self) -> bool[src]

Checks if the value of the field is FILTER12

pub fn is_filter13(&self) -> bool[src]

Checks if the value of the field is FILTER13

pub fn is_filter14(&self) -> bool[src]

Checks if the value of the field is FILTER14

pub fn is_filter15(&self) -> bool[src]

Checks if the value of the field is FILTER15

impl R<bool, ANFOFF_A>[src]

pub fn variant(&self) -> ANFOFF_A[src]

Get enumerated values variant

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

impl R<bool, TXDMAEN_A>[src]

pub fn variant(&self) -> TXDMAEN_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, RXDMAEN_A>[src]

pub fn variant(&self) -> RXDMAEN_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, SBC_A>[src]

pub fn variant(&self) -> SBC_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, NOSTRETCH_A>[src]

pub fn variant(&self) -> NOSTRETCH_A[src]

Get enumerated values variant

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

impl R<bool, WUPEN_A>[src]

pub fn variant(&self) -> WUPEN_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, GCEN_A>[src]

pub fn variant(&self) -> GCEN_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, SMBHEN_A>[src]

pub fn variant(&self) -> SMBHEN_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, SMBDEN_A>[src]

pub fn variant(&self) -> SMBDEN_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, ALERTEN_A>[src]

pub fn variant(&self) -> ALERTEN_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, PECEN_A>[src]

pub fn variant(&self) -> PECEN_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u32, Reg<u32, _CR1>>[src]

pub fn pe(&self) -> PE_R[src]

Bit 0 - Peripheral enable

pub fn txie(&self) -> TXIE_R[src]

Bit 1 - TX Interrupt enable

pub fn rxie(&self) -> RXIE_R[src]

Bit 2 - RX Interrupt enable

pub fn addrie(&self) -> ADDRIE_R[src]

Bit 3 - Address match interrupt enable (slave only)

pub fn nackie(&self) -> NACKIE_R[src]

Bit 4 - Not acknowledge received interrupt enable

pub fn stopie(&self) -> STOPIE_R[src]

Bit 5 - STOP detection Interrupt enable

pub fn tcie(&self) -> TCIE_R[src]

Bit 6 - Transfer Complete interrupt enable

pub fn errie(&self) -> ERRIE_R[src]

Bit 7 - Error interrupts enable

pub fn dnf(&self) -> DNF_R[src]

Bits 8:11 - Digital noise filter

pub fn anfoff(&self) -> ANFOFF_R[src]

Bit 12 - Analog noise filter OFF

pub fn txdmaen(&self) -> TXDMAEN_R[src]

Bit 14 - DMA transmission requests enable

pub fn rxdmaen(&self) -> RXDMAEN_R[src]

Bit 15 - DMA reception requests enable

pub fn sbc(&self) -> SBC_R[src]

Bit 16 - Slave byte control

pub fn nostretch(&self) -> NOSTRETCH_R[src]

Bit 17 - Clock stretching disable

pub fn wupen(&self) -> WUPEN_R[src]

Bit 18 - Wakeup from STOP enable

pub fn gcen(&self) -> GCEN_R[src]

Bit 19 - General call enable

pub fn smbhen(&self) -> SMBHEN_R[src]

Bit 20 - SMBus Host address enable

pub fn smbden(&self) -> SMBDEN_R[src]

Bit 21 - SMBus Device Default address enable

pub fn alerten(&self) -> ALERTEN_R[src]

Bit 22 - SMBUS alert enable

pub fn pecen(&self) -> PECEN_R[src]

Bit 23 - PEC enable

impl R<bool, PECBYTE_A>[src]

pub fn variant(&self) -> PECBYTE_A[src]

Get enumerated values variant

pub fn is_no_pec(&self) -> bool[src]

Checks if the value of the field is NOPEC

pub fn is_pec(&self) -> bool[src]

Checks if the value of the field is PEC

impl R<bool, AUTOEND_A>[src]

pub fn variant(&self) -> AUTOEND_A[src]

Get enumerated values variant

pub fn is_software(&self) -> bool[src]

Checks if the value of the field is SOFTWARE

pub fn is_automatic(&self) -> bool[src]

Checks if the value of the field is AUTOMATIC

impl R<bool, RELOAD_A>[src]

pub fn variant(&self) -> RELOAD_A[src]

Get enumerated values variant

pub fn is_completed(&self) -> bool[src]

Checks if the value of the field is COMPLETED

pub fn is_not_competed(&self) -> bool[src]

Checks if the value of the field is NOTCOMPETED

impl R<bool, NACK_A>[src]

pub fn variant(&self) -> NACK_A[src]

Get enumerated values variant

pub fn is_ack(&self) -> bool[src]

Checks if the value of the field is ACK

pub fn is_nack(&self) -> bool[src]

Checks if the value of the field is NACK

impl R<bool, STOP_A>[src]

pub fn variant(&self) -> STOP_A[src]

Get enumerated values variant

pub fn is_no_stop(&self) -> bool[src]

Checks if the value of the field is NOSTOP

pub fn is_stop(&self) -> bool[src]

Checks if the value of the field is STOP

impl R<bool, START_A>[src]

pub fn variant(&self) -> START_A[src]

Get enumerated values variant

pub fn is_no_start(&self) -> bool[src]

Checks if the value of the field is NOSTART

pub fn is_start(&self) -> bool[src]

Checks if the value of the field is START

impl R<bool, HEAD10R_A>[src]

pub fn variant(&self) -> HEAD10R_A[src]

Get enumerated values variant

pub fn is_complete(&self) -> bool[src]

Checks if the value of the field is COMPLETE

pub fn is_partial(&self) -> bool[src]

Checks if the value of the field is PARTIAL

impl R<bool, ADD10_A>[src]

pub fn variant(&self) -> ADD10_A[src]

Get enumerated values variant

pub fn is_bit7(&self) -> bool[src]

Checks if the value of the field is BIT7

pub fn is_bit10(&self) -> bool[src]

Checks if the value of the field is BIT10

impl R<bool, RD_WRN_A>[src]

pub fn variant(&self) -> RD_WRN_A[src]

Get enumerated values variant

pub fn is_write(&self) -> bool[src]

Checks if the value of the field is WRITE

pub fn is_read(&self) -> bool[src]

Checks if the value of the field is READ

impl R<u32, Reg<u32, _CR2>>[src]

pub fn pecbyte(&self) -> PECBYTE_R[src]

Bit 26 - Packet error checking byte

pub fn autoend(&self) -> AUTOEND_R[src]

Bit 25 - Automatic end mode (master mode)

pub fn reload(&self) -> RELOAD_R[src]

Bit 24 - NBYTES reload mode

pub fn nbytes(&self) -> NBYTES_R[src]

Bits 16:23 - Number of bytes

pub fn nack(&self) -> NACK_R[src]

Bit 15 - NACK generation (slave mode)

pub fn stop(&self) -> STOP_R[src]

Bit 14 - Stop generation (master mode)

pub fn start(&self) -> START_R[src]

Bit 13 - Start generation

pub fn head10r(&self) -> HEAD10R_R[src]

Bit 12 - 10-bit address header only read direction (master receiver mode)

pub fn add10(&self) -> ADD10_R[src]

Bit 11 - 10-bit addressing mode (master mode)

pub fn rd_wrn(&self) -> RD_WRN_R[src]

Bit 10 - Transfer direction (master mode)

pub fn sadd(&self) -> SADD_R[src]

Bits 0:9 - Slave address bit 9:8 (master mode)

impl R<bool, OA1MODE_A>[src]

pub fn variant(&self) -> OA1MODE_A[src]

Get enumerated values variant

pub fn is_bit7(&self) -> bool[src]

Checks if the value of the field is BIT7

pub fn is_bit10(&self) -> bool[src]

Checks if the value of the field is BIT10

impl R<bool, OA1EN_A>[src]

pub fn variant(&self) -> OA1EN_A[src]

Get enumerated values variant

pub fn is_diasbled(&self) -> bool[src]

Checks if the value of the field is DIASBLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u32, Reg<u32, _OAR1>>[src]

pub fn oa1mode(&self) -> OA1MODE_R[src]

Bit 10 - Own Address 1 10-bit mode

pub fn oa1en(&self) -> OA1EN_R[src]

Bit 15 - Own Address 1 enable

pub fn oa1(&self) -> OA1_R[src]

Bits 0:9 - Interface address

impl R<u8, OA2MSK_A>[src]

pub fn variant(&self) -> OA2MSK_A[src]

Get enumerated values variant

pub fn is_no_mask(&self) -> bool[src]

Checks if the value of the field is NOMASK

pub fn is_mask1(&self) -> bool[src]

Checks if the value of the field is MASK1

pub fn is_mask2(&self) -> bool[src]

Checks if the value of the field is MASK2

pub fn is_mask3(&self) -> bool[src]

Checks if the value of the field is MASK3

pub fn is_mask4(&self) -> bool[src]

Checks if the value of the field is MASK4

pub fn is_mask5(&self) -> bool[src]

Checks if the value of the field is MASK5

pub fn is_mask6(&self) -> bool[src]

Checks if the value of the field is MASK6

pub fn is_mask7(&self) -> bool[src]

Checks if the value of the field is MASK7

impl R<bool, OA2EN_A>[src]

pub fn variant(&self) -> OA2EN_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u32, Reg<u32, _OAR2>>[src]

pub fn oa2(&self) -> OA2_R[src]

Bits 1:7 - Interface address

pub fn oa2msk(&self) -> OA2MSK_R[src]

Bits 8:10 - Own Address 2 masks

pub fn oa2en(&self) -> OA2EN_R[src]

Bit 15 - Own Address 2 enable

impl R<u32, Reg<u32, _TIMINGR>>[src]

pub fn scll(&self) -> SCLL_R[src]

Bits 0:7 - SCL low period (master mode)

pub fn sclh(&self) -> SCLH_R[src]

Bits 8:15 - SCL high period (master mode)

pub fn sdadel(&self) -> SDADEL_R[src]

Bits 16:19 - Data hold time

pub fn scldel(&self) -> SCLDEL_R[src]

Bits 20:23 - Data setup time

pub fn presc(&self) -> PRESC_R[src]

Bits 28:31 - Timing prescaler

impl R<bool, TIDLE_A>[src]

pub fn variant(&self) -> TIDLE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, TIMOUTEN_A>[src]

pub fn variant(&self) -> TIMOUTEN_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, TEXTEN_A>[src]

pub fn variant(&self) -> TEXTEN_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u32, Reg<u32, _TIMEOUTR>>[src]

pub fn timeouta(&self) -> TIMEOUTA_R[src]

Bits 0:11 - Bus timeout A

pub fn tidle(&self) -> TIDLE_R[src]

Bit 12 - Idle clock timeout detection

pub fn timouten(&self) -> TIMOUTEN_R[src]

Bit 15 - Clock timeout enable

pub fn timeoutb(&self) -> TIMEOUTB_R[src]

Bits 16:27 - Bus timeout B

pub fn texten(&self) -> TEXTEN_R[src]

Bit 31 - Extended clock timeout enable

impl R<bool, DIR_A>[src]

pub fn variant(&self) -> DIR_A[src]

Get enumerated values variant

pub fn is_write(&self) -> bool[src]

Checks if the value of the field is WRITE

pub fn is_read(&self) -> bool[src]

Checks if the value of the field is READ

impl R<bool, BUSY_A>[src]

pub fn variant(&self) -> BUSY_A[src]

Get enumerated values variant

pub fn is_not_busy(&self) -> bool[src]

Checks if the value of the field is NOTBUSY

pub fn is_busy(&self) -> bool[src]

Checks if the value of the field is BUSY

impl R<bool, ALERT_A>[src]

pub fn variant(&self) -> ALERT_A[src]

Get enumerated values variant

pub fn is_no_alert(&self) -> bool[src]

Checks if the value of the field is NOALERT

pub fn is_alert(&self) -> bool[src]

Checks if the value of the field is ALERT

impl R<bool, TIMEOUT_A>[src]

pub fn variant(&self) -> TIMEOUT_A[src]

Get enumerated values variant

pub fn is_no_timeout(&self) -> bool[src]

Checks if the value of the field is NOTIMEOUT

pub fn is_timeout(&self) -> bool[src]

Checks if the value of the field is TIMEOUT

impl R<bool, PECERR_A>[src]

pub fn variant(&self) -> PECERR_A[src]

Get enumerated values variant

pub fn is_match_(&self) -> bool[src]

Checks if the value of the field is MATCH

pub fn is_no_match(&self) -> bool[src]

Checks if the value of the field is NOMATCH

impl R<bool, OVR_A>[src]

pub fn variant(&self) -> OVR_A[src]

Get enumerated values variant

pub fn is_no_overrun(&self) -> bool[src]

Checks if the value of the field is NOOVERRUN

pub fn is_overrun(&self) -> bool[src]

Checks if the value of the field is OVERRUN

impl R<bool, ARLO_A>[src]

pub fn variant(&self) -> ARLO_A[src]

Get enumerated values variant

pub fn is_not_lost(&self) -> bool[src]

Checks if the value of the field is NOTLOST

pub fn is_lost(&self) -> bool[src]

Checks if the value of the field is LOST

impl R<bool, BERR_A>[src]

pub fn variant(&self) -> BERR_A[src]

Get enumerated values variant

pub fn is_no_error(&self) -> bool[src]

Checks if the value of the field is NOERROR

pub fn is_error(&self) -> bool[src]

Checks if the value of the field is ERROR

impl R<bool, TCR_A>[src]

pub fn variant(&self) -> TCR_A[src]

Get enumerated values variant

pub fn is_not_complete(&self) -> bool[src]

Checks if the value of the field is NOTCOMPLETE

pub fn is_complete(&self) -> bool[src]

Checks if the value of the field is COMPLETE

impl R<bool, TC_A>[src]

pub fn variant(&self) -> TC_A[src]

Get enumerated values variant

pub fn is_not_complete(&self) -> bool[src]

Checks if the value of the field is NOTCOMPLETE

pub fn is_complete(&self) -> bool[src]

Checks if the value of the field is COMPLETE

impl R<bool, STOPF_A>[src]

pub fn variant(&self) -> STOPF_A[src]

Get enumerated values variant

pub fn is_no_stop(&self) -> bool[src]

Checks if the value of the field is NOSTOP

pub fn is_stop(&self) -> bool[src]

Checks if the value of the field is STOP

impl R<bool, NACKF_A>[src]

pub fn variant(&self) -> NACKF_A[src]

Get enumerated values variant

pub fn is_no_nack(&self) -> bool[src]

Checks if the value of the field is NONACK

pub fn is_nack(&self) -> bool[src]

Checks if the value of the field is NACK

impl R<bool, ADDR_A>[src]

pub fn variant(&self) -> ADDR_A[src]

Get enumerated values variant

pub fn is_not_match(&self) -> bool[src]

Checks if the value of the field is NOTMATCH

pub fn is_match_(&self) -> bool[src]

Checks if the value of the field is MATCH

impl R<bool, RXNE_A>[src]

pub fn variant(&self) -> RXNE_A[src]

Get enumerated values variant

pub fn is_empty(&self) -> bool[src]

Checks if the value of the field is EMPTY

pub fn is_not_empty(&self) -> bool[src]

Checks if the value of the field is NOTEMPTY

impl R<bool, TXIS_A>[src]

pub fn variant(&self) -> TXIS_A[src]

Get enumerated values variant

pub fn is_not_empty(&self) -> bool[src]

Checks if the value of the field is NOTEMPTY

pub fn is_empty(&self) -> bool[src]

Checks if the value of the field is EMPTY

impl R<bool, TXE_A>[src]

pub fn variant(&self) -> TXE_A[src]

Get enumerated values variant

pub fn is_not_empty(&self) -> bool[src]

Checks if the value of the field is NOTEMPTY

pub fn is_empty(&self) -> bool[src]

Checks if the value of the field is EMPTY

impl R<u32, Reg<u32, _ISR>>[src]

pub fn addcode(&self) -> ADDCODE_R[src]

Bits 17:23 - Address match code (Slave mode)

pub fn dir(&self) -> DIR_R[src]

Bit 16 - Transfer direction (Slave mode)

pub fn busy(&self) -> BUSY_R[src]

Bit 15 - Bus busy

pub fn alert(&self) -> ALERT_R[src]

Bit 13 - SMBus alert

pub fn timeout(&self) -> TIMEOUT_R[src]

Bit 12 - Timeout or t_low detection flag

pub fn pecerr(&self) -> PECERR_R[src]

Bit 11 - PEC Error in reception

pub fn ovr(&self) -> OVR_R[src]

Bit 10 - Overrun/Underrun (slave mode)

pub fn arlo(&self) -> ARLO_R[src]

Bit 9 - Arbitration lost

pub fn berr(&self) -> BERR_R[src]

Bit 8 - Bus error

pub fn tcr(&self) -> TCR_R[src]

Bit 7 - Transfer Complete Reload

pub fn tc(&self) -> TC_R[src]

Bit 6 - Transfer Complete (master mode)

pub fn stopf(&self) -> STOPF_R[src]

Bit 5 - Stop detection flag

pub fn nackf(&self) -> NACKF_R[src]

Bit 4 - Not acknowledge received flag

pub fn addr(&self) -> ADDR_R[src]

Bit 3 - Address matched (slave mode)

pub fn rxne(&self) -> RXNE_R[src]

Bit 2 - Receive data register not empty (receivers)

pub fn txis(&self) -> TXIS_R[src]

Bit 1 - Transmit interrupt status (transmitters)

pub fn txe(&self) -> TXE_R[src]

Bit 0 - Transmit data register empty (transmitters)

impl R<u32, Reg<u32, _PECR>>[src]

pub fn pec(&self) -> PEC_R[src]

Bits 0:7 - Packet error checking register

impl R<u32, Reg<u32, _RXDR>>[src]

pub fn rxdata(&self) -> RXDATA_R[src]

Bits 0:7 - 8-bit receive data

impl R<u32, Reg<u32, _TXDR>>[src]

pub fn txdata(&self) -> TXDATA_R[src]

Bits 0:7 - 8-bit transmit data

impl R<u8, PR_A>[src]

pub fn variant(&self) -> PR_A[src]

Get enumerated values variant

pub fn is_divide_by4(&self) -> bool[src]

Checks if the value of the field is DIVIDEBY4

pub fn is_divide_by8(&self) -> bool[src]

Checks if the value of the field is DIVIDEBY8

pub fn is_divide_by16(&self) -> bool[src]

Checks if the value of the field is DIVIDEBY16

pub fn is_divide_by32(&self) -> bool[src]

Checks if the value of the field is DIVIDEBY32

pub fn is_divide_by64(&self) -> bool[src]

Checks if the value of the field is DIVIDEBY64

pub fn is_divide_by128(&self) -> bool[src]

Checks if the value of the field is DIVIDEBY128

pub fn is_divide_by256(&self) -> bool[src]

Checks if the value of the field is DIVIDEBY256

pub fn is_divide_by256bis(&self) -> bool[src]

Checks if the value of the field is DIVIDEBY256BIS

impl R<u32, Reg<u32, _PR>>[src]

pub fn pr(&self) -> PR_R[src]

Bits 0:2 - Prescaler divider

impl R<u32, Reg<u32, _RLR>>[src]

pub fn rl(&self) -> RL_R[src]

Bits 0:11 - Watchdog counter reload value

impl R<u32, Reg<u32, _SR>>[src]

pub fn pvu(&self) -> PVU_R[src]

Bit 0 - Watchdog prescaler value update

pub fn rvu(&self) -> RVU_R[src]

Bit 1 - Watchdog counter reload value update

pub fn wvu(&self) -> WVU_R[src]

Bit 2 - Watchdog counter window value update

impl R<u32, Reg<u32, _WINR>>[src]

pub fn win(&self) -> WIN_R[src]

Bits 0:11 - Watchdog counter window value

impl R<bool, WDGA_A>[src]

pub fn variant(&self) -> WDGA_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u32, Reg<u32, _CR>>[src]

pub fn wdga(&self) -> WDGA_R[src]

Bit 7 - Activation bit

pub fn t(&self) -> T_R[src]

Bits 0:6 - 7-bit counter

impl R<bool, EWI_A>[src]

pub fn variant(&self) -> Variant<bool, EWI_A>[src]

Get enumerated values variant

pub fn is_enable(&self) -> bool[src]

Checks if the value of the field is ENABLE

impl R<u8, WDGTB_A>[src]

pub fn variant(&self) -> WDGTB_A[src]

Get enumerated values variant

pub fn is_div1(&self) -> bool[src]

Checks if the value of the field is DIV1

pub fn is_div2(&self) -> bool[src]

Checks if the value of the field is DIV2

pub fn is_div4(&self) -> bool[src]

Checks if the value of the field is DIV4

pub fn is_div8(&self) -> bool[src]

Checks if the value of the field is DIV8

impl R<u32, Reg<u32, _CFR>>[src]

pub fn ewi(&self) -> EWI_R[src]

Bit 9 - Early wakeup interrupt

pub fn w(&self) -> W_R[src]

Bits 0:6 - 7-bit window value

pub fn wdgtb(&self) -> WDGTB_R[src]

Bits 7:8 - Timer base

impl R<bool, EWIF_A>[src]

pub fn variant(&self) -> EWIF_A[src]

Get enumerated values variant

pub fn is_pending(&self) -> bool[src]

Checks if the value of the field is PENDING

pub fn is_finished(&self) -> bool[src]

Checks if the value of the field is FINISHED

impl R<u32, Reg<u32, _SR>>[src]

pub fn ewif(&self) -> EWIF_R[src]

Bit 0 - Early wakeup interrupt flag

impl R<u32, Reg<u32, _TR>>[src]

pub fn pm(&self) -> PM_R[src]

Bit 22 - AM/PM notation

pub fn ht(&self) -> HT_R[src]

Bits 20:21 - Hour tens in BCD format

pub fn hu(&self) -> HU_R[src]

Bits 16:19 - Hour units in BCD format

pub fn mnt(&self) -> MNT_R[src]

Bits 12:14 - Minute tens in BCD format

pub fn mnu(&self) -> MNU_R[src]

Bits 8:11 - Minute units in BCD format

pub fn st(&self) -> ST_R[src]

Bits 4:6 - Second tens in BCD format

pub fn su(&self) -> SU_R[src]

Bits 0:3 - Second units in BCD format

impl R<u32, Reg<u32, _DR>>[src]

pub fn yt(&self) -> YT_R[src]

Bits 20:23 - Year tens in BCD format

pub fn yu(&self) -> YU_R[src]

Bits 16:19 - Year units in BCD format

pub fn wdu(&self) -> WDU_R[src]

Bits 13:15 - Week day units

pub fn mt(&self) -> MT_R[src]

Bit 12 - Month tens in BCD format

pub fn mu(&self) -> MU_R[src]

Bits 8:11 - Month units in BCD format

pub fn dt(&self) -> DT_R[src]

Bits 4:5 - Date tens in BCD format

pub fn du(&self) -> DU_R[src]

Bits 0:3 - Date units in BCD format

impl R<u32, Reg<u32, _CR>>[src]

pub fn wcksel(&self) -> WCKSEL_R[src]

Bits 0:2 - Wakeup clock selection

pub fn tsedge(&self) -> TSEDGE_R[src]

Bit 3 - Time-stamp event active edge

pub fn refckon(&self) -> REFCKON_R[src]

Bit 4 - Reference clock detection enable (50 or 60 Hz)

pub fn bypshad(&self) -> BYPSHAD_R[src]

Bit 5 - Bypass the shadow registers

pub fn fmt(&self) -> FMT_R[src]

Bit 6 - Hour format

pub fn alrae(&self) -> ALRAE_R[src]

Bit 8 - Alarm A enable

pub fn alrbe(&self) -> ALRBE_R[src]

Bit 9 - Alarm B enable

pub fn wute(&self) -> WUTE_R[src]

Bit 10 - Wakeup timer enable

pub fn tse(&self) -> TSE_R[src]

Bit 11 - Time stamp enable

pub fn alraie(&self) -> ALRAIE_R[src]

Bit 12 - Alarm A interrupt enable

pub fn alrbie(&self) -> ALRBIE_R[src]

Bit 13 - Alarm B interrupt enable

pub fn wutie(&self) -> WUTIE_R[src]

Bit 14 - Wakeup timer interrupt enable

pub fn tsie(&self) -> TSIE_R[src]

Bit 15 - Time-stamp interrupt enable

pub fn add1h(&self) -> ADD1H_R[src]

Bit 16 - Add 1 hour (summer time change)

pub fn sub1h(&self) -> SUB1H_R[src]

Bit 17 - Subtract 1 hour (winter time change)

pub fn bkp(&self) -> BKP_R[src]

Bit 18 - Backup

pub fn cosel(&self) -> COSEL_R[src]

Bit 19 - Calibration output selection

pub fn pol(&self) -> POL_R[src]

Bit 20 - Output polarity

pub fn osel(&self) -> OSEL_R[src]

Bits 21:22 - Output selection

pub fn coe(&self) -> COE_R[src]

Bit 23 - Calibration output enable

impl R<u32, Reg<u32, _ISR>>[src]

pub fn tamp1f(&self) -> TAMP1F_R[src]

Bit 13 - Tamper detection flag

pub fn tsovf(&self) -> TSOVF_R[src]

Bit 12 - Time-stamp overflow flag

pub fn tsf(&self) -> TSF_R[src]

Bit 11 - Time-stamp flag

pub fn wutf(&self) -> WUTF_R[src]

Bit 10 - Wakeup timer flag

pub fn alrbf(&self) -> ALRBF_R[src]

Bit 9 - Alarm B flag

pub fn alraf(&self) -> ALRAF_R[src]

Bit 8 - Alarm A flag

pub fn init(&self) -> INIT_R[src]

Bit 7 - Initialization mode

pub fn initf(&self) -> INITF_R[src]

Bit 6 - Initialization flag

pub fn rsf(&self) -> RSF_R[src]

Bit 5 - Registers synchronization flag

pub fn inits(&self) -> INITS_R[src]

Bit 4 - Initialization status flag

pub fn wutwf(&self) -> WUTWF_R[src]

Bit 2 - Wakeup timer write flag

pub fn alrbwf(&self) -> ALRBWF_R[src]

Bit 1 - Alarm B write flag

pub fn alrawf(&self) -> ALRAWF_R[src]

Bit 0 - Alarm A write flag

pub fn shpf(&self) -> SHPF_R[src]

Bit 3 - Shift operation pending

pub fn tamp2f(&self) -> TAMP2F_R[src]

Bit 14 - RTC_TAMP2 detection flag

pub fn tamp3f(&self) -> TAMP3F_R[src]

Bit 15 - RTC_TAMP3 detection flag

pub fn recalpf(&self) -> RECALPF_R[src]

Bit 16 - Recalibration pending Flag

impl R<u32, Reg<u32, _PRER>>[src]

pub fn prediv_a(&self) -> PREDIV_A_R[src]

Bits 16:22 - Asynchronous prescaler factor

pub fn prediv_s(&self) -> PREDIV_S_R[src]

Bits 0:14 - Synchronous prescaler factor

impl R<u32, Reg<u32, _WUTR>>[src]

pub fn wut(&self) -> WUT_R[src]

Bits 0:15 - Wakeup auto-reload value bits

impl R<u32, Reg<u32, _ALRMAR>>[src]

pub fn msk4(&self) -> MSK4_R[src]

Bit 31 - Alarm A date mask

pub fn wdsel(&self) -> WDSEL_R[src]

Bit 30 - Week day selection

pub fn dt(&self) -> DT_R[src]

Bits 28:29 - Date tens in BCD format

pub fn du(&self) -> DU_R[src]

Bits 24:27 - Date units or day in BCD format

pub fn msk3(&self) -> MSK3_R[src]

Bit 23 - Alarm A hours mask

pub fn pm(&self) -> PM_R[src]

Bit 22 - AM/PM notation

pub fn ht(&self) -> HT_R[src]

Bits 20:21 - Hour tens in BCD format

pub fn hu(&self) -> HU_R[src]

Bits 16:19 - Hour units in BCD format

pub fn msk2(&self) -> MSK2_R[src]

Bit 15 - Alarm A minutes mask

pub fn mnt(&self) -> MNT_R[src]

Bits 12:14 - Minute tens in BCD format

pub fn mnu(&self) -> MNU_R[src]

Bits 8:11 - Minute units in BCD format

pub fn msk1(&self) -> MSK1_R[src]

Bit 7 - Alarm A seconds mask

pub fn st(&self) -> ST_R[src]

Bits 4:6 - Second tens in BCD format

pub fn su(&self) -> SU_R[src]

Bits 0:3 - Second units in BCD format

impl R<u32, Reg<u32, _ALRMBR>>[src]

pub fn msk4(&self) -> MSK4_R[src]

Bit 31 - Alarm B date mask

pub fn wdsel(&self) -> WDSEL_R[src]

Bit 30 - Week day selection

pub fn dt(&self) -> DT_R[src]

Bits 28:29 - Date tens in BCD format

pub fn du(&self) -> DU_R[src]

Bits 24:27 - Date units or day in BCD format

pub fn msk3(&self) -> MSK3_R[src]

Bit 23 - Alarm B hours mask

pub fn pm(&self) -> PM_R[src]

Bit 22 - AM/PM notation

pub fn ht(&self) -> HT_R[src]

Bits 20:21 - Hour tens in BCD format

pub fn hu(&self) -> HU_R[src]

Bits 16:19 - Hour units in BCD format

pub fn msk2(&self) -> MSK2_R[src]

Bit 15 - Alarm B minutes mask

pub fn mnt(&self) -> MNT_R[src]

Bits 12:14 - Minute tens in BCD format

pub fn mnu(&self) -> MNU_R[src]

Bits 8:11 - Minute units in BCD format

pub fn msk1(&self) -> MSK1_R[src]

Bit 7 - Alarm B seconds mask

pub fn st(&self) -> ST_R[src]

Bits 4:6 - Second tens in BCD format

pub fn su(&self) -> SU_R[src]

Bits 0:3 - Second units in BCD format

impl R<u32, Reg<u32, _SSR>>[src]

pub fn ss(&self) -> SS_R[src]

Bits 0:15 - Sub second value

impl R<u32, Reg<u32, _TSTR>>[src]

pub fn su(&self) -> SU_R[src]

Bits 0:3 - Second units in BCD format

pub fn st(&self) -> ST_R[src]

Bits 4:6 - Second tens in BCD format

pub fn mnu(&self) -> MNU_R[src]

Bits 8:11 - Minute units in BCD format

pub fn mnt(&self) -> MNT_R[src]

Bits 12:14 - Minute tens in BCD format

pub fn hu(&self) -> HU_R[src]

Bits 16:19 - Hour units in BCD format

pub fn ht(&self) -> HT_R[src]

Bits 20:21 - Hour tens in BCD format

pub fn pm(&self) -> PM_R[src]

Bit 22 - AM/PM notation

impl R<u32, Reg<u32, _TSDR>>[src]

pub fn wdu(&self) -> WDU_R[src]

Bits 13:15 - Week day units

pub fn mt(&self) -> MT_R[src]

Bit 12 - Month tens in BCD format

pub fn mu(&self) -> MU_R[src]

Bits 8:11 - Month units in BCD format

pub fn dt(&self) -> DT_R[src]

Bits 4:5 - Date tens in BCD format

pub fn du(&self) -> DU_R[src]

Bits 0:3 - Date units in BCD format

impl R<u32, Reg<u32, _TSSSR>>[src]

pub fn ss(&self) -> SS_R[src]

Bits 0:15 - Sub second value

impl R<u32, Reg<u32, _CALR>>[src]

pub fn calp(&self) -> CALP_R[src]

Bit 15 - Increase frequency of RTC by 488.5 ppm

pub fn calw8(&self) -> CALW8_R[src]

Bit 14 - Use an 8-second calibration cycle period

pub fn calw16(&self) -> CALW16_R[src]

Bit 13 - Use a 16-second calibration cycle period

pub fn calm(&self) -> CALM_R[src]

Bits 0:8 - Calibration minus

impl R<u32, Reg<u32, _TAFCR>>[src]

pub fn tamp1e(&self) -> TAMP1E_R[src]

Bit 0 - Tamper 1 detection enable

pub fn tamp1trg(&self) -> TAMP1TRG_R[src]

Bit 1 - Active level for tamper 1

pub fn tampie(&self) -> TAMPIE_R[src]

Bit 2 - Tamper interrupt enable

pub fn tamp2e(&self) -> TAMP2E_R[src]

Bit 3 - Tamper 2 detection enable

pub fn tamp2trg(&self) -> TAMP2TRG_R[src]

Bit 4 - Active level for tamper 2

pub fn tampts(&self) -> TAMPTS_R[src]

Bit 7 - Activate timestamp on tamper detection event

pub fn tampfreq(&self) -> TAMPFREQ_R[src]

Bits 8:10 - Tamper sampling frequency

pub fn tampflt(&self) -> TAMPFLT_R[src]

Bits 11:12 - Tamper filter count

pub fn tampprch(&self) -> TAMPPRCH_R[src]

Bits 13:14 - Tamper precharge duration

pub fn tamppudis(&self) -> TAMPPUDIS_R[src]

Bit 15 - TAMPER pull-up disable

pub fn pc13value(&self) -> PC13VALUE_R[src]

Bit 18 - PC13 value

pub fn pc13mode(&self) -> PC13MODE_R[src]

Bit 19 - PC13 mode

pub fn pc14value(&self) -> PC14VALUE_R[src]

Bit 20 - PC14 value

pub fn pc14mode(&self) -> PC14MODE_R[src]

Bit 21 - PC 14 mode

pub fn pc15value(&self) -> PC15VALUE_R[src]

Bit 22 - PC15 value

pub fn pc15mode(&self) -> PC15MODE_R[src]

Bit 23 - PC15 mode

impl R<u32, Reg<u32, _ALRMASSR>>[src]

pub fn maskss(&self) -> MASKSS_R[src]

Bits 24:27 - Mask the most-significant bits starting at this bit

pub fn ss(&self) -> SS_R[src]

Bits 0:14 - Sub seconds value

impl R<u32, Reg<u32, _ALRMBSSR>>[src]

pub fn maskss(&self) -> MASKSS_R[src]

Bits 24:27 - Mask the most-significant bits starting at this bit

pub fn ss(&self) -> SS_R[src]

Bits 0:14 - Sub seconds value

impl R<u32, Reg<u32, _BKPR>>[src]

pub fn bkp(&self) -> BKP_R[src]

Bits 0:31 - BKP

impl R<u32, Reg<u32, _CR1>>[src]

pub fn eocalie(&self) -> EOCALIE_R[src]

Bit 0 - End of calibration interrupt enable

pub fn jeocie(&self) -> JEOCIE_R[src]

Bit 1 - Injected end of conversion interrupt enable

pub fn jovrie(&self) -> JOVRIE_R[src]

Bit 2 - Injected data overrun interrupt enable

pub fn reocie(&self) -> REOCIE_R[src]

Bit 3 - Regular end of conversion interrupt enable

pub fn rovrie(&self) -> ROVRIE_R[src]

Bit 4 - Regular data overrun interrupt enable

pub fn refv(&self) -> REFV_R[src]

Bits 8:9 - Reference voltage selection

pub fn slowck(&self) -> SLOWCK_R[src]

Bit 10 - Slow clock mode enable

pub fn sbi(&self) -> SBI_R[src]

Bit 11 - Enter Standby mode when idle

pub fn pdi(&self) -> PDI_R[src]

Bit 12 - Enter power down mode when idle

pub fn jsync(&self) -> JSYNC_R[src]

Bit 14 - Launch a injected conversion synchronously with SDADC1

pub fn rsync(&self) -> RSYNC_R[src]

Bit 15 - Launch regular conversion synchronously with SDADC1

pub fn jdmaen(&self) -> JDMAEN_R[src]

Bit 16 - DMA channel enabled to read data for the injected channel group

pub fn rdmaen(&self) -> RDMAEN_R[src]

Bit 17 - DMA channel enabled to read data for the regular channel

pub fn init(&self) -> INIT_R[src]

Bit 31 - Initialization mode request

impl R<u32, Reg<u32, _CR2>>[src]

pub fn fast(&self) -> FAST_R[src]

Bit 24 - Fast conversion mode selection

pub fn rswstart(&self) -> RSWSTART_R[src]

Bit 23 - Software start of a conversion on the regular channel

pub fn rcont(&self) -> RCONT_R[src]

Bit 22 - Continuous mode selection for regular conversions

pub fn rch(&self) -> RCH_R[src]

Bits 16:19 - Regular channel selection

pub fn jswstart(&self) -> JSWSTART_R[src]

Bit 15 - Start a conversion of the injected group of channels

pub fn jexten(&self) -> JEXTEN_R[src]

Bits 13:14 - Trigger enable and trigger edge selection for injected conversions

pub fn jextsel(&self) -> JEXTSEL_R[src]

Bits 8:11 - Trigger signal selection for launching injected conversions

pub fn jds(&self) -> JDS_R[src]

Bit 6 - Delay start of injected conversions.

pub fn jcont(&self) -> JCONT_R[src]

Bit 5 - Continuous mode selection for injected conversions

pub fn startcalib(&self) -> STARTCALIB_R[src]

Bit 4 - Start calibration

pub fn calibcnt(&self) -> CALIBCNT_R[src]

Bits 1:2 - Number of calibration sequences to be performed (number of valid configurations)

pub fn adon(&self) -> ADON_R[src]

Bit 0 - SDADC enable

impl R<u32, Reg<u32, _ISR>>[src]

pub fn initrdy(&self) -> INITRDY_R[src]

Bit 31 - Initialization mode is ready

pub fn stabip(&self) -> STABIP_R[src]

Bit 15 - Stabilization in progress status

pub fn rcip(&self) -> RCIP_R[src]

Bit 14 - Regular conversion in progress status

pub fn jcip(&self) -> JCIP_R[src]

Bit 13 - Injected conversion in progress status

pub fn calibip(&self) -> CALIBIP_R[src]

Bit 12 - Calibration in progress status

pub fn rovrf(&self) -> ROVRF_R[src]

Bit 4 - Regular conversion overrun flag

pub fn reocf(&self) -> REOCF_R[src]

Bit 3 - End of regular conversion flag

pub fn jovrf(&self) -> JOVRF_R[src]

Bit 2 - Injected conversion overrun flag

pub fn jeocf(&self) -> JEOCF_R[src]

Bit 1 - End of injected conversion flag

pub fn eocalf(&self) -> EOCALF_R[src]

Bit 0 - End of calibration flag

impl R<u32, Reg<u32, _CLRISR>>[src]

pub fn clrrovrf(&self) -> CLRROVRF_R[src]

Bit 4 - Clear the regular conversion overrun flag

pub fn clrjovrf(&self) -> CLRJOVRF_R[src]

Bit 2 - Clear the injected conversion overrun flag

pub fn clreocalf(&self) -> CLREOCALF_R[src]

Bit 0 - Clear the end of calibration flag

impl R<u32, Reg<u32, _JCHGR>>[src]

pub fn jchg(&self) -> JCHG_R[src]

Bits 0:8 - Injected channel group selection

impl R<u32, Reg<u32, _CONF0R>>[src]

pub fn common0(&self) -> COMMON0_R[src]

Bits 30:31 - Common mode for configuration 0

pub fn se0(&self) -> SE0_R[src]

Bits 26:27 - Single-ended mode for configuration 0

pub fn gain0(&self) -> GAIN0_R[src]

Bits 20:22 - Gain setting for configuration 0

pub fn offset0(&self) -> OFFSET0_R[src]

Bits 0:11 - Twelve-bit calibration offset for configuration 0

impl R<u32, Reg<u32, _CONF1R>>[src]

pub fn common1(&self) -> COMMON1_R[src]

Bits 30:31 - Common mode for configuration 1

pub fn se1(&self) -> SE1_R[src]

Bits 26:27 - Single-ended mode for configuration 1

pub fn gain1(&self) -> GAIN1_R[src]

Bits 20:22 - Gain setting for configuration 1

pub fn offset1(&self) -> OFFSET1_R[src]

Bits 0:11 - Twelve-bit calibration offset for configuration 1

impl R<u32, Reg<u32, _CONF2R>>[src]

pub fn common2(&self) -> COMMON2_R[src]

Bits 30:31 - Common mode for configuration 2

pub fn se2(&self) -> SE2_R[src]

Bits 26:27 - Single-ended mode for configuration 2

pub fn gain2(&self) -> GAIN2_R[src]

Bits 20:22 - Gain setting for configuration 2

pub fn offset2(&self) -> OFFSET2_R[src]

Bits 0:11 - Twelve-bit calibration offset for configuration 2

impl R<u32, Reg<u32, _CONFCHR1>>[src]

pub fn confch7(&self) -> CONFCH7_R[src]

Bits 28:29 - CONFCH7

pub fn confch6(&self) -> CONFCH6_R[src]

Bits 24:25 - CONFCH6

pub fn confch5(&self) -> CONFCH5_R[src]

Bits 20:21 - CONFCH5

pub fn confch4(&self) -> CONFCH4_R[src]

Bits 16:17 - CONFCH4

pub fn confch3(&self) -> CONFCH3_R[src]

Bits 12:13 - CONFCH3

pub fn confch2(&self) -> CONFCH2_R[src]

Bits 8:9 - CONFCH2

pub fn confch1(&self) -> CONFCH1_R[src]

Bits 4:5 - CONFCH1

pub fn confch0(&self) -> CONFCH0_R[src]

Bits 0:1 - CONFCH0

impl R<u32, Reg<u32, _CONFCHR2>>[src]

pub fn confch8(&self) -> CONFCH8_R[src]

Bits 0:1 - Channel 8 configuration

impl R<u32, Reg<u32, _JDATAR>>[src]

pub fn jdatach(&self) -> JDATACH_R[src]

Bits 25:28 - Injected channel most recently converted

pub fn jdata(&self) -> JDATA_R[src]

Bits 0:15 - Injected group conversion data

impl R<u32, Reg<u32, _RDATAR>>[src]

pub fn rdata(&self) -> RDATA_R[src]

Bits 0:15 - Regular channel conversion data

impl R<u32, Reg<u32, _JDATA12R>>[src]

pub fn jdata2(&self) -> JDATA2_R[src]

Bits 16:31 - Injected group conversion data for SDADC2

pub fn jdata1(&self) -> JDATA1_R[src]

Bits 0:15 - Injected group conversion data for SDADC1

impl R<u32, Reg<u32, _RDATA12R>>[src]

pub fn rdata2(&self) -> RDATA2_R[src]

Bits 16:31 - Regular conversion data for SDADC2

pub fn rdata1(&self) -> RDATA1_R[src]

Bits 0:15 - Regular conversion data for SDADC1

impl R<u32, Reg<u32, _JDATA13R>>[src]

pub fn jdata3(&self) -> JDATA3_R[src]

Bits 16:31 - Injected group conversion data for SDADC3

pub fn jdata1(&self) -> JDATA1_R[src]

Bits 0:15 - Injected group conversion data for SDADC1

impl R<u32, Reg<u32, _RDATA13R>>[src]

pub fn rdata3(&self) -> RDATA3_R[src]

Bits 16:31 - Regular conversion data for SDADC3

pub fn rdata1(&self) -> RDATA1_R[src]

Bits 0:15 - Regular conversion data for SDADC1

impl R<u32, Reg<u32, _CR>>[src]

pub fn dmaudrie1(&self) -> DMAUDRIE1_R[src]

Bit 13 - DAC channel1 DMA Underrun Interrupt enable

pub fn dmaen1(&self) -> DMAEN1_R[src]

Bit 12 - DAC channel1 DMA enable

pub fn mamp13(&self) -> MAMP13_R[src]

Bit 11 - DAC channel1 mask/amplitude selector

pub fn mamp12(&self) -> MAMP12_R[src]

Bit 10 - MAMP12

pub fn mamp11(&self) -> MAMP11_R[src]

Bit 9 - MAMP11

pub fn mamp10(&self) -> MAMP10_R[src]

Bit 8 - MAMP10

pub fn wave1(&self) -> WAVE1_R[src]

Bit 7 - DAC channel1 noise/triangle wave generation enable

pub fn wave2(&self) -> WAVE2_R[src]

Bit 6 - WAVE2

pub fn tsel1(&self) -> TSEL1_R[src]

Bits 3:5 - DAC channel1 trigger selection

pub fn ten1(&self) -> TEN1_R[src]

Bit 2 - DAC channel1 trigger enable

pub fn boff1(&self) -> BOFF1_R[src]

Bit 1 - DAC channel1 output buffer disable

pub fn en1(&self) -> EN1_R[src]

Bit 0 - DAC channel1 enable

impl R<u32, Reg<u32, _DHR12R1>>[src]

pub fn dacc1dhr(&self) -> DACC1DHR_R[src]

Bits 0:11 - DAC channel1 12-bit right-aligned data

impl R<u32, Reg<u32, _DHR12L1>>[src]

pub fn dacc1dhr(&self) -> DACC1DHR_R[src]

Bits 4:15 - DAC channel1 12-bit left-aligned data

impl R<u32, Reg<u32, _DHR8R1>>[src]

pub fn dacc1dhr(&self) -> DACC1DHR_R[src]

Bits 0:7 - DAC channel1 8-bit right-aligned data

impl R<u32, Reg<u32, _DOR1>>[src]

pub fn dacc1dor(&self) -> DACC1DOR_R[src]

Bits 0:11 - DAC channel1 data output

impl R<u32, Reg<u32, _SR>>[src]

pub fn dmaudr1(&self) -> DMAUDR1_R[src]

Bit 13 - DAC channel1 DMA underrun flag

impl R<bool, ARPE_A>[src]

pub fn variant(&self) -> ARPE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, OPM_A>[src]

pub fn variant(&self) -> OPM_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, URS_A>[src]

pub fn variant(&self) -> URS_A[src]

Get enumerated values variant

pub fn is_any_event(&self) -> bool[src]

Checks if the value of the field is ANYEVENT

pub fn is_counter_only(&self) -> bool[src]

Checks if the value of the field is COUNTERONLY

impl R<bool, UDIS_A>[src]

pub fn variant(&self) -> UDIS_A[src]

Get enumerated values variant

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

impl R<bool, CEN_A>[src]

pub fn variant(&self) -> CEN_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u32, Reg<u32, _CR1>>[src]

pub fn arpe(&self) -> ARPE_R[src]

Bit 7 - Auto-reload preload enable

pub fn opm(&self) -> OPM_R[src]

Bit 3 - One-pulse mode

pub fn urs(&self) -> URS_R[src]

Bit 2 - Update request source

pub fn udis(&self) -> UDIS_R[src]

Bit 1 - Update disable

pub fn cen(&self) -> CEN_R[src]

Bit 0 - Counter enable

impl R<u8, MMS_A>[src]

pub fn variant(&self) -> Variant<u8, MMS_A>[src]

Get enumerated values variant

pub fn is_reset(&self) -> bool[src]

Checks if the value of the field is RESET

pub fn is_enable(&self) -> bool[src]

Checks if the value of the field is ENABLE

pub fn is_update(&self) -> bool[src]

Checks if the value of the field is UPDATE

impl R<u32, Reg<u32, _CR2>>[src]

pub fn mms(&self) -> MMS_R[src]

Bits 4:6 - Master mode selection

impl R<bool, UDE_A>[src]

pub fn variant(&self) -> UDE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, UIE_A>[src]

pub fn variant(&self) -> UIE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u32, Reg<u32, _DIER>>[src]

pub fn ude(&self) -> UDE_R[src]

Bit 8 - Update DMA request enable

pub fn uie(&self) -> UIE_R[src]

Bit 0 - Update interrupt enable

impl R<bool, UIF_A>[src]

pub fn variant(&self) -> UIF_A[src]

Get enumerated values variant

pub fn is_clear(&self) -> bool[src]

Checks if the value of the field is CLEAR

pub fn is_update_pending(&self) -> bool[src]

Checks if the value of the field is UPDATEPENDING

impl R<u32, Reg<u32, _SR>>[src]

pub fn uif(&self) -> UIF_R[src]

Bit 0 - Update interrupt flag

impl R<u32, Reg<u32, _CNT>>[src]

pub fn cnt(&self) -> CNT_R[src]

Bits 0:15 - Low counter value

impl R<u32, Reg<u32, _PSC>>[src]

pub fn psc(&self) -> PSC_R[src]

Bits 0:15 - Prescaler value

impl R<u32, Reg<u32, _ARR>>[src]

pub fn arr(&self) -> ARR_R[src]

Bits 0:15 - Low Auto-reload value

impl R<u8, CKD_A>[src]

pub fn variant(&self) -> Variant<u8, CKD_A>[src]

Get enumerated values variant

pub fn is_div1(&self) -> bool[src]

Checks if the value of the field is DIV1

pub fn is_div2(&self) -> bool[src]

Checks if the value of the field is DIV2

pub fn is_div4(&self) -> bool[src]

Checks if the value of the field is DIV4

impl R<bool, ARPE_A>[src]

pub fn variant(&self) -> ARPE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, URS_A>[src]

pub fn variant(&self) -> URS_A[src]

Get enumerated values variant

pub fn is_any_event(&self) -> bool[src]

Checks if the value of the field is ANYEVENT

pub fn is_counter_only(&self) -> bool[src]

Checks if the value of the field is COUNTERONLY

impl R<bool, UDIS_A>[src]

pub fn variant(&self) -> UDIS_A[src]

Get enumerated values variant

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

impl R<bool, CEN_A>[src]

pub fn variant(&self) -> CEN_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u32, Reg<u32, _CR1>>[src]

pub fn ckd(&self) -> CKD_R[src]

Bits 8:9 - Clock division

pub fn arpe(&self) -> ARPE_R[src]

Bit 7 - Auto-reload preload enable

pub fn urs(&self) -> URS_R[src]

Bit 2 - Update request source

pub fn udis(&self) -> UDIS_R[src]

Bit 1 - Update disable

pub fn cen(&self) -> CEN_R[src]

Bit 0 - Counter enable

impl R<bool, UIE_A>[src]

pub fn variant(&self) -> UIE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u32, Reg<u32, _DIER>>[src]

pub fn cc1ie(&self) -> CC1IE_R[src]

Bit 1 - Capture/Compare 1 interrupt enable

pub fn uie(&self) -> UIE_R[src]

Bit 0 - Update interrupt enable

impl R<bool, UIF_A>[src]

pub fn variant(&self) -> UIF_A[src]

Get enumerated values variant

pub fn is_clear(&self) -> bool[src]

Checks if the value of the field is CLEAR

pub fn is_update_pending(&self) -> bool[src]

Checks if the value of the field is UPDATEPENDING

impl R<u32, Reg<u32, _SR>>[src]

pub fn cc1of(&self) -> CC1OF_R[src]

Bit 9 - Capture/Compare 1 overcapture flag

pub fn cc1if(&self) -> CC1IF_R[src]

Bit 1 - Capture/compare 1 interrupt flag

pub fn uif(&self) -> UIF_R[src]

Bit 0 - Update interrupt flag

impl R<u32, Reg<u32, _CCMR1_OUTPUT>>[src]

pub fn cc1s(&self) -> CC1S_R[src]

Bits 0:1 - Capture/Compare 1 selection

pub fn oc1fe(&self) -> OC1FE_R[src]

Bit 2 - Output compare 1 fast enable

pub fn oc1pe(&self) -> OC1PE_R[src]

Bit 3 - Output Compare 1 preload enable

pub fn oc1m(&self) -> OC1M_R[src]

Bits 4:6 - Output Compare 1 mode

impl R<u32, Reg<u32, _CCMR1_INPUT>>[src]

pub fn ic1f(&self) -> IC1F_R[src]

Bits 4:7 - Input capture 1 filter

pub fn ic1psc(&self) -> IC1PSC_R[src]

Bits 2:3 - Input capture 1 prescaler

pub fn cc1s(&self) -> CC1S_R[src]

Bits 0:1 - Capture/Compare 1 selection

impl R<u32, Reg<u32, _CCER>>[src]

pub fn cc1np(&self) -> CC1NP_R[src]

Bit 3 - Capture/Compare 1 output Polarity

pub fn cc1p(&self) -> CC1P_R[src]

Bit 1 - Capture/Compare 1 output Polarity

pub fn cc1e(&self) -> CC1E_R[src]

Bit 0 - Capture/Compare 1 output enable

impl R<u32, Reg<u32, _CNT>>[src]

pub fn cnt(&self) -> CNT_R[src]

Bits 0:15 - counter value

impl R<u32, Reg<u32, _PSC>>[src]

pub fn psc(&self) -> PSC_R[src]

Bits 0:15 - Prescaler value

impl R<u32, Reg<u32, _ARR>>[src]

pub fn arr(&self) -> ARR_R[src]

Bits 0:15 - Auto-reload value

impl R<u32, Reg<u32, _CCR>>[src]

pub fn ccr(&self) -> CCR_R[src]

Bits 0:15 - Capture/Compare 1 value

impl R<u8, CKD_A>[src]

pub fn variant(&self) -> Variant<u8, CKD_A>[src]

Get enumerated values variant

pub fn is_div1(&self) -> bool[src]

Checks if the value of the field is DIV1

pub fn is_div2(&self) -> bool[src]

Checks if the value of the field is DIV2

pub fn is_div4(&self) -> bool[src]

Checks if the value of the field is DIV4

impl R<bool, ARPE_A>[src]

pub fn variant(&self) -> ARPE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, OPM_A>[src]

pub fn variant(&self) -> OPM_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, URS_A>[src]

pub fn variant(&self) -> URS_A[src]

Get enumerated values variant

pub fn is_any_event(&self) -> bool[src]

Checks if the value of the field is ANYEVENT

pub fn is_counter_only(&self) -> bool[src]

Checks if the value of the field is COUNTERONLY

impl R<bool, UDIS_A>[src]

pub fn variant(&self) -> UDIS_A[src]

Get enumerated values variant

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

impl R<bool, CEN_A>[src]

pub fn variant(&self) -> CEN_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u32, Reg<u32, _CR1>>[src]

pub fn ckd(&self) -> CKD_R[src]

Bits 8:9 - Clock division

pub fn arpe(&self) -> ARPE_R[src]

Bit 7 - Auto-reload preload enable

pub fn opm(&self) -> OPM_R[src]

Bit 3 - One-pulse mode

pub fn urs(&self) -> URS_R[src]

Bit 2 - Update request source

pub fn udis(&self) -> UDIS_R[src]

Bit 1 - Update disable

pub fn cen(&self) -> CEN_R[src]

Bit 0 - Counter enable

impl R<u32, Reg<u32, _SMCR>>[src]

pub fn msm(&self) -> MSM_R[src]

Bit 7 - Master/Slave mode

pub fn ts(&self) -> TS_R[src]

Bits 4:6 - Trigger selection

pub fn sms(&self) -> SMS_R[src]

Bits 0:2 - Slave mode selection

impl R<bool, UIE_A>[src]

pub fn variant(&self) -> UIE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u32, Reg<u32, _DIER>>[src]

pub fn tie(&self) -> TIE_R[src]

Bit 6 - Trigger interrupt enable

pub fn cc2ie(&self) -> CC2IE_R[src]

Bit 2 - Capture/Compare 2 interrupt enable

pub fn cc1ie(&self) -> CC1IE_R[src]

Bit 1 - Capture/Compare 1 interrupt enable

pub fn uie(&self) -> UIE_R[src]

Bit 0 - Update interrupt enable

impl R<bool, UIF_A>[src]

pub fn variant(&self) -> UIF_A[src]

Get enumerated values variant

pub fn is_clear(&self) -> bool[src]

Checks if the value of the field is CLEAR

pub fn is_update_pending(&self) -> bool[src]

Checks if the value of the field is UPDATEPENDING

impl R<u32, Reg<u32, _SR>>[src]

pub fn cc2of(&self) -> CC2OF_R[src]

Bit 10 - Capture/compare 2 overcapture flag

pub fn cc1of(&self) -> CC1OF_R[src]

Bit 9 - Capture/Compare 1 overcapture flag

pub fn tif(&self) -> TIF_R[src]

Bit 6 - Trigger interrupt flag

pub fn cc2if(&self) -> CC2IF_R[src]

Bit 2 - Capture/Compare 2 interrupt flag

pub fn cc1if(&self) -> CC1IF_R[src]

Bit 1 - Capture/compare 1 interrupt flag

pub fn uif(&self) -> UIF_R[src]

Bit 0 - Update interrupt flag

impl R<u32, Reg<u32, _CCMR1_OUTPUT>>[src]

pub fn oc2m(&self) -> OC2M_R[src]

Bits 12:14 - Output Compare 2 mode

pub fn oc2pe(&self) -> OC2PE_R[src]

Bit 11 - Output Compare 2 preload enable

pub fn oc2fe(&self) -> OC2FE_R[src]

Bit 10 - Output Compare 2 fast enable

pub fn cc2s(&self) -> CC2S_R[src]

Bits 8:9 - Capture/Compare 2 selection

pub fn oc1m(&self) -> OC1M_R[src]

Bits 4:6 - Output Compare 1 mode

pub fn oc1pe(&self) -> OC1PE_R[src]

Bit 3 - Output Compare 1 preload enable

pub fn oc1fe(&self) -> OC1FE_R[src]

Bit 2 - Output Compare 1 fast enable

pub fn cc1s(&self) -> CC1S_R[src]

Bits 0:1 - Capture/Compare 1 selection

impl R<u32, Reg<u32, _CCMR1_INPUT>>[src]

pub fn ic2f(&self) -> IC2F_R[src]

Bits 12:15 - Input capture 2 filter

pub fn ic2psc(&self) -> IC2PSC_R[src]

Bits 10:11 - Input capture 2 prescaler

pub fn cc2s(&self) -> CC2S_R[src]

Bits 8:9 - Capture/Compare 2 selection

pub fn ic1f(&self) -> IC1F_R[src]

Bits 4:6 - Input capture 1 filter

pub fn ic1psc(&self) -> IC1PSC_R[src]

Bits 2:3 - Input capture 1 prescaler

pub fn cc1s(&self) -> CC1S_R[src]

Bits 0:1 - Capture/Compare 1 selection

impl R<u32, Reg<u32, _CCER>>[src]

pub fn cc2np(&self) -> CC2NP_R[src]

Bit 7 - Capture/Compare 2 output Polarity

pub fn cc2p(&self) -> CC2P_R[src]

Bit 5 - Capture/Compare 2 output Polarity

pub fn cc2e(&self) -> CC2E_R[src]

Bit 4 - Capture/Compare 2 output enable

pub fn cc1np(&self) -> CC1NP_R[src]

Bit 3 - Capture/Compare 1 output Polarity

pub fn cc1p(&self) -> CC1P_R[src]

Bit 1 - Capture/Compare 1 output Polarity

pub fn cc1e(&self) -> CC1E_R[src]

Bit 0 - Capture/Compare 1 output enable

impl R<u32, Reg<u32, _CNT>>[src]

pub fn cnt(&self) -> CNT_R[src]

Bits 0:15 - counter value

impl R<u32, Reg<u32, _PSC>>[src]

pub fn psc(&self) -> PSC_R[src]

Bits 0:15 - Prescaler value

impl R<u32, Reg<u32, _ARR>>[src]

pub fn arr(&self) -> ARR_R[src]

Bits 0:15 - Auto-reload value

impl R<u32, Reg<u32, _CCR>>[src]

pub fn ccr(&self) -> CCR_R[src]

Bits 0:15 - Capture/Compare 1 value

impl R<u32, Reg<u32, _CR>>[src]

pub fn dmaudrie2(&self) -> DMAUDRIE2_R[src]

Bit 29 - DAC channel2 DMA underrun interrupt enable

pub fn dmaen2(&self) -> DMAEN2_R[src]

Bit 28 - DAC channel2 DMA enable

pub fn mamp2(&self) -> MAMP2_R[src]

Bits 24:27 - DAC channel2 mask/amplitude selector

pub fn wave2(&self) -> WAVE2_R[src]

Bits 22:23 - DAC channel2 noise/triangle wave generation enable

pub fn tsel2(&self) -> TSEL2_R[src]

Bits 19:21 - DAC channel2 trigger selection

pub fn ten2(&self) -> TEN2_R[src]

Bit 18 - DAC channel2 trigger enable

pub fn boff2(&self) -> BOFF2_R[src]

Bit 17 - DAC channel2 output buffer disable

pub fn en2(&self) -> EN2_R[src]

Bit 16 - DAC channel2 enable

pub fn dmaudrie1(&self) -> DMAUDRIE1_R[src]

Bit 13 - DAC channel1 DMA Underrun Interrupt enable

pub fn dmaen1(&self) -> DMAEN1_R[src]

Bit 12 - DAC channel1 DMA enable

pub fn mamp1(&self) -> MAMP1_R[src]

Bits 8:11 - DAC channel1 mask/amplitude selector

pub fn wave1(&self) -> WAVE1_R[src]

Bits 6:7 - DAC channel1 noise/triangle wave generation enable

pub fn tsel1(&self) -> TSEL1_R[src]

Bits 3:5 - DAC channel1 trigger selection

pub fn ten1(&self) -> TEN1_R[src]

Bit 2 - DAC channel1 trigger enable

pub fn boff1(&self) -> BOFF1_R[src]

Bit 1 - DAC channel1 output buffer disable

pub fn en1(&self) -> EN1_R[src]

Bit 0 - DAC channel1 enable

impl R<u32, Reg<u32, _DHR12R1>>[src]

pub fn dacc1dhr(&self) -> DACC1DHR_R[src]

Bits 0:11 - DAC channel1 12-bit right-aligned data

impl R<u32, Reg<u32, _DHR12L1>>[src]

pub fn dacc1dhr(&self) -> DACC1DHR_R[src]

Bits 4:15 - DAC channel1 12-bit left-aligned data

impl R<u32, Reg<u32, _DHR8R1>>[src]

pub fn dacc1dhr(&self) -> DACC1DHR_R[src]

Bits 0:7 - DAC channel1 8-bit right-aligned data

impl R<u32, Reg<u32, _DHR12R2>>[src]

pub fn dacc2dhr(&self) -> DACC2DHR_R[src]

Bits 0:11 - DAC channel2 12-bit right-aligned data

impl R<u32, Reg<u32, _DHR12L2>>[src]

pub fn dacc2dhr(&self) -> DACC2DHR_R[src]

Bits 4:15 - DAC channel2 12-bit left-aligned data

impl R<u32, Reg<u32, _DHR8R2>>[src]

pub fn dacc2dhr(&self) -> DACC2DHR_R[src]

Bits 0:7 - DAC channel2 8-bit right-aligned data

impl R<u32, Reg<u32, _DHR12RD>>[src]

pub fn dacc2dhr(&self) -> DACC2DHR_R[src]

Bits 16:27 - DAC channel2 12-bit right-aligned data

pub fn dacc1dhr(&self) -> DACC1DHR_R[src]

Bits 0:11 - DAC channel1 12-bit right-aligned data

impl R<u32, Reg<u32, _DHR12LD>>[src]

pub fn dacc2dhr(&self) -> DACC2DHR_R[src]

Bits 20:31 - DAC channel2 12-bit left-aligned data

pub fn dacc1dhr(&self) -> DACC1DHR_R[src]

Bits 4:15 - DAC channel1 12-bit left-aligned data

impl R<u32, Reg<u32, _DHR8RD>>[src]

pub fn dacc2dhr(&self) -> DACC2DHR_R[src]

Bits 8:15 - DAC channel2 8-bit right-aligned data

pub fn dacc1dhr(&self) -> DACC1DHR_R[src]

Bits 0:7 - DAC channel1 8-bit right-aligned data

impl R<u32, Reg<u32, _DOR1>>[src]

pub fn dacc1dor(&self) -> DACC1DOR_R[src]

Bits 0:11 - DAC channel1 data output

impl R<u32, Reg<u32, _DOR2>>[src]

pub fn dacc2dor(&self) -> DACC2DOR_R[src]

Bits 0:11 - DAC channel2 data output

impl R<u32, Reg<u32, _SR>>[src]

pub fn dmaudr2(&self) -> DMAUDR2_R[src]

Bit 29 - DAC channel2 DMA underrun flag

pub fn dmaudr1(&self) -> DMAUDR1_R[src]

Bit 13 - DAC channel1 DMA underrun flag

impl R<u32, Reg<u32, _IDCODE>>[src]

pub fn dev_id(&self) -> DEV_ID_R[src]

Bits 0:11 - Device Identifier

pub fn rev_id(&self) -> REV_ID_R[src]

Bits 16:31 - Revision Identifier

impl R<u32, Reg<u32, _CR>>[src]

pub fn dbg_sleep(&self) -> DBG_SLEEP_R[src]

Bit 0 - Debug Sleep mode

pub fn dbg_stop(&self) -> DBG_STOP_R[src]

Bit 1 - Debug Stop Mode

pub fn dbg_standby(&self) -> DBG_STANDBY_R[src]

Bit 2 - Debug Standby Mode

pub fn trace_ioen(&self) -> TRACE_IOEN_R[src]

Bit 5 - Trace pin assignment control

pub fn trace_mode(&self) -> TRACE_MODE_R[src]

Bits 6:7 - Trace pin assignment control

impl R<u32, Reg<u32, _APB1_FZ>>[src]

pub fn dbg_tim2_stop(&self) -> DBG_TIM2_STOP_R[src]

Bit 0 - Debug Timer 2 stopped when Core is halted

pub fn dbg_tim3_stop(&self) -> DBG_TIM3_STOP_R[src]

Bit 1 - Debug Timer 3 stopped when Core is halted

pub fn dbg_tim4_stop(&self) -> DBG_TIM4_STOP_R[src]

Bit 2 - Debug Timer 4 stopped when Core is halted

pub fn dbg_tim5_stop(&self) -> DBG_TIM5_STOP_R[src]

Bit 3 - Debug Timer 5 stopped when Core is halted

pub fn dbg_tim6_stop(&self) -> DBG_TIM6_STOP_R[src]

Bit 4 - Debug Timer 6 stopped when Core is halted

pub fn dbg_tim7_stop(&self) -> DBG_TIM7_STOP_R[src]

Bit 5 - Debug Timer 7 stopped when Core is halted

pub fn dbg_tim12_stop(&self) -> DBG_TIM12_STOP_R[src]

Bit 6 - Debug Timer 12 stopped when Core is halted

pub fn dbg_tim13_stop(&self) -> DBG_TIM13_STOP_R[src]

Bit 7 - Debug Timer 13 stopped when Core is halted

pub fn dbg_timer14_stop(&self) -> DBG_TIMER14_STOP_R[src]

Bit 8 - Debug Timer 14 stopped when Core is halted

pub fn dbg_tim18_stop(&self) -> DBG_TIM18_STOP_R[src]

Bit 9 - Debug Timer 18 stopped when Core is halted

pub fn dbg_rtc_stop(&self) -> DBG_RTC_STOP_R[src]

Bit 10 - Debug RTC stopped when Core is halted

pub fn dbg_wwdg_stop(&self) -> DBG_WWDG_STOP_R[src]

Bit 11 - Debug Window Wachdog stopped when Core is halted

pub fn dbg_iwdg_stop(&self) -> DBG_IWDG_STOP_R[src]

Bit 12 - Debug Independent Wachdog stopped when Core is halted

pub fn i2c1_smbus_timeout(&self) -> I2C1_SMBUS_TIMEOUT_R[src]

Bit 21 - SMBUS timeout mode stopped when Core is halted

pub fn i2c2_smbus_timeout(&self) -> I2C2_SMBUS_TIMEOUT_R[src]

Bit 22 - SMBUS timeout mode stopped when Core is halted

pub fn dbg_can_stop(&self) -> DBG_CAN_STOP_R[src]

Bit 25 - Debug CAN stopped when core is halted

impl R<u32, Reg<u32, _APB2FZ>>[src]

pub fn dbg_tim15_stop(&self) -> DBG_TIM15_STOP_R[src]

Bit 2 - Debug Timer 15 stopped when Core is halted

pub fn dbg_tim16_stop(&self) -> DBG_TIM16_STOP_R[src]

Bit 3 - Debug Timer 16 stopped when Core is halted

pub fn dbg_tim17_sto(&self) -> DBG_TIM17_STO_R[src]

Bit 4 - Debug Timer 17 stopped when Core is halted

pub fn dbg_tim19_stop(&self) -> DBG_TIM19_STOP_R[src]

Bit 5 - Debug Timer 19 stopped when Core is halted

impl R<u32, Reg<u32, _BCR1>>[src]

pub fn cclken(&self) -> CCLKEN_R[src]

Bit 20 - CCLKEN

pub fn cburstrw(&self) -> CBURSTRW_R[src]

Bit 19 - CBURSTRW

pub fn asyncwait(&self) -> ASYNCWAIT_R[src]

Bit 15 - ASYNCWAIT

pub fn extmod(&self) -> EXTMOD_R[src]

Bit 14 - EXTMOD

pub fn waiten(&self) -> WAITEN_R[src]

Bit 13 - WAITEN

pub fn wren(&self) -> WREN_R[src]

Bit 12 - WREN

pub fn waitcfg(&self) -> WAITCFG_R[src]

Bit 11 - WAITCFG

pub fn waitpol(&self) -> WAITPOL_R[src]

Bit 9 - WAITPOL

pub fn bursten(&self) -> BURSTEN_R[src]

Bit 8 - BURSTEN

pub fn faccen(&self) -> FACCEN_R[src]

Bit 6 - FACCEN

pub fn mwid(&self) -> MWID_R[src]

Bits 4:5 - MWID

pub fn mtyp(&self) -> MTYP_R[src]

Bits 2:3 - MTYP

pub fn muxen(&self) -> MUXEN_R[src]

Bit 1 - MUXEN

pub fn mbken(&self) -> MBKEN_R[src]

Bit 0 - MBKEN

impl R<u32, Reg<u32, _BTR1>>[src]

pub fn accmod(&self) -> ACCMOD_R[src]

Bits 28:29 - ACCMOD

pub fn datlat(&self) -> DATLAT_R[src]

Bits 24:27 - DATLAT

pub fn clkdiv(&self) -> CLKDIV_R[src]

Bits 20:23 - CLKDIV

pub fn busturn(&self) -> BUSTURN_R[src]

Bits 16:19 - BUSTURN

pub fn datast(&self) -> DATAST_R[src]

Bits 8:15 - DATAST

pub fn addhld(&self) -> ADDHLD_R[src]

Bits 4:7 - ADDHLD

pub fn addset(&self) -> ADDSET_R[src]

Bits 0:3 - ADDSET

impl R<u32, Reg<u32, _BCR2>>[src]

pub fn cburstrw(&self) -> CBURSTRW_R[src]

Bit 19 - CBURSTRW

pub fn asyncwait(&self) -> ASYNCWAIT_R[src]

Bit 15 - ASYNCWAIT

pub fn extmod(&self) -> EXTMOD_R[src]

Bit 14 - EXTMOD

pub fn waiten(&self) -> WAITEN_R[src]

Bit 13 - WAITEN

pub fn wren(&self) -> WREN_R[src]

Bit 12 - WREN

pub fn waitcfg(&self) -> WAITCFG_R[src]

Bit 11 - WAITCFG

pub fn wrapmod(&self) -> WRAPMOD_R[src]

Bit 10 - WRAPMOD

pub fn waitpol(&self) -> WAITPOL_R[src]

Bit 9 - WAITPOL

pub fn bursten(&self) -> BURSTEN_R[src]

Bit 8 - BURSTEN

pub fn faccen(&self) -> FACCEN_R[src]

Bit 6 - FACCEN

pub fn mwid(&self) -> MWID_R[src]

Bits 4:5 - MWID

pub fn mtyp(&self) -> MTYP_R[src]

Bits 2:3 - MTYP

pub fn muxen(&self) -> MUXEN_R[src]

Bit 1 - MUXEN

pub fn mbken(&self) -> MBKEN_R[src]

Bit 0 - MBKEN

impl R<u32, Reg<u32, _BTR2>>[src]

pub fn accmod(&self) -> ACCMOD_R[src]

Bits 28:29 - ACCMOD

pub fn datlat(&self) -> DATLAT_R[src]

Bits 24:27 - DATLAT

pub fn clkdiv(&self) -> CLKDIV_R[src]

Bits 20:23 - CLKDIV

pub fn busturn(&self) -> BUSTURN_R[src]

Bits 16:19 - BUSTURN

pub fn datast(&self) -> DATAST_R[src]

Bits 8:15 - DATAST

pub fn addhld(&self) -> ADDHLD_R[src]

Bits 4:7 - ADDHLD

pub fn addset(&self) -> ADDSET_R[src]

Bits 0:3 - ADDSET

impl R<u32, Reg<u32, _BCR3>>[src]

pub fn cburstrw(&self) -> CBURSTRW_R[src]

Bit 19 - CBURSTRW

pub fn asyncwait(&self) -> ASYNCWAIT_R[src]

Bit 15 - ASYNCWAIT

pub fn extmod(&self) -> EXTMOD_R[src]

Bit 14 - EXTMOD

pub fn waiten(&self) -> WAITEN_R[src]

Bit 13 - WAITEN

pub fn wren(&self) -> WREN_R[src]

Bit 12 - WREN

pub fn waitcfg(&self) -> WAITCFG_R[src]

Bit 11 - WAITCFG

pub fn wrapmod(&self) -> WRAPMOD_R[src]

Bit 10 - WRAPMOD

pub fn waitpol(&self) -> WAITPOL_R[src]

Bit 9 - WAITPOL

pub fn bursten(&self) -> BURSTEN_R[src]

Bit 8 - BURSTEN

pub fn faccen(&self) -> FACCEN_R[src]

Bit 6 - FACCEN

pub fn mwid(&self) -> MWID_R[src]

Bits 4:5 - MWID

pub fn mtyp(&self) -> MTYP_R[src]

Bits 2:3 - MTYP

pub fn muxen(&self) -> MUXEN_R[src]

Bit 1 - MUXEN

pub fn mbken(&self) -> MBKEN_R[src]

Bit 0 - MBKEN

impl R<u32, Reg<u32, _BTR3>>[src]

pub fn accmod(&self) -> ACCMOD_R[src]

Bits 28:29 - ACCMOD

pub fn datlat(&self) -> DATLAT_R[src]

Bits 24:27 - DATLAT

pub fn clkdiv(&self) -> CLKDIV_R[src]

Bits 20:23 - CLKDIV

pub fn busturn(&self) -> BUSTURN_R[src]

Bits 16:19 - BUSTURN

pub fn datast(&self) -> DATAST_R[src]

Bits 8:15 - DATAST

pub fn addhld(&self) -> ADDHLD_R[src]

Bits 4:7 - ADDHLD

pub fn addset(&self) -> ADDSET_R[src]

Bits 0:3 - ADDSET

impl R<u32, Reg<u32, _BCR4>>[src]

pub fn cburstrw(&self) -> CBURSTRW_R[src]

Bit 19 - CBURSTRW

pub fn asyncwait(&self) -> ASYNCWAIT_R[src]

Bit 15 - ASYNCWAIT

pub fn extmod(&self) -> EXTMOD_R[src]

Bit 14 - EXTMOD

pub fn waiten(&self) -> WAITEN_R[src]

Bit 13 - WAITEN

pub fn wren(&self) -> WREN_R[src]

Bit 12 - WREN

pub fn waitcfg(&self) -> WAITCFG_R[src]

Bit 11 - WAITCFG

pub fn wrapmod(&self) -> WRAPMOD_R[src]

Bit 10 - WRAPMOD

pub fn waitpol(&self) -> WAITPOL_R[src]

Bit 9 - WAITPOL

pub fn bursten(&self) -> BURSTEN_R[src]

Bit 8 - BURSTEN

pub fn faccen(&self) -> FACCEN_R[src]

Bit 6 - FACCEN

pub fn mwid(&self) -> MWID_R[src]

Bits 4:5 - MWID

pub fn mtyp(&self) -> MTYP_R[src]

Bits 2:3 - MTYP

pub fn muxen(&self) -> MUXEN_R[src]

Bit 1 - MUXEN

pub fn mbken(&self) -> MBKEN_R[src]

Bit 0 - MBKEN

impl R<u32, Reg<u32, _BTR4>>[src]

pub fn accmod(&self) -> ACCMOD_R[src]

Bits 28:29 - ACCMOD

pub fn datlat(&self) -> DATLAT_R[src]

Bits 24:27 - DATLAT

pub fn clkdiv(&self) -> CLKDIV_R[src]

Bits 20:23 - CLKDIV

pub fn busturn(&self) -> BUSTURN_R[src]

Bits 16:19 - BUSTURN

pub fn datast(&self) -> DATAST_R[src]

Bits 8:15 - DATAST

pub fn addhld(&self) -> ADDHLD_R[src]

Bits 4:7 - ADDHLD

pub fn addset(&self) -> ADDSET_R[src]

Bits 0:3 - ADDSET

impl R<u32, Reg<u32, _PCR2>>[src]

pub fn eccps(&self) -> ECCPS_R[src]

Bits 17:19 - ECCPS

pub fn tar(&self) -> TAR_R[src]

Bits 13:16 - TAR

pub fn tclr(&self) -> TCLR_R[src]

Bits 9:12 - TCLR

pub fn eccen(&self) -> ECCEN_R[src]

Bit 6 - ECCEN

pub fn pwid(&self) -> PWID_R[src]

Bits 4:5 - PWID

pub fn ptyp(&self) -> PTYP_R[src]

Bit 3 - PTYP

pub fn pbken(&self) -> PBKEN_R[src]

Bit 2 - PBKEN

pub fn pwaiten(&self) -> PWAITEN_R[src]

Bit 1 - PWAITEN

impl R<u32, Reg<u32, _SR2>>[src]

pub fn fempt(&self) -> FEMPT_R[src]

Bit 6 - FEMPT

pub fn ifen(&self) -> IFEN_R[src]

Bit 5 - IFEN

pub fn ilen(&self) -> ILEN_R[src]

Bit 4 - ILEN

pub fn iren(&self) -> IREN_R[src]

Bit 3 - IREN

pub fn ifs(&self) -> IFS_R[src]

Bit 2 - IFS

pub fn ils(&self) -> ILS_R[src]

Bit 1 - ILS

pub fn irs(&self) -> IRS_R[src]

Bit 0 - IRS

impl R<u32, Reg<u32, _PMEM2>>[src]

pub fn memhizx(&self) -> MEMHIZX_R[src]

Bits 24:31 - MEMHIZx

pub fn memholdx(&self) -> MEMHOLDX_R[src]

Bits 16:23 - MEMHOLDx

pub fn memwaitx(&self) -> MEMWAITX_R[src]

Bits 8:15 - MEMWAITx

pub fn memsetx(&self) -> MEMSETX_R[src]

Bits 0:7 - MEMSETx

impl R<u32, Reg<u32, _PATT2>>[src]

pub fn atthizx(&self) -> ATTHIZX_R[src]

Bits 24:31 - ATTHIZx

pub fn attholdx(&self) -> ATTHOLDX_R[src]

Bits 16:23 - ATTHOLDx

pub fn attwaitx(&self) -> ATTWAITX_R[src]

Bits 8:15 - ATTWAITx

pub fn attsetx(&self) -> ATTSETX_R[src]

Bits 0:7 - ATTSETx

impl R<u32, Reg<u32, _ECCR2>>[src]

pub fn eccx(&self) -> ECCX_R[src]

Bits 0:31 - ECCx

impl R<u32, Reg<u32, _PCR3>>[src]

pub fn eccps(&self) -> ECCPS_R[src]

Bits 17:19 - ECCPS

pub fn tar(&self) -> TAR_R[src]

Bits 13:16 - TAR

pub fn tclr(&self) -> TCLR_R[src]

Bits 9:12 - TCLR

pub fn eccen(&self) -> ECCEN_R[src]

Bit 6 - ECCEN

pub fn pwid(&self) -> PWID_R[src]

Bits 4:5 - PWID

pub fn ptyp(&self) -> PTYP_R[src]

Bit 3 - PTYP

pub fn pbken(&self) -> PBKEN_R[src]

Bit 2 - PBKEN

pub fn pwaiten(&self) -> PWAITEN_R[src]

Bit 1 - PWAITEN

impl R<u32, Reg<u32, _SR3>>[src]

pub fn fempt(&self) -> FEMPT_R[src]

Bit 6 - FEMPT

pub fn ifen(&self) -> IFEN_R[src]

Bit 5 - IFEN

pub fn ilen(&self) -> ILEN_R[src]

Bit 4 - ILEN

pub fn iren(&self) -> IREN_R[src]

Bit 3 - IREN

pub fn ifs(&self) -> IFS_R[src]

Bit 2 - IFS

pub fn ils(&self) -> ILS_R[src]

Bit 1 - ILS

pub fn irs(&self) -> IRS_R[src]

Bit 0 - IRS

impl R<u32, Reg<u32, _PMEM3>>[src]

pub fn memhizx(&self) -> MEMHIZX_R[src]

Bits 24:31 - MEMHIZx

pub fn memholdx(&self) -> MEMHOLDX_R[src]

Bits 16:23 - MEMHOLDx

pub fn memwaitx(&self) -> MEMWAITX_R[src]

Bits 8:15 - MEMWAITx

pub fn memsetx(&self) -> MEMSETX_R[src]

Bits 0:7 - MEMSETx

impl R<u32, Reg<u32, _PATT3>>[src]

pub fn atthizx(&self) -> ATTHIZX_R[src]

Bits 24:31 - ATTHIZx

pub fn attholdx(&self) -> ATTHOLDX_R[src]

Bits 16:23 - ATTHOLDx

pub fn attwaitx(&self) -> ATTWAITX_R[src]

Bits 8:15 - ATTWAITx

pub fn attsetx(&self) -> ATTSETX_R[src]

Bits 0:7 - ATTSETx

impl R<u32, Reg<u32, _ECCR3>>[src]

pub fn eccx(&self) -> ECCX_R[src]

Bits 0:31 - ECCx

impl R<u32, Reg<u32, _PCR4>>[src]

pub fn eccps(&self) -> ECCPS_R[src]

Bits 17:19 - ECCPS

pub fn tar(&self) -> TAR_R[src]

Bits 13:16 - TAR

pub fn tclr(&self) -> TCLR_R[src]

Bits 9:12 - TCLR

pub fn eccen(&self) -> ECCEN_R[src]

Bit 6 - ECCEN

pub fn pwid(&self) -> PWID_R[src]

Bits 4:5 - PWID

pub fn ptyp(&self) -> PTYP_R[src]

Bit 3 - PTYP

pub fn pbken(&self) -> PBKEN_R[src]

Bit 2 - PBKEN

pub fn pwaiten(&self) -> PWAITEN_R[src]

Bit 1 - PWAITEN

impl R<u32, Reg<u32, _SR4>>[src]

pub fn fempt(&self) -> FEMPT_R[src]

Bit 6 - FEMPT

pub fn ifen(&self) -> IFEN_R[src]

Bit 5 - IFEN

pub fn ilen(&self) -> ILEN_R[src]

Bit 4 - ILEN

pub fn iren(&self) -> IREN_R[src]

Bit 3 - IREN

pub fn ifs(&self) -> IFS_R[src]

Bit 2 - IFS

pub fn ils(&self) -> ILS_R[src]

Bit 1 - ILS

pub fn irs(&self) -> IRS_R[src]

Bit 0 - IRS

impl R<u32, Reg<u32, _PMEM4>>[src]

pub fn memhizx(&self) -> MEMHIZX_R[src]

Bits 24:31 - MEMHIZx

pub fn memholdx(&self) -> MEMHOLDX_R[src]

Bits 16:23 - MEMHOLDx

pub fn memwaitx(&self) -> MEMWAITX_R[src]

Bits 8:15 - MEMWAITx

pub fn memsetx(&self) -> MEMSETX_R[src]

Bits 0:7 - MEMSETx

impl R<u32, Reg<u32, _PATT4>>[src]

pub fn atthizx(&self) -> ATTHIZX_R[src]

Bits 24:31 - ATTHIZx

pub fn attholdx(&self) -> ATTHOLDX_R[src]

Bits 16:23 - ATTHOLDx

pub fn attwaitx(&self) -> ATTWAITX_R[src]

Bits 8:15 - ATTWAITx

pub fn attsetx(&self) -> ATTSETX_R[src]

Bits 0:7 - ATTSETx

impl R<u32, Reg<u32, _PIO4>>[src]

pub fn iohizx(&self) -> IOHIZX_R[src]

Bits 24:31 - IOHIZx

pub fn ioholdx(&self) -> IOHOLDX_R[src]

Bits 16:23 - IOHOLDx

pub fn iowaitx(&self) -> IOWAITX_R[src]

Bits 8:15 - IOWAITx

pub fn iosetx(&self) -> IOSETX_R[src]

Bits 0:7 - IOSETx

impl R<u32, Reg<u32, _BWTR1>>[src]

pub fn accmod(&self) -> ACCMOD_R[src]

Bits 28:29 - ACCMOD

pub fn datlat(&self) -> DATLAT_R[src]

Bits 24:27 - DATLAT

pub fn clkdiv(&self) -> CLKDIV_R[src]

Bits 20:23 - CLKDIV

pub fn busturn(&self) -> BUSTURN_R[src]

Bits 16:19 - Bus turnaround phase duration

pub fn datast(&self) -> DATAST_R[src]

Bits 8:15 - DATAST

pub fn addhld(&self) -> ADDHLD_R[src]

Bits 4:7 - ADDHLD

pub fn addset(&self) -> ADDSET_R[src]

Bits 0:3 - ADDSET

impl R<u32, Reg<u32, _BWTR2>>[src]

pub fn accmod(&self) -> ACCMOD_R[src]

Bits 28:29 - ACCMOD

pub fn datlat(&self) -> DATLAT_R[src]

Bits 24:27 - DATLAT

pub fn clkdiv(&self) -> CLKDIV_R[src]

Bits 20:23 - CLKDIV

pub fn busturn(&self) -> BUSTURN_R[src]

Bits 16:19 - Bus turnaround phase duration

pub fn datast(&self) -> DATAST_R[src]

Bits 8:15 - DATAST

pub fn addhld(&self) -> ADDHLD_R[src]

Bits 4:7 - ADDHLD

pub fn addset(&self) -> ADDSET_R[src]

Bits 0:3 - ADDSET

impl R<u32, Reg<u32, _BWTR3>>[src]

pub fn accmod(&self) -> ACCMOD_R[src]

Bits 28:29 - ACCMOD

pub fn datlat(&self) -> DATLAT_R[src]

Bits 24:27 - DATLAT

pub fn clkdiv(&self) -> CLKDIV_R[src]

Bits 20:23 - CLKDIV

pub fn busturn(&self) -> BUSTURN_R[src]

Bits 16:19 - Bus turnaround phase duration

pub fn datast(&self) -> DATAST_R[src]

Bits 8:15 - DATAST

pub fn addhld(&self) -> ADDHLD_R[src]

Bits 4:7 - ADDHLD

pub fn addset(&self) -> ADDSET_R[src]

Bits 0:3 - ADDSET

impl R<u32, Reg<u32, _BWTR4>>[src]

pub fn accmod(&self) -> ACCMOD_R[src]

Bits 28:29 - ACCMOD

pub fn datlat(&self) -> DATLAT_R[src]

Bits 24:27 - DATLAT

pub fn clkdiv(&self) -> CLKDIV_R[src]

Bits 20:23 - CLKDIV

pub fn busturn(&self) -> BUSTURN_R[src]

Bits 16:19 - Bus turnaround phase duration

pub fn datast(&self) -> DATAST_R[src]

Bits 8:15 - DATAST

pub fn addhld(&self) -> ADDHLD_R[src]

Bits 4:7 - ADDHLD

pub fn addset(&self) -> ADDSET_R[src]

Bits 0:3 - ADDSET

impl R<bool, CEN_A>[src]

pub fn variant(&self) -> CEN_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, UDIS_A>[src]

pub fn variant(&self) -> UDIS_A[src]

Get enumerated values variant

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

impl R<bool, URS_A>[src]

pub fn variant(&self) -> URS_A[src]

Get enumerated values variant

pub fn is_any_event(&self) -> bool[src]

Checks if the value of the field is ANYEVENT

pub fn is_counter_only(&self) -> bool[src]

Checks if the value of the field is COUNTERONLY

impl R<bool, OPM_A>[src]

pub fn variant(&self) -> OPM_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, DIR_A>[src]

pub fn variant(&self) -> DIR_A[src]

Get enumerated values variant

pub fn is_up(&self) -> bool[src]

Checks if the value of the field is UP

pub fn is_down(&self) -> bool[src]

Checks if the value of the field is DOWN

impl R<u8, CMS_A>[src]

pub fn variant(&self) -> CMS_A[src]

Get enumerated values variant

pub fn is_edge_aligned(&self) -> bool[src]

Checks if the value of the field is EDGEALIGNED

pub fn is_center_aligned1(&self) -> bool[src]

Checks if the value of the field is CENTERALIGNED1

pub fn is_center_aligned2(&self) -> bool[src]

Checks if the value of the field is CENTERALIGNED2

pub fn is_center_aligned3(&self) -> bool[src]

Checks if the value of the field is CENTERALIGNED3

impl R<bool, ARPE_A>[src]

pub fn variant(&self) -> ARPE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u8, CKD_A>[src]

pub fn variant(&self) -> Variant<u8, CKD_A>[src]

Get enumerated values variant

pub fn is_div1(&self) -> bool[src]

Checks if the value of the field is DIV1

pub fn is_div2(&self) -> bool[src]

Checks if the value of the field is DIV2

pub fn is_div4(&self) -> bool[src]

Checks if the value of the field is DIV4

impl R<u32, Reg<u32, _CR1>>[src]

pub fn cen(&self) -> CEN_R[src]

Bit 0 - Counter enable

pub fn udis(&self) -> UDIS_R[src]

Bit 1 - Update disable

pub fn urs(&self) -> URS_R[src]

Bit 2 - Update request source

pub fn opm(&self) -> OPM_R[src]

Bit 3 - One-pulse mode

pub fn dir(&self) -> DIR_R[src]

Bit 4 - Direction

pub fn cms(&self) -> CMS_R[src]

Bits 5:6 - Center-aligned mode selection

pub fn arpe(&self) -> ARPE_R[src]

Bit 7 - Auto-reload preload enable

pub fn ckd(&self) -> CKD_R[src]

Bits 8:9 - Clock division

pub fn uifremap(&self) -> UIFREMAP_R[src]

Bit 11 - UIF status bit remapping

impl R<bool, CCDS_A>[src]

pub fn variant(&self) -> CCDS_A[src]

Get enumerated values variant

pub fn is_on_compare(&self) -> bool[src]

Checks if the value of the field is ONCOMPARE

pub fn is_on_update(&self) -> bool[src]

Checks if the value of the field is ONUPDATE

impl R<u8, MMS_A>[src]

pub fn variant(&self) -> MMS_A[src]

Get enumerated values variant

pub fn is_reset(&self) -> bool[src]

Checks if the value of the field is RESET

pub fn is_enable(&self) -> bool[src]

Checks if the value of the field is ENABLE

pub fn is_update(&self) -> bool[src]

Checks if the value of the field is UPDATE

pub fn is_compare_pulse(&self) -> bool[src]

Checks if the value of the field is COMPAREPULSE

pub fn is_compare_oc1(&self) -> bool[src]

Checks if the value of the field is COMPAREOC1

pub fn is_compare_oc2(&self) -> bool[src]

Checks if the value of the field is COMPAREOC2

pub fn is_compare_oc3(&self) -> bool[src]

Checks if the value of the field is COMPAREOC3

pub fn is_compare_oc4(&self) -> bool[src]

Checks if the value of the field is COMPAREOC4

impl R<bool, TI1S_A>[src]

pub fn variant(&self) -> TI1S_A[src]

Get enumerated values variant

pub fn is_normal(&self) -> bool[src]

Checks if the value of the field is NORMAL

pub fn is_xor(&self) -> bool[src]

Checks if the value of the field is XOR

impl R<u32, Reg<u32, _CR2>>[src]

pub fn ccpc(&self) -> CCPC_R[src]

Bit 0 - Capture/compare preloaded control

pub fn ccus(&self) -> CCUS_R[src]

Bit 2 - Capture/compare control update selection

pub fn ccds(&self) -> CCDS_R[src]

Bit 3 - Capture/compare DMA selection

pub fn mms(&self) -> MMS_R[src]

Bits 4:6 - Master mode selection

pub fn ti1s(&self) -> TI1S_R[src]

Bit 7 - TI1 selection

pub fn ois1(&self) -> OIS1_R[src]

Bit 8 - Output Idle state 1

pub fn ois1n(&self) -> OIS1N_R[src]

Bit 9 - Output Idle state 1

pub fn ois2(&self) -> OIS2_R[src]

Bit 10 - Output Idle state 2

pub fn ois2n(&self) -> OIS2N_R[src]

Bit 11 - Output Idle state 2

pub fn ois3(&self) -> OIS3_R[src]

Bit 12 - Output Idle state 3

pub fn ois3n(&self) -> OIS3N_R[src]

Bit 13 - Output Idle state 3

pub fn ois4(&self) -> OIS4_R[src]

Bit 14 - Output Idle state 4

pub fn ois5(&self) -> OIS5_R[src]

Bit 16 - Output Idle state 5

pub fn ois6(&self) -> OIS6_R[src]

Bit 18 - Output Idle state 6

pub fn mms2(&self) -> MMS2_R[src]

Bits 20:23 - Master mode selection 2

impl R<u8, SMS_A>[src]

pub fn variant(&self) -> SMS_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_encoder_mode_1(&self) -> bool[src]

Checks if the value of the field is ENCODER_MODE_1

pub fn is_encoder_mode_2(&self) -> bool[src]

Checks if the value of the field is ENCODER_MODE_2

pub fn is_encoder_mode_3(&self) -> bool[src]

Checks if the value of the field is ENCODER_MODE_3

pub fn is_reset_mode(&self) -> bool[src]

Checks if the value of the field is RESET_MODE

pub fn is_gated_mode(&self) -> bool[src]

Checks if the value of the field is GATED_MODE

pub fn is_trigger_mode(&self) -> bool[src]

Checks if the value of the field is TRIGGER_MODE

pub fn is_ext_clock_mode(&self) -> bool[src]

Checks if the value of the field is EXT_CLOCK_MODE

impl R<u8, TS_A>[src]

pub fn variant(&self) -> Variant<u8, TS_A>[src]

Get enumerated values variant

pub fn is_itr0(&self) -> bool[src]

Checks if the value of the field is ITR0

pub fn is_itr1(&self) -> bool[src]

Checks if the value of the field is ITR1

pub fn is_itr2(&self) -> bool[src]

Checks if the value of the field is ITR2

pub fn is_ti1f_ed(&self) -> bool[src]

Checks if the value of the field is TI1F_ED

pub fn is_ti1fp1(&self) -> bool[src]

Checks if the value of the field is TI1FP1

pub fn is_ti2fp2(&self) -> bool[src]

Checks if the value of the field is TI2FP2

pub fn is_etrf(&self) -> bool[src]

Checks if the value of the field is ETRF

impl R<bool, MSM_A>[src]

pub fn variant(&self) -> MSM_A[src]

Get enumerated values variant

pub fn is_no_sync(&self) -> bool[src]

Checks if the value of the field is NOSYNC

pub fn is_sync(&self) -> bool[src]

Checks if the value of the field is SYNC

impl R<u8, ETF_A>[src]

pub fn variant(&self) -> ETF_A[src]

Get enumerated values variant

pub fn is_no_filter(&self) -> bool[src]

Checks if the value of the field is NOFILTER

pub fn is_fck_int_n2(&self) -> bool[src]

Checks if the value of the field is FCK_INT_N2

pub fn is_fck_int_n4(&self) -> bool[src]

Checks if the value of the field is FCK_INT_N4

pub fn is_fck_int_n8(&self) -> bool[src]

Checks if the value of the field is FCK_INT_N8

pub fn is_fdts_div2_n6(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV2_N6

pub fn is_fdts_div2_n8(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV2_N8

pub fn is_fdts_div4_n6(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV4_N6

pub fn is_fdts_div4_n8(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV4_N8

pub fn is_fdts_div8_n6(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV8_N6

pub fn is_fdts_div8_n8(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV8_N8

pub fn is_fdts_div16_n5(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV16_N5

pub fn is_fdts_div16_n6(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV16_N6

pub fn is_fdts_div16_n8(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV16_N8

pub fn is_fdts_div32_n5(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV32_N5

pub fn is_fdts_div32_n6(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV32_N6

pub fn is_fdts_div32_n8(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV32_N8

impl R<u8, ETPS_A>[src]

pub fn variant(&self) -> ETPS_A[src]

Get enumerated values variant

pub fn is_div1(&self) -> bool[src]

Checks if the value of the field is DIV1

pub fn is_div2(&self) -> bool[src]

Checks if the value of the field is DIV2

pub fn is_div4(&self) -> bool[src]

Checks if the value of the field is DIV4

pub fn is_div8(&self) -> bool[src]

Checks if the value of the field is DIV8

impl R<bool, ECE_A>[src]

pub fn variant(&self) -> ECE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, ETP_A>[src]

pub fn variant(&self) -> ETP_A[src]

Get enumerated values variant

pub fn is_not_inverted(&self) -> bool[src]

Checks if the value of the field is NOTINVERTED

pub fn is_inverted(&self) -> bool[src]

Checks if the value of the field is INVERTED

impl R<u32, Reg<u32, _SMCR>>[src]

pub fn sms(&self) -> SMS_R[src]

Bits 0:2 - Slave mode selection

pub fn occs(&self) -> OCCS_R[src]

Bit 3 - OCREF clear selection

pub fn ts(&self) -> TS_R[src]

Bits 4:6 - Trigger selection

pub fn msm(&self) -> MSM_R[src]

Bit 7 - Master/Slave mode

pub fn etf(&self) -> ETF_R[src]

Bits 8:11 - External trigger filter

pub fn etps(&self) -> ETPS_R[src]

Bits 12:13 - External trigger prescaler

pub fn ece(&self) -> ECE_R[src]

Bit 14 - External clock enable

pub fn etp(&self) -> ETP_R[src]

Bit 15 - External trigger polarity

pub fn sms3(&self) -> SMS3_R[src]

Bit 16 - Slave mode selection bit 3

impl R<bool, TDE_A>[src]

pub fn variant(&self) -> TDE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, CC4DE_A>[src]

pub fn variant(&self) -> CC4DE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, UDE_A>[src]

pub fn variant(&self) -> UDE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, TIE_A>[src]

pub fn variant(&self) -> TIE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, CC4IE_A>[src]

pub fn variant(&self) -> CC4IE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, UIE_A>[src]

pub fn variant(&self) -> UIE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u32, Reg<u32, _DIER>>[src]

pub fn tde(&self) -> TDE_R[src]

Bit 14 - Trigger DMA request enable

pub fn comde(&self) -> COMDE_R[src]

Bit 13 - COM DMA request enable

pub fn cc4de(&self) -> CC4DE_R[src]

Bit 12 - Capture/Compare 4 DMA request enable

pub fn cc3de(&self) -> CC3DE_R[src]

Bit 11 - Capture/Compare 3 DMA request enable

pub fn cc2de(&self) -> CC2DE_R[src]

Bit 10 - Capture/Compare 2 DMA request enable

pub fn cc1de(&self) -> CC1DE_R[src]

Bit 9 - Capture/Compare 1 DMA request enable

pub fn ude(&self) -> UDE_R[src]

Bit 8 - Update DMA request enable

pub fn bie(&self) -> BIE_R[src]

Bit 7 - Break interrupt enable

pub fn tie(&self) -> TIE_R[src]

Bit 6 - Trigger interrupt enable

pub fn comie(&self) -> COMIE_R[src]

Bit 5 - COM interrupt enable

pub fn cc4ie(&self) -> CC4IE_R[src]

Bit 4 - Capture/Compare 4 interrupt enable

pub fn cc3ie(&self) -> CC3IE_R[src]

Bit 3 - Capture/Compare 3 interrupt enable

pub fn cc2ie(&self) -> CC2IE_R[src]

Bit 2 - Capture/Compare 2 interrupt enable

pub fn cc1ie(&self) -> CC1IE_R[src]

Bit 1 - Capture/Compare 1 interrupt enable

pub fn uie(&self) -> UIE_R[src]

Bit 0 - Update interrupt enable

impl R<bool, UIF_A>[src]

pub fn variant(&self) -> UIF_A[src]

Get enumerated values variant

pub fn is_clear(&self) -> bool[src]

Checks if the value of the field is CLEAR

pub fn is_update_pending(&self) -> bool[src]

Checks if the value of the field is UPDATEPENDING

impl R<bool, CC1IF_A>[src]

pub fn variant(&self) -> Variant<bool, CC1IF_A>[src]

Get enumerated values variant

pub fn is_match_(&self) -> bool[src]

Checks if the value of the field is MATCH

impl R<bool, TIF_A>[src]

pub fn variant(&self) -> TIF_A[src]

Get enumerated values variant

pub fn is_no_trigger(&self) -> bool[src]

Checks if the value of the field is NOTRIGGER

pub fn is_trigger(&self) -> bool[src]

Checks if the value of the field is TRIGGER

impl R<bool, CC1OF_A>[src]

pub fn variant(&self) -> Variant<bool, CC1OF_A>[src]

Get enumerated values variant

pub fn is_overcapture(&self) -> bool[src]

Checks if the value of the field is OVERCAPTURE

impl R<u32, Reg<u32, _SR>>[src]

pub fn uif(&self) -> UIF_R[src]

Bit 0 - Update interrupt flag

pub fn cc1if(&self) -> CC1IF_R[src]

Bit 1 - Capture/compare 1 interrupt flag

pub fn cc2if(&self) -> CC2IF_R[src]

Bit 2 - Capture/Compare 2 interrupt flag

pub fn cc3if(&self) -> CC3IF_R[src]

Bit 3 - Capture/Compare 3 interrupt flag

pub fn cc4if(&self) -> CC4IF_R[src]

Bit 4 - Capture/Compare 4 interrupt flag

pub fn comif(&self) -> COMIF_R[src]

Bit 5 - COM interrupt flag

pub fn tif(&self) -> TIF_R[src]

Bit 6 - Trigger interrupt flag

pub fn bif(&self) -> BIF_R[src]

Bit 7 - Break interrupt flag

pub fn b2if(&self) -> B2IF_R[src]

Bit 8 - Break 2 interrupt flag

pub fn cc1of(&self) -> CC1OF_R[src]

Bit 9 - Capture/Compare 1 overcapture flag

pub fn cc2of(&self) -> CC2OF_R[src]

Bit 10 - Capture/compare 2 overcapture flag

pub fn cc3of(&self) -> CC3OF_R[src]

Bit 11 - Capture/Compare 3 overcapture flag

pub fn cc4of(&self) -> CC4OF_R[src]

Bit 12 - Capture/Compare 4 overcapture flag

pub fn c5if(&self) -> C5IF_R[src]

Bit 16 - Capture/Compare 5 interrupt flag

pub fn c6if(&self) -> C6IF_R[src]

Bit 17 - Capture/Compare 6 interrupt flag

impl R<u8, OC2M_A>[src]

pub fn variant(&self) -> OC2M_A[src]

Get enumerated values variant

pub fn is_frozen(&self) -> bool[src]

Checks if the value of the field is FROZEN

pub fn is_active_on_match(&self) -> bool[src]

Checks if the value of the field is ACTIVEONMATCH

pub fn is_inactive_on_match(&self) -> bool[src]

Checks if the value of the field is INACTIVEONMATCH

pub fn is_toggle(&self) -> bool[src]

Checks if the value of the field is TOGGLE

pub fn is_force_inactive(&self) -> bool[src]

Checks if the value of the field is FORCEINACTIVE

pub fn is_force_active(&self) -> bool[src]

Checks if the value of the field is FORCEACTIVE

pub fn is_pwm_mode1(&self) -> bool[src]

Checks if the value of the field is PWMMODE1

pub fn is_pwm_mode2(&self) -> bool[src]

Checks if the value of the field is PWMMODE2

impl R<bool, OC2PE_A>[src]

pub fn variant(&self) -> OC2PE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u8, CC2S_A>[src]

pub fn variant(&self) -> Variant<u8, CC2S_A>[src]

Get enumerated values variant

pub fn is_output(&self) -> bool[src]

Checks if the value of the field is OUTPUT

impl R<bool, OC1PE_A>[src]

pub fn variant(&self) -> OC1PE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u8, CC1S_A>[src]

pub fn variant(&self) -> Variant<u8, CC1S_A>[src]

Get enumerated values variant

pub fn is_output(&self) -> bool[src]

Checks if the value of the field is OUTPUT

impl R<u32, Reg<u32, _CCMR1_OUTPUT>>[src]

pub fn oc2ce(&self) -> OC2CE_R[src]

Bit 15 - Output Compare 2 clear enable

pub fn oc2m(&self) -> OC2M_R[src]

Bits 12:14 - Output Compare 2 mode

pub fn oc2pe(&self) -> OC2PE_R[src]

Bit 11 - Output Compare 2 preload enable

pub fn oc2fe(&self) -> OC2FE_R[src]

Bit 10 - Output Compare 2 fast enable

pub fn cc2s(&self) -> CC2S_R[src]

Bits 8:9 - Capture/Compare 2 selection

pub fn oc1ce(&self) -> OC1CE_R[src]

Bit 7 - Output Compare 1 clear enable

pub fn oc1m(&self) -> OC1M_R[src]

Bits 4:6 - Output Compare 1 mode

pub fn oc1pe(&self) -> OC1PE_R[src]

Bit 3 - Output Compare 1 preload enable

pub fn oc1fe(&self) -> OC1FE_R[src]

Bit 2 - Output Compare 1 fast enable

pub fn cc1s(&self) -> CC1S_R[src]

Bits 0:1 - Capture/Compare 1 selection

pub fn oc1m_3(&self) -> OC1M_3_R[src]

Bit 16 - Output Compare 1 mode bit 3

pub fn oc2m_3(&self) -> OC2M_3_R[src]

Bit 24 - Output Compare 2 mode bit 3

impl R<u8, CC2S_A>[src]

pub fn variant(&self) -> Variant<u8, CC2S_A>[src]

Get enumerated values variant

pub fn is_ti2(&self) -> bool[src]

Checks if the value of the field is TI2

pub fn is_ti1(&self) -> bool[src]

Checks if the value of the field is TI1

pub fn is_trc(&self) -> bool[src]

Checks if the value of the field is TRC

impl R<u8, IC1F_A>[src]

pub fn variant(&self) -> IC1F_A[src]

Get enumerated values variant

pub fn is_no_filter(&self) -> bool[src]

Checks if the value of the field is NOFILTER

pub fn is_fck_int_n2(&self) -> bool[src]

Checks if the value of the field is FCK_INT_N2

pub fn is_fck_int_n4(&self) -> bool[src]

Checks if the value of the field is FCK_INT_N4

pub fn is_fck_int_n8(&self) -> bool[src]

Checks if the value of the field is FCK_INT_N8

pub fn is_fdts_div2_n6(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV2_N6

pub fn is_fdts_div2_n8(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV2_N8

pub fn is_fdts_div4_n6(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV4_N6

pub fn is_fdts_div4_n8(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV4_N8

pub fn is_fdts_div8_n6(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV8_N6

pub fn is_fdts_div8_n8(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV8_N8

pub fn is_fdts_div16_n5(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV16_N5

pub fn is_fdts_div16_n6(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV16_N6

pub fn is_fdts_div16_n8(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV16_N8

pub fn is_fdts_div32_n5(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV32_N5

pub fn is_fdts_div32_n6(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV32_N6

pub fn is_fdts_div32_n8(&self) -> bool[src]

Checks if the value of the field is FDTS_DIV32_N8

impl R<u8, CC1S_A>[src]

pub fn variant(&self) -> Variant<u8, CC1S_A>[src]

Get enumerated values variant

pub fn is_ti1(&self) -> bool[src]

Checks if the value of the field is TI1

pub fn is_ti2(&self) -> bool[src]

Checks if the value of the field is TI2

pub fn is_trc(&self) -> bool[src]

Checks if the value of the field is TRC

impl R<u32, Reg<u32, _CCMR1_INPUT>>[src]

pub fn ic2f(&self) -> IC2F_R[src]

Bits 12:15 - Input capture 2 filter

pub fn ic2psc(&self) -> IC2PSC_R[src]

Bits 10:11 - Input capture 2 prescaler

pub fn cc2s(&self) -> CC2S_R[src]

Bits 8:9 - Capture/Compare 2 selection

pub fn ic1f(&self) -> IC1F_R[src]

Bits 4:7 - Input capture 1 filter

pub fn ic1psc(&self) -> IC1PSC_R[src]

Bits 2:3 - Input capture 1 prescaler

pub fn cc1s(&self) -> CC1S_R[src]

Bits 0:1 - Capture/Compare 1 selection

impl R<u8, OC4M_A>[src]

pub fn variant(&self) -> OC4M_A[src]

Get enumerated values variant

pub fn is_frozen(&self) -> bool[src]

Checks if the value of the field is FROZEN

pub fn is_active_on_match(&self) -> bool[src]

Checks if the value of the field is ACTIVEONMATCH

pub fn is_inactive_on_match(&self) -> bool[src]

Checks if the value of the field is INACTIVEONMATCH

pub fn is_toggle(&self) -> bool[src]

Checks if the value of the field is TOGGLE

pub fn is_force_inactive(&self) -> bool[src]

Checks if the value of the field is FORCEINACTIVE

pub fn is_force_active(&self) -> bool[src]

Checks if the value of the field is FORCEACTIVE

pub fn is_pwm_mode1(&self) -> bool[src]

Checks if the value of the field is PWMMODE1

pub fn is_pwm_mode2(&self) -> bool[src]

Checks if the value of the field is PWMMODE2

impl R<bool, OC4PE_A>[src]

pub fn variant(&self) -> OC4PE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u8, CC4S_A>[src]

pub fn variant(&self) -> Variant<u8, CC4S_A>[src]

Get enumerated values variant

pub fn is_output(&self) -> bool[src]

Checks if the value of the field is OUTPUT

impl R<bool, OC3PE_A>[src]

pub fn variant(&self) -> OC3PE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u8, CC3S_A>[src]

pub fn variant(&self) -> Variant<u8, CC3S_A>[src]

Get enumerated values variant

pub fn is_output(&self) -> bool[src]

Checks if the value of the field is OUTPUT

impl R<u32, Reg<u32, _CCMR2_OUTPUT>>[src]

pub fn oc4ce(&self) -> OC4CE_R[src]

Bit 15 - Output compare 4 clear enable

pub fn oc4m(&self) -> OC4M_R[src]

Bits 12:14 - Output compare 4 mode

pub fn oc4pe(&self) -> OC4PE_R[src]

Bit 11 - Output compare 4 preload enable

pub fn oc4fe(&self) -> OC4FE_R[src]

Bit 10 - Output compare 4 fast enable

pub fn cc4s(&self) -> CC4S_R[src]

Bits 8:9 - Capture/Compare 4 selection

pub fn oc3ce(&self) -> OC3CE_R[src]

Bit 7 - Output compare 3 clear enable

pub fn oc3m(&self) -> OC3M_R[src]

Bits 4:6 - Output compare 3 mode

pub fn oc3pe(&self) -> OC3PE_R[src]

Bit 3 - Output compare 3 preload enable

pub fn oc3fe(&self) -> OC3FE_R[src]

Bit 2 - Output compare 3 fast enable

pub fn cc3s(&self) -> CC3S_R[src]

Bits 0:1 - Capture/Compare 3 selection

pub fn oc3m_3(&self) -> OC3M_3_R[src]

Bit 16 - Output Compare 3 mode bit 3

pub fn oc4m_3(&self) -> OC4M_3_R[src]

Bit 24 - Output Compare 4 mode bit 3

impl R<u8, CC4S_A>[src]

pub fn variant(&self) -> Variant<u8, CC4S_A>[src]

Get enumerated values variant

pub fn is_ti4(&self) -> bool[src]

Checks if the value of the field is TI4

pub fn is_ti3(&self) -> bool[src]

Checks if the value of the field is TI3

pub fn is_trc(&self) -> bool[src]

Checks if the value of the field is TRC

impl R<u8, CC3S_A>[src]

pub fn variant(&self) -> Variant<u8, CC3S_A>[src]

Get enumerated values variant

pub fn is_ti3(&self) -> bool[src]

Checks if the value of the field is TI3

pub fn is_ti4(&self) -> bool[src]

Checks if the value of the field is TI4

pub fn is_trc(&self) -> bool[src]

Checks if the value of the field is TRC

impl R<u32, Reg<u32, _CCMR2_INPUT>>[src]

pub fn ic4f(&self) -> IC4F_R[src]

Bits 12:15 - Input capture 4 filter

pub fn ic4psc(&self) -> IC4PSC_R[src]

Bits 10:11 - Input capture 4 prescaler

pub fn cc4s(&self) -> CC4S_R[src]

Bits 8:9 - Capture/Compare 4 selection

pub fn ic3f(&self) -> IC3F_R[src]

Bits 4:7 - Input capture 3 filter

pub fn ic3psc(&self) -> IC3PSC_R[src]

Bits 2:3 - Input capture 3 prescaler

pub fn cc3s(&self) -> CC3S_R[src]

Bits 0:1 - Capture/compare 3 selection

impl R<u32, Reg<u32, _CCER>>[src]

pub fn cc1e(&self) -> CC1E_R[src]

Bit 0 - Capture/Compare 1 output enable

pub fn cc1p(&self) -> CC1P_R[src]

Bit 1 - Capture/Compare 1 output Polarity

pub fn cc1ne(&self) -> CC1NE_R[src]

Bit 2 - Capture/Compare 1 complementary output enable

pub fn cc1np(&self) -> CC1NP_R[src]

Bit 3 - Capture/Compare 1 output Polarity

pub fn cc2e(&self) -> CC2E_R[src]

Bit 4 - Capture/Compare 2 output enable

pub fn cc2p(&self) -> CC2P_R[src]

Bit 5 - Capture/Compare 2 output Polarity

pub fn cc2ne(&self) -> CC2NE_R[src]

Bit 6 - Capture/Compare 2 complementary output enable

pub fn cc2np(&self) -> CC2NP_R[src]

Bit 7 - Capture/Compare 2 output Polarity

pub fn cc3e(&self) -> CC3E_R[src]

Bit 8 - Capture/Compare 3 output enable

pub fn cc3p(&self) -> CC3P_R[src]

Bit 9 - Capture/Compare 3 output Polarity

pub fn cc3ne(&self) -> CC3NE_R[src]

Bit 10 - Capture/Compare 3 complementary output enable

pub fn cc3np(&self) -> CC3NP_R[src]

Bit 11 - Capture/Compare 3 output Polarity

pub fn cc4e(&self) -> CC4E_R[src]

Bit 12 - Capture/Compare 4 output enable

pub fn cc4p(&self) -> CC4P_R[src]

Bit 13 - Capture/Compare 3 output Polarity

pub fn cc4np(&self) -> CC4NP_R[src]

Bit 15 - Capture/Compare 4 output Polarity

pub fn cc5e(&self) -> CC5E_R[src]

Bit 16 - Capture/Compare 5 output enable

pub fn cc5p(&self) -> CC5P_R[src]

Bit 17 - Capture/Compare 5 output Polarity

pub fn cc6e(&self) -> CC6E_R[src]

Bit 20 - Capture/Compare 6 output enable

pub fn cc6p(&self) -> CC6P_R[src]

Bit 21 - Capture/Compare 6 output Polarity

impl R<u32, Reg<u32, _CNT>>[src]

pub fn cnt(&self) -> CNT_R[src]

Bits 0:15 - counter value

pub fn uifcpy(&self) -> UIFCPY_R[src]

Bit 31 - UIF copy

impl R<u32, Reg<u32, _PSC>>[src]

pub fn psc(&self) -> PSC_R[src]

Bits 0:15 - Prescaler value

impl R<u32, Reg<u32, _ARR>>[src]

pub fn arr(&self) -> ARR_R[src]

Bits 0:15 - Auto-reload value

impl R<u32, Reg<u32, _RCR>>[src]

pub fn rep(&self) -> REP_R[src]

Bits 0:15 - Repetition counter value

impl R<u32, Reg<u32, _CCR>>[src]

pub fn ccr(&self) -> CCR_R[src]

Bits 0:15 - Capture/Compare 1 value

impl R<bool, OSSI_A>[src]

pub fn variant(&self) -> OSSI_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_idle_level(&self) -> bool[src]

Checks if the value of the field is IDLELEVEL

impl R<bool, OSSR_A>[src]

pub fn variant(&self) -> OSSR_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_idle_level(&self) -> bool[src]

Checks if the value of the field is IDLELEVEL

impl R<bool, MOE_A>[src]

pub fn variant(&self) -> MOE_A[src]

Get enumerated values variant

pub fn is_disabled_idle(&self) -> bool[src]

Checks if the value of the field is DISABLEDIDLE

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u32, Reg<u32, _BDTR>>[src]

pub fn dtg(&self) -> DTG_R[src]

Bits 0:7 - Dead-time generator setup

pub fn lock(&self) -> LOCK_R[src]

Bits 8:9 - Lock configuration

pub fn ossi(&self) -> OSSI_R[src]

Bit 10 - Off-state selection for Idle mode

pub fn ossr(&self) -> OSSR_R[src]

Bit 11 - Off-state selection for Run mode

pub fn bke(&self) -> BKE_R[src]

Bit 12 - Break enable

pub fn bkp(&self) -> BKP_R[src]

Bit 13 - Break polarity

pub fn aoe(&self) -> AOE_R[src]

Bit 14 - Automatic output enable

pub fn moe(&self) -> MOE_R[src]

Bit 15 - Main output enable

pub fn bkf(&self) -> BKF_R[src]

Bits 16:19 - Break filter

pub fn bk2f(&self) -> BK2F_R[src]

Bits 20:23 - Break 2 filter

pub fn bk2e(&self) -> BK2E_R[src]

Bit 24 - Break 2 enable

pub fn bk2p(&self) -> BK2P_R[src]

Bit 25 - Break 2 polarity

impl R<u32, Reg<u32, _DCR>>[src]

pub fn dbl(&self) -> DBL_R[src]

Bits 8:12 - DMA burst length

pub fn dba(&self) -> DBA_R[src]

Bits 0:4 - DMA base address

impl R<u32, Reg<u32, _DMAR>>[src]

pub fn dmab(&self) -> DMAB_R[src]

Bits 0:15 - DMA register for burst accesses

impl R<u32, Reg<u32, _CCMR3_OUTPUT>>[src]

pub fn oc5fe(&self) -> OC5FE_R[src]

Bit 2 - Output compare 5 fast enable

pub fn oc5pe(&self) -> OC5PE_R[src]

Bit 3 - Output compare 5 preload enable

pub fn oc5m(&self) -> OC5M_R[src]

Bits 4:6 - Output compare 5 mode

pub fn oc5ce(&self) -> OC5CE_R[src]

Bit 7 - Output compare 5 clear enable

pub fn oc6fe(&self) -> OC6FE_R[src]

Bit 10 - Output compare 6 fast enable

pub fn oc6pe(&self) -> OC6PE_R[src]

Bit 11 - Output compare 6 preload enable

pub fn oc6m(&self) -> OC6M_R[src]

Bits 12:14 - Output compare 6 mode

pub fn oc6ce(&self) -> OC6CE_R[src]

Bit 15 - Output compare 6 clear enable

pub fn oc5m_3(&self) -> OC5M_3_R[src]

Bit 16 - Outout Compare 5 mode bit 3

pub fn oc6m_3(&self) -> OC6M_3_R[src]

Bit 24 - Outout Compare 6 mode bit 3

impl R<u32, Reg<u32, _CCR5>>[src]

pub fn ccr(&self) -> CCR_R[src]

Bits 0:15 - Capture/Compare 5 value

pub fn gc5c1(&self) -> GC5C1_R[src]

Bit 29 - Group Channel 5 and Channel 1

pub fn gc5c2(&self) -> GC5C2_R[src]

Bit 30 - Group Channel 5 and Channel 2

pub fn gc5c3(&self) -> GC5C3_R[src]

Bit 31 - Group Channel 5 and Channel 3

impl R<u32, Reg<u32, _CCR6>>[src]

pub fn ccr(&self) -> CCR_R[src]

Bits 0:15 - Capture/Compare 6 value

impl R<u32, Reg<u32, _OR>>[src]

pub fn tim1_etr_adc1_rmp(&self) -> TIM1_ETR_ADC1_RMP_R[src]

Bits 0:1 - TIM1_ETR_ADC1 remapping capability

pub fn tim1_etr_adc4_rmp(&self) -> TIM1_ETR_ADC4_RMP_R[src]

Bits 2:3 - TIM1_ETR_ADC4 remapping capability

impl R<u32, Reg<u32, _CFGR1>>[src]

pub fn mem_mode(&self) -> MEM_MODE_R[src]

Bits 0:2 - Memory mapping selection bits

pub fn usb_it_rmp(&self) -> USB_IT_RMP_R[src]

Bit 5 - USB interrupt remap

pub fn tim1_itr3_rmp(&self) -> TIM1_ITR3_RMP_R[src]

Bit 6 - Timer 1 ITR3 selection

pub fn dac_trig_rmp(&self) -> DAC_TRIG_RMP_R[src]

Bit 7 - DAC trigger remap (when TSEL = 001)

pub fn adc24_dma_rmp(&self) -> ADC24_DMA_RMP_R[src]

Bit 8 - ADC24 DMA remapping bit

pub fn tim16_dma_rmp(&self) -> TIM16_DMA_RMP_R[src]

Bit 11 - TIM16 DMA request remapping bit

pub fn tim17_dma_rmp(&self) -> TIM17_DMA_RMP_R[src]

Bit 12 - TIM17 DMA request remapping bit

pub fn tim6_dac1_dma_rmp(&self) -> TIM6_DAC1_DMA_RMP_R[src]

Bit 13 - TIM6 and DAC1 DMA request remapping bit

pub fn tim7_dac2_dma_rmp(&self) -> TIM7_DAC2_DMA_RMP_R[src]

Bit 14 - TIM7 and DAC2 DMA request remapping bit

pub fn i2c_pb6_fmp(&self) -> I2C_PB6_FMP_R[src]

Bit 16 - Fast Mode Plus (FM+) driving capability activation bits.

pub fn i2c_pb7_fmp(&self) -> I2C_PB7_FMP_R[src]

Bit 17 - Fast Mode Plus (FM+) driving capability activation bits.

pub fn i2c_pb8_fmp(&self) -> I2C_PB8_FMP_R[src]

Bit 18 - Fast Mode Plus (FM+) driving capability activation bits.

pub fn i2c_pb9_fmp(&self) -> I2C_PB9_FMP_R[src]

Bit 19 - Fast Mode Plus (FM+) driving capability activation bits.

pub fn i2c1_fmp(&self) -> I2C1_FMP_R[src]

Bit 20 - I2C1 Fast Mode Plus

pub fn i2c2_fmp(&self) -> I2C2_FMP_R[src]

Bit 21 - I2C2 Fast Mode Plus

pub fn encoder_mode(&self) -> ENCODER_MODE_R[src]

Bits 22:23 - Encoder mode

pub fn fpu_ie(&self) -> FPU_IE_R[src]

Bits 26:31 - Interrupt enable bits from FPU

pub fn dac2_ch1_dma_rmp(&self) -> DAC2_CH1_DMA_RMP_R[src]

Bit 15 - DAC2 channel1 DMA remap

pub fn i2c3_fmp(&self) -> I2C3_FMP_R[src]

Bit 24 - I2C3 Fast Mode Plus

impl R<u32, Reg<u32, _EXTICR1>>[src]

pub fn exti3(&self) -> EXTI3_R[src]

Bits 12:15 - EXTI 3 configuration bits

pub fn exti2(&self) -> EXTI2_R[src]

Bits 8:11 - EXTI 2 configuration bits

pub fn exti1(&self) -> EXTI1_R[src]

Bits 4:7 - EXTI 1 configuration bits

pub fn exti0(&self) -> EXTI0_R[src]

Bits 0:3 - EXTI 0 configuration bits

impl R<u32, Reg<u32, _EXTICR2>>[src]

pub fn exti7(&self) -> EXTI7_R[src]

Bits 12:15 - EXTI 7 configuration bits

pub fn exti6(&self) -> EXTI6_R[src]

Bits 8:11 - EXTI 6 configuration bits

pub fn exti5(&self) -> EXTI5_R[src]

Bits 4:7 - EXTI 5 configuration bits

pub fn exti4(&self) -> EXTI4_R[src]

Bits 0:3 - EXTI 4 configuration bits

impl R<u32, Reg<u32, _EXTICR3>>[src]

pub fn exti11(&self) -> EXTI11_R[src]

Bits 12:15 - EXTI 11 configuration bits

pub fn exti10(&self) -> EXTI10_R[src]

Bits 8:11 - EXTI 10 configuration bits

pub fn exti9(&self) -> EXTI9_R[src]

Bits 4:7 - EXTI 9 configuration bits

pub fn exti8(&self) -> EXTI8_R[src]

Bits 0:3 - EXTI 8 configuration bits

impl R<u32, Reg<u32, _EXTICR4>>[src]

pub fn exti15(&self) -> EXTI15_R[src]

Bits 12:15 - EXTI 15 configuration bits

pub fn exti14(&self) -> EXTI14_R[src]

Bits 8:11 - EXTI 14 configuration bits

pub fn exti13(&self) -> EXTI13_R[src]

Bits 4:7 - EXTI 13 configuration bits

pub fn exti12(&self) -> EXTI12_R[src]

Bits 0:3 - EXTI 12 configuration bits

impl R<u32, Reg<u32, _CFGR2>>[src]

pub fn lockup_lock(&self) -> LOCKUP_LOCK_R[src]

Bit 0 - Cortex-M0 LOCKUP bit enable bit

pub fn sram_parity_lock(&self) -> SRAM_PARITY_LOCK_R[src]

Bit 1 - SRAM parity lock bit

pub fn pvd_lock(&self) -> PVD_LOCK_R[src]

Bit 2 - PVD lock enable bit

pub fn byp_addr_par(&self) -> BYP_ADDR_PAR_R[src]

Bit 4 - Bypass address bit 29 in parity calculation

pub fn sram_pef(&self) -> SRAM_PEF_R[src]

Bit 8 - SRAM parity flag

impl R<u32, Reg<u32, _RCR>>[src]

pub fn page0_wp(&self) -> PAGE0_WP_R[src]

Bit 0 - CCM SRAM page write protection bit

pub fn page1_wp(&self) -> PAGE1_WP_R[src]

Bit 1 - CCM SRAM page write protection bit

pub fn page2_wp(&self) -> PAGE2_WP_R[src]

Bit 2 - CCM SRAM page write protection bit

pub fn page3_wp(&self) -> PAGE3_WP_R[src]

Bit 3 - CCM SRAM page write protection bit

pub fn page4_wp(&self) -> PAGE4_WP_R[src]

Bit 4 - CCM SRAM page write protection bit

pub fn page5_wp(&self) -> PAGE5_WP_R[src]

Bit 5 - CCM SRAM page write protection bit

pub fn page6_wp(&self) -> PAGE6_WP_R[src]

Bit 6 - CCM SRAM page write protection bit

pub fn page7_wp(&self) -> PAGE7_WP_R[src]

Bit 7 - CCM SRAM page write protection bit

pub fn page8_wp(&self) -> PAGE8_WP_R[src]

Bit 8 - CCM SRAM page write protection bit

pub fn page9_wp(&self) -> PAGE9_WP_R[src]

Bit 9 - CCM SRAM page write protection bit

pub fn page10_wp(&self) -> PAGE10_WP_R[src]

Bit 10 - CCM SRAM page write protection bit

pub fn page11_wp(&self) -> PAGE11_WP_R[src]

Bit 11 - CCM SRAM page write protection bit

pub fn page12_wp(&self) -> PAGE12_WP_R[src]

Bit 12 - CCM SRAM page write protection bit

pub fn page13_wp(&self) -> PAGE13_WP_R[src]

Bit 13 - CCM SRAM page write protection bit

pub fn page14_wp(&self) -> PAGE14_WP_R[src]

Bit 14 - CCM SRAM page write protection bit

pub fn page15_wp(&self) -> PAGE15_WP_R[src]

Bit 15 - CCM SRAM page write protection bit

impl R<u32, Reg<u32, _CFGR3>>[src]

pub fn i2c1_rx_dma_rmp(&self) -> I2C1_RX_DMA_RMP_R[src]

Bits 4:5 - I2C1_RX DMA remapping bit

pub fn spi1_tx_dma_rmp(&self) -> SPI1_TX_DMA_RMP_R[src]

Bits 2:3 - SPI1_TX DMA remapping bit

pub fn spi1_rx_dma_rmp(&self) -> SPI1_RX_DMA_RMP_R[src]

Bits 0:1 - SPI1_RX DMA remapping bit

pub fn i2c1_tx_dma_rmp(&self) -> I2C1_TX_DMA_RMP_R[src]

Bits 6:7 - I2C1_TX DMA remapping bit

pub fn adc2_dma_rmp(&self) -> ADC2_DMA_RMP_R[src]

Bits 8:9 - ADC2 DMA remapping bit

impl R<u32, Reg<u32, _CFGR4>>[src]

pub fn adc12_ext2_rmp(&self) -> ADC12_EXT2_RMP_R[src]

Bit 0 - Controls the Input trigger of ADC12 regular channel EXT2

pub fn adc12_ext3_rmp(&self) -> ADC12_EXT3_RMP_R[src]

Bit 1 - Controls the Input trigger of ADC12 regular channel EXT3

pub fn adc12_ext5_rmp(&self) -> ADC12_EXT5_RMP_R[src]

Bit 2 - Controls the Input trigger of ADC12 regular channel EXT5

pub fn adc12_ext13_rmp(&self) -> ADC12_EXT13_RMP_R[src]

Bit 3 - Controls the Input trigger of ADC12 regular channel EXT13

pub fn adc12_ext15_rmp(&self) -> ADC12_EXT15_RMP_R[src]

Bit 4 - Controls the Input trigger of ADC12 regular channel EXT15

pub fn adc12_jext3_rmp(&self) -> ADC12_JEXT3_RMP_R[src]

Bit 5 - Controls the Input trigger of ADC12 injected channel JEXT3

pub fn adc12_jext6_rmp(&self) -> ADC12_JEXT6_RMP_R[src]

Bit 6 - Controls the Input trigger of ADC12 injected channel JEXT6

pub fn adc12_jext13_rmp(&self) -> ADC12_JEXT13_RMP_R[src]

Bit 7 - Controls the Input trigger of ADC12 injected channel JEXT13

pub fn adc34_ext5_rmp(&self) -> ADC34_EXT5_RMP_R[src]

Bit 8 - Controls the Input trigger of ADC34 regular channel EXT5

pub fn adc34_ext6_rmp(&self) -> ADC34_EXT6_RMP_R[src]

Bit 9 - Controls the Input trigger of ADC34 regular channel EXT6

pub fn adc34_ext15_rmp(&self) -> ADC34_EXT15_RMP_R[src]

Bit 10 - Controls the Input trigger of ADC34 regular channel EXT15

pub fn adc34_jext5_rmp(&self) -> ADC34_JEXT5_RMP_R[src]

Bit 11 - Controls the Input trigger of ADC34 injected channel JEXT5

pub fn adc34_jext11_rmp(&self) -> ADC34_JEXT11_RMP_R[src]

Bit 12 - Controls the Input trigger of ADC34 injected channel JEXT11

pub fn adc34_jext14_rmp(&self) -> ADC34_JEXT14_RMP_R[src]

Bit 13 - Controls the Input trigger of ADC34 injected channel JEXT14

impl R<u32, Reg<u32, _FPCCR>>[src]

pub fn lspact(&self) -> LSPACT_R[src]

Bit 0 - LSPACT

pub fn user(&self) -> USER_R[src]

Bit 1 - USER

pub fn thread(&self) -> THREAD_R[src]

Bit 3 - THREAD

pub fn hfrdy(&self) -> HFRDY_R[src]

Bit 4 - HFRDY

pub fn mmrdy(&self) -> MMRDY_R[src]

Bit 5 - MMRDY

pub fn bfrdy(&self) -> BFRDY_R[src]

Bit 6 - BFRDY

pub fn monrdy(&self) -> MONRDY_R[src]

Bit 8 - MONRDY

pub fn lspen(&self) -> LSPEN_R[src]

Bit 30 - LSPEN

pub fn aspen(&self) -> ASPEN_R[src]

Bit 31 - ASPEN

impl R<u32, Reg<u32, _FPCAR>>[src]

pub fn address(&self) -> ADDRESS_R[src]

Bits 3:31 - Location of unpopulated floating-point

impl R<u32, Reg<u32, _FPSCR>>[src]

pub fn ioc(&self) -> IOC_R[src]

Bit 0 - Invalid operation cumulative exception bit

pub fn dzc(&self) -> DZC_R[src]

Bit 1 - Division by zero cumulative exception bit.

pub fn ofc(&self) -> OFC_R[src]

Bit 2 - Overflow cumulative exception bit

pub fn ufc(&self) -> UFC_R[src]

Bit 3 - Underflow cumulative exception bit

pub fn ixc(&self) -> IXC_R[src]

Bit 4 - Inexact cumulative exception bit

pub fn idc(&self) -> IDC_R[src]

Bit 7 - Input denormal cumulative exception bit.

pub fn rmode(&self) -> RMODE_R[src]

Bits 22:23 - Rounding Mode control field

pub fn fz(&self) -> FZ_R[src]

Bit 24 - Flush-to-zero mode control bit:

pub fn dn(&self) -> DN_R[src]

Bit 25 - Default NaN mode control bit

pub fn ahp(&self) -> AHP_R[src]

Bit 26 - Alternative half-precision control bit

pub fn v(&self) -> V_R[src]

Bit 28 - Overflow condition code flag

pub fn c(&self) -> C_R[src]

Bit 29 - Carry condition code flag

pub fn z(&self) -> Z_R[src]

Bit 30 - Zero condition code flag

pub fn n(&self) -> N_R[src]

Bit 31 - Negative condition code flag

impl R<u32, Reg<u32, _CTRL>>[src]

pub fn enable(&self) -> ENABLE_R[src]

Bit 0 - Counter enable

pub fn tickint(&self) -> TICKINT_R[src]

Bit 1 - SysTick exception request enable

pub fn clksource(&self) -> CLKSOURCE_R[src]

Bit 2 - Clock source selection

pub fn countflag(&self) -> COUNTFLAG_R[src]

Bit 16 - COUNTFLAG

impl R<u32, Reg<u32, _LOAD>>[src]

pub fn reload(&self) -> RELOAD_R[src]

Bits 0:23 - RELOAD value

impl R<u32, Reg<u32, _VAL>>[src]

pub fn current(&self) -> CURRENT_R[src]

Bits 0:23 - Current counter value

impl R<u32, Reg<u32, _CALIB>>[src]

pub fn tenms(&self) -> TENMS_R[src]

Bits 0:23 - Calibration value

pub fn skew(&self) -> SKEW_R[src]

Bit 30 - SKEW flag: Indicates whether the TENMS value is exact

pub fn noref(&self) -> NOREF_R[src]

Bit 31 - NOREF flag. Reads as zero

impl R<u32, Reg<u32, _STIR>>[src]

pub fn intid(&self) -> INTID_R[src]

Bits 0:8 - Software generated interrupt ID

impl R<u32, Reg<u32, _CPACR>>[src]

pub fn cp(&self) -> CP_R[src]

Bits 20:23 - CP

impl R<u32, Reg<u32, _ACTRL>>[src]

pub fn dismcycint(&self) -> DISMCYCINT_R[src]

Bit 0 - DISMCYCINT

pub fn disdefwbuf(&self) -> DISDEFWBUF_R[src]

Bit 1 - DISDEFWBUF

pub fn disfold(&self) -> DISFOLD_R[src]

Bit 2 - DISFOLD

pub fn disfpca(&self) -> DISFPCA_R[src]

Bit 8 - DISFPCA

pub fn disoofp(&self) -> DISOOFP_R[src]

Bit 9 - DISOOFP

impl R<bool, JQOVF_A>[src]

pub fn variant(&self) -> JQOVF_A[src]

Get enumerated values variant

pub fn is_no_overflow(&self) -> bool[src]

Checks if the value of the field is NOOVERFLOW

pub fn is_overflow(&self) -> bool[src]

Checks if the value of the field is OVERFLOW

impl R<bool, AWD3_A>[src]

pub fn variant(&self) -> AWD3_A[src]

Get enumerated values variant

pub fn is_no_event(&self) -> bool[src]

Checks if the value of the field is NOEVENT

pub fn is_event(&self) -> bool[src]

Checks if the value of the field is EVENT

impl R<bool, JEOS_A>[src]

pub fn variant(&self) -> JEOS_A[src]

Get enumerated values variant

pub fn is_not_complete(&self) -> bool[src]

Checks if the value of the field is NOTCOMPLETE

pub fn is_complete(&self) -> bool[src]

Checks if the value of the field is COMPLETE

impl R<bool, JEOC_A>[src]

pub fn variant(&self) -> JEOC_A[src]

Get enumerated values variant

pub fn is_not_complete(&self) -> bool[src]

Checks if the value of the field is NOTCOMPLETE

pub fn is_complete(&self) -> bool[src]

Checks if the value of the field is COMPLETE

impl R<bool, OVR_A>[src]

pub fn variant(&self) -> OVR_A[src]

Get enumerated values variant

pub fn is_no_overrun(&self) -> bool[src]

Checks if the value of the field is NOOVERRUN

pub fn is_overrun(&self) -> bool[src]

Checks if the value of the field is OVERRUN

impl R<bool, EOS_A>[src]

pub fn variant(&self) -> EOS_A[src]

Get enumerated values variant

pub fn is_not_complete(&self) -> bool[src]

Checks if the value of the field is NOTCOMPLETE

pub fn is_complete(&self) -> bool[src]

Checks if the value of the field is COMPLETE

impl R<bool, EOC_A>[src]

pub fn variant(&self) -> EOC_A[src]

Get enumerated values variant

pub fn is_not_complete(&self) -> bool[src]

Checks if the value of the field is NOTCOMPLETE

pub fn is_complete(&self) -> bool[src]

Checks if the value of the field is COMPLETE

impl R<bool, EOSMP_A>[src]

pub fn variant(&self) -> EOSMP_A[src]

Get enumerated values variant

pub fn is_not_ended(&self) -> bool[src]

Checks if the value of the field is NOTENDED

pub fn is_ended(&self) -> bool[src]

Checks if the value of the field is ENDED

impl R<bool, ADRDY_A>[src]

pub fn variant(&self) -> ADRDY_A[src]

Get enumerated values variant

pub fn is_not_ready(&self) -> bool[src]

Checks if the value of the field is NOTREADY

pub fn is_ready(&self) -> bool[src]

Checks if the value of the field is READY

impl R<u32, Reg<u32, _ISR>>[src]

pub fn jqovf(&self) -> JQOVF_R[src]

Bit 10 - JQOVF

pub fn awd3(&self) -> AWD3_R[src]

Bit 9 - AWD3

pub fn awd2(&self) -> AWD2_R[src]

Bit 8 - AWD2

pub fn awd1(&self) -> AWD1_R[src]

Bit 7 - AWD1

pub fn jeos(&self) -> JEOS_R[src]

Bit 6 - JEOS

pub fn jeoc(&self) -> JEOC_R[src]

Bit 5 - JEOC

pub fn ovr(&self) -> OVR_R[src]

Bit 4 - OVR

pub fn eos(&self) -> EOS_R[src]

Bit 3 - EOS

pub fn eoc(&self) -> EOC_R[src]

Bit 2 - EOC

pub fn eosmp(&self) -> EOSMP_R[src]

Bit 1 - EOSMP

pub fn adrdy(&self) -> ADRDY_R[src]

Bit 0 - ADRDY

impl R<bool, JQOVFIE_A>[src]

pub fn variant(&self) -> JQOVFIE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, AWD3IE_A>[src]

pub fn variant(&self) -> AWD3IE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, JEOSIE_A>[src]

pub fn variant(&self) -> JEOSIE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, JEOCIE_A>[src]

pub fn variant(&self) -> JEOCIE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, OVRIE_A>[src]

pub fn variant(&self) -> OVRIE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, EOSIE_A>[src]

pub fn variant(&self) -> EOSIE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, EOCIE_A>[src]

pub fn variant(&self) -> EOCIE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, EOSMPIE_A>[src]

pub fn variant(&self) -> EOSMPIE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, ADRDYIE_A>[src]

pub fn variant(&self) -> ADRDYIE_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u32, Reg<u32, _IER>>[src]

pub fn jqovfie(&self) -> JQOVFIE_R[src]

Bit 10 - JQOVFIE

pub fn awd3ie(&self) -> AWD3IE_R[src]

Bit 9 - AWD3IE

pub fn awd2ie(&self) -> AWD2IE_R[src]

Bit 8 - AWD2IE

pub fn awd1ie(&self) -> AWD1IE_R[src]

Bit 7 - AWD1IE

pub fn jeosie(&self) -> JEOSIE_R[src]

Bit 6 - JEOSIE

pub fn jeocie(&self) -> JEOCIE_R[src]

Bit 5 - JEOCIE

pub fn ovrie(&self) -> OVRIE_R[src]

Bit 4 - OVRIE

pub fn eosie(&self) -> EOSIE_R[src]

Bit 3 - EOSIE

pub fn eocie(&self) -> EOCIE_R[src]

Bit 2 - EOCIE

pub fn eosmpie(&self) -> EOSMPIE_R[src]

Bit 1 - EOSMPIE

pub fn adrdyie(&self) -> ADRDYIE_R[src]

Bit 0 - ADRDYIE

impl R<bool, ADCAL_A>[src]

pub fn variant(&self) -> ADCAL_A[src]

Get enumerated values variant

pub fn is_complete(&self) -> bool[src]

Checks if the value of the field is COMPLETE

pub fn is_calibration(&self) -> bool[src]

Checks if the value of the field is CALIBRATION

impl R<bool, ADCALDIF_A>[src]

pub fn variant(&self) -> ADCALDIF_A[src]

Get enumerated values variant

pub fn is_single_ended(&self) -> bool[src]

Checks if the value of the field is SINGLEENDED

pub fn is_differential(&self) -> bool[src]

Checks if the value of the field is DIFFERENTIAL

impl R<u8, ADVREGEN_A>[src]

pub fn variant(&self) -> Variant<u8, ADVREGEN_A>[src]

Get enumerated values variant

pub fn is_intermediate(&self) -> bool[src]

Checks if the value of the field is INTERMEDIATE

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

impl R<bool, JADSTP_A>[src]

pub fn variant(&self) -> Variant<bool, JADSTP_A>[src]

Get enumerated values variant

pub fn is_stop(&self) -> bool[src]

Checks if the value of the field is STOP

impl R<bool, JADSTART_A>[src]

pub fn variant(&self) -> Variant<bool, JADSTART_A>[src]

Get enumerated values variant

pub fn is_start(&self) -> bool[src]

Checks if the value of the field is START

impl R<bool, ADDIS_A>[src]

pub fn variant(&self) -> Variant<bool, ADDIS_A>[src]

Get enumerated values variant

pub fn is_disable(&self) -> bool[src]

Checks if the value of the field is DISABLE

impl R<bool, ADEN_A>[src]

pub fn variant(&self) -> Variant<bool, ADEN_A>[src]

Get enumerated values variant

pub fn is_enable(&self) -> bool[src]

Checks if the value of the field is ENABLE

impl R<u32, Reg<u32, _CR>>[src]

pub fn adcal(&self) -> ADCAL_R[src]

Bit 31 - ADCAL

pub fn adcaldif(&self) -> ADCALDIF_R[src]

Bit 30 - ADCALDIF

pub fn advregen(&self) -> ADVREGEN_R[src]

Bits 28:29 - ADVREGEN

pub fn jadstp(&self) -> JADSTP_R[src]

Bit 5 - JADSTP

pub fn adstp(&self) -> ADSTP_R[src]

Bit 4 - ADSTP

pub fn jadstart(&self) -> JADSTART_R[src]

Bit 3 - JADSTART

pub fn adstart(&self) -> ADSTART_R[src]

Bit 2 - ADSTART

pub fn addis(&self) -> ADDIS_R[src]

Bit 1 - ADDIS

pub fn aden(&self) -> ADEN_R[src]

Bit 0 - ADEN

impl R<bool, JAUTO_A>[src]

pub fn variant(&self) -> JAUTO_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, JAWD1EN_A>[src]

pub fn variant(&self) -> JAWD1EN_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, AWD1EN_A>[src]

pub fn variant(&self) -> AWD1EN_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, AWD1SGL_A>[src]

pub fn variant(&self) -> AWD1SGL_A[src]

Get enumerated values variant

pub fn is_all(&self) -> bool[src]

Checks if the value of the field is ALL

pub fn is_single(&self) -> bool[src]

Checks if the value of the field is SINGLE

impl R<bool, JQM_A>[src]

pub fn variant(&self) -> JQM_A[src]

Get enumerated values variant

pub fn is_mode0(&self) -> bool[src]

Checks if the value of the field is MODE0

pub fn is_mode1(&self) -> bool[src]

Checks if the value of the field is MODE1

impl R<bool, JDISCEN_A>[src]

pub fn variant(&self) -> JDISCEN_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, DISCEN_A>[src]

pub fn variant(&self) -> DISCEN_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, AUTDLY_A>[src]

pub fn variant(&self) -> AUTDLY_A[src]

Get enumerated values variant

pub fn is_off(&self) -> bool[src]

Checks if the value of the field is OFF

pub fn is_on(&self) -> bool[src]

Checks if the value of the field is ON

impl R<bool, CONT_A>[src]

pub fn variant(&self) -> CONT_A[src]

Get enumerated values variant

pub fn is_single(&self) -> bool[src]

Checks if the value of the field is SINGLE

pub fn is_continuous(&self) -> bool[src]

Checks if the value of the field is CONTINUOUS

impl R<bool, OVRMOD_A>[src]

pub fn variant(&self) -> OVRMOD_A[src]

Get enumerated values variant

pub fn is_preserve(&self) -> bool[src]

Checks if the value of the field is PRESERVE

pub fn is_overwrite(&self) -> bool[src]

Checks if the value of the field is OVERWRITE

impl R<u8, EXTEN_A>[src]

pub fn variant(&self) -> EXTEN_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_rising_edge(&self) -> bool[src]

Checks if the value of the field is RISINGEDGE

pub fn is_falling_edge(&self) -> bool[src]

Checks if the value of the field is FALLINGEDGE

pub fn is_both_edges(&self) -> bool[src]

Checks if the value of the field is BOTHEDGES

impl R<u8, EXTSEL_A>[src]

pub fn variant(&self) -> Variant<u8, EXTSEL_A>[src]

Get enumerated values variant

pub fn is_hrtim_adctrg1(&self) -> bool[src]

Checks if the value of the field is HRTIM_ADCTRG1

pub fn is_hrtim_adctrg3(&self) -> bool[src]

Checks if the value of the field is HRTIM_ADCTRG3

pub fn is_tim1_cc1(&self) -> bool[src]

Checks if the value of the field is TIM1_CC1

pub fn is_tim1_cc2(&self) -> bool[src]

Checks if the value of the field is TIM1_CC2

pub fn is_tim1_cc3(&self) -> bool[src]

Checks if the value of the field is TIM1_CC3

pub fn is_tim2_cc2(&self) -> bool[src]

Checks if the value of the field is TIM2_CC2

pub fn is_tim3_trgo(&self) -> bool[src]

Checks if the value of the field is TIM3_TRGO

pub fn is_exti11(&self) -> bool[src]

Checks if the value of the field is EXTI11

pub fn is_tim1_trgo(&self) -> bool[src]

Checks if the value of the field is TIM1_TRGO

pub fn is_tim1_trgo2(&self) -> bool[src]

Checks if the value of the field is TIM1_TRGO2

pub fn is_tim2_trgo(&self) -> bool[src]

Checks if the value of the field is TIM2_TRGO

pub fn is_tim6_trgo(&self) -> bool[src]

Checks if the value of the field is TIM6_TRGO

pub fn is_tim15_trgo(&self) -> bool[src]

Checks if the value of the field is TIM15_TRGO

pub fn is_tim3_cc4(&self) -> bool[src]

Checks if the value of the field is TIM3_CC4

impl R<bool, ALIGN_A>[src]

pub fn variant(&self) -> ALIGN_A[src]

Get enumerated values variant

pub fn is_right(&self) -> bool[src]

Checks if the value of the field is RIGHT

pub fn is_left(&self) -> bool[src]

Checks if the value of the field is LEFT

impl R<u8, RES_A>[src]

pub fn variant(&self) -> RES_A[src]

Get enumerated values variant

pub fn is_bits12(&self) -> bool[src]

Checks if the value of the field is BITS12

pub fn is_bits10(&self) -> bool[src]

Checks if the value of the field is BITS10

pub fn is_bits8(&self) -> bool[src]

Checks if the value of the field is BITS8

pub fn is_bits6(&self) -> bool[src]

Checks if the value of the field is BITS6

impl R<bool, DMACFG_A>[src]

pub fn variant(&self) -> DMACFG_A[src]

Get enumerated values variant

pub fn is_one_shot(&self) -> bool[src]

Checks if the value of the field is ONESHOT

pub fn is_circular(&self) -> bool[src]

Checks if the value of the field is CIRCULAR

impl R<bool, DMAEN_A>[src]

pub fn variant(&self) -> DMAEN_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u32, Reg<u32, _CFGR>>[src]

pub fn awd1ch(&self) -> AWD1CH_R[src]

Bits 26:30 - AWDCH1CH

pub fn jauto(&self) -> JAUTO_R[src]

Bit 25 - JAUTO

pub fn jawd1en(&self) -> JAWD1EN_R[src]

Bit 24 - JAWD1EN

pub fn awd1en(&self) -> AWD1EN_R[src]

Bit 23 - AWD1EN

pub fn awd1sgl(&self) -> AWD1SGL_R[src]

Bit 22 - AWD1SGL

pub fn jqm(&self) -> JQM_R[src]

Bit 21 - JQM

pub fn jdiscen(&self) -> JDISCEN_R[src]

Bit 20 - JDISCEN

pub fn discnum(&self) -> DISCNUM_R[src]

Bits 17:19 - DISCNUM

pub fn discen(&self) -> DISCEN_R[src]

Bit 16 - DISCEN

pub fn autdly(&self) -> AUTDLY_R[src]

Bit 14 - AUTDLY

pub fn cont(&self) -> CONT_R[src]

Bit 13 - CONT

pub fn ovrmod(&self) -> OVRMOD_R[src]

Bit 12 - OVRMOD

pub fn exten(&self) -> EXTEN_R[src]

Bits 10:11 - EXTEN

pub fn extsel(&self) -> EXTSEL_R[src]

Bits 6:9 - EXTSEL

pub fn align(&self) -> ALIGN_R[src]

Bit 5 - ALIGN

pub fn res(&self) -> RES_R[src]

Bits 3:4 - RES

pub fn dmacfg(&self) -> DMACFG_R[src]

Bit 1 - DMACFG

pub fn dmaen(&self) -> DMAEN_R[src]

Bit 0 - DMAEN

impl R<u8, SMP9_A>[src]

pub fn variant(&self) -> SMP9_A[src]

Get enumerated values variant

pub fn is_cycles1_5(&self) -> bool[src]

Checks if the value of the field is CYCLES1_5

pub fn is_cycles2_5(&self) -> bool[src]

Checks if the value of the field is CYCLES2_5

pub fn is_cycles4_5(&self) -> bool[src]

Checks if the value of the field is CYCLES4_5

pub fn is_cycles7_5(&self) -> bool[src]

Checks if the value of the field is CYCLES7_5

pub fn is_cycles19_5(&self) -> bool[src]

Checks if the value of the field is CYCLES19_5

pub fn is_cycles61_5(&self) -> bool[src]

Checks if the value of the field is CYCLES61_5

pub fn is_cycles181_5(&self) -> bool[src]

Checks if the value of the field is CYCLES181_5

pub fn is_cycles601_5(&self) -> bool[src]

Checks if the value of the field is CYCLES601_5

impl R<u32, Reg<u32, _SMPR1>>[src]

pub fn smp9(&self) -> SMP9_R[src]

Bits 27:29 - SMP9

pub fn smp8(&self) -> SMP8_R[src]

Bits 24:26 - SMP8

pub fn smp7(&self) -> SMP7_R[src]

Bits 21:23 - SMP7

pub fn smp6(&self) -> SMP6_R[src]

Bits 18:20 - SMP6

pub fn smp5(&self) -> SMP5_R[src]

Bits 15:17 - SMP5

pub fn smp4(&self) -> SMP4_R[src]

Bits 12:14 - SMP4

pub fn smp3(&self) -> SMP3_R[src]

Bits 9:11 - SMP3

pub fn smp2(&self) -> SMP2_R[src]

Bits 6:8 - SMP2

pub fn smp1(&self) -> SMP1_R[src]

Bits 3:5 - SMP1

impl R<u8, SMP18_A>[src]

pub fn variant(&self) -> SMP18_A[src]

Get enumerated values variant

pub fn is_cycles1_5(&self) -> bool[src]

Checks if the value of the field is CYCLES1_5

pub fn is_cycles2_5(&self) -> bool[src]

Checks if the value of the field is CYCLES2_5

pub fn is_cycles4_5(&self) -> bool[src]

Checks if the value of the field is CYCLES4_5

pub fn is_cycles7_5(&self) -> bool[src]

Checks if the value of the field is CYCLES7_5

pub fn is_cycles19_5(&self) -> bool[src]

Checks if the value of the field is CYCLES19_5

pub fn is_cycles61_5(&self) -> bool[src]

Checks if the value of the field is CYCLES61_5

pub fn is_cycles181_5(&self) -> bool[src]

Checks if the value of the field is CYCLES181_5

pub fn is_cycles601_5(&self) -> bool[src]

Checks if the value of the field is CYCLES601_5

impl R<u32, Reg<u32, _SMPR2>>[src]

pub fn smp18(&self) -> SMP18_R[src]

Bits 24:26 - SMP18

pub fn smp17(&self) -> SMP17_R[src]

Bits 21:23 - SMP17

pub fn smp16(&self) -> SMP16_R[src]

Bits 18:20 - SMP16

pub fn smp15(&self) -> SMP15_R[src]

Bits 15:17 - SMP15

pub fn smp14(&self) -> SMP14_R[src]

Bits 12:14 - SMP14

pub fn smp13(&self) -> SMP13_R[src]

Bits 9:11 - SMP13

pub fn smp12(&self) -> SMP12_R[src]

Bits 6:8 - SMP12

pub fn smp11(&self) -> SMP11_R[src]

Bits 3:5 - SMP11

pub fn smp10(&self) -> SMP10_R[src]

Bits 0:2 - SMP10

impl R<u32, Reg<u32, _TR1>>[src]

pub fn ht1(&self) -> HT1_R[src]

Bits 16:27 - HT1

pub fn lt1(&self) -> LT1_R[src]

Bits 0:11 - LT1

impl R<u32, Reg<u32, _TR2>>[src]

pub fn ht2(&self) -> HT2_R[src]

Bits 16:23 - HT2

pub fn lt2(&self) -> LT2_R[src]

Bits 0:7 - LT2

impl R<u32, Reg<u32, _TR3>>[src]

pub fn ht3(&self) -> HT3_R[src]

Bits 16:23 - HT3

pub fn lt3(&self) -> LT3_R[src]

Bits 0:7 - LT3

impl R<u32, Reg<u32, _SQR1>>[src]

pub fn sq4(&self) -> SQ4_R[src]

Bits 24:28 - SQ4

pub fn sq3(&self) -> SQ3_R[src]

Bits 18:22 - SQ3

pub fn sq2(&self) -> SQ2_R[src]

Bits 12:16 - SQ2

pub fn sq1(&self) -> SQ1_R[src]

Bits 6:10 - SQ1

pub fn l(&self) -> L_R[src]

Bits 0:3 - L3

impl R<u32, Reg<u32, _SQR2>>[src]

pub fn sq9(&self) -> SQ9_R[src]

Bits 24:28 - SQ9

pub fn sq8(&self) -> SQ8_R[src]

Bits 18:22 - SQ8

pub fn sq7(&self) -> SQ7_R[src]

Bits 12:16 - SQ7

pub fn sq6(&self) -> SQ6_R[src]

Bits 6:10 - SQ6

pub fn sq5(&self) -> SQ5_R[src]

Bits 0:4 - SQ5

impl R<u32, Reg<u32, _SQR3>>[src]

pub fn sq14(&self) -> SQ14_R[src]

Bits 24:28 - SQ14

pub fn sq13(&self) -> SQ13_R[src]

Bits 18:22 - SQ13

pub fn sq12(&self) -> SQ12_R[src]

Bits 12:16 - SQ12

pub fn sq11(&self) -> SQ11_R[src]

Bits 6:10 - SQ11

pub fn sq10(&self) -> SQ10_R[src]

Bits 0:4 - SQ10

impl R<u32, Reg<u32, _SQR4>>[src]

pub fn sq16(&self) -> SQ16_R[src]

Bits 6:10 - SQ16

pub fn sq15(&self) -> SQ15_R[src]

Bits 0:4 - SQ15

impl R<u32, Reg<u32, _DR>>[src]

pub fn rdata(&self) -> RDATA_R[src]

Bits 0:15 - regularDATA

impl R<u8, JEXTEN_A>[src]

pub fn variant(&self) -> JEXTEN_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_rising_edge(&self) -> bool[src]

Checks if the value of the field is RISINGEDGE

pub fn is_falling_edge(&self) -> bool[src]

Checks if the value of the field is FALLINGEDGE

pub fn is_both_edges(&self) -> bool[src]

Checks if the value of the field is BOTHEDGES

impl R<u8, JEXTSEL_A>[src]

pub fn variant(&self) -> Variant<u8, JEXTSEL_A>[src]

Get enumerated values variant

pub fn is_hrtim_adctrg2(&self) -> bool[src]

Checks if the value of the field is HRTIM_ADCTRG2

pub fn is_hrtim_adctrg4(&self) -> bool[src]

Checks if the value of the field is HRTIM_ADCTRG4

impl R<u32, Reg<u32, _JSQR>>[src]

pub fn jsq4(&self) -> JSQ4_R[src]

Bits 26:30 - JSQ4

pub fn jsq3(&self) -> JSQ3_R[src]

Bits 20:24 - JSQ3

pub fn jsq2(&self) -> JSQ2_R[src]

Bits 14:18 - JSQ2

pub fn jsq1(&self) -> JSQ1_R[src]

Bits 8:12 - JSQ1

pub fn jexten(&self) -> JEXTEN_R[src]

Bits 6:7 - JEXTEN

pub fn jextsel(&self) -> JEXTSEL_R[src]

Bits 2:5 - JEXTSEL

pub fn jl(&self) -> JL_R[src]

Bits 0:1 - JL

impl R<bool, OFFSET1_EN_A>[src]

pub fn variant(&self) -> OFFSET1_EN_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u32, Reg<u32, _OFR1>>[src]

pub fn offset1_en(&self) -> OFFSET1_EN_R[src]

Bit 31 - OFFSET1_EN

pub fn offset1_ch(&self) -> OFFSET1_CH_R[src]

Bits 26:30 - OFFSET1_CH

pub fn offset1(&self) -> OFFSET1_R[src]

Bits 0:11 - OFFSET1

impl R<bool, OFFSET2_EN_A>[src]

pub fn variant(&self) -> OFFSET2_EN_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u32, Reg<u32, _OFR2>>[src]

pub fn offset2_en(&self) -> OFFSET2_EN_R[src]

Bit 31 - OFFSET2_EN

pub fn offset2_ch(&self) -> OFFSET2_CH_R[src]

Bits 26:30 - OFFSET2_CH

pub fn offset2(&self) -> OFFSET2_R[src]

Bits 0:11 - OFFSET2

impl R<bool, OFFSET3_EN_A>[src]

pub fn variant(&self) -> OFFSET3_EN_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u32, Reg<u32, _OFR3>>[src]

pub fn offset3_en(&self) -> OFFSET3_EN_R[src]

Bit 31 - OFFSET3_EN

pub fn offset3_ch(&self) -> OFFSET3_CH_R[src]

Bits 26:30 - OFFSET3_CH

pub fn offset3(&self) -> OFFSET3_R[src]

Bits 0:11 - OFFSET3

impl R<bool, OFFSET4_EN_A>[src]

pub fn variant(&self) -> OFFSET4_EN_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u32, Reg<u32, _OFR4>>[src]

pub fn offset4_en(&self) -> OFFSET4_EN_R[src]

Bit 31 - OFFSET4_EN

pub fn offset4_ch(&self) -> OFFSET4_CH_R[src]

Bits 26:30 - OFFSET4_CH

pub fn offset4(&self) -> OFFSET4_R[src]

Bits 0:11 - OFFSET4

impl R<u32, Reg<u32, _JDR1>>[src]

pub fn jdata1(&self) -> JDATA1_R[src]

Bits 0:15 - JDATA1

impl R<u32, Reg<u32, _JDR2>>[src]

pub fn jdata2(&self) -> JDATA2_R[src]

Bits 0:15 - JDATA2

impl R<u32, Reg<u32, _JDR3>>[src]

pub fn jdata3(&self) -> JDATA3_R[src]

Bits 0:15 - JDATA3

impl R<u32, Reg<u32, _JDR4>>[src]

pub fn jdata4(&self) -> JDATA4_R[src]

Bits 0:15 - JDATA4

impl R<bool, AWD2CH0_A>[src]

pub fn variant(&self) -> AWD2CH0_A[src]

Get enumerated values variant

pub fn is_not_monitored(&self) -> bool[src]

Checks if the value of the field is NOTMONITORED

pub fn is_monitored(&self) -> bool[src]

Checks if the value of the field is MONITORED

impl R<u32, Reg<u32, _AWD2CR>>[src]

pub fn awd2ch0(&self) -> AWD2CH0_R[src]

Bit 0 - AWD2CH

pub fn awd2ch1(&self) -> AWD2CH1_R[src]

Bit 1 - AWD2CH

pub fn awd2ch2(&self) -> AWD2CH2_R[src]

Bit 2 - AWD2CH

pub fn awd2ch3(&self) -> AWD2CH3_R[src]

Bit 3 - AWD2CH

pub fn awd2ch4(&self) -> AWD2CH4_R[src]

Bit 4 - AWD2CH

pub fn awd2ch5(&self) -> AWD2CH5_R[src]

Bit 5 - AWD2CH

pub fn awd2ch6(&self) -> AWD2CH6_R[src]

Bit 6 - AWD2CH

pub fn awd2ch7(&self) -> AWD2CH7_R[src]

Bit 7 - AWD2CH

pub fn awd2ch8(&self) -> AWD2CH8_R[src]

Bit 8 - AWD2CH

pub fn awd2ch9(&self) -> AWD2CH9_R[src]

Bit 9 - AWD2CH

pub fn awd2ch10(&self) -> AWD2CH10_R[src]

Bit 10 - AWD2CH

pub fn awd2ch11(&self) -> AWD2CH11_R[src]

Bit 11 - AWD2CH

pub fn awd2ch12(&self) -> AWD2CH12_R[src]

Bit 12 - AWD2CH

pub fn awd2ch13(&self) -> AWD2CH13_R[src]

Bit 13 - AWD2CH

pub fn awd2ch14(&self) -> AWD2CH14_R[src]

Bit 14 - AWD2CH

pub fn awd2ch15(&self) -> AWD2CH15_R[src]

Bit 15 - AWD2CH

pub fn awd2ch16(&self) -> AWD2CH16_R[src]

Bit 16 - AWD2CH

pub fn awd2ch17(&self) -> AWD2CH17_R[src]

Bit 17 - AWD2CH

impl R<bool, AWD3CH0_A>[src]

pub fn variant(&self) -> AWD3CH0_A[src]

Get enumerated values variant

pub fn is_not_monitored(&self) -> bool[src]

Checks if the value of the field is NOTMONITORED

pub fn is_monitored(&self) -> bool[src]

Checks if the value of the field is MONITORED

impl R<u32, Reg<u32, _AWD3CR>>[src]

pub fn awd3ch0(&self) -> AWD3CH0_R[src]

Bit 0 - AWD3CH

pub fn awd3ch1(&self) -> AWD3CH1_R[src]

Bit 1 - AWD3CH

pub fn awd3ch2(&self) -> AWD3CH2_R[src]

Bit 2 - AWD3CH

pub fn awd3ch3(&self) -> AWD3CH3_R[src]

Bit 3 - AWD3CH

pub fn awd3ch4(&self) -> AWD3CH4_R[src]

Bit 4 - AWD3CH

pub fn awd3ch5(&self) -> AWD3CH5_R[src]

Bit 5 - AWD3CH

pub fn awd3ch6(&self) -> AWD3CH6_R[src]

Bit 6 - AWD3CH

pub fn awd3ch7(&self) -> AWD3CH7_R[src]

Bit 7 - AWD3CH

pub fn awd3ch8(&self) -> AWD3CH8_R[src]

Bit 8 - AWD3CH

pub fn awd3ch9(&self) -> AWD3CH9_R[src]

Bit 9 - AWD3CH

pub fn awd3ch10(&self) -> AWD3CH10_R[src]

Bit 10 - AWD3CH

pub fn awd3ch11(&self) -> AWD3CH11_R[src]

Bit 11 - AWD3CH

pub fn awd3ch12(&self) -> AWD3CH12_R[src]

Bit 12 - AWD3CH

pub fn awd3ch13(&self) -> AWD3CH13_R[src]

Bit 13 - AWD3CH

pub fn awd3ch14(&self) -> AWD3CH14_R[src]

Bit 14 - AWD3CH

pub fn awd3ch15(&self) -> AWD3CH15_R[src]

Bit 15 - AWD3CH

pub fn awd3ch16(&self) -> AWD3CH16_R[src]

Bit 16 - AWD3CH

pub fn awd3ch17(&self) -> AWD3CH17_R[src]

Bit 17 - AWD3CH

impl R<bool, DIFSEL_10_A>[src]

pub fn variant(&self) -> DIFSEL_10_A[src]

Get enumerated values variant

pub fn is_single_ended(&self) -> bool[src]

Checks if the value of the field is SINGLEENDED

pub fn is_differential(&self) -> bool[src]

Checks if the value of the field is DIFFERENTIAL

impl R<u32, Reg<u32, _DIFSEL>>[src]

pub fn difsel_10(&self) -> DIFSEL_10_R[src]

Bit 0 - Differential mode for channels 15 to 1

pub fn difsel_11(&self) -> DIFSEL_11_R[src]

Bit 1 - Differential mode for channels 15 to 1

pub fn difsel_12(&self) -> DIFSEL_12_R[src]

Bit 2 - Differential mode for channels 15 to 1

pub fn difsel_13(&self) -> DIFSEL_13_R[src]

Bit 3 - Differential mode for channels 15 to 1

pub fn difsel_14(&self) -> DIFSEL_14_R[src]

Bit 4 - Differential mode for channels 15 to 1

pub fn difsel_15(&self) -> DIFSEL_15_R[src]

Bit 5 - Differential mode for channels 15 to 1

pub fn difsel_16(&self) -> DIFSEL_16_R[src]

Bit 6 - Differential mode for channels 15 to 1

pub fn difsel_17(&self) -> DIFSEL_17_R[src]

Bit 7 - Differential mode for channels 15 to 1

pub fn difsel_18(&self) -> DIFSEL_18_R[src]

Bit 8 - Differential mode for channels 15 to 1

pub fn difsel_19(&self) -> DIFSEL_19_R[src]

Bit 9 - Differential mode for channels 15 to 1

pub fn difsel_110(&self) -> DIFSEL_110_R[src]

Bit 10 - Differential mode for channels 15 to 1

pub fn difsel_111(&self) -> DIFSEL_111_R[src]

Bit 11 - Differential mode for channels 15 to 1

pub fn difsel_112(&self) -> DIFSEL_112_R[src]

Bit 12 - Differential mode for channels 15 to 1

pub fn difsel_113(&self) -> DIFSEL_113_R[src]

Bit 13 - Differential mode for channels 15 to 1

pub fn difsel_114(&self) -> DIFSEL_114_R[src]

Bit 14 - Differential mode for channels 15 to 1

pub fn difsel_115(&self) -> DIFSEL_115_R[src]

Bit 15 - Differential mode for channels 15 to 1

pub fn difsel_116(&self) -> DIFSEL_116_R[src]

Bit 16 - Differential mode for channels 15 to 1

pub fn difsel_117(&self) -> DIFSEL_117_R[src]

Bit 17 - Differential mode for channels 15 to 1

impl R<u32, Reg<u32, _CALFACT>>[src]

pub fn calfact_d(&self) -> CALFACT_D_R[src]

Bits 16:22 - CALFACT_D

pub fn calfact_s(&self) -> CALFACT_S_R[src]

Bits 0:6 - CALFACT_S

impl R<bool, EOSMP_MST_A>[src]

pub fn variant(&self) -> EOSMP_MST_A[src]

Get enumerated values variant

pub fn is_not_ended(&self) -> bool[src]

Checks if the value of the field is NOTENDED

pub fn is_ended(&self) -> bool[src]

Checks if the value of the field is ENDED

impl R<bool, EOC_MST_A>[src]

pub fn variant(&self) -> EOC_MST_A[src]

Get enumerated values variant

pub fn is_not_complete(&self) -> bool[src]

Checks if the value of the field is NOTCOMPLETE

pub fn is_complete(&self) -> bool[src]

Checks if the value of the field is COMPLETE

impl R<bool, EOS_MST_A>[src]

pub fn variant(&self) -> EOS_MST_A[src]

Get enumerated values variant

pub fn is_not_complete(&self) -> bool[src]

Checks if the value of the field is NOTCOMPLETE

pub fn is_complete(&self) -> bool[src]

Checks if the value of the field is COMPLETE

impl R<bool, OVR_MST_A>[src]

pub fn variant(&self) -> OVR_MST_A[src]

Get enumerated values variant

pub fn is_no_overrun(&self) -> bool[src]

Checks if the value of the field is NOOVERRUN

pub fn is_overrun(&self) -> bool[src]

Checks if the value of the field is OVERRUN

impl R<bool, JEOC_MST_A>[src]

pub fn variant(&self) -> JEOC_MST_A[src]

Get enumerated values variant

pub fn is_not_complete(&self) -> bool[src]

Checks if the value of the field is NOTCOMPLETE

pub fn is_complete(&self) -> bool[src]

Checks if the value of the field is COMPLETE

impl R<bool, JEOS_MST_A>[src]

pub fn variant(&self) -> JEOS_MST_A[src]

Get enumerated values variant

pub fn is_not_complete(&self) -> bool[src]

Checks if the value of the field is NOTCOMPLETE

pub fn is_complete(&self) -> bool[src]

Checks if the value of the field is COMPLETE

impl R<bool, AWD1_MST_A>[src]

pub fn variant(&self) -> AWD1_MST_A[src]

Get enumerated values variant

pub fn is_no_event(&self) -> bool[src]

Checks if the value of the field is NOEVENT

pub fn is_event(&self) -> bool[src]

Checks if the value of the field is EVENT

impl R<bool, JQOVF_MST_A>[src]

pub fn variant(&self) -> JQOVF_MST_A[src]

Get enumerated values variant

pub fn is_no_overflow(&self) -> bool[src]

Checks if the value of the field is NOOVERFLOW

pub fn is_overflow(&self) -> bool[src]

Checks if the value of the field is OVERFLOW

impl R<bool, ADRDY_SLV_A>[src]

pub fn variant(&self) -> ADRDY_SLV_A[src]

Get enumerated values variant

pub fn is_not_ready(&self) -> bool[src]

Checks if the value of the field is NOTREADY

pub fn is_ready(&self) -> bool[src]

Checks if the value of the field is READY

impl R<u32, Reg<u32, _CSR>>[src]

pub fn addrdy_mst(&self) -> ADDRDY_MST_R[src]

Bit 0 - ADDRDY_MST

pub fn eosmp_mst(&self) -> EOSMP_MST_R[src]

Bit 1 - EOSMP_MST

pub fn eoc_mst(&self) -> EOC_MST_R[src]

Bit 2 - EOC_MST

pub fn eos_mst(&self) -> EOS_MST_R[src]

Bit 3 - EOS_MST

pub fn ovr_mst(&self) -> OVR_MST_R[src]

Bit 4 - OVR_MST

pub fn jeoc_mst(&self) -> JEOC_MST_R[src]

Bit 5 - JEOC_MST

pub fn jeos_mst(&self) -> JEOS_MST_R[src]

Bit 6 - JEOS_MST

pub fn awd1_mst(&self) -> AWD1_MST_R[src]

Bit 7 - AWD1_MST

pub fn awd2_mst(&self) -> AWD2_MST_R[src]

Bit 8 - AWD2_MST

pub fn awd3_mst(&self) -> AWD3_MST_R[src]

Bit 9 - AWD3_MST

pub fn jqovf_mst(&self) -> JQOVF_MST_R[src]

Bit 10 - JQOVF_MST

pub fn adrdy_slv(&self) -> ADRDY_SLV_R[src]

Bit 16 - ADRDY_SLV

pub fn eosmp_slv(&self) -> EOSMP_SLV_R[src]

Bit 17 - EOSMP_SLV

pub fn eoc_slv(&self) -> EOC_SLV_R[src]

Bit 18 - End of regular conversion of the slave ADC

pub fn eos_slv(&self) -> EOS_SLV_R[src]

Bit 19 - End of regular sequence flag of the slave ADC

pub fn ovr_slv(&self) -> OVR_SLV_R[src]

Bit 20 - Overrun flag of the slave ADC

pub fn jeoc_slv(&self) -> JEOC_SLV_R[src]

Bit 21 - End of injected conversion flag of the slave ADC

pub fn jeos_slv(&self) -> JEOS_SLV_R[src]

Bit 22 - End of injected sequence flag of the slave ADC

pub fn awd1_slv(&self) -> AWD1_SLV_R[src]

Bit 23 - Analog watchdog 1 flag of the slave ADC

pub fn awd2_slv(&self) -> AWD2_SLV_R[src]

Bit 24 - Analog watchdog 2 flag of the slave ADC

pub fn awd3_slv(&self) -> AWD3_SLV_R[src]

Bit 25 - Analog watchdog 3 flag of the slave ADC

pub fn jqovf_slv(&self) -> JQOVF_SLV_R[src]

Bit 26 - Injected Context Queue Overflow flag of the slave ADC

impl R<u8, DUAL_A>[src]

pub fn variant(&self) -> Variant<u8, DUAL_A>[src]

Get enumerated values variant

pub fn is_independent(&self) -> bool[src]

Checks if the value of the field is INDEPENDENT

pub fn is_dual_rj(&self) -> bool[src]

Checks if the value of the field is DUALRJ

pub fn is_dual_ra(&self) -> bool[src]

Checks if the value of the field is DUALRA

pub fn is_dual_ij(&self) -> bool[src]

Checks if the value of the field is DUALIJ

pub fn is_dual_j(&self) -> bool[src]

Checks if the value of the field is DUALJ

pub fn is_dual_r(&self) -> bool[src]

Checks if the value of the field is DUALR

pub fn is_dual_i(&self) -> bool[src]

Checks if the value of the field is DUALI

pub fn is_dual_a(&self) -> bool[src]

Checks if the value of the field is DUALA

impl R<bool, DMACFG_A>[src]

pub fn variant(&self) -> DMACFG_A[src]

Get enumerated values variant

pub fn is_one_shot(&self) -> bool[src]

Checks if the value of the field is ONESHOT

pub fn is_circulator(&self) -> bool[src]

Checks if the value of the field is CIRCULATOR

impl R<u8, MDMA_A>[src]

pub fn variant(&self) -> Variant<u8, MDMA_A>[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_bits12_10(&self) -> bool[src]

Checks if the value of the field is BITS12_10

pub fn is_bits8_6(&self) -> bool[src]

Checks if the value of the field is BITS8_6

impl R<u8, CKMODE_A>[src]

pub fn variant(&self) -> CKMODE_A[src]

Get enumerated values variant

pub fn is_asynchronous(&self) -> bool[src]

Checks if the value of the field is ASYNCHRONOUS

pub fn is_sync_div1(&self) -> bool[src]

Checks if the value of the field is SYNCDIV1

pub fn is_sync_div2(&self) -> bool[src]

Checks if the value of the field is SYNCDIV2

pub fn is_sync_div4(&self) -> bool[src]

Checks if the value of the field is SYNCDIV4

impl R<bool, VREFEN_A>[src]

pub fn variant(&self) -> VREFEN_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, TSEN_A>[src]

pub fn variant(&self) -> TSEN_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, VBATEN_A>[src]

pub fn variant(&self) -> VBATEN_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u32, Reg<u32, _CCR>>[src]

pub fn dual(&self) -> DUAL_R[src]

Bits 0:4 - Dual ADC mode selection

pub fn delay(&self) -> DELAY_R[src]

Bits 8:11 - Delay between 2 sampling phases

pub fn dmacfg(&self) -> DMACFG_R[src]

Bit 13 - DMA configuration (for multi-ADC mode)

pub fn mdma(&self) -> MDMA_R[src]

Bits 14:15 - Direct memory access mode for multi ADC mode

pub fn ckmode(&self) -> CKMODE_R[src]

Bits 16:17 - ADC clock mode

pub fn vrefen(&self) -> VREFEN_R[src]

Bit 22 - VREFINT enable

pub fn tsen(&self) -> TSEN_R[src]

Bit 23 - Temperature sensor enable

pub fn vbaten(&self) -> VBATEN_R[src]

Bit 24 - VBAT enable

impl R<u32, Reg<u32, _CDR>>[src]

pub fn rdata_slv(&self) -> RDATA_SLV_R[src]

Bits 16:31 - Regular data of the slave ADC

pub fn rdata_mst(&self) -> RDATA_MST_R[src]

Bits 0:15 - Regular data of the master ADC

impl R<bool, OPAMP2EN_A>[src]

pub fn variant(&self) -> OPAMP2EN_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, FORCE_VP_A>[src]

pub fn variant(&self) -> FORCE_VP_A[src]

Get enumerated values variant

pub fn is_normal(&self) -> bool[src]

Checks if the value of the field is NORMAL

pub fn is_calibration(&self) -> bool[src]

Checks if the value of the field is CALIBRATION

impl R<u8, VP_SEL_A>[src]

pub fn variant(&self) -> Variant<u8, VP_SEL_A>[src]

Get enumerated values variant

pub fn is_pb14(&self) -> bool[src]

Checks if the value of the field is PB14

pub fn is_pb0(&self) -> bool[src]

Checks if the value of the field is PB0

pub fn is_pa7(&self) -> bool[src]

Checks if the value of the field is PA7

impl R<u8, VM_SEL_A>[src]

pub fn variant(&self) -> VM_SEL_A[src]

Get enumerated values variant

pub fn is_pc5(&self) -> bool[src]

Checks if the value of the field is PC5

pub fn is_pa5(&self) -> bool[src]

Checks if the value of the field is PA5

pub fn is_pga(&self) -> bool[src]

Checks if the value of the field is PGA

pub fn is_follower(&self) -> bool[src]

Checks if the value of the field is FOLLOWER

impl R<bool, TCM_EN_A>[src]

pub fn variant(&self) -> TCM_EN_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, VMS_SEL_A>[src]

pub fn variant(&self) -> VMS_SEL_A[src]

Get enumerated values variant

pub fn is_pc5(&self) -> bool[src]

Checks if the value of the field is PC5

pub fn is_pa5(&self) -> bool[src]

Checks if the value of the field is PA5

impl R<u8, VPS_SEL_A>[src]

pub fn variant(&self) -> Variant<u8, VPS_SEL_A>[src]

Get enumerated values variant

pub fn is_pb14(&self) -> bool[src]

Checks if the value of the field is PB14

pub fn is_pb0(&self) -> bool[src]

Checks if the value of the field is PB0

pub fn is_pa7(&self) -> bool[src]

Checks if the value of the field is PA7

impl R<bool, CALON_A>[src]

pub fn variant(&self) -> CALON_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u8, CALSEL_A>[src]

pub fn variant(&self) -> CALSEL_A[src]

Get enumerated values variant

pub fn is_percent3_3(&self) -> bool[src]

Checks if the value of the field is PERCENT3_3

pub fn is_percent10(&self) -> bool[src]

Checks if the value of the field is PERCENT10

pub fn is_percent50(&self) -> bool[src]

Checks if the value of the field is PERCENT50

pub fn is_percent90(&self) -> bool[src]

Checks if the value of the field is PERCENT90

impl R<u8, PGA_GAIN_A>[src]

pub fn variant(&self) -> Variant<u8, PGA_GAIN_A>[src]

Get enumerated values variant

pub fn is_gain2(&self) -> bool[src]

Checks if the value of the field is GAIN2

pub fn is_gain4(&self) -> bool[src]

Checks if the value of the field is GAIN4

pub fn is_gain8(&self) -> bool[src]

Checks if the value of the field is GAIN8

pub fn is_gain16(&self) -> bool[src]

Checks if the value of the field is GAIN16

pub fn is_gain2_vm0(&self) -> bool[src]

Checks if the value of the field is GAIN2_VM0

pub fn is_gain4_vm0(&self) -> bool[src]

Checks if the value of the field is GAIN4_VM0

pub fn is_gain8_vm0(&self) -> bool[src]

Checks if the value of the field is GAIN8_VM0

pub fn is_gain16_vm0(&self) -> bool[src]

Checks if the value of the field is GAIN16_VM0

pub fn is_gain2_vm1(&self) -> bool[src]

Checks if the value of the field is GAIN2_VM1

pub fn is_gain4_vm1(&self) -> bool[src]

Checks if the value of the field is GAIN4_VM1

pub fn is_gain8_vm1(&self) -> bool[src]

Checks if the value of the field is GAIN8_VM1

pub fn is_gain16_vm1(&self) -> bool[src]

Checks if the value of the field is GAIN16_VM1

impl R<bool, USER_TRIM_A>[src]

pub fn variant(&self) -> USER_TRIM_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, TSTREF_A>[src]

pub fn variant(&self) -> TSTREF_A[src]

Get enumerated values variant

pub fn is_output(&self) -> bool[src]

Checks if the value of the field is OUTPUT

pub fn is_not_output(&self) -> bool[src]

Checks if the value of the field is NOTOUTPUT

impl R<bool, OUTCAL_A>[src]

pub fn variant(&self) -> OUTCAL_A[src]

Get enumerated values variant

pub fn is_low(&self) -> bool[src]

Checks if the value of the field is LOW

pub fn is_high(&self) -> bool[src]

Checks if the value of the field is HIGH

impl R<bool, LOCK_A>[src]

pub fn variant(&self) -> LOCK_A[src]

Get enumerated values variant

pub fn is_unlocked(&self) -> bool[src]

Checks if the value of the field is UNLOCKED

pub fn is_locked(&self) -> bool[src]

Checks if the value of the field is LOCKED

impl R<u32, Reg<u32, _OPAMP2_CSR>>[src]

pub fn opamp2en(&self) -> OPAMP2EN_R[src]

Bit 0 - OPAMP2 enable

pub fn force_vp(&self) -> FORCE_VP_R[src]

Bit 1 - FORCE_VP

pub fn vp_sel(&self) -> VP_SEL_R[src]

Bits 2:3 - OPAMP Non inverting input selection

pub fn vm_sel(&self) -> VM_SEL_R[src]

Bits 5:6 - OPAMP inverting input selection

pub fn tcm_en(&self) -> TCM_EN_R[src]

Bit 7 - Timer controlled Mux mode enable

pub fn vms_sel(&self) -> VMS_SEL_R[src]

Bit 8 - OPAMP inverting input secondary selection

pub fn vps_sel(&self) -> VPS_SEL_R[src]

Bits 9:10 - OPAMP Non inverting input secondary selection

pub fn calon(&self) -> CALON_R[src]

Bit 11 - Calibration mode enable

pub fn calsel(&self) -> CALSEL_R[src]

Bits 12:13 - Calibration selection

pub fn pga_gain(&self) -> PGA_GAIN_R[src]

Bits 14:17 - Gain in PGA mode

pub fn user_trim(&self) -> USER_TRIM_R[src]

Bit 18 - User trimming enable

pub fn trimoffsetp(&self) -> TRIMOFFSETP_R[src]

Bits 19:23 - Offset trimming value (PMOS)

pub fn trimoffsetn(&self) -> TRIMOFFSETN_R[src]

Bits 24:28 - Offset trimming value (NMOS)

pub fn tstref(&self) -> TSTREF_R[src]

Bit 29 - TSTREF

pub fn outcal(&self) -> OUTCAL_R[src]

Bit 30 - OPAMP ouput status flag

pub fn lock(&self) -> LOCK_R[src]

Bit 31 - OPAMP lock

impl R<u32, Reg<u32, _OPAMP3_CSR>>[src]

pub fn opamp3en(&self) -> OPAMP3EN_R[src]

Bit 0 - OPAMP3 enable

pub fn force_vp(&self) -> FORCE_VP_R[src]

Bit 1 - FORCE_VP

pub fn vp_sel(&self) -> VP_SEL_R[src]

Bits 2:3 - OPAMP Non inverting input selection

pub fn vm_sel(&self) -> VM_SEL_R[src]

Bits 5:6 - OPAMP inverting input selection

pub fn tcm_en(&self) -> TCM_EN_R[src]

Bit 7 - Timer controlled Mux mode enable

pub fn vms_sel(&self) -> VMS_SEL_R[src]

Bit 8 - OPAMP inverting input secondary selection

pub fn vps_sel(&self) -> VPS_SEL_R[src]

Bits 9:10 - OPAMP Non inverting input secondary selection

pub fn calon(&self) -> CALON_R[src]

Bit 11 - Calibration mode enable

pub fn calsel(&self) -> CALSEL_R[src]

Bits 12:13 - Calibration selection

pub fn pga_gain(&self) -> PGA_GAIN_R[src]

Bits 14:17 - Gain in PGA mode

pub fn user_trim(&self) -> USER_TRIM_R[src]

Bit 18 - User trimming enable

pub fn trimoffsetp(&self) -> TRIMOFFSETP_R[src]

Bits 19:23 - Offset trimming value (PMOS)

pub fn trimoffsetn(&self) -> TRIMOFFSETN_R[src]

Bits 24:28 - Offset trimming value (NMOS)

pub fn tstref(&self) -> TSTREF_R[src]

Bit 29 - TSTREF

pub fn outcal(&self) -> OUTCAL_R[src]

Bit 30 - OPAMP ouput status flag

pub fn lock(&self) -> LOCK_R[src]

Bit 31 - OPAMP lock

impl R<u32, Reg<u32, _OPAMP4_CSR>>[src]

pub fn opamp4en(&self) -> OPAMP4EN_R[src]

Bit 0 - OPAMP4 enable

pub fn force_vp(&self) -> FORCE_VP_R[src]

Bit 1 - FORCE_VP

pub fn vp_sel(&self) -> VP_SEL_R[src]

Bits 2:3 - OPAMP Non inverting input selection

pub fn vm_sel(&self) -> VM_SEL_R[src]

Bits 5:6 - OPAMP inverting input selection

pub fn tcm_en(&self) -> TCM_EN_R[src]

Bit 7 - Timer controlled Mux mode enable

pub fn vms_sel(&self) -> VMS_SEL_R[src]

Bit 8 - OPAMP inverting input secondary selection

pub fn vps_sel(&self) -> VPS_SEL_R[src]

Bits 9:10 - OPAMP Non inverting input secondary selection

pub fn calon(&self) -> CALON_R[src]

Bit 11 - Calibration mode enable

pub fn calsel(&self) -> CALSEL_R[src]

Bits 12:13 - Calibration selection

pub fn pga_gain(&self) -> PGA_GAIN_R[src]

Bits 14:17 - Gain in PGA mode

pub fn user_trim(&self) -> USER_TRIM_R[src]

Bit 18 - User trimming enable

pub fn trimoffsetp(&self) -> TRIMOFFSETP_R[src]

Bits 19:23 - Offset trimming value (PMOS)

pub fn trimoffsetn(&self) -> TRIMOFFSETN_R[src]

Bits 24:28 - Offset trimming value (NMOS)

pub fn tstref(&self) -> TSTREF_R[src]

Bit 29 - TSTREF

pub fn outcal(&self) -> OUTCAL_R[src]

Bit 30 - OPAMP ouput status flag

pub fn lock(&self) -> LOCK_R[src]

Bit 31 - OPAMP lock

impl R<u32, Reg<u32, _OPAMP1_CSR>>[src]

pub fn opamp1en(&self) -> OPAMP1EN_R[src]

Bit 0 - OPAMP1 enable

pub fn force_vp(&self) -> FORCE_VP_R[src]

Bit 1 - FORCE_VP

pub fn vp_sel(&self) -> VP_SEL_R[src]

Bits 2:3 - OPAMP Non inverting input selection

pub fn vm_sel(&self) -> VM_SEL_R[src]

Bits 5:6 - OPAMP inverting input selection

pub fn tcm_en(&self) -> TCM_EN_R[src]

Bit 7 - Timer controlled Mux mode enable

pub fn vms_sel(&self) -> VMS_SEL_R[src]

Bit 8 - OPAMP inverting input secondary selection

pub fn vps_sel(&self) -> VPS_SEL_R[src]

Bits 9:10 - OPAMP Non inverting input secondary selection

pub fn calon(&self) -> CALON_R[src]

Bit 11 - Calibration mode enable

pub fn calsel(&self) -> CALSEL_R[src]

Bits 12:13 - Calibration selection

pub fn pga_gain(&self) -> PGA_GAIN_R[src]

Bits 14:17 - Gain in PGA mode

pub fn user_trim(&self) -> USER_TRIM_R[src]

Bit 18 - User trimming enable

pub fn trimoffsetp(&self) -> TRIMOFFSETP_R[src]

Bits 19:23 - Offset trimming value (PMOS)

pub fn trimoffsetn(&self) -> TRIMOFFSETN_R[src]

Bits 24:28 - Offset trimming value (NMOS)

pub fn tstref(&self) -> TSTREF_R[src]

Bit 29 - TSTREF

pub fn outcal(&self) -> OUTCAL_R[src]

Bit 30 - OPAMP ouput status flag

pub fn lock(&self) -> LOCK_R[src]

Bit 31 - OPAMP lock

impl R<bool, COMP2EN_A>[src]

pub fn variant(&self) -> COMP2EN_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u8, COMP2INMSEL_A>[src]

pub fn variant(&self) -> Variant<u8, COMP2INMSEL_A>[src]

Get enumerated values variant

pub fn is_one_quarter_vref(&self) -> bool[src]

Checks if the value of the field is ONEQUARTERVREF

pub fn is_one_half_vref(&self) -> bool[src]

Checks if the value of the field is ONEHALFVREF

pub fn is_three_quarter_vref(&self) -> bool[src]

Checks if the value of the field is THREEQUARTERVREF

pub fn is_vref(&self) -> bool[src]

Checks if the value of the field is VREF

pub fn is_pa4_dac1_ch1(&self) -> bool[src]

Checks if the value of the field is PA4_DAC1_CH1

pub fn is_dac1_ch2(&self) -> bool[src]

Checks if the value of the field is DAC1_CH2

pub fn is_pa2(&self) -> bool[src]

Checks if the value of the field is PA2

impl R<u8, COMP2OUTSEL_A>[src]

pub fn variant(&self) -> Variant<u8, COMP2OUTSEL_A>[src]

Get enumerated values variant

pub fn is_no_selection(&self) -> bool[src]

Checks if the value of the field is NOSELECTION

pub fn is_timer1break_input(&self) -> bool[src]

Checks if the value of the field is TIMER1BREAKINPUT

pub fn is_timer1break_input2(&self) -> bool[src]

Checks if the value of the field is TIMER1BREAKINPUT2

pub fn is_timer1ocref_clear_input(&self) -> bool[src]

Checks if the value of the field is TIMER1OCREFCLEARINPUT

pub fn is_timer1input_capture1(&self) -> bool[src]

Checks if the value of the field is TIMER1INPUTCAPTURE1

pub fn is_timer2input_capture4(&self) -> bool[src]

Checks if the value of the field is TIMER2INPUTCAPTURE4

pub fn is_timer2ocref_clear_input(&self) -> bool[src]

Checks if the value of the field is TIMER2OCREFCLEARINPUT

pub fn is_timer3input_capture1(&self) -> bool[src]

Checks if the value of the field is TIMER3INPUTCAPTURE1

pub fn is_timer3ocref_clear_input(&self) -> bool[src]

Checks if the value of the field is TIMER3OCREFCLEARINPUT

impl R<bool, COMP2POL_A>[src]

pub fn variant(&self) -> COMP2POL_A[src]

Get enumerated values variant

pub fn is_not_inverted(&self) -> bool[src]

Checks if the value of the field is NOTINVERTED

pub fn is_inverted(&self) -> bool[src]

Checks if the value of the field is INVERTED

impl R<u8, COMP2_BLANKING_A>[src]

pub fn variant(&self) -> Variant<u8, COMP2_BLANKING_A>[src]

Get enumerated values variant

pub fn is_no_blanking(&self) -> bool[src]

Checks if the value of the field is NOBLANKING

pub fn is_tim1oc5(&self) -> bool[src]

Checks if the value of the field is TIM1OC5

pub fn is_tim2oc3(&self) -> bool[src]

Checks if the value of the field is TIM2OC3

pub fn is_tim3oc3(&self) -> bool[src]

Checks if the value of the field is TIM3OC3

impl R<bool, COMP2OUT_A>[src]

pub fn variant(&self) -> COMP2OUT_A[src]

Get enumerated values variant

pub fn is_low(&self) -> bool[src]

Checks if the value of the field is LOW

pub fn is_high(&self) -> bool[src]

Checks if the value of the field is HIGH

impl R<bool, COMP2LOCK_A>[src]

pub fn variant(&self) -> COMP2LOCK_A[src]

Get enumerated values variant

pub fn is_unlocked(&self) -> bool[src]

Checks if the value of the field is UNLOCKED

pub fn is_locked(&self) -> bool[src]

Checks if the value of the field is LOCKED

impl R<u32, Reg<u32, _COMP2_CSR>>[src]

pub fn comp2en(&self) -> COMP2EN_R[src]

Bit 0 - Comparator 2 enable

pub fn comp2inmsel(&self) -> COMP2INMSEL_R[src]

Bits 4:6 - Comparator 2 inverting input selection

pub fn comp2outsel(&self) -> COMP2OUTSEL_R[src]

Bits 10:13 - Comparator 2 output selection

pub fn comp2pol(&self) -> COMP2POL_R[src]

Bit 15 - Comparator 2 output polarity

pub fn comp2_blanking(&self) -> COMP2_BLANKING_R[src]

Bits 18:20 - Comparator 2 blanking source

pub fn comp2out(&self) -> COMP2OUT_R[src]

Bit 30 - Comparator 2 output

pub fn comp2lock(&self) -> COMP2LOCK_R[src]

Bit 31 - Comparator 2 lock

pub fn comp2mode(&self) -> COMP2MODE_R[src]

Bits 2:3 - Comparator 2 mode

pub fn comp2inpsel(&self) -> COMP2INPSEL_R[src]

Bit 7 - Comparator 2 non inverted input

pub fn comp2winmode(&self) -> COMP2WINMODE_R[src]

Bit 9 - Comparator 2 window mode

pub fn comp2hyst(&self) -> COMP2HYST_R[src]

Bits 16:17 - Comparator 2 hysteresis

pub fn comp2inmsel3(&self) -> COMP2INMSEL3_R[src]

Bit 22 - Comparator 2 inverting input selection

impl R<bool, COMP4EN_A>[src]

pub fn variant(&self) -> COMP4EN_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u8, COMP4INMSEL_A>[src]

pub fn variant(&self) -> Variant<u8, COMP4INMSEL_A>[src]

Get enumerated values variant

pub fn is_one_quarter_vref(&self) -> bool[src]

Checks if the value of the field is ONEQUARTERVREF

pub fn is_one_half_vref(&self) -> bool[src]

Checks if the value of the field is ONEHALFVREF

pub fn is_three_quarter_vref(&self) -> bool[src]

Checks if the value of the field is THREEQUARTERVREF

pub fn is_vref(&self) -> bool[src]

Checks if the value of the field is VREF

pub fn is_pa4_dac1_ch1(&self) -> bool[src]

Checks if the value of the field is PA4_DAC1_CH1

pub fn is_dac1_ch2(&self) -> bool[src]

Checks if the value of the field is DAC1_CH2

pub fn is_pb2(&self) -> bool[src]

Checks if the value of the field is PB2

impl R<u8, COMP4OUTSEL_A>[src]

pub fn variant(&self) -> Variant<u8, COMP4OUTSEL_A>[src]

Get enumerated values variant

pub fn is_no_selection(&self) -> bool[src]

Checks if the value of the field is NOSELECTION

pub fn is_timer1break_input(&self) -> bool[src]

Checks if the value of the field is TIMER1BREAKINPUT

pub fn is_timer1break_input2(&self) -> bool[src]

Checks if the value of the field is TIMER1BREAKINPUT2

pub fn is_timer3input_capture3(&self) -> bool[src]

Checks if the value of the field is TIMER3INPUTCAPTURE3

pub fn is_timer15input_capture2(&self) -> bool[src]

Checks if the value of the field is TIMER15INPUTCAPTURE2

pub fn is_timer15ocref_clear_input(&self) -> bool[src]

Checks if the value of the field is TIMER15OCREFCLEARINPUT

pub fn is_timer3ocref_clear_input(&self) -> bool[src]

Checks if the value of the field is TIMER3OCREFCLEARINPUT

impl R<bool, COMP4POL_A>[src]

pub fn variant(&self) -> COMP4POL_A[src]

Get enumerated values variant

pub fn is_not_inverted(&self) -> bool[src]

Checks if the value of the field is NOTINVERTED

pub fn is_inverted(&self) -> bool[src]

Checks if the value of the field is INVERTED

impl R<u8, COMP4_BLANKING_A>[src]

pub fn variant(&self) -> Variant<u8, COMP4_BLANKING_A>[src]

Get enumerated values variant

pub fn is_no_blanking(&self) -> bool[src]

Checks if the value of the field is NOBLANKING

pub fn is_tim3oc4(&self) -> bool[src]

Checks if the value of the field is TIM3OC4

pub fn is_tim15oc1(&self) -> bool[src]

Checks if the value of the field is TIM15OC1

impl R<bool, COMP4OUT_A>[src]

pub fn variant(&self) -> COMP4OUT_A[src]

Get enumerated values variant

pub fn is_low(&self) -> bool[src]

Checks if the value of the field is LOW

pub fn is_high(&self) -> bool[src]

Checks if the value of the field is HIGH

impl R<bool, COMP4LOCK_A>[src]

pub fn variant(&self) -> COMP4LOCK_A[src]

Get enumerated values variant

pub fn is_unlocked(&self) -> bool[src]

Checks if the value of the field is UNLOCKED

pub fn is_locked(&self) -> bool[src]

Checks if the value of the field is LOCKED

impl R<u32, Reg<u32, _COMP4_CSR>>[src]

pub fn comp4en(&self) -> COMP4EN_R[src]

Bit 0 - Comparator 4 enable

pub fn comp4inmsel(&self) -> COMP4INMSEL_R[src]

Bits 4:6 - Comparator 4 inverting input selection

pub fn comp4outsel(&self) -> COMP4OUTSEL_R[src]

Bits 10:13 - Comparator 4 output selection

pub fn comp4pol(&self) -> COMP4POL_R[src]

Bit 15 - Comparator 4 output polarity

pub fn comp4_blanking(&self) -> COMP4_BLANKING_R[src]

Bits 18:20 - Comparator 4 blanking source

pub fn comp4out(&self) -> COMP4OUT_R[src]

Bit 30 - Comparator 4 output

pub fn comp4lock(&self) -> COMP4LOCK_R[src]

Bit 31 - Comparator 4 lock

pub fn comp4winmode(&self) -> COMP4WINMODE_R[src]

Bit 9 - Comparator 4 window mode

pub fn comp4mode(&self) -> COMP4MODE_R[src]

Bits 2:3 - Comparator 4 mode

pub fn comp4inpsel(&self) -> COMP4INPSEL_R[src]

Bit 7 - Comparator 4 non inverted input

pub fn comp4hyst(&self) -> COMP4HYST_R[src]

Bits 16:17 - Comparator 4 hysteresis

pub fn comp4inmsel3(&self) -> COMP4INMSEL3_R[src]

Bit 22 - Comparator 4 inverting input selection

impl R<bool, COMP6EN_A>[src]

pub fn variant(&self) -> COMP6EN_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u8, COMP6INMSEL_A>[src]

pub fn variant(&self) -> Variant<u8, COMP6INMSEL_A>[src]

Get enumerated values variant

pub fn is_one_quarter_vref(&self) -> bool[src]

Checks if the value of the field is ONEQUARTERVREF

pub fn is_one_half_vref(&self) -> bool[src]

Checks if the value of the field is ONEHALFVREF

pub fn is_three_quarter_vref(&self) -> bool[src]

Checks if the value of the field is THREEQUARTERVREF

pub fn is_vref(&self) -> bool[src]

Checks if the value of the field is VREF

pub fn is_pa4_dac1_ch1(&self) -> bool[src]

Checks if the value of the field is PA4_DAC1_CH1

pub fn is_dac1_ch2(&self) -> bool[src]

Checks if the value of the field is DAC1_CH2

pub fn is_pb15(&self) -> bool[src]

Checks if the value of the field is PB15

impl R<u8, COMP6OUTSEL_A>[src]

pub fn variant(&self) -> Variant<u8, COMP6OUTSEL_A>[src]

Get enumerated values variant

pub fn is_no_selection(&self) -> bool[src]

Checks if the value of the field is NOSELECTION

pub fn is_timer1break_input(&self) -> bool[src]

Checks if the value of the field is TIMER1BREAKINPUT

pub fn is_timer1break_input2(&self) -> bool[src]

Checks if the value of the field is TIMER1BREAKINPUT2

pub fn is_timer2input_capture2(&self) -> bool[src]

Checks if the value of the field is TIMER2INPUTCAPTURE2

pub fn is_timer2ocref_clear_input(&self) -> bool[src]

Checks if the value of the field is TIMER2OCREFCLEARINPUT

pub fn is_timer16ocref_clear_input(&self) -> bool[src]

Checks if the value of the field is TIMER16OCREFCLEARINPUT

pub fn is_timer16input_capture1(&self) -> bool[src]

Checks if the value of the field is TIMER16INPUTCAPTURE1

impl R<bool, COMP6POL_A>[src]

pub fn variant(&self) -> COMP6POL_A[src]

Get enumerated values variant

pub fn is_not_inverted(&self) -> bool[src]

Checks if the value of the field is NOTINVERTED

pub fn is_inverted(&self) -> bool[src]

Checks if the value of the field is INVERTED

impl R<u8, COMP6_BLANKING_A>[src]

pub fn variant(&self) -> Variant<u8, COMP6_BLANKING_A>[src]

Get enumerated values variant

pub fn is_no_blanking(&self) -> bool[src]

Checks if the value of the field is NOBLANKING

pub fn is_tim2oc4(&self) -> bool[src]

Checks if the value of the field is TIM2OC4

pub fn is_tim15oc2(&self) -> bool[src]

Checks if the value of the field is TIM15OC2

impl R<bool, COMP6OUT_A>[src]

pub fn variant(&self) -> COMP6OUT_A[src]

Get enumerated values variant

pub fn is_low(&self) -> bool[src]

Checks if the value of the field is LOW

pub fn is_high(&self) -> bool[src]

Checks if the value of the field is HIGH

impl R<bool, COMP6LOCK_A>[src]

pub fn variant(&self) -> COMP6LOCK_A[src]

Get enumerated values variant

pub fn is_unlocked(&self) -> bool[src]

Checks if the value of the field is UNLOCKED

pub fn is_locked(&self) -> bool[src]

Checks if the value of the field is LOCKED

impl R<u32, Reg<u32, _COMP6_CSR>>[src]

pub fn comp6en(&self) -> COMP6EN_R[src]

Bit 0 - Comparator 6 enable

pub fn comp6inmsel(&self) -> COMP6INMSEL_R[src]

Bits 4:6 - Comparator 6 inverting input selection

pub fn comp6outsel(&self) -> COMP6OUTSEL_R[src]

Bits 10:13 - Comparator 6 output selection

pub fn comp6pol(&self) -> COMP6POL_R[src]

Bit 15 - Comparator 6 output polarity

pub fn comp6_blanking(&self) -> COMP6_BLANKING_R[src]

Bits 18:20 - Comparator 6 blanking source

pub fn comp6out(&self) -> COMP6OUT_R[src]

Bit 30 - Comparator 6 output

pub fn comp6lock(&self) -> COMP6LOCK_R[src]

Bit 31 - Comparator 6 lock

pub fn comp6winmode(&self) -> COMP6WINMODE_R[src]

Bit 9 - Comparator 6 window mode

pub fn comp6mode(&self) -> COMP6MODE_R[src]

Bits 2:3 - Comparator 6 mode

pub fn comp6inpsel(&self) -> COMP6INPSEL_R[src]

Bit 7 - Comparator 6 non inverted input

pub fn comp6hyst(&self) -> COMP6HYST_R[src]

Bits 16:17 - Comparator 6 hysteresis

pub fn comp6inmsel3(&self) -> COMP6INMSEL3_R[src]

Bit 22 - Comparator 6 inverting input selection

impl R<u32, Reg<u32, _COMP3_CSR>>[src]

pub fn comp3en(&self) -> COMP3EN_R[src]

Bit 0 - Comparator 3 enable

pub fn comp3mode(&self) -> COMP3MODE_R[src]

Bits 2:3 - Comparator 3 mode

pub fn comp3inmsel(&self) -> COMP3INMSEL_R[src]

Bits 4:6 - Comparator 3 inverting input selection

pub fn comp3inpsel(&self) -> COMP3INPSEL_R[src]

Bit 7 - Comparator 3 non inverted input

pub fn comp3outsel(&self) -> COMP3OUTSEL_R[src]

Bits 10:13 - Comparator 3 output selection

pub fn comp3pol(&self) -> COMP3POL_R[src]

Bit 15 - Comparator 3 output polarity

pub fn comp3hyst(&self) -> COMP3HYST_R[src]

Bits 16:17 - Comparator 3 hysteresis

pub fn comp3_blanking(&self) -> COMP3_BLANKING_R[src]

Bits 18:20 - Comparator 3 blanking source

pub fn comp3out(&self) -> COMP3OUT_R[src]

Bit 30 - Comparator 3 output

pub fn comp3lock(&self) -> COMP3LOCK_R[src]

Bit 31 - Comparator 3 lock

impl R<u32, Reg<u32, _COMP5_CSR>>[src]

pub fn comp5en(&self) -> COMP5EN_R[src]

Bit 0 - Comparator 5 enable

pub fn comp5mode(&self) -> COMP5MODE_R[src]

Bits 2:3 - Comparator 5 mode

pub fn comp5inmsel(&self) -> COMP5INMSEL_R[src]

Bits 4:6 - Comparator 5 inverting input selection

pub fn comp5inpsel(&self) -> COMP5INPSEL_R[src]

Bit 7 - Comparator 5 non inverted input

pub fn comp5outsel(&self) -> COMP5OUTSEL_R[src]

Bits 10:13 - Comparator 5 output selection

pub fn comp5pol(&self) -> COMP5POL_R[src]

Bit 15 - Comparator 5 output polarity

pub fn comp5hyst(&self) -> COMP5HYST_R[src]

Bits 16:17 - Comparator 5 hysteresis

pub fn comp5_blanking(&self) -> COMP5_BLANKING_R[src]

Bits 18:20 - Comparator 5 blanking source

pub fn comp5out(&self) -> COMP5OUT_R[src]

Bit 30 - Comparator 5 output

pub fn comp5lock(&self) -> COMP5LOCK_R[src]

Bit 31 - Comparator 5 lock

impl R<u32, Reg<u32, _COMP7_CSR>>[src]

pub fn comp7en(&self) -> COMP7EN_R[src]

Bit 0 - Comparator 7 enable

pub fn comp7mode(&self) -> COMP7MODE_R[src]

Bits 2:3 - Comparator 7 mode

pub fn comp7inmsel(&self) -> COMP7INMSEL_R[src]

Bits 4:6 - Comparator 7 inverting input selection

pub fn comp7inpsel(&self) -> COMP7INPSEL_R[src]

Bit 7 - Comparator 7 non inverted input

pub fn comp7outsel(&self) -> COMP7OUTSEL_R[src]

Bits 10:13 - Comparator 7 output selection

pub fn comp7pol(&self) -> COMP7POL_R[src]

Bit 15 - Comparator 7 output polarity

pub fn comp7hyst(&self) -> COMP7HYST_R[src]

Bits 16:17 - Comparator 7 hysteresis

pub fn comp7_blanking(&self) -> COMP7_BLANKING_R[src]

Bits 18:20 - Comparator 7 blanking source

pub fn comp7out(&self) -> COMP7OUT_R[src]

Bit 30 - Comparator 7 output

pub fn comp7lock(&self) -> COMP7LOCK_R[src]

Bit 31 - Comparator 7 lock

impl R<u32, Reg<u32, _COMP1_CSR>>[src]

pub fn comp1en(&self) -> COMP1EN_R[src]

Bit 0 - Comparator 1 enable

pub fn comp1_inp_dac(&self) -> COMP1_INP_DAC_R[src]

Bit 1 - Comparator 1 non inverting input connection to DAC output

pub fn comp1mode(&self) -> COMP1MODE_R[src]

Bits 2:3 - Comparator 1 mode

pub fn comp1inmsel(&self) -> COMP1INMSEL_R[src]

Bits 4:6 - Comparator 1 inverting input selection

pub fn comp1outsel(&self) -> COMP1OUTSEL_R[src]

Bits 10:13 - Comparator 1 output selection

pub fn comp1pol(&self) -> COMP1POL_R[src]

Bit 15 - Comparator 1 output polarity

pub fn comp1hyst(&self) -> COMP1HYST_R[src]

Bits 16:17 - Comparator 1 hysteresis

pub fn comp1_blanking(&self) -> COMP1_BLANKING_R[src]

Bits 18:20 - Comparator 1 blanking source

pub fn comp1out(&self) -> COMP1OUT_R[src]

Bit 30 - Comparator 1 output

pub fn comp1lock(&self) -> COMP1LOCK_R[src]

Bit 31 - Comparator 1 lock

Trait Implementations

impl<U, T, FI> PartialEq<FI> for R<U, T> where
    U: PartialEq,
    FI: Copy + Into<U>, 
[src]

Auto Trait Implementations

impl<U, T> Send for R<U, T> where
    T: Send,
    U: Send

impl<U, T> Sync for R<U, T> where
    T: Sync,
    U: Sync

impl<U, T> Unpin for R<U, T> where
    T: Unpin,
    U: Unpin

Blanket Implementations

impl<T> Any for T where
    T: 'static + ?Sized
[src]

impl<T> Borrow<T> for T where
    T: ?Sized
[src]

impl<T> BorrowMut<T> for T where
    T: ?Sized
[src]

impl<T> From<T> for T[src]

impl<T, U> Into<U> for T where
    U: From<T>, 
[src]

impl<T> Same<T> for T

type Output = T

Should always be Self

impl<T, U> TryFrom<U> for T where
    U: Into<T>, 
[src]

type Error = Infallible

The type returned in the event of a conversion error.

impl<T, U> TryInto<U> for T where
    U: TryFrom<T>, 
[src]

type Error = <U as TryFrom<T>>::Error

The type returned in the event of a conversion error.