Module spi2

Source
Expand description

SPI (Serial Peripheral Interface) Controller 2

Modules§

addr
Address value register
clk_gate
SPI module clock and register clock control
clock
SPI clock control register
cmd
Command control register
ctrl
SPI control register
date
Version control
din_mode
SPI input delay mode configuration
din_num
SPI input delay number configuration
dma_conf
SPI DMA control register
dma_int_clr
SPI DMA interrupt clear register
dma_int_ena
SPI DMA interrupt enable register
dma_int_raw
SPI DMA interrupt raw register
dma_int_st
SPI DMA interrupt status register
dout_mode
SPI output delay mode configuration
misc
SPI misc register
ms_dlen
SPI data bit length control register
slave
SPI slave control register
slave1
SPI slave control register 1
user
SPI USER control register
user1
SPI USER control register 1
user2
SPI USER control register 2
w
SPI CPU-controlled buffer%s

Structs§

RegisterBlock
Register block

Type Aliases§

ADDR
ADDR (rw) register accessor: Address value register
CLK_GATE
CLK_GATE (rw) register accessor: SPI module clock and register clock control
CLOCK
CLOCK (rw) register accessor: SPI clock control register
CMD
CMD (rw) register accessor: Command control register
CTRL
CTRL (rw) register accessor: SPI control register
DATE
DATE (rw) register accessor: Version control
DIN_MODE
DIN_MODE (rw) register accessor: SPI input delay mode configuration
DIN_NUM
DIN_NUM (rw) register accessor: SPI input delay number configuration
DMA_CONF
DMA_CONF (rw) register accessor: SPI DMA control register
DMA_INT_CLR
DMA_INT_CLR (w) register accessor: SPI DMA interrupt clear register
DMA_INT_ENA
DMA_INT_ENA (rw) register accessor: SPI DMA interrupt enable register
DMA_INT_RAW
DMA_INT_RAW (rw) register accessor: SPI DMA interrupt raw register
DMA_INT_ST
DMA_INT_ST (r) register accessor: SPI DMA interrupt status register
DOUT_MODE
DOUT_MODE (rw) register accessor: SPI output delay mode configuration
MISC
MISC (rw) register accessor: SPI misc register
MS_DLEN
MS_DLEN (rw) register accessor: SPI data bit length control register
SLAVE
SLAVE (rw) register accessor: SPI slave control register
SLAVE1
SLAVE1 (rw) register accessor: SPI slave control register 1
USER
USER (rw) register accessor: SPI USER control register
USER1
USER1 (rw) register accessor: SPI USER control register 1
USER2
USER2 (rw) register accessor: SPI USER control register 2
W
W (rw) register accessor: SPI CPU-controlled buffer%s