Expand description
SPI misc register
Structs§
- SPI misc register
Type Aliases§
- Field
CK_DIS
reader - 1: spi clk out disable, 0: spi clk out enable. Can be configured in CONF state. - Field
CK_DIS
writer - 1: spi clk out disable, 0: spi clk out enable. Can be configured in CONF state. - Field
CK_IDLE_EDGE
reader - 1: spi clk line is high when idle 0: spi clk line is low when idle. Can be configured in CONF state. - Field
CK_IDLE_EDGE
writer - 1: spi clk line is high when idle 0: spi clk line is low when idle. Can be configured in CONF state. - Field
CS0_DIS
reader - SPI CS0 pin enable, 1: disable CS0, 0: spi_cs0 signal is from/to CS0 pin. Can be configured in CONF state. - Field
CS0_DIS
writer - SPI CS0 pin enable, 1: disable CS0, 0: spi_cs0 signal is from/to CS0 pin. Can be configured in CONF state. - Field
CS1_DIS
reader - SPI CS1 pin enable, 1: disable CS1, 0: spi_cs1 signal is from/to CS1 pin. Can be configured in CONF state. - Field
CS1_DIS
writer - SPI CS1 pin enable, 1: disable CS1, 0: spi_cs1 signal is from/to CS1 pin. Can be configured in CONF state. - Field
CS2_DIS
reader - SPI CS2 pin enable, 1: disable CS2, 0: spi_cs2 signal is from/to CS2 pin. Can be configured in CONF state. - Field
CS2_DIS
writer - SPI CS2 pin enable, 1: disable CS2, 0: spi_cs2 signal is from/to CS2 pin. Can be configured in CONF state. - Field
CS3_DIS
reader - SPI CS3 pin enable, 1: disable CS3, 0: spi_cs3 signal is from/to CS3 pin. Can be configured in CONF state. - Field
CS3_DIS
writer - SPI CS3 pin enable, 1: disable CS3, 0: spi_cs3 signal is from/to CS3 pin. Can be configured in CONF state. - Field
CS4_DIS
reader - SPI CS4 pin enable, 1: disable CS4, 0: spi_cs4 signal is from/to CS4 pin. Can be configured in CONF state. - Field
CS4_DIS
writer - SPI CS4 pin enable, 1: disable CS4, 0: spi_cs4 signal is from/to CS4 pin. Can be configured in CONF state. - Field
CS5_DIS
reader - SPI CS5 pin enable, 1: disable CS5, 0: spi_cs5 signal is from/to CS5 pin. Can be configured in CONF state. - Field
CS5_DIS
writer - SPI CS5 pin enable, 1: disable CS5, 0: spi_cs5 signal is from/to CS5 pin. Can be configured in CONF state. - Field
CS_KEEP_ACTIVE
reader - spi cs line keep low when the bit is set. Can be configured in CONF state. - Field
CS_KEEP_ACTIVE
writer - spi cs line keep low when the bit is set. Can be configured in CONF state. - Field
MASTER_CS_POL
reader - In the master mode the bits are the polarity of spi cs line, the value is equivalent to spi_cs ^ spi_master_cs_pol. Can be configured in CONF state. - Field
MASTER_CS_POL
writer - In the master mode the bits are the polarity of spi cs line, the value is equivalent to spi_cs ^ spi_master_cs_pol. Can be configured in CONF state. - Field
QUAD_DIN_PIN_SWAP
reader - 1: spi quad input swap enable 0: spi quad input swap disable. Can be configured in CONF state. - Field
QUAD_DIN_PIN_SWAP
writer - 1: spi quad input swap enable 0: spi quad input swap disable. Can be configured in CONF state. - Register
MISC
reader - Field
SLAVE_CS_POL
reader - spi slave input cs polarity select. 1: inv 0: not change. Can be configured in CONF state. - Field
SLAVE_CS_POL
writer - spi slave input cs polarity select. 1: inv 0: not change. Can be configured in CONF state. - Register
MISC
writer