Crate efm32pg1b_pac

Expand description

Peripheral access API for EFM32PG1B microcontrollers (generated using svd2rust v0.35.0 ( ))

You can find an overview of the generated API here.

API features to be included in the next svd2rust release can be generated by cloning the svd2rust repository, checking out the above commit, and running cargo doc --open.

Re-exports§

pub use self::Interrupt as interrupt;
pub use self::timer0 as timer1;
pub use self::usart0 as usart1;

Modules§

acmp0: ACMP0
acmp1: ACMP1
adc0: ADC0
cmu: CMU
cryotimer: CRYOTIMER
crypto: CRYPTO
di: Device Information
emu: EMU
fpueh: FPUEH
generic: Common register and bit access and modify traits
gpcrc: General Purpose Cyclic Redundancy Check
gpio: GPIO
i2c0: I2C0
idac0: IDAC0
ldma: Linked Direct Memory Access
letimer0: LETIMER0
leuart0: LEUART0
msc: MSC
pcnt0: Pulse Counter
prs: PRS
rmu: RMU
rtcc: RTCC
timer0: TIMER0
usart0: USART0
wdog0: WDOG0

Structs§

Acmp0: ACMP0
Acmp1: ACMP1
Adc0: ADC0
CBP: Cache and branch predictor maintenance operations
CPUID: CPUID
Cmu: CMU
CorePeripherals: Core peripherals
Cryotimer: CRYOTIMER
Crypto: CRYPTO
DCB: Debug Control Block
DWT: Data Watchpoint and Trace unit
Di: Device Information
Emu: EMU
FPB: Flash Patch and Breakpoint unit
FPU: Floating Point Unit
Fpueh: FPUEH
Gpcrc: General Purpose Cyclic Redundancy Check
Gpio: GPIO
I2c0: I2C0
ITM: Instrumentation Trace Macrocell
Idac0: IDAC0
Ldma: Linked Direct Memory Access
Letimer0: LETIMER0
Leuart0: LEUART0
MPU: Memory Protection Unit
Msc: MSC
NVIC: Nested Vector Interrupt Controller
Pcnt0: Pulse Counter
Peripherals: All the peripherals.
Prs: PRS
Rmu: RMU
Rtcc: RTCC
SCB: System Control Block
SYST: SysTick: System Timer
TPIU: Trace Port Interface Unit
Timer0: TIMER0
Timer1: TIMER1
Usart0: USART0
Usart1: USART1
Wdog0: WDOG0

Enums§

Interrupt: Enumeration of all the interrupts.

Constants§

NVIC_PRIO_BITS: Number available in the NVIC for configuring priority

Attribute Macros§

interrupt