Module efm32pg1b_pac::prs
source · Expand description
PRS
Modules§
- Channel Control Register
- Channel Control Register
- Channel Control Register
- Channel Control Register
- Channel Control Register
- Channel Control Register
- Channel Control Register
- Channel Control Register
- Channel Control Register
- Channel Control Register
- Channel Control Register
- Channel Control Register
- Control Register
- DMA Request 0 Register
- DMA Request 1 Register
- PRS Channel Values
- I/O Routing Location Register
- I/O Routing Location Register
- I/O Routing Location Register
- I/O Routing Pin Enable Register
- Software Level Register
- Software Pulse Register
Structs§
- Register block
Type Aliases§
- CH0_CTRL (rw) register accessor: Channel Control Register
- CH1_CTRL (rw) register accessor: Channel Control Register
- CH2_CTRL (rw) register accessor: Channel Control Register
- CH3_CTRL (rw) register accessor: Channel Control Register
- CH4_CTRL (rw) register accessor: Channel Control Register
- CH5_CTRL (rw) register accessor: Channel Control Register
- CH6_CTRL (rw) register accessor: Channel Control Register
- CH7_CTRL (rw) register accessor: Channel Control Register
- CH8_CTRL (rw) register accessor: Channel Control Register
- CH9_CTRL (rw) register accessor: Channel Control Register
- CH10_CTRL (rw) register accessor: Channel Control Register
- CH11_CTRL (rw) register accessor: Channel Control Register
- CTRL (rw) register accessor: Control Register
- DMAREQ0 (rw) register accessor: DMA Request 0 Register
- DMAREQ1 (rw) register accessor: DMA Request 1 Register
- PEEK (r) register accessor: PRS Channel Values
- ROUTELOC0 (rw) register accessor: I/O Routing Location Register
- ROUTELOC1 (rw) register accessor: I/O Routing Location Register
- ROUTELOC2 (rw) register accessor: I/O Routing Location Register
- ROUTEPEN (rw) register accessor: I/O Routing Pin Enable Register
- SWLEVEL (rw) register accessor: Software Level Register
- SWPULSE (w) register accessor: Software Pulse Register