Struct efm32pg1b_pac :: Ldma Copy item path

impl Ldma

pub const PTR: const RegisterBlock = {0x400e2000 as const ldma::RegisterBlock}

Pointer to the register block

pub const fn ptr() -> *const RegisterBlock

Return the pointer to the register block

pub unsafe fn steal() -> Self

Steal an instance of this peripheral

§Safety

Ensure that the new instance of the peripheral cannot be used in a way that may race with any existing instances, for example by only accessing read-only or write-only registers, or by consuming the original peripheral and using critical sections to coordinate access between multiple new instances.

Additionally, other software such as HALs may rely on only one peripheral instance existing to ensure memory safety; ensure no stolen instances are passed to such software.

Methods from Deref<Target = RegisterBlock>§

pub fn ctrl(&self) -> &Ctrl

0x00 - DMA Control Register

pub fn status(&self) -> &Status

0x04 - DMA Status Register

pub fn sync(&self) -> &Sync

0x08 - DMA Synchronization Trigger Register (Single-Cycle RMW)

pub fn chen(&self) -> &Chen

0x20 - DMA Channel Enable Register (Single-Cycle RMW)

pub fn chbusy(&self) -> &Chbusy

0x24 - DMA Channel Busy Register

pub fn chdone(&self) -> &Chdone

0x28 - DMA Channel Linking Done Register (Single-Cycle RMW)

pub fn dbghalt(&self) -> &Dbghalt

0x2c - DMA Channel Debug Halt Register

pub fn swreq(&self) -> &Swreq

0x30 - DMA Channel Software Transfer Request Register

pub fn reqdis(&self) -> &Reqdis

0x34 - DMA Channel Request Disable Register

pub fn reqpend(&self) -> &Reqpend

0x38 - DMA Channel Requests Pending Register

pub fn linkload(&self) -> &Linkload

0x3c - DMA Channel Link Load Register

pub fn reqclear(&self) -> &Reqclear

0x40 - DMA Channel Request Clear Register

pub fn if_(&self) -> &If

0x60 - Interrupt Flag Register

pub fn ifs(&self) -> &Ifs

0x64 - Interrupt Flag Set Register

pub fn ifc(&self) -> &Ifc

0x68 - Interrupt Flag Clear Register

pub fn ien(&self) -> &Ien

0x6c - Interrupt Enable Register

pub fn ch0_reqsel(&self) -> &Ch0Reqsel

0x80 - Channel Peripheral Request Select Register

pub fn ch0_cfg(&self) -> &Ch0Cfg

0x84 - Channel Configuration Register

pub fn ch0_loop(&self) -> &Ch0Loop

0x88 - Channel Loop Counter Register

pub fn ch0_ctrl(&self) -> &Ch0Ctrl

0x8c - Channel Descriptor Control Word Register

pub fn ch0_src(&self) -> &Ch0Src

0x90 - Channel Descriptor Source Data Address Register

pub fn ch0_dst(&self) -> &Ch0Dst

0x94 - Channel Descriptor Destination Data Address Register

pub fn ch0_link(&self) -> &Ch0Link

0x98 - Channel Descriptor Link Structure Address Register

pub fn ch1_reqsel(&self) -> &Ch1Reqsel

0xb0 - Channel Peripheral Request Select Register

pub fn ch1_cfg(&self) -> &Ch1Cfg

0xb4 - Channel Configuration Register

pub fn ch1_loop(&self) -> &Ch1Loop

0xb8 - Channel Loop Counter Register

pub fn ch1_ctrl(&self) -> &Ch1Ctrl

0xbc - Channel Descriptor Control Word Register

pub fn ch1_src(&self) -> &Ch1Src

0xc0 - Channel Descriptor Source Data Address Register

pub fn ch1_dst(&self) -> &Ch1Dst

0xc4 - Channel Descriptor Destination Data Address Register

pub fn ch1_link(&self) -> &Ch1Link

0xc8 - Channel Descriptor Link Structure Address Register

pub fn ch2_reqsel(&self) -> &Ch2Reqsel

0xe0 - Channel Peripheral Request Select Register

pub fn ch2_cfg(&self) -> &Ch2Cfg

0xe4 - Channel Configuration Register

pub fn ch2_loop(&self) -> &Ch2Loop

0xe8 - Channel Loop Counter Register

pub fn ch2_ctrl(&self) -> &Ch2Ctrl

0xec - Channel Descriptor Control Word Register

pub fn ch2_src(&self) -> &Ch2Src

0xf0 - Channel Descriptor Source Data Address Register

pub fn ch2_dst(&self) -> &Ch2Dst

0xf4 - Channel Descriptor Destination Data Address Register

pub fn ch2_link(&self) -> &Ch2Link

0xf8 - Channel Descriptor Link Structure Address Register

pub fn ch3_reqsel(&self) -> &Ch3Reqsel

0x110 - Channel Peripheral Request Select Register

pub fn ch3_cfg(&self) -> &Ch3Cfg

0x114 - Channel Configuration Register

pub fn ch3_loop(&self) -> &Ch3Loop

0x118 - Channel Loop Counter Register

pub fn ch3_ctrl(&self) -> &Ch3Ctrl

0x11c - Channel Descriptor Control Word Register

pub fn ch3_src(&self) -> &Ch3Src

0x120 - Channel Descriptor Source Data Address Register

pub fn ch3_dst(&self) -> &Ch3Dst

0x124 - Channel Descriptor Destination Data Address Register

pub fn ch3_link(&self) -> &Ch3Link

0x128 - Channel Descriptor Link Structure Address Register

pub fn ch4_reqsel(&self) -> &Ch4Reqsel

0x140 - Channel Peripheral Request Select Register

pub fn ch4_cfg(&self) -> &Ch4Cfg

0x144 - Channel Configuration Register

pub fn ch4_loop(&self) -> &Ch4Loop

0x148 - Channel Loop Counter Register

pub fn ch4_ctrl(&self) -> &Ch4Ctrl

0x14c - Channel Descriptor Control Word Register

pub fn ch4_src(&self) -> &Ch4Src

0x150 - Channel Descriptor Source Data Address Register

pub fn ch4_dst(&self) -> &Ch4Dst

0x154 - Channel Descriptor Destination Data Address Register

pub fn ch4_link(&self) -> &Ch4Link

0x158 - Channel Descriptor Link Structure Address Register

pub fn ch5_reqsel(&self) -> &Ch5Reqsel

0x170 - Channel Peripheral Request Select Register

pub fn ch5_cfg(&self) -> &Ch5Cfg

0x174 - Channel Configuration Register

pub fn ch5_loop(&self) -> &Ch5Loop

0x178 - Channel Loop Counter Register

pub fn ch5_ctrl(&self) -> &Ch5Ctrl

0x17c - Channel Descriptor Control Word Register

pub fn ch5_src(&self) -> &Ch5Src

0x180 - Channel Descriptor Source Data Address Register

pub fn ch5_dst(&self) -> &Ch5Dst

0x184 - Channel Descriptor Destination Data Address Register

pub fn ch5_link(&self) -> &Ch5Link

0x188 - Channel Descriptor Link Structure Address Register

pub fn ch6_reqsel(&self) -> &Ch6Reqsel

0x1a0 - Channel Peripheral Request Select Register

pub fn ch6_cfg(&self) -> &Ch6Cfg

0x1a4 - Channel Configuration Register

pub fn ch6_loop(&self) -> &Ch6Loop

0x1a8 - Channel Loop Counter Register

pub fn ch6_ctrl(&self) -> &Ch6Ctrl

0x1ac - Channel Descriptor Control Word Register

pub fn ch6_src(&self) -> &Ch6Src

0x1b0 - Channel Descriptor Source Data Address Register

pub fn ch6_dst(&self) -> &Ch6Dst

0x1b4 - Channel Descriptor Destination Data Address Register

pub fn ch6_link(&self) -> &Ch6Link

0x1b8 - Channel Descriptor Link Structure Address Register

pub fn ch7_reqsel(&self) -> &Ch7Reqsel

0x1d0 - Channel Peripheral Request Select Register

pub fn ch7_cfg(&self) -> &Ch7Cfg

0x1d4 - Channel Configuration Register

pub fn ch7_loop(&self) -> &Ch7Loop

0x1d8 - Channel Loop Counter Register

pub fn ch7_ctrl(&self) -> &Ch7Ctrl

0x1dc - Channel Descriptor Control Word Register

pub fn ch7_src(&self) -> &Ch7Src

0x1e0 - Channel Descriptor Source Data Address Register

pub fn ch7_dst(&self) -> &Ch7Dst

0x1e4 - Channel Descriptor Destination Data Address Register

pub fn ch7_link(&self) -> &Ch7Link

0x1e8 - Channel Descriptor Link Structure Address Register

Trait Implementations§

impl Debug for Ldma

fn fmt(&self, f: &mut Formatter<'_>) -> Result

Formats the value using the given formatter. Read more

impl Deref for Ldma

type Target = RegisterBlock

The resulting type after dereferencing.

fn deref(&self) -> &Self::Target

Dereferences the value.

impl Send for Ldma

Auto Trait Implementations§

impl UnwindSafe for Ldma

Blanket Implementations§

impl<T> Any for T
where T: 'static + ?Sized,

fn type_id(&self) -> TypeId

Gets the TypeId of self. Read more

impl<T> Borrow<T> for T
where T: ?Sized,

fn borrow(&self) -> &T

Immutably borrows from an owned value. Read more

impl<T> BorrowMut<T> for T
where T: ?Sized,

fn borrow_mut(&mut self) -> &mut T

Mutably borrows from an owned value. Read more

impl<T> From<T> for T

fn from(t: T) -> T

Returns the argument unchanged.

impl<T, U> Into for T
where U: From<T>,

fn into(self) -> U

Calls U::from(self).

That is, this conversion is whatever the implementation of From<T> for U chooses to do.

impl<T, U> TryFrom for T
where U: Into<T>,

type Error = Infallible

The type returned in the event of a conversion error.

fn try_from(value: U) -> Result<T, <T as TryFrom>::Error>

Performs the conversion.

impl<T, U> TryInto for T
where U: TryFrom<T>,

type Error = >::Error

The type returned in the event of a conversion error.