Module efm32pg1b_pac::leuart0

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Expand description

LEUART0

Modules§

  • Clock Control Register
  • Command Register
  • Control Register
  • Freeze Register
  • Interrupt Enable Register
  • Interrupt Flag Register
  • Interrupt Flag Clear Register
  • Interrupt Flag Set Register
  • LEUART Input Register
  • Pulse Control Register
  • I/O Routing Location Register
  • I/O Routing Pin Enable Register
  • Receive Buffer Data Register
  • Receive Buffer Data Extended Register
  • Receive Buffer Data Extended Peek Register
  • Signal Frame Register
  • Start Frame Register
  • Status Register
  • Synchronization Busy Register
  • Transmit Buffer Data Register
  • Transmit Buffer Data Extended Register

Structs§

Type Aliases§

  • CLKDIV (rw) register accessor: Clock Control Register
  • CMD (w) register accessor: Command Register
  • CTRL (rw) register accessor: Control Register
  • FREEZE (rw) register accessor: Freeze Register
  • IEN (rw) register accessor: Interrupt Enable Register
  • IF (r) register accessor: Interrupt Flag Register
  • IFC (w) register accessor: Interrupt Flag Clear Register
  • IFS (w) register accessor: Interrupt Flag Set Register
  • INPUT (rw) register accessor: LEUART Input Register
  • PULSECTRL (rw) register accessor: Pulse Control Register
  • ROUTELOC0 (rw) register accessor: I/O Routing Location Register
  • ROUTEPEN (rw) register accessor: I/O Routing Pin Enable Register
  • RXDATA (r) register accessor: Receive Buffer Data Register
  • RXDATAX (r) register accessor: Receive Buffer Data Extended Register
  • RXDATAXP (r) register accessor: Receive Buffer Data Extended Peek Register
  • SIGFRAME (rw) register accessor: Signal Frame Register
  • STARTFRAME (rw) register accessor: Start Frame Register
  • STATUS (r) register accessor: Status Register
  • SYNCBUSY (r) register accessor: Synchronization Busy Register
  • TXDATA (rw) register accessor: Transmit Buffer Data Register
  • TXDATAX (rw) register accessor: Transmit Buffer Data Extended Register