xwrl64xx-pac 0.6.0

A Peripheral Access Crate for the ti xwrl64xx radar devkit
Documentation 
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#[doc = "Register `HW_SPARE_WPH` reader"]
pub type R = crate::R<HwSpareWphSpec>;
#[doc = "Register `HW_SPARE_WPH` writer"]
pub type W = crate::W<HwSpareWphSpec>;
#[doc = "Field `tpcc_a_intg` reader - 0:0\\]
Status of Interrupt from TPCC_A. Set only if Interupt is unmasked in TPCC_A_INTAGG_MASK Wrie 0x1 to clear this interrupt."]
pub type TpccAIntgR = crate::BitReader;
#[doc = "Field `tpcc_a_intg` writer - 0:0\\]
Status of Interrupt from TPCC_A. Set only if Interupt is unmasked in TPCC_A_INTAGG_MASK Wrie 0x1 to clear this interrupt."]
pub type TpccAIntgW<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `tpcc_a_int0` reader - 1:1\\]
Status of Interrupt from TPCC A Set only if Interupt is unmasked in TPCC_A_INTAGG_MASK Wrie 0x1 to clear this interrupt."]
pub type TpccAInt0R = crate::BitReader;
#[doc = "Field `tpcc_a_int0` writer - 1:1\\]
Status of Interrupt from TPCC A Set only if Interupt is unmasked in TPCC_A_INTAGG_MASK Wrie 0x1 to clear this interrupt."]
pub type TpccAInt0W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `tpcc_a_int1` reader - 2:2\\]
Status of Interrupt from TPCC_A. Set only if Interupt is unmasked in TPCC_A_INTAGG_MASK Wrie 0x1 to clear this interrupt."]
pub type TpccAInt1R = crate::BitReader;
#[doc = "Field `tpcc_a_int1` writer - 2:2\\]
Status of Interrupt from TPCC_A. Set only if Interupt is unmasked in TPCC_A_INTAGG_MASK Wrie 0x1 to clear this interrupt."]
pub type TpccAInt1W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `tpcc_a_int2` reader - 3:3\\]
Status of Interrupt from TPCC_A. Set only if Interupt is unmasked in TPCC_A_INTAGG_MASK Wrie 0x1 to clear this interrupt."]
pub type TpccAInt2R = crate::BitReader;
#[doc = "Field `tpcc_a_int2` writer - 3:3\\]
Status of Interrupt from TPCC_A. Set only if Interupt is unmasked in TPCC_A_INTAGG_MASK Wrie 0x1 to clear this interrupt."]
pub type TpccAInt2W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `tpcc_a_int3` reader - 4:4\\]
Status of Interrupt from TPCC_A. Set only if Interupt is unmasked in TPCC_A_INTAGG_MASK Wrie 0x1 to clear this interrupt."]
pub type TpccAInt3R = crate::BitReader;
#[doc = "Field `tpcc_a_int3` writer - 4:4\\]
Status of Interrupt from TPCC_A. Set only if Interupt is unmasked in TPCC_A_INTAGG_MASK Wrie 0x1 to clear this interrupt."]
pub type TpccAInt3W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `tpcc_a_int4` reader - 5:5\\]
Status of Interrupt from TPCC_A. Set only if Interupt is unmasked in TPCC_A_INTAGG_MASK Wrie 0x1 to clear this interrupt."]
pub type TpccAInt4R = crate::BitReader;
#[doc = "Field `tpcc_a_int4` writer - 5:5\\]
Status of Interrupt from TPCC_A. Set only if Interupt is unmasked in TPCC_A_INTAGG_MASK Wrie 0x1 to clear this interrupt."]
pub type TpccAInt4W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `tpcc_a_int5` reader - 6:6\\]
Status of Interrupt from TPCC_A. Set only if Interupt is unmasked in TPCC_A_INTAGG_MASK Wrie 0x1 to clear this interrupt."]
pub type TpccAInt5R = crate::BitReader;
#[doc = "Field `tpcc_a_int5` writer - 6:6\\]
Status of Interrupt from TPCC_A. Set only if Interupt is unmasked in TPCC_A_INTAGG_MASK Wrie 0x1 to clear this interrupt."]
pub type TpccAInt5W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `tpcc_a_int6` reader - 7:7\\]
Status of Interrupt from TPCC_A. Set only if Interupt is unmasked in TPCC_A_INTAGG_MASK Wrie 0x1 to clear this interrupt."]
pub type TpccAInt6R = crate::BitReader;
#[doc = "Field `tpcc_a_int6` writer - 7:7\\]
Status of Interrupt from TPCC_A. Set only if Interupt is unmasked in TPCC_A_INTAGG_MASK Wrie 0x1 to clear this interrupt."]
pub type TpccAInt6W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `tpcc_a_int7` reader - 8:8\\]
Status of Interrupt from TPCC_A. Set only if Interupt is unmasked in TPCC_A_INTAGG_MASK Wrie 0x1 to clear this interrupt."]
pub type TpccAInt7R = crate::BitReader;
#[doc = "Field `tpcc_a_int7` writer - 8:8\\]
Status of Interrupt from TPCC_A. Set only if Interupt is unmasked in TPCC_A_INTAGG_MASK Wrie 0x1 to clear this interrupt."]
pub type TpccAInt7W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `tptc_a0` reader - 16:16\\]
Status of Interrupt from TPTC A0. Set only if Interupt is unmasked in TPCC_A_INTAGG_MASK Wrie 0x1 to clear this interrupt."]
pub type TptcA0R = crate::BitReader;
#[doc = "Field `tptc_a0` writer - 16:16\\]
Status of Interrupt from TPTC A0. Set only if Interupt is unmasked in TPCC_A_INTAGG_MASK Wrie 0x1 to clear this interrupt."]
pub type TptcA0W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `tptc_a1` reader - 17:17\\]
Status of Interrupt from TPTC A1. Set only if Interupt is unmasked in TPCC_A_INTAGG_MASK Wrie 0x1 to clear this interrupt."]
pub type TptcA1R = crate::BitReader;
#[doc = "Field `tptc_a1` writer - 17:17\\]
Status of Interrupt from TPTC A1. Set only if Interupt is unmasked in TPCC_A_INTAGG_MASK Wrie 0x1 to clear this interrupt."]
pub type TptcA1W<'a, REG> = crate::BitWriter<'a, REG>;
impl R {
    #[doc = "Bit 0 - 0:0\\]
Status of Interrupt from TPCC_A. Set only if Interupt is unmasked in TPCC_A_INTAGG_MASK Wrie 0x1 to clear this interrupt."]
    #[inline(always)]
    pub fn tpcc_a_intg(&self) -> TpccAIntgR {
        TpccAIntgR::new((self.bits & 1) != 0)
    }
    #[doc = "Bit 1 - 1:1\\]
Status of Interrupt from TPCC A Set only if Interupt is unmasked in TPCC_A_INTAGG_MASK Wrie 0x1 to clear this interrupt."]
    #[inline(always)]
    pub fn tpcc_a_int0(&self) -> TpccAInt0R {
        TpccAInt0R::new(((self.bits >> 1) & 1) != 0)
    }
    #[doc = "Bit 2 - 2:2\\]
Status of Interrupt from TPCC_A. Set only if Interupt is unmasked in TPCC_A_INTAGG_MASK Wrie 0x1 to clear this interrupt."]
    #[inline(always)]
    pub fn tpcc_a_int1(&self) -> TpccAInt1R {
        TpccAInt1R::new(((self.bits >> 2) & 1) != 0)
    }
    #[doc = "Bit 3 - 3:3\\]
Status of Interrupt from TPCC_A. Set only if Interupt is unmasked in TPCC_A_INTAGG_MASK Wrie 0x1 to clear this interrupt."]
    #[inline(always)]
    pub fn tpcc_a_int2(&self) -> TpccAInt2R {
        TpccAInt2R::new(((self.bits >> 3) & 1) != 0)
    }
    #[doc = "Bit 4 - 4:4\\]
Status of Interrupt from TPCC_A. Set only if Interupt is unmasked in TPCC_A_INTAGG_MASK Wrie 0x1 to clear this interrupt."]
    #[inline(always)]
    pub fn tpcc_a_int3(&self) -> TpccAInt3R {
        TpccAInt3R::new(((self.bits >> 4) & 1) != 0)
    }
    #[doc = "Bit 5 - 5:5\\]
Status of Interrupt from TPCC_A. Set only if Interupt is unmasked in TPCC_A_INTAGG_MASK Wrie 0x1 to clear this interrupt."]
    #[inline(always)]
    pub fn tpcc_a_int4(&self) -> TpccAInt4R {
        TpccAInt4R::new(((self.bits >> 5) & 1) != 0)
    }
    #[doc = "Bit 6 - 6:6\\]
Status of Interrupt from TPCC_A. Set only if Interupt is unmasked in TPCC_A_INTAGG_MASK Wrie 0x1 to clear this interrupt."]
    #[inline(always)]
    pub fn tpcc_a_int5(&self) -> TpccAInt5R {
        TpccAInt5R::new(((self.bits >> 6) & 1) != 0)
    }
    #[doc = "Bit 7 - 7:7\\]
Status of Interrupt from TPCC_A. Set only if Interupt is unmasked in TPCC_A_INTAGG_MASK Wrie 0x1 to clear this interrupt."]
    #[inline(always)]
    pub fn tpcc_a_int6(&self) -> TpccAInt6R {
        TpccAInt6R::new(((self.bits >> 7) & 1) != 0)
    }
    #[doc = "Bit 8 - 8:8\\]
Status of Interrupt from TPCC_A. Set only if Interupt is unmasked in TPCC_A_INTAGG_MASK Wrie 0x1 to clear this interrupt."]
    #[inline(always)]
    pub fn tpcc_a_int7(&self) -> TpccAInt7R {
        TpccAInt7R::new(((self.bits >> 8) & 1) != 0)
    }
    #[doc = "Bit 16 - 16:16\\]
Status of Interrupt from TPTC A0. Set only if Interupt is unmasked in TPCC_A_INTAGG_MASK Wrie 0x1 to clear this interrupt."]
    #[inline(always)]
    pub fn tptc_a0(&self) -> TptcA0R {
        TptcA0R::new(((self.bits >> 16) & 1) != 0)
    }
    #[doc = "Bit 17 - 17:17\\]
Status of Interrupt from TPTC A1. Set only if Interupt is unmasked in TPCC_A_INTAGG_MASK Wrie 0x1 to clear this interrupt."]
    #[inline(always)]
    pub fn tptc_a1(&self) -> TptcA1R {
        TptcA1R::new(((self.bits >> 17) & 1) != 0)
    }
}
impl W {
    #[doc = "Bit 0 - 0:0\\]
Status of Interrupt from TPCC_A. Set only if Interupt is unmasked in TPCC_A_INTAGG_MASK Wrie 0x1 to clear this interrupt."]
    #[inline(always)]
    #[must_use]
    pub fn tpcc_a_intg(&mut self) -> TpccAIntgW<HwSpareWphSpec> {
        TpccAIntgW::new(self, 0)
    }
    #[doc = "Bit 1 - 1:1\\]
Status of Interrupt from TPCC A Set only if Interupt is unmasked in TPCC_A_INTAGG_MASK Wrie 0x1 to clear this interrupt."]
    #[inline(always)]
    #[must_use]
    pub fn tpcc_a_int0(&mut self) -> TpccAInt0W<HwSpareWphSpec> {
        TpccAInt0W::new(self, 1)
    }
    #[doc = "Bit 2 - 2:2\\]
Status of Interrupt from TPCC_A. Set only if Interupt is unmasked in TPCC_A_INTAGG_MASK Wrie 0x1 to clear this interrupt."]
    #[inline(always)]
    #[must_use]
    pub fn tpcc_a_int1(&mut self) -> TpccAInt1W<HwSpareWphSpec> {
        TpccAInt1W::new(self, 2)
    }
    #[doc = "Bit 3 - 3:3\\]
Status of Interrupt from TPCC_A. Set only if Interupt is unmasked in TPCC_A_INTAGG_MASK Wrie 0x1 to clear this interrupt."]
    #[inline(always)]
    #[must_use]
    pub fn tpcc_a_int2(&mut self) -> TpccAInt2W<HwSpareWphSpec> {
        TpccAInt2W::new(self, 3)
    }
    #[doc = "Bit 4 - 4:4\\]
Status of Interrupt from TPCC_A. Set only if Interupt is unmasked in TPCC_A_INTAGG_MASK Wrie 0x1 to clear this interrupt."]
    #[inline(always)]
    #[must_use]
    pub fn tpcc_a_int3(&mut self) -> TpccAInt3W<HwSpareWphSpec> {
        TpccAInt3W::new(self, 4)
    }
    #[doc = "Bit 5 - 5:5\\]
Status of Interrupt from TPCC_A. Set only if Interupt is unmasked in TPCC_A_INTAGG_MASK Wrie 0x1 to clear this interrupt."]
    #[inline(always)]
    #[must_use]
    pub fn tpcc_a_int4(&mut self) -> TpccAInt4W<HwSpareWphSpec> {
        TpccAInt4W::new(self, 5)
    }
    #[doc = "Bit 6 - 6:6\\]
Status of Interrupt from TPCC_A. Set only if Interupt is unmasked in TPCC_A_INTAGG_MASK Wrie 0x1 to clear this interrupt."]
    #[inline(always)]
    #[must_use]
    pub fn tpcc_a_int5(&mut self) -> TpccAInt5W<HwSpareWphSpec> {
        TpccAInt5W::new(self, 6)
    }
    #[doc = "Bit 7 - 7:7\\]
Status of Interrupt from TPCC_A. Set only if Interupt is unmasked in TPCC_A_INTAGG_MASK Wrie 0x1 to clear this interrupt."]
    #[inline(always)]
    #[must_use]
    pub fn tpcc_a_int6(&mut self) -> TpccAInt6W<HwSpareWphSpec> {
        TpccAInt6W::new(self, 7)
    }
    #[doc = "Bit 8 - 8:8\\]
Status of Interrupt from TPCC_A. Set only if Interupt is unmasked in TPCC_A_INTAGG_MASK Wrie 0x1 to clear this interrupt."]
    #[inline(always)]
    #[must_use]
    pub fn tpcc_a_int7(&mut self) -> TpccAInt7W<HwSpareWphSpec> {
        TpccAInt7W::new(self, 8)
    }
    #[doc = "Bit 16 - 16:16\\]
Status of Interrupt from TPTC A0. Set only if Interupt is unmasked in TPCC_A_INTAGG_MASK Wrie 0x1 to clear this interrupt."]
    #[inline(always)]
    #[must_use]
    pub fn tptc_a0(&mut self) -> TptcA0W<HwSpareWphSpec> {
        TptcA0W::new(self, 16)
    }
    #[doc = "Bit 17 - 17:17\\]
Status of Interrupt from TPTC A1. Set only if Interupt is unmasked in TPCC_A_INTAGG_MASK Wrie 0x1 to clear this interrupt."]
    #[inline(always)]
    #[must_use]
    pub fn tptc_a1(&mut self) -> TptcA1W<HwSpareWphSpec> {
        TptcA1W::new(self, 17)
    }
}
#[doc = "HW_SPARE_WPH\n\nYou can [`read`](crate::Reg::read) this register and get [`hw_spare_wph::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`hw_spare_wph::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
pub struct HwSpareWphSpec;
impl crate::RegisterSpec for HwSpareWphSpec {
    type Ux = u32;
}
#[doc = "`read()` method returns [`hw_spare_wph::R`](R) reader structure"]
impl crate::Readable for HwSpareWphSpec {}
#[doc = "`write(|w| ..)` method takes [`hw_spare_wph::W`](W) writer structure"]
impl crate::Writable for HwSpareWphSpec {
    type Safety = crate::Unsafe;
    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
}
#[doc = "`reset()` method sets HW_SPARE_WPH to value 0"]
impl crate::Resettable for HwSpareWphSpec {
    const RESET_VALUE: u32 = 0;
}