xwrl64xx-pac 0.6.0

A Peripheral Access Crate for the ti xwrl64xx radar devkit
Documentation 
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277

#[doc = "Register `APPSS_ERRAGG_MASK1` reader"]
pub type R = crate::R<AppssErraggMask1Spec>;
#[doc = "Register `APPSS_ERRAGG_MASK1` writer"]
pub type W = crate::W<AppssErraggMask1Spec>;
#[doc = "Field `cluster1_power_down_access_err` reader - 0:0\\]
Mask Interrupt from cluster1_power_down_access_err Interrupt APPSS_ACCESS_ERRAGG 1 : Interrupt is Masked 0 : Interrupt is Unmasked"]
pub type Cluster1PowerDownAccessErrR = crate::BitReader;
#[doc = "Field `cluster1_power_down_access_err` writer - 0:0\\]
Mask Interrupt from cluster1_power_down_access_err Interrupt APPSS_ACCESS_ERRAGG 1 : Interrupt is Masked 0 : Interrupt is Unmasked"]
pub type Cluster1PowerDownAccessErrW<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `cluster2_power_down_access_err` reader - 1:1\\]
Mask Interrupt from cluster2_power_down_access_err Interrupt APPSS_ACCESS_ERRAGG 1 : Interrupt is Masked 0 : Interrupt is Unmasked"]
pub type Cluster2PowerDownAccessErrR = crate::BitReader;
#[doc = "Field `cluster2_power_down_access_err` writer - 1:1\\]
Mask Interrupt from cluster2_power_down_access_err Interrupt APPSS_ACCESS_ERRAGG 1 : Interrupt is Masked 0 : Interrupt is Unmasked"]
pub type Cluster2PowerDownAccessErrW<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `cluster3_power_down_access_err` reader - 2:2\\]
Mask Interrupt from cluster3_power_down_access_err Interrupt APPSS_ACCESS_ERRAGG 1 : Interrupt is Masked 0 : Interrupt is Unmasked"]
pub type Cluster3PowerDownAccessErrR = crate::BitReader;
#[doc = "Field `cluster3_power_down_access_err` writer - 2:2\\]
Mask Interrupt from cluster3_power_down_access_err Interrupt APPSS_ACCESS_ERRAGG 1 : Interrupt is Masked 0 : Interrupt is Unmasked"]
pub type Cluster3PowerDownAccessErrW<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `cluster4_power_down_access_err` reader - 3:3\\]
Mask Interrupt from cluster4_power_down_access_err Interrupt APPSS_ACCESS_ERRAGG 1 : Interrupt is Masked 0 : Interrupt is Unmasked"]
pub type Cluster4PowerDownAccessErrR = crate::BitReader;
#[doc = "Field `cluster4_power_down_access_err` writer - 3:3\\]
Mask Interrupt from cluster4_power_down_access_err Interrupt APPSS_ACCESS_ERRAGG 1 : Interrupt is Masked 0 : Interrupt is Unmasked"]
pub type Cluster4PowerDownAccessErrW<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `cluster5_power_down_access_err` reader - 4:4\\]
Mask Interrupt from cluster5_power_down_access_err Interrupt APPSS_ACCESS_ERRAGG 1 : Interrupt is Masked 0 : Interrupt is Unmasked"]
pub type Cluster5PowerDownAccessErrR = crate::BitReader;
#[doc = "Field `cluster5_power_down_access_err` writer - 4:4\\]
Mask Interrupt from cluster5_power_down_access_err Interrupt APPSS_ACCESS_ERRAGG 1 : Interrupt is Masked 0 : Interrupt is Unmasked"]
pub type Cluster5PowerDownAccessErrW<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `cluster6_power_down_access_err` reader - 5:5\\]
Mask Interrupt from cluster6_power_down_access_err Interrupt APPSS_ACCESS_ERRAGG 1 : Interrupt is Masked 0 : Interrupt is Unmasked"]
pub type Cluster6PowerDownAccessErrR = crate::BitReader;
#[doc = "Field `cluster6_power_down_access_err` writer - 5:5\\]
Mask Interrupt from cluster6_power_down_access_err Interrupt APPSS_ACCESS_ERRAGG 1 : Interrupt is Masked 0 : Interrupt is Unmasked"]
pub type Cluster6PowerDownAccessErrW<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `cluster7_power_down_access_err` reader - 6:6\\]
Mask Interrupt from cluster7_power_down_access_err Interrupt APPSS_ACCESS_ERRAGG 1 : Interrupt is Masked 0 : Interrupt is Unmasked"]
pub type Cluster7PowerDownAccessErrR = crate::BitReader;
#[doc = "Field `cluster7_power_down_access_err` writer - 6:6\\]
Mask Interrupt from cluster7_power_down_access_err Interrupt APPSS_ACCESS_ERRAGG 1 : Interrupt is Masked 0 : Interrupt is Unmasked"]
pub type Cluster7PowerDownAccessErrW<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `cluster8_power_down_access_err` reader - 7:7\\]
Mask Interrupt from cluster8_power_down_access_err Interrupt APPSS_ACCESS_ERRAGG 1 : Interrupt is Masked 0 : Interrupt is Unmasked"]
pub type Cluster8PowerDownAccessErrR = crate::BitReader;
#[doc = "Field `cluster8_power_down_access_err` writer - 7:7\\]
Mask Interrupt from cluster8_power_down_access_err Interrupt APPSS_ACCESS_ERRAGG 1 : Interrupt is Masked 0 : Interrupt is Unmasked"]
pub type Cluster8PowerDownAccessErrW<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `cluster9_power_down_access_err` reader - 8:8\\]
Mask Interrupt from cluster9_power_down_access_err Interrupt APPSS_ACCESS_ERRAGG 1 : Interrupt is Masked 0 : Interrupt is Unmasked"]
pub type Cluster9PowerDownAccessErrR = crate::BitReader;
#[doc = "Field `cluster9_power_down_access_err` writer - 8:8\\]
Mask Interrupt from cluster9_power_down_access_err Interrupt APPSS_ACCESS_ERRAGG 1 : Interrupt is Masked 0 : Interrupt is Unmasked"]
pub type Cluster9PowerDownAccessErrW<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `cluster10_power_down_access_err` reader - 9:9\\]
Mask Interrupt from cluster10_power_down_access_err Interrupt APPSS_ACCESS_ERRAGG 1 : Interrupt is Masked 0 : Interrupt is Unmasked"]
pub type Cluster10PowerDownAccessErrR = crate::BitReader;
#[doc = "Field `cluster10_power_down_access_err` writer - 9:9\\]
Mask Interrupt from cluster10_power_down_access_err Interrupt APPSS_ACCESS_ERRAGG 1 : Interrupt is Masked 0 : Interrupt is Unmasked"]
pub type Cluster10PowerDownAccessErrW<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `cluster11_power_down_access_err` reader - 10:10\\]
Mask Interrupt from cluster11_power_down_access_err Interrupt APPSS_ACCESS_ERRAGG 1 : Interrupt is Masked 0 : Interrupt is Unmasked"]
pub type Cluster11PowerDownAccessErrR = crate::BitReader;
#[doc = "Field `cluster11_power_down_access_err` writer - 10:10\\]
Mask Interrupt from cluster11_power_down_access_err Interrupt APPSS_ACCESS_ERRAGG 1 : Interrupt is Masked 0 : Interrupt is Unmasked"]
pub type Cluster11PowerDownAccessErrW<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `cluster12_power_down_access_err` reader - 11:11\\]
Mask Interrupt from cluster12_power_down_access_err Interrupt APPSS_ACCESS_ERRAGG 1 : Interrupt is Masked 0 : Interrupt is Unmasked"]
pub type Cluster12PowerDownAccessErrR = crate::BitReader;
#[doc = "Field `cluster12_power_down_access_err` writer - 11:11\\]
Mask Interrupt from cluster12_power_down_access_err Interrupt APPSS_ACCESS_ERRAGG 1 : Interrupt is Masked 0 : Interrupt is Unmasked"]
pub type Cluster12PowerDownAccessErrW<'a, REG> = crate::BitWriter<'a, REG>;
impl R {
    #[doc = "Bit 0 - 0:0\\]
Mask Interrupt from cluster1_power_down_access_err Interrupt APPSS_ACCESS_ERRAGG 1 : Interrupt is Masked 0 : Interrupt is Unmasked"]
    #[inline(always)]
    pub fn cluster1_power_down_access_err(&self) -> Cluster1PowerDownAccessErrR {
        Cluster1PowerDownAccessErrR::new((self.bits & 1) != 0)
    }
    #[doc = "Bit 1 - 1:1\\]
Mask Interrupt from cluster2_power_down_access_err Interrupt APPSS_ACCESS_ERRAGG 1 : Interrupt is Masked 0 : Interrupt is Unmasked"]
    #[inline(always)]
    pub fn cluster2_power_down_access_err(&self) -> Cluster2PowerDownAccessErrR {
        Cluster2PowerDownAccessErrR::new(((self.bits >> 1) & 1) != 0)
    }
    #[doc = "Bit 2 - 2:2\\]
Mask Interrupt from cluster3_power_down_access_err Interrupt APPSS_ACCESS_ERRAGG 1 : Interrupt is Masked 0 : Interrupt is Unmasked"]
    #[inline(always)]
    pub fn cluster3_power_down_access_err(&self) -> Cluster3PowerDownAccessErrR {
        Cluster3PowerDownAccessErrR::new(((self.bits >> 2) & 1) != 0)
    }
    #[doc = "Bit 3 - 3:3\\]
Mask Interrupt from cluster4_power_down_access_err Interrupt APPSS_ACCESS_ERRAGG 1 : Interrupt is Masked 0 : Interrupt is Unmasked"]
    #[inline(always)]
    pub fn cluster4_power_down_access_err(&self) -> Cluster4PowerDownAccessErrR {
        Cluster4PowerDownAccessErrR::new(((self.bits >> 3) & 1) != 0)
    }
    #[doc = "Bit 4 - 4:4\\]
Mask Interrupt from cluster5_power_down_access_err Interrupt APPSS_ACCESS_ERRAGG 1 : Interrupt is Masked 0 : Interrupt is Unmasked"]
    #[inline(always)]
    pub fn cluster5_power_down_access_err(&self) -> Cluster5PowerDownAccessErrR {
        Cluster5PowerDownAccessErrR::new(((self.bits >> 4) & 1) != 0)
    }
    #[doc = "Bit 5 - 5:5\\]
Mask Interrupt from cluster6_power_down_access_err Interrupt APPSS_ACCESS_ERRAGG 1 : Interrupt is Masked 0 : Interrupt is Unmasked"]
    #[inline(always)]
    pub fn cluster6_power_down_access_err(&self) -> Cluster6PowerDownAccessErrR {
        Cluster6PowerDownAccessErrR::new(((self.bits >> 5) & 1) != 0)
    }
    #[doc = "Bit 6 - 6:6\\]
Mask Interrupt from cluster7_power_down_access_err Interrupt APPSS_ACCESS_ERRAGG 1 : Interrupt is Masked 0 : Interrupt is Unmasked"]
    #[inline(always)]
    pub fn cluster7_power_down_access_err(&self) -> Cluster7PowerDownAccessErrR {
        Cluster7PowerDownAccessErrR::new(((self.bits >> 6) & 1) != 0)
    }
    #[doc = "Bit 7 - 7:7\\]
Mask Interrupt from cluster8_power_down_access_err Interrupt APPSS_ACCESS_ERRAGG 1 : Interrupt is Masked 0 : Interrupt is Unmasked"]
    #[inline(always)]
    pub fn cluster8_power_down_access_err(&self) -> Cluster8PowerDownAccessErrR {
        Cluster8PowerDownAccessErrR::new(((self.bits >> 7) & 1) != 0)
    }
    #[doc = "Bit 8 - 8:8\\]
Mask Interrupt from cluster9_power_down_access_err Interrupt APPSS_ACCESS_ERRAGG 1 : Interrupt is Masked 0 : Interrupt is Unmasked"]
    #[inline(always)]
    pub fn cluster9_power_down_access_err(&self) -> Cluster9PowerDownAccessErrR {
        Cluster9PowerDownAccessErrR::new(((self.bits >> 8) & 1) != 0)
    }
    #[doc = "Bit 9 - 9:9\\]
Mask Interrupt from cluster10_power_down_access_err Interrupt APPSS_ACCESS_ERRAGG 1 : Interrupt is Masked 0 : Interrupt is Unmasked"]
    #[inline(always)]
    pub fn cluster10_power_down_access_err(&self) -> Cluster10PowerDownAccessErrR {
        Cluster10PowerDownAccessErrR::new(((self.bits >> 9) & 1) != 0)
    }
    #[doc = "Bit 10 - 10:10\\]
Mask Interrupt from cluster11_power_down_access_err Interrupt APPSS_ACCESS_ERRAGG 1 : Interrupt is Masked 0 : Interrupt is Unmasked"]
    #[inline(always)]
    pub fn cluster11_power_down_access_err(&self) -> Cluster11PowerDownAccessErrR {
        Cluster11PowerDownAccessErrR::new(((self.bits >> 10) & 1) != 0)
    }
    #[doc = "Bit 11 - 11:11\\]
Mask Interrupt from cluster12_power_down_access_err Interrupt APPSS_ACCESS_ERRAGG 1 : Interrupt is Masked 0 : Interrupt is Unmasked"]
    #[inline(always)]
    pub fn cluster12_power_down_access_err(&self) -> Cluster12PowerDownAccessErrR {
        Cluster12PowerDownAccessErrR::new(((self.bits >> 11) & 1) != 0)
    }
}
impl W {
    #[doc = "Bit 0 - 0:0\\]
Mask Interrupt from cluster1_power_down_access_err Interrupt APPSS_ACCESS_ERRAGG 1 : Interrupt is Masked 0 : Interrupt is Unmasked"]
    #[inline(always)]
    #[must_use]
    pub fn cluster1_power_down_access_err(
        &mut self,
    ) -> Cluster1PowerDownAccessErrW<AppssErraggMask1Spec> {
        Cluster1PowerDownAccessErrW::new(self, 0)
    }
    #[doc = "Bit 1 - 1:1\\]
Mask Interrupt from cluster2_power_down_access_err Interrupt APPSS_ACCESS_ERRAGG 1 : Interrupt is Masked 0 : Interrupt is Unmasked"]
    #[inline(always)]
    #[must_use]
    pub fn cluster2_power_down_access_err(
        &mut self,
    ) -> Cluster2PowerDownAccessErrW<AppssErraggMask1Spec> {
        Cluster2PowerDownAccessErrW::new(self, 1)
    }
    #[doc = "Bit 2 - 2:2\\]
Mask Interrupt from cluster3_power_down_access_err Interrupt APPSS_ACCESS_ERRAGG 1 : Interrupt is Masked 0 : Interrupt is Unmasked"]
    #[inline(always)]
    #[must_use]
    pub fn cluster3_power_down_access_err(
        &mut self,
    ) -> Cluster3PowerDownAccessErrW<AppssErraggMask1Spec> {
        Cluster3PowerDownAccessErrW::new(self, 2)
    }
    #[doc = "Bit 3 - 3:3\\]
Mask Interrupt from cluster4_power_down_access_err Interrupt APPSS_ACCESS_ERRAGG 1 : Interrupt is Masked 0 : Interrupt is Unmasked"]
    #[inline(always)]
    #[must_use]
    pub fn cluster4_power_down_access_err(
        &mut self,
    ) -> Cluster4PowerDownAccessErrW<AppssErraggMask1Spec> {
        Cluster4PowerDownAccessErrW::new(self, 3)
    }
    #[doc = "Bit 4 - 4:4\\]
Mask Interrupt from cluster5_power_down_access_err Interrupt APPSS_ACCESS_ERRAGG 1 : Interrupt is Masked 0 : Interrupt is Unmasked"]
    #[inline(always)]
    #[must_use]
    pub fn cluster5_power_down_access_err(
        &mut self,
    ) -> Cluster5PowerDownAccessErrW<AppssErraggMask1Spec> {
        Cluster5PowerDownAccessErrW::new(self, 4)
    }
    #[doc = "Bit 5 - 5:5\\]
Mask Interrupt from cluster6_power_down_access_err Interrupt APPSS_ACCESS_ERRAGG 1 : Interrupt is Masked 0 : Interrupt is Unmasked"]
    #[inline(always)]
    #[must_use]
    pub fn cluster6_power_down_access_err(
        &mut self,
    ) -> Cluster6PowerDownAccessErrW<AppssErraggMask1Spec> {
        Cluster6PowerDownAccessErrW::new(self, 5)
    }
    #[doc = "Bit 6 - 6:6\\]
Mask Interrupt from cluster7_power_down_access_err Interrupt APPSS_ACCESS_ERRAGG 1 : Interrupt is Masked 0 : Interrupt is Unmasked"]
    #[inline(always)]
    #[must_use]
    pub fn cluster7_power_down_access_err(
        &mut self,
    ) -> Cluster7PowerDownAccessErrW<AppssErraggMask1Spec> {
        Cluster7PowerDownAccessErrW::new(self, 6)
    }
    #[doc = "Bit 7 - 7:7\\]
Mask Interrupt from cluster8_power_down_access_err Interrupt APPSS_ACCESS_ERRAGG 1 : Interrupt is Masked 0 : Interrupt is Unmasked"]
    #[inline(always)]
    #[must_use]
    pub fn cluster8_power_down_access_err(
        &mut self,
    ) -> Cluster8PowerDownAccessErrW<AppssErraggMask1Spec> {
        Cluster8PowerDownAccessErrW::new(self, 7)
    }
    #[doc = "Bit 8 - 8:8\\]
Mask Interrupt from cluster9_power_down_access_err Interrupt APPSS_ACCESS_ERRAGG 1 : Interrupt is Masked 0 : Interrupt is Unmasked"]
    #[inline(always)]
    #[must_use]
    pub fn cluster9_power_down_access_err(
        &mut self,
    ) -> Cluster9PowerDownAccessErrW<AppssErraggMask1Spec> {
        Cluster9PowerDownAccessErrW::new(self, 8)
    }
    #[doc = "Bit 9 - 9:9\\]
Mask Interrupt from cluster10_power_down_access_err Interrupt APPSS_ACCESS_ERRAGG 1 : Interrupt is Masked 0 : Interrupt is Unmasked"]
    #[inline(always)]
    #[must_use]
    pub fn cluster10_power_down_access_err(
        &mut self,
    ) -> Cluster10PowerDownAccessErrW<AppssErraggMask1Spec> {
        Cluster10PowerDownAccessErrW::new(self, 9)
    }
    #[doc = "Bit 10 - 10:10\\]
Mask Interrupt from cluster11_power_down_access_err Interrupt APPSS_ACCESS_ERRAGG 1 : Interrupt is Masked 0 : Interrupt is Unmasked"]
    #[inline(always)]
    #[must_use]
    pub fn cluster11_power_down_access_err(
        &mut self,
    ) -> Cluster11PowerDownAccessErrW<AppssErraggMask1Spec> {
        Cluster11PowerDownAccessErrW::new(self, 10)
    }
    #[doc = "Bit 11 - 11:11\\]
Mask Interrupt from cluster12_power_down_access_err Interrupt APPSS_ACCESS_ERRAGG 1 : Interrupt is Masked 0 : Interrupt is Unmasked"]
    #[inline(always)]
    #[must_use]
    pub fn cluster12_power_down_access_err(
        &mut self,
    ) -> Cluster12PowerDownAccessErrW<AppssErraggMask1Spec> {
        Cluster12PowerDownAccessErrW::new(self, 11)
    }
}
#[doc = "APPSS_ERRAGG_MASK1\n\nYou can [`read`](crate::Reg::read) this register and get [`appss_erragg_mask1::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`appss_erragg_mask1::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
pub struct AppssErraggMask1Spec;
impl crate::RegisterSpec for AppssErraggMask1Spec {
    type Ux = u32;
}
#[doc = "`read()` method returns [`appss_erragg_mask1::R`](R) reader structure"]
impl crate::Readable for AppssErraggMask1Spec {}
#[doc = "`write(|w| ..)` method takes [`appss_erragg_mask1::W`](W) writer structure"]
impl crate::Writable for AppssErraggMask1Spec {
    type Safety = crate::Unsafe;
    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
}
#[doc = "`reset()` method sets APPSS_ERRAGG_MASK1 to value 0"]
impl crate::Resettable for AppssErraggMask1Spec {
    const RESET_VALUE: u32 = 0;
}