vyre 0.4.0

GPU compute intermediate representation with a standard operation library
Documentation 
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use crate::ir::{Expr, Program};
use crate::ops::primitive;
use crate::ops::{AlgebraicLaw, OpSpec, U32_OUTPUTS, U32_U32_INPUTS};

// Bitwise AND of two u32 values.



pub const LAWS: &[AlgebraicLaw] = &[
    AlgebraicLaw::Commutative,
    AlgebraicLaw::Associative,
    AlgebraicLaw::Identity { element: u32::MAX },
    AlgebraicLaw::Idempotent,
    AlgebraicLaw::Absorbing { element: 0 },
    AlgebraicLaw::DistributiveOver {
        over_op: "primitive.bitwise.or",
    },
    AlgebraicLaw::DistributiveOver {
        over_op: "primitive.bitwise.xor",
    },
];

/// Bitwise AND operation.
#[derive(Debug, Clone, Copy, Default)]
pub struct And;

impl And {
    /// Declarative operation specification.
    ///
    /// Laws are declared as explicit `AlgebraicLaw` values on `SPEC`.
    pub const SPEC: OpSpec = OpSpec::composition_inlinable(
        "primitive.bitwise.and",
        U32_U32_INPUTS,
        U32_OUTPUTS,
        LAWS,
        Self::program,
    );

    /// Build the canonical IR program.
    ///
    /// # Examples
    ///
    /// ```
    /// use vyre::ir::Expr;
    /// use vyre::ops::primitive::and::And;
    ///
    /// let _expr = Expr::bitand(Expr::u32(0b1010), Expr::u32(0b1100));
    /// let program = And::program();
    /// assert!(!program.entry().is_empty());
    /// ```
    #[must_use]
    pub fn program() -> Program {
        primitive::binary_u32_program(Expr::bitand)
    }
}

// Backend-specific lowering tripwires for and.

// WGSL lowering marker for `primitive.bitwise.and`.
//
// Not a stub: this is a zero-overhead Category A marker. `And::program`
// builds concrete IR through `core/src/ops/primitive/mod.rs::binary_u32_program`; `core/src/lower/wgsl/expr.rs::emit_binop` emits WGSL.
// `core/tests/conformance.rs::conformance_all_primitives` verifies
// lowered GPU bytes are bit-exact against the conform CPU reference.
//
// ```wgsl
// _vyre_store_out(idx, (_vyre_load_a(idx) & _vyre_load_b(idx)));
// ```