stm32mp1 0.16.0

Device support crates for STM32MP1 devices
Documentation
///Register `MACSPI2R` reader
pub type R = crate::R<MACSPI2Rrs>;
///Register `MACSPI2R` writer
pub type W = crate::W<MACSPI2Rrs>;
///Field `SPI2` reader - SPI2
pub type SPI2_R = crate::FieldReader<u16>;
///Field `SPI2` writer - SPI2
pub type SPI2_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>;
impl R {
    ///Bits 0:15 - SPI2
    #[inline(always)]
    pub fn spi2(&self) -> SPI2_R {
        SPI2_R::new((self.bits & 0xffff) as u16)
    }
}
impl core::fmt::Debug for R {
    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
        f.debug_struct("MACSPI2R")
            .field("spi2", &self.spi2())
            .finish()
    }
}
impl W {
    ///Bits 0:15 - SPI2
    #[inline(always)]
    pub fn spi2(&mut self) -> SPI2_W<MACSPI2Rrs> {
        SPI2_W::new(self, 0)
    }
}
/**This register contains Bits\[79:64\] of the 80-bit Source Port Identity of the PTP node.

You can [`read`](crate::Reg::read) this register and get [`macspi2r::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`macspi2r::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).

See register [structure](https://stm32-rs.github.io/stm32-rs/STM32MP153.html#ETH_MAC_MMC:MACSPI2R)*/
pub struct MACSPI2Rrs;
impl crate::RegisterSpec for MACSPI2Rrs {
    type Ux = u32;
}
///`read()` method returns [`macspi2r::R`](R) reader structure
impl crate::Readable for MACSPI2Rrs {}
///`write(|w| ..)` method takes [`macspi2r::W`](W) writer structure
impl crate::Writable for MACSPI2Rrs {
    type Safety = crate::Unsafe;
}
///`reset()` method sets MACSPI2R to value 0
impl crate::Resettable for MACSPI2Rrs {}