stm32mp1 0.16.0

///Register `MACPFR` reader
pub type R = crate::R<MACPFRrs>;
///Register `MACPFR` writer
pub type W = crate::W<MACPFRrs>;
///Field `PR` reader - PR
pub type PR_R = crate::BitReader;
///Field `PR` writer - PR
pub type PR_W<'a, REG> = crate::BitWriter<'a, REG>;
///Field `HUC` reader - HUC
pub type HUC_R = crate::BitReader;
///Field `HUC` writer - HUC
pub type HUC_W<'a, REG> = crate::BitWriter<'a, REG>;
///Field `HMC` reader - HMC
pub type HMC_R = crate::BitReader;
///Field `HMC` writer - HMC
pub type HMC_W<'a, REG> = crate::BitWriter<'a, REG>;
///Field `DAIF` reader - DAIF
pub type DAIF_R = crate::BitReader;
///Field `DAIF` writer - DAIF
pub type DAIF_W<'a, REG> = crate::BitWriter<'a, REG>;
///Field `PM` reader - PM
pub type PM_R = crate::BitReader;
///Field `PM` writer - PM
pub type PM_W<'a, REG> = crate::BitWriter<'a, REG>;
///Field `DBF` reader - DBF
pub type DBF_R = crate::BitReader;
///Field `DBF` writer - DBF
pub type DBF_W<'a, REG> = crate::BitWriter<'a, REG>;
///Field `PCF` reader - PCF
pub type PCF_R = crate::FieldReader;
///Field `PCF` writer - PCF
pub type PCF_W<'a, REG> = crate::FieldWriter<'a, REG, 2>;
///Field `SAIF` reader - SAIF
pub type SAIF_R = crate::BitReader;
///Field `SAIF` writer - SAIF
pub type SAIF_W<'a, REG> = crate::BitWriter<'a, REG>;
///Field `SAF` reader - SAF
pub type SAF_R = crate::BitReader;
///Field `SAF` writer - SAF
pub type SAF_W<'a, REG> = crate::BitWriter<'a, REG>;
///Field `HPF` reader - HPF
pub type HPF_R = crate::BitReader;
///Field `HPF` writer - HPF
pub type HPF_W<'a, REG> = crate::BitWriter<'a, REG>;
///Field `VTFE` reader - VTFE
pub type VTFE_R = crate::BitReader;
///Field `VTFE` writer - VTFE
pub type VTFE_W<'a, REG> = crate::BitWriter<'a, REG>;
///Field `IPFE` reader - IPFE
pub type IPFE_R = crate::BitReader;
///Field `IPFE` writer - IPFE
pub type IPFE_W<'a, REG> = crate::BitWriter<'a, REG>;
///Field `DNTU` reader - DNTU
pub type DNTU_R = crate::BitReader;
///Field `DNTU` writer - DNTU
pub type DNTU_W<'a, REG> = crate::BitWriter<'a, REG>;
///Field `RA` reader - RA
pub type RA_R = crate::BitReader;
///Field `RA` writer - RA
pub type RA_W<'a, REG> = crate::BitWriter<'a, REG>;
impl R {
    ///Bit 0 - PR
    #[inline(always)]
    pub fn pr(&self) -> PR_R {
        PR_R::new((self.bits & 1) != 0)
    }
    ///Bit 1 - HUC
    #[inline(always)]
    pub fn huc(&self) -> HUC_R {
        HUC_R::new(((self.bits >> 1) & 1) != 0)
    }
    ///Bit 2 - HMC
    #[inline(always)]
    pub fn hmc(&self) -> HMC_R {
        HMC_R::new(((self.bits >> 2) & 1) != 0)
    }
    ///Bit 3 - DAIF
    #[inline(always)]
    pub fn daif(&self) -> DAIF_R {
        DAIF_R::new(((self.bits >> 3) & 1) != 0)
    }
    ///Bit 4 - PM
    #[inline(always)]
    pub fn pm(&self) -> PM_R {
        PM_R::new(((self.bits >> 4) & 1) != 0)
    }
    ///Bit 5 - DBF
    #[inline(always)]
    pub fn dbf(&self) -> DBF_R {
        DBF_R::new(((self.bits >> 5) & 1) != 0)
    }
    ///Bits 6:7 - PCF
    #[inline(always)]
    pub fn pcf(&self) -> PCF_R {
        PCF_R::new(((self.bits >> 6) & 3) as u8)
    }
    ///Bit 8 - SAIF
    #[inline(always)]
    pub fn saif(&self) -> SAIF_R {
        SAIF_R::new(((self.bits >> 8) & 1) != 0)
    }
    ///Bit 9 - SAF
    #[inline(always)]
    pub fn saf(&self) -> SAF_R {
        SAF_R::new(((self.bits >> 9) & 1) != 0)
    }
    ///Bit 10 - HPF
    #[inline(always)]
    pub fn hpf(&self) -> HPF_R {
        HPF_R::new(((self.bits >> 10) & 1) != 0)
    }
    ///Bit 16 - VTFE
    #[inline(always)]
    pub fn vtfe(&self) -> VTFE_R {
        VTFE_R::new(((self.bits >> 16) & 1) != 0)
    }
    ///Bit 20 - IPFE
    #[inline(always)]
    pub fn ipfe(&self) -> IPFE_R {
        IPFE_R::new(((self.bits >> 20) & 1) != 0)
    }
    ///Bit 21 - DNTU
    #[inline(always)]
    pub fn dntu(&self) -> DNTU_R {
        DNTU_R::new(((self.bits >> 21) & 1) != 0)
    }
    ///Bit 31 - RA
    #[inline(always)]
    pub fn ra(&self) -> RA_R {
        RA_R::new(((self.bits >> 31) & 1) != 0)
    }
}
impl core::fmt::Debug for R {
    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
        f.debug_struct("MACPFR")
            .field("pr", &self.pr())
            .field("huc", &self.huc())
            .field("hmc", &self.hmc())
            .field("daif", &self.daif())
            .field("pm", &self.pm())
            .field("dbf", &self.dbf())
            .field("pcf", &self.pcf())
            .field("saif", &self.saif())
            .field("saf", &self.saf())
            .field("hpf", &self.hpf())
            .field("vtfe", &self.vtfe())
            .field("ipfe", &self.ipfe())
            .field("dntu", &self.dntu())
            .field("ra", &self.ra())
            .finish()
    }
}
impl W {
    ///Bit 0 - PR
    #[inline(always)]
    pub fn pr(&mut self) -> PR_W<MACPFRrs> {
        PR_W::new(self, 0)
    }
    ///Bit 1 - HUC
    #[inline(always)]
    pub fn huc(&mut self) -> HUC_W<MACPFRrs> {
        HUC_W::new(self, 1)
    }
    ///Bit 2 - HMC
    #[inline(always)]
    pub fn hmc(&mut self) -> HMC_W<MACPFRrs> {
        HMC_W::new(self, 2)
    }
    ///Bit 3 - DAIF
    #[inline(always)]
    pub fn daif(&mut self) -> DAIF_W<MACPFRrs> {
        DAIF_W::new(self, 3)
    }
    ///Bit 4 - PM
    #[inline(always)]
    pub fn pm(&mut self) -> PM_W<MACPFRrs> {
        PM_W::new(self, 4)
    }
    ///Bit 5 - DBF
    #[inline(always)]
    pub fn dbf(&mut self) -> DBF_W<MACPFRrs> {
        DBF_W::new(self, 5)
    }
    ///Bits 6:7 - PCF
    #[inline(always)]
    pub fn pcf(&mut self) -> PCF_W<MACPFRrs> {
        PCF_W::new(self, 6)
    }
    ///Bit 8 - SAIF
    #[inline(always)]
    pub fn saif(&mut self) -> SAIF_W<MACPFRrs> {
        SAIF_W::new(self, 8)
    }
    ///Bit 9 - SAF
    #[inline(always)]
    pub fn saf(&mut self) -> SAF_W<MACPFRrs> {
        SAF_W::new(self, 9)
    }
    ///Bit 10 - HPF
    #[inline(always)]
    pub fn hpf(&mut self) -> HPF_W<MACPFRrs> {
        HPF_W::new(self, 10)
    }
    ///Bit 16 - VTFE
    #[inline(always)]
    pub fn vtfe(&mut self) -> VTFE_W<MACPFRrs> {
        VTFE_W::new(self, 16)
    }
    ///Bit 20 - IPFE
    #[inline(always)]
    pub fn ipfe(&mut self) -> IPFE_W<MACPFRrs> {
        IPFE_W::new(self, 20)
    }
    ///Bit 21 - DNTU
    #[inline(always)]
    pub fn dntu(&mut self) -> DNTU_W<MACPFRrs> {
        DNTU_W::new(self, 21)
    }
    ///Bit 31 - RA
    #[inline(always)]
    pub fn ra(&mut self) -> RA_W<MACPFRrs> {
        RA_W::new(self, 31)
    }
}
/**The MAC Packet Filter register contains the filter controls for receiving packets. Some of the controls from this register go to the address check block of the MAC which performs the first level of address filtering. The second level of filtering is performed on the incoming packet based on other controls such as Pass Bad Packets and Pass Control Packets.

You can [`read`](crate::Reg::read) this register and get [`macpfr::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`macpfr::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).

See register [structure](https://stm32-rs.github.io/stm32-rs/STM32MP153.html#ETH_MAC_MMC:MACPFR)*/
pub struct MACPFRrs;
impl crate::RegisterSpec for MACPFRrs {
    type Ux = u32;
}
///`read()` method returns [`macpfr::R`](R) reader structure
impl crate::Readable for MACPFRrs {}
///`write(|w| ..)` method takes [`macpfr::W`](W) writer structure
impl crate::Writable for MACPFRrs {
    type Safety = crate::Unsafe;
}
///`reset()` method sets MACPFR to value 0
impl crate::Resettable for MACPFRrs {}