stm32h7 0.16.0

Device support crates for STM32H7 devices
Documentation 
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///Register `PIDR4` reader
pub type R = crate::R<PIDR4rs>;
///Field `JEP106CON` reader - JEP106 continuation code
pub type JEP106CON_R = crate::FieldReader;
///Field `SIZE` reader - Register file size
pub type SIZE_R = crate::FieldReader;
impl R {
    ///Bits 0:3 - JEP106 continuation code
    #[inline(always)]
    pub fn jep106con(&self) -> JEP106CON_R {
        JEP106CON_R::new((self.bits & 0x0f) as u8)
    }
    ///Bits 4:7 - Register file size
    #[inline(always)]
    pub fn size(&self) -> SIZE_R {
        SIZE_R::new(((self.bits >> 4) & 0x0f) as u8)
    }
}
impl core::fmt::Debug for R {
    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
        f.debug_struct("PIDR4")
            .field("jep106con", &self.jep106con())
            .field("size", &self.size())
            .finish()
    }
}
/**DBGMCU peripheral identity register 4

You can [`read`](crate::Reg::read) this register and get [`pidr4::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api).*/
pub struct PIDR4rs;
impl crate::RegisterSpec for PIDR4rs {
    type Ux = u32;
}
///`read()` method returns [`pidr4::R`](R) reader structure
impl crate::Readable for PIDR4rs {}
///`reset()` method sets PIDR4 to value 0
impl crate::Resettable for PIDR4rs {}