stm32h7 0.16.0

Device support crates for STM32H7 devices
Documentation 
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///Register `CIDR3` reader
pub type R = crate::R<CIDR3rs>;
///Field `PREAMBLE` reader - Component ID field, bits \[31:24\]
pub type PREAMBLE_R = crate::FieldReader;
impl R {
    ///Bits 0:7 - Component ID field, bits \[31:24\]
    #[inline(always)]
    pub fn preamble(&self) -> PREAMBLE_R {
        PREAMBLE_R::new((self.bits & 0xff) as u8)
    }
}
impl core::fmt::Debug for R {
    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
        f.debug_struct("CIDR3").field("preamble", &self.preamble()).finish()
    }
}
/**DBGMCU component identity register

You can [`read`](crate::Reg::read) this register and get [`cidr3::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api).*/
pub struct CIDR3rs;
impl crate::RegisterSpec for CIDR3rs {
    type Ux = u32;
}
///`read()` method returns [`cidr3::R`](R) reader structure
impl crate::Readable for CIDR3rs {}
///`reset()` method sets CIDR3 to value 0xb1
impl crate::Resettable for CIDR3rs {
    const RESET_VALUE: u32 = 0xb1;
}