#[doc = "Register `APB2LPENR` reader"]
pub struct R(crate::R<APB2LPENR_SPEC>);
impl core::ops::Deref for R {
type Target = crate::R<APB2LPENR_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl From<crate::R<APB2LPENR_SPEC>> for R {
#[inline(always)]
fn from(reader: crate::R<APB2LPENR_SPEC>) -> Self {
R(reader)
}
}
#[doc = "Register `APB2LPENR` writer"]
pub struct W(crate::W<APB2LPENR_SPEC>);
impl core::ops::Deref for W {
type Target = crate::W<APB2LPENR_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl core::ops::DerefMut for W {
#[inline(always)]
fn deref_mut(&mut self) -> &mut Self::Target {
&mut self.0
}
}
impl From<crate::W<APB2LPENR_SPEC>> for W {
#[inline(always)]
fn from(writer: crate::W<APB2LPENR_SPEC>) -> Self {
W(writer)
}
}
#[doc = "TIM1 clock enable during Sleep mode\n\nValue on reset: 1"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum TIM1LPEN_A {
#[doc = "0: Selected module is disabled during Sleep mode"]
DISABLEDINSLEEP = 0,
#[doc = "1: Selected module is enabled during Sleep mode"]
ENABLEDINSLEEP = 1,
}
impl From<TIM1LPEN_A> for bool {
#[inline(always)]
fn from(variant: TIM1LPEN_A) -> Self {
variant as u8 != 0
}
}
#[doc = "Field `TIM1LPEN` reader - TIM1 clock enable during Sleep mode"]
pub struct TIM1LPEN_R(crate::FieldReader<bool, TIM1LPEN_A>);
impl TIM1LPEN_R {
pub(crate) fn new(bits: bool) -> Self {
TIM1LPEN_R(crate::FieldReader::new(bits))
}
#[doc = r"Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> TIM1LPEN_A {
match self.bits {
false => TIM1LPEN_A::DISABLEDINSLEEP,
true => TIM1LPEN_A::ENABLEDINSLEEP,
}
}
#[doc = "Checks if the value of the field is `DISABLEDINSLEEP`"]
#[inline(always)]
pub fn is_disabled_in_sleep(&self) -> bool {
**self == TIM1LPEN_A::DISABLEDINSLEEP
}
#[doc = "Checks if the value of the field is `ENABLEDINSLEEP`"]
#[inline(always)]
pub fn is_enabled_in_sleep(&self) -> bool {
**self == TIM1LPEN_A::ENABLEDINSLEEP
}
}
impl core::ops::Deref for TIM1LPEN_R {
type Target = crate::FieldReader<bool, TIM1LPEN_A>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
#[doc = "Field `TIM1LPEN` writer - TIM1 clock enable during Sleep mode"]
pub struct TIM1LPEN_W<'a> {
w: &'a mut W,
}
impl<'a> TIM1LPEN_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: TIM1LPEN_A) -> &'a mut W {
self.bit(variant.into())
}
#[doc = "Selected module is disabled during Sleep mode"]
#[inline(always)]
pub fn disabled_in_sleep(self) -> &'a mut W {
self.variant(TIM1LPEN_A::DISABLEDINSLEEP)
}
#[doc = "Selected module is enabled during Sleep mode"]
#[inline(always)]
pub fn enabled_in_sleep(self) -> &'a mut W {
self.variant(TIM1LPEN_A::ENABLEDINSLEEP)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01);
self.w
}
}
#[doc = "TIM8 clock enable during Sleep mode"]
pub type TIM8LPEN_A = TIM1LPEN_A;
#[doc = "Field `TIM8LPEN` reader - TIM8 clock enable during Sleep mode"]
pub type TIM8LPEN_R = TIM1LPEN_R;
#[doc = "Field `TIM8LPEN` writer - TIM8 clock enable during Sleep mode"]
pub struct TIM8LPEN_W<'a> {
w: &'a mut W,
}
impl<'a> TIM8LPEN_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: TIM8LPEN_A) -> &'a mut W {
self.bit(variant.into())
}
#[doc = "Selected module is disabled during Sleep mode"]
#[inline(always)]
pub fn disabled_in_sleep(self) -> &'a mut W {
self.variant(TIM8LPEN_A::DISABLEDINSLEEP)
}
#[doc = "Selected module is enabled during Sleep mode"]
#[inline(always)]
pub fn enabled_in_sleep(self) -> &'a mut W {
self.variant(TIM8LPEN_A::ENABLEDINSLEEP)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1);
self.w
}
}
#[doc = "USART1 clock enable during Sleep mode"]
pub type USART1LPEN_A = TIM1LPEN_A;
#[doc = "Field `USART1LPEN` reader - USART1 clock enable during Sleep mode"]
pub type USART1LPEN_R = TIM1LPEN_R;
#[doc = "Field `USART1LPEN` writer - USART1 clock enable during Sleep mode"]
pub struct USART1LPEN_W<'a> {
w: &'a mut W,
}
impl<'a> USART1LPEN_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: USART1LPEN_A) -> &'a mut W {
self.bit(variant.into())
}
#[doc = "Selected module is disabled during Sleep mode"]
#[inline(always)]
pub fn disabled_in_sleep(self) -> &'a mut W {
self.variant(USART1LPEN_A::DISABLEDINSLEEP)
}
#[doc = "Selected module is enabled during Sleep mode"]
#[inline(always)]
pub fn enabled_in_sleep(self) -> &'a mut W {
self.variant(USART1LPEN_A::ENABLEDINSLEEP)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4);
self.w
}
}
#[doc = "USART6 clock enable during Sleep mode"]
pub type USART6LPEN_A = TIM1LPEN_A;
#[doc = "Field `USART6LPEN` reader - USART6 clock enable during Sleep mode"]
pub type USART6LPEN_R = TIM1LPEN_R;
#[doc = "Field `USART6LPEN` writer - USART6 clock enable during Sleep mode"]
pub struct USART6LPEN_W<'a> {
w: &'a mut W,
}
impl<'a> USART6LPEN_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: USART6LPEN_A) -> &'a mut W {
self.bit(variant.into())
}
#[doc = "Selected module is disabled during Sleep mode"]
#[inline(always)]
pub fn disabled_in_sleep(self) -> &'a mut W {
self.variant(USART6LPEN_A::DISABLEDINSLEEP)
}
#[doc = "Selected module is enabled during Sleep mode"]
#[inline(always)]
pub fn enabled_in_sleep(self) -> &'a mut W {
self.variant(USART6LPEN_A::ENABLEDINSLEEP)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u32 & 0x01) << 5);
self.w
}
}
#[doc = "ADC1 clock enable during Sleep mode"]
pub type ADC1LPEN_A = TIM1LPEN_A;
#[doc = "Field `ADC1LPEN` reader - ADC1 clock enable during Sleep mode"]
pub type ADC1LPEN_R = TIM1LPEN_R;
#[doc = "Field `ADC1LPEN` writer - ADC1 clock enable during Sleep mode"]
pub struct ADC1LPEN_W<'a> {
w: &'a mut W,
}
impl<'a> ADC1LPEN_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: ADC1LPEN_A) -> &'a mut W {
self.bit(variant.into())
}
#[doc = "Selected module is disabled during Sleep mode"]
#[inline(always)]
pub fn disabled_in_sleep(self) -> &'a mut W {
self.variant(ADC1LPEN_A::DISABLEDINSLEEP)
}
#[doc = "Selected module is enabled during Sleep mode"]
#[inline(always)]
pub fn enabled_in_sleep(self) -> &'a mut W {
self.variant(ADC1LPEN_A::ENABLEDINSLEEP)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u32 & 0x01) << 8);
self.w
}
}
#[doc = "ADC2 clock enable during Sleep mode"]
pub type ADC2LPEN_A = TIM1LPEN_A;
#[doc = "Field `ADC2LPEN` reader - ADC2 clock enable during Sleep mode"]
pub type ADC2LPEN_R = TIM1LPEN_R;
#[doc = "Field `ADC2LPEN` writer - ADC2 clock enable during Sleep mode"]
pub struct ADC2LPEN_W<'a> {
w: &'a mut W,
}
impl<'a> ADC2LPEN_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: ADC2LPEN_A) -> &'a mut W {
self.bit(variant.into())
}
#[doc = "Selected module is disabled during Sleep mode"]
#[inline(always)]
pub fn disabled_in_sleep(self) -> &'a mut W {
self.variant(ADC2LPEN_A::DISABLEDINSLEEP)
}
#[doc = "Selected module is enabled during Sleep mode"]
#[inline(always)]
pub fn enabled_in_sleep(self) -> &'a mut W {
self.variant(ADC2LPEN_A::ENABLEDINSLEEP)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 9)) | ((value as u32 & 0x01) << 9);
self.w
}
}
#[doc = "ADC 3 clock enable during Sleep mode"]
pub type ADC3LPEN_A = TIM1LPEN_A;
#[doc = "Field `ADC3LPEN` reader - ADC 3 clock enable during Sleep mode"]
pub type ADC3LPEN_R = TIM1LPEN_R;
#[doc = "Field `ADC3LPEN` writer - ADC 3 clock enable during Sleep mode"]
pub struct ADC3LPEN_W<'a> {
w: &'a mut W,
}
impl<'a> ADC3LPEN_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: ADC3LPEN_A) -> &'a mut W {
self.bit(variant.into())
}
#[doc = "Selected module is disabled during Sleep mode"]
#[inline(always)]
pub fn disabled_in_sleep(self) -> &'a mut W {
self.variant(ADC3LPEN_A::DISABLEDINSLEEP)
}
#[doc = "Selected module is enabled during Sleep mode"]
#[inline(always)]
pub fn enabled_in_sleep(self) -> &'a mut W {
self.variant(ADC3LPEN_A::ENABLEDINSLEEP)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 10)) | ((value as u32 & 0x01) << 10);
self.w
}
}
#[doc = "SPI 1 clock enable during Sleep mode"]
pub type SPI1LPEN_A = TIM1LPEN_A;
#[doc = "Field `SPI1LPEN` reader - SPI 1 clock enable during Sleep mode"]
pub type SPI1LPEN_R = TIM1LPEN_R;
#[doc = "Field `SPI1LPEN` writer - SPI 1 clock enable during Sleep mode"]
pub struct SPI1LPEN_W<'a> {
w: &'a mut W,
}
impl<'a> SPI1LPEN_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: SPI1LPEN_A) -> &'a mut W {
self.bit(variant.into())
}
#[doc = "Selected module is disabled during Sleep mode"]
#[inline(always)]
pub fn disabled_in_sleep(self) -> &'a mut W {
self.variant(SPI1LPEN_A::DISABLEDINSLEEP)
}
#[doc = "Selected module is enabled during Sleep mode"]
#[inline(always)]
pub fn enabled_in_sleep(self) -> &'a mut W {
self.variant(SPI1LPEN_A::ENABLEDINSLEEP)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 12)) | ((value as u32 & 0x01) << 12);
self.w
}
}
#[doc = "SPI 4 clock enable during Sleep mode"]
pub type SPI4LPEN_A = TIM1LPEN_A;
#[doc = "Field `SPI4LPEN` reader - SPI 4 clock enable during Sleep mode"]
pub type SPI4LPEN_R = TIM1LPEN_R;
#[doc = "Field `SPI4LPEN` writer - SPI 4 clock enable during Sleep mode"]
pub struct SPI4LPEN_W<'a> {
w: &'a mut W,
}
impl<'a> SPI4LPEN_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: SPI4LPEN_A) -> &'a mut W {
self.bit(variant.into())
}
#[doc = "Selected module is disabled during Sleep mode"]
#[inline(always)]
pub fn disabled_in_sleep(self) -> &'a mut W {
self.variant(SPI4LPEN_A::DISABLEDINSLEEP)
}
#[doc = "Selected module is enabled during Sleep mode"]
#[inline(always)]
pub fn enabled_in_sleep(self) -> &'a mut W {
self.variant(SPI4LPEN_A::ENABLEDINSLEEP)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 13)) | ((value as u32 & 0x01) << 13);
self.w
}
}
#[doc = "System configuration controller clock enable during Sleep mode"]
pub type SYSCFGLPEN_A = TIM1LPEN_A;
#[doc = "Field `SYSCFGLPEN` reader - System configuration controller clock enable during Sleep mode"]
pub type SYSCFGLPEN_R = TIM1LPEN_R;
#[doc = "Field `SYSCFGLPEN` writer - System configuration controller clock enable during Sleep mode"]
pub struct SYSCFGLPEN_W<'a> {
w: &'a mut W,
}
impl<'a> SYSCFGLPEN_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: SYSCFGLPEN_A) -> &'a mut W {
self.bit(variant.into())
}
#[doc = "Selected module is disabled during Sleep mode"]
#[inline(always)]
pub fn disabled_in_sleep(self) -> &'a mut W {
self.variant(SYSCFGLPEN_A::DISABLEDINSLEEP)
}
#[doc = "Selected module is enabled during Sleep mode"]
#[inline(always)]
pub fn enabled_in_sleep(self) -> &'a mut W {
self.variant(SYSCFGLPEN_A::ENABLEDINSLEEP)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 14)) | ((value as u32 & 0x01) << 14);
self.w
}
}
#[doc = "TIM9 clock enable during sleep mode"]
pub type TIM9LPEN_A = TIM1LPEN_A;
#[doc = "Field `TIM9LPEN` reader - TIM9 clock enable during sleep mode"]
pub type TIM9LPEN_R = TIM1LPEN_R;
#[doc = "Field `TIM9LPEN` writer - TIM9 clock enable during sleep mode"]
pub struct TIM9LPEN_W<'a> {
w: &'a mut W,
}
impl<'a> TIM9LPEN_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: TIM9LPEN_A) -> &'a mut W {
self.bit(variant.into())
}
#[doc = "Selected module is disabled during Sleep mode"]
#[inline(always)]
pub fn disabled_in_sleep(self) -> &'a mut W {
self.variant(TIM9LPEN_A::DISABLEDINSLEEP)
}
#[doc = "Selected module is enabled during Sleep mode"]
#[inline(always)]
pub fn enabled_in_sleep(self) -> &'a mut W {
self.variant(TIM9LPEN_A::ENABLEDINSLEEP)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 16)) | ((value as u32 & 0x01) << 16);
self.w
}
}
#[doc = "TIM10 clock enable during Sleep mode"]
pub type TIM10LPEN_A = TIM1LPEN_A;
#[doc = "Field `TIM10LPEN` reader - TIM10 clock enable during Sleep mode"]
pub type TIM10LPEN_R = TIM1LPEN_R;
#[doc = "Field `TIM10LPEN` writer - TIM10 clock enable during Sleep mode"]
pub struct TIM10LPEN_W<'a> {
w: &'a mut W,
}
impl<'a> TIM10LPEN_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: TIM10LPEN_A) -> &'a mut W {
self.bit(variant.into())
}
#[doc = "Selected module is disabled during Sleep mode"]
#[inline(always)]
pub fn disabled_in_sleep(self) -> &'a mut W {
self.variant(TIM10LPEN_A::DISABLEDINSLEEP)
}
#[doc = "Selected module is enabled during Sleep mode"]
#[inline(always)]
pub fn enabled_in_sleep(self) -> &'a mut W {
self.variant(TIM10LPEN_A::ENABLEDINSLEEP)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 17)) | ((value as u32 & 0x01) << 17);
self.w
}
}
#[doc = "TIM11 clock enable during Sleep mode"]
pub type TIM11LPEN_A = TIM1LPEN_A;
#[doc = "Field `TIM11LPEN` reader - TIM11 clock enable during Sleep mode"]
pub type TIM11LPEN_R = TIM1LPEN_R;
#[doc = "Field `TIM11LPEN` writer - TIM11 clock enable during Sleep mode"]
pub struct TIM11LPEN_W<'a> {
w: &'a mut W,
}
impl<'a> TIM11LPEN_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: TIM11LPEN_A) -> &'a mut W {
self.bit(variant.into())
}
#[doc = "Selected module is disabled during Sleep mode"]
#[inline(always)]
pub fn disabled_in_sleep(self) -> &'a mut W {
self.variant(TIM11LPEN_A::DISABLEDINSLEEP)
}
#[doc = "Selected module is enabled during Sleep mode"]
#[inline(always)]
pub fn enabled_in_sleep(self) -> &'a mut W {
self.variant(TIM11LPEN_A::ENABLEDINSLEEP)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 18)) | ((value as u32 & 0x01) << 18);
self.w
}
}
#[doc = "SPI 5 clock enable during Sleep mode"]
pub type SPI5LPEN_A = TIM1LPEN_A;
#[doc = "Field `SPI5LPEN` reader - SPI 5 clock enable during Sleep mode"]
pub type SPI5LPEN_R = TIM1LPEN_R;
#[doc = "Field `SPI5LPEN` writer - SPI 5 clock enable during Sleep mode"]
pub struct SPI5LPEN_W<'a> {
w: &'a mut W,
}
impl<'a> SPI5LPEN_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: SPI5LPEN_A) -> &'a mut W {
self.bit(variant.into())
}
#[doc = "Selected module is disabled during Sleep mode"]
#[inline(always)]
pub fn disabled_in_sleep(self) -> &'a mut W {
self.variant(SPI5LPEN_A::DISABLEDINSLEEP)
}
#[doc = "Selected module is enabled during Sleep mode"]
#[inline(always)]
pub fn enabled_in_sleep(self) -> &'a mut W {
self.variant(SPI5LPEN_A::ENABLEDINSLEEP)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 20)) | ((value as u32 & 0x01) << 20);
self.w
}
}
#[doc = "SPI 6 clock enable during Sleep mode"]
pub type SPI6LPEN_A = TIM1LPEN_A;
#[doc = "Field `SPI6LPEN` reader - SPI 6 clock enable during Sleep mode"]
pub type SPI6LPEN_R = TIM1LPEN_R;
#[doc = "Field `SPI6LPEN` writer - SPI 6 clock enable during Sleep mode"]
pub struct SPI6LPEN_W<'a> {
w: &'a mut W,
}
impl<'a> SPI6LPEN_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: SPI6LPEN_A) -> &'a mut W {
self.bit(variant.into())
}
#[doc = "Selected module is disabled during Sleep mode"]
#[inline(always)]
pub fn disabled_in_sleep(self) -> &'a mut W {
self.variant(SPI6LPEN_A::DISABLEDINSLEEP)
}
#[doc = "Selected module is enabled during Sleep mode"]
#[inline(always)]
pub fn enabled_in_sleep(self) -> &'a mut W {
self.variant(SPI6LPEN_A::ENABLEDINSLEEP)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 21)) | ((value as u32 & 0x01) << 21);
self.w
}
}
#[doc = "SAI1 clock enable during sleep mode"]
pub type SAI1LPEN_A = TIM1LPEN_A;
#[doc = "Field `SAI1LPEN` reader - SAI1 clock enable during sleep mode"]
pub type SAI1LPEN_R = TIM1LPEN_R;
#[doc = "Field `SAI1LPEN` writer - SAI1 clock enable during sleep mode"]
pub struct SAI1LPEN_W<'a> {
w: &'a mut W,
}
impl<'a> SAI1LPEN_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: SAI1LPEN_A) -> &'a mut W {
self.bit(variant.into())
}
#[doc = "Selected module is disabled during Sleep mode"]
#[inline(always)]
pub fn disabled_in_sleep(self) -> &'a mut W {
self.variant(SAI1LPEN_A::DISABLEDINSLEEP)
}
#[doc = "Selected module is enabled during Sleep mode"]
#[inline(always)]
pub fn enabled_in_sleep(self) -> &'a mut W {
self.variant(SAI1LPEN_A::ENABLEDINSLEEP)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 22)) | ((value as u32 & 0x01) << 22);
self.w
}
}
#[doc = "LTDC clock enable during sleep mode"]
pub type LTDCLPEN_A = TIM1LPEN_A;
#[doc = "Field `LTDCLPEN` reader - LTDC clock enable during sleep mode"]
pub type LTDCLPEN_R = TIM1LPEN_R;
#[doc = "Field `LTDCLPEN` writer - LTDC clock enable during sleep mode"]
pub struct LTDCLPEN_W<'a> {
w: &'a mut W,
}
impl<'a> LTDCLPEN_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: LTDCLPEN_A) -> &'a mut W {
self.bit(variant.into())
}
#[doc = "Selected module is disabled during Sleep mode"]
#[inline(always)]
pub fn disabled_in_sleep(self) -> &'a mut W {
self.variant(LTDCLPEN_A::DISABLEDINSLEEP)
}
#[doc = "Selected module is enabled during Sleep mode"]
#[inline(always)]
pub fn enabled_in_sleep(self) -> &'a mut W {
self.variant(LTDCLPEN_A::ENABLEDINSLEEP)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 26)) | ((value as u32 & 0x01) << 26);
self.w
}
}
#[doc = "SAI2 clock enable during sleep mode"]
pub type SAI2LPEN_A = TIM1LPEN_A;
#[doc = "Field `SAI2LPEN` reader - SAI2 clock enable during sleep mode"]
pub type SAI2LPEN_R = TIM1LPEN_R;
#[doc = "Field `SAI2LPEN` writer - SAI2 clock enable during sleep mode"]
pub struct SAI2LPEN_W<'a> {
w: &'a mut W,
}
impl<'a> SAI2LPEN_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: SAI2LPEN_A) -> &'a mut W {
self.bit(variant.into())
}
#[doc = "Selected module is disabled during Sleep mode"]
#[inline(always)]
pub fn disabled_in_sleep(self) -> &'a mut W {
self.variant(SAI2LPEN_A::DISABLEDINSLEEP)
}
#[doc = "Selected module is enabled during Sleep mode"]
#[inline(always)]
pub fn enabled_in_sleep(self) -> &'a mut W {
self.variant(SAI2LPEN_A::ENABLEDINSLEEP)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 23)) | ((value as u32 & 0x01) << 23);
self.w
}
}
#[doc = "SDMMC1 clock enable during Sleep mode"]
pub type SDMMC1LPEN_A = TIM1LPEN_A;
#[doc = "Field `SDMMC1LPEN` reader - SDMMC1 clock enable during Sleep mode"]
pub type SDMMC1LPEN_R = TIM1LPEN_R;
#[doc = "Field `SDMMC1LPEN` writer - SDMMC1 clock enable during Sleep mode"]
pub struct SDMMC1LPEN_W<'a> {
w: &'a mut W,
}
impl<'a> SDMMC1LPEN_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: SDMMC1LPEN_A) -> &'a mut W {
self.bit(variant.into())
}
#[doc = "Selected module is disabled during Sleep mode"]
#[inline(always)]
pub fn disabled_in_sleep(self) -> &'a mut W {
self.variant(SDMMC1LPEN_A::DISABLEDINSLEEP)
}
#[doc = "Selected module is enabled during Sleep mode"]
#[inline(always)]
pub fn enabled_in_sleep(self) -> &'a mut W {
self.variant(SDMMC1LPEN_A::ENABLEDINSLEEP)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 11)) | ((value as u32 & 0x01) << 11);
self.w
}
}
impl R {
#[doc = "Bit 0 - TIM1 clock enable during Sleep mode"]
#[inline(always)]
pub fn tim1lpen(&self) -> TIM1LPEN_R {
TIM1LPEN_R::new((self.bits & 0x01) != 0)
}
#[doc = "Bit 1 - TIM8 clock enable during Sleep mode"]
#[inline(always)]
pub fn tim8lpen(&self) -> TIM8LPEN_R {
TIM8LPEN_R::new(((self.bits >> 1) & 0x01) != 0)
}
#[doc = "Bit 4 - USART1 clock enable during Sleep mode"]
#[inline(always)]
pub fn usart1lpen(&self) -> USART1LPEN_R {
USART1LPEN_R::new(((self.bits >> 4) & 0x01) != 0)
}
#[doc = "Bit 5 - USART6 clock enable during Sleep mode"]
#[inline(always)]
pub fn usart6lpen(&self) -> USART6LPEN_R {
USART6LPEN_R::new(((self.bits >> 5) & 0x01) != 0)
}
#[doc = "Bit 8 - ADC1 clock enable during Sleep mode"]
#[inline(always)]
pub fn adc1lpen(&self) -> ADC1LPEN_R {
ADC1LPEN_R::new(((self.bits >> 8) & 0x01) != 0)
}
#[doc = "Bit 9 - ADC2 clock enable during Sleep mode"]
#[inline(always)]
pub fn adc2lpen(&self) -> ADC2LPEN_R {
ADC2LPEN_R::new(((self.bits >> 9) & 0x01) != 0)
}
#[doc = "Bit 10 - ADC 3 clock enable during Sleep mode"]
#[inline(always)]
pub fn adc3lpen(&self) -> ADC3LPEN_R {
ADC3LPEN_R::new(((self.bits >> 10) & 0x01) != 0)
}
#[doc = "Bit 12 - SPI 1 clock enable during Sleep mode"]
#[inline(always)]
pub fn spi1lpen(&self) -> SPI1LPEN_R {
SPI1LPEN_R::new(((self.bits >> 12) & 0x01) != 0)
}
#[doc = "Bit 13 - SPI 4 clock enable during Sleep mode"]
#[inline(always)]
pub fn spi4lpen(&self) -> SPI4LPEN_R {
SPI4LPEN_R::new(((self.bits >> 13) & 0x01) != 0)
}
#[doc = "Bit 14 - System configuration controller clock enable during Sleep mode"]
#[inline(always)]
pub fn syscfglpen(&self) -> SYSCFGLPEN_R {
SYSCFGLPEN_R::new(((self.bits >> 14) & 0x01) != 0)
}
#[doc = "Bit 16 - TIM9 clock enable during sleep mode"]
#[inline(always)]
pub fn tim9lpen(&self) -> TIM9LPEN_R {
TIM9LPEN_R::new(((self.bits >> 16) & 0x01) != 0)
}
#[doc = "Bit 17 - TIM10 clock enable during Sleep mode"]
#[inline(always)]
pub fn tim10lpen(&self) -> TIM10LPEN_R {
TIM10LPEN_R::new(((self.bits >> 17) & 0x01) != 0)
}
#[doc = "Bit 18 - TIM11 clock enable during Sleep mode"]
#[inline(always)]
pub fn tim11lpen(&self) -> TIM11LPEN_R {
TIM11LPEN_R::new(((self.bits >> 18) & 0x01) != 0)
}
#[doc = "Bit 20 - SPI 5 clock enable during Sleep mode"]
#[inline(always)]
pub fn spi5lpen(&self) -> SPI5LPEN_R {
SPI5LPEN_R::new(((self.bits >> 20) & 0x01) != 0)
}
#[doc = "Bit 21 - SPI 6 clock enable during Sleep mode"]
#[inline(always)]
pub fn spi6lpen(&self) -> SPI6LPEN_R {
SPI6LPEN_R::new(((self.bits >> 21) & 0x01) != 0)
}
#[doc = "Bit 22 - SAI1 clock enable during sleep mode"]
#[inline(always)]
pub fn sai1lpen(&self) -> SAI1LPEN_R {
SAI1LPEN_R::new(((self.bits >> 22) & 0x01) != 0)
}
#[doc = "Bit 26 - LTDC clock enable during sleep mode"]
#[inline(always)]
pub fn ltdclpen(&self) -> LTDCLPEN_R {
LTDCLPEN_R::new(((self.bits >> 26) & 0x01) != 0)
}
#[doc = "Bit 23 - SAI2 clock enable during sleep mode"]
#[inline(always)]
pub fn sai2lpen(&self) -> SAI2LPEN_R {
SAI2LPEN_R::new(((self.bits >> 23) & 0x01) != 0)
}
#[doc = "Bit 11 - SDMMC1 clock enable during Sleep mode"]
#[inline(always)]
pub fn sdmmc1lpen(&self) -> SDMMC1LPEN_R {
SDMMC1LPEN_R::new(((self.bits >> 11) & 0x01) != 0)
}
}
impl W {
#[doc = "Bit 0 - TIM1 clock enable during Sleep mode"]
#[inline(always)]
pub fn tim1lpen(&mut self) -> TIM1LPEN_W {
TIM1LPEN_W { w: self }
}
#[doc = "Bit 1 - TIM8 clock enable during Sleep mode"]
#[inline(always)]
pub fn tim8lpen(&mut self) -> TIM8LPEN_W {
TIM8LPEN_W { w: self }
}
#[doc = "Bit 4 - USART1 clock enable during Sleep mode"]
#[inline(always)]
pub fn usart1lpen(&mut self) -> USART1LPEN_W {
USART1LPEN_W { w: self }
}
#[doc = "Bit 5 - USART6 clock enable during Sleep mode"]
#[inline(always)]
pub fn usart6lpen(&mut self) -> USART6LPEN_W {
USART6LPEN_W { w: self }
}
#[doc = "Bit 8 - ADC1 clock enable during Sleep mode"]
#[inline(always)]
pub fn adc1lpen(&mut self) -> ADC1LPEN_W {
ADC1LPEN_W { w: self }
}
#[doc = "Bit 9 - ADC2 clock enable during Sleep mode"]
#[inline(always)]
pub fn adc2lpen(&mut self) -> ADC2LPEN_W {
ADC2LPEN_W { w: self }
}
#[doc = "Bit 10 - ADC 3 clock enable during Sleep mode"]
#[inline(always)]
pub fn adc3lpen(&mut self) -> ADC3LPEN_W {
ADC3LPEN_W { w: self }
}
#[doc = "Bit 12 - SPI 1 clock enable during Sleep mode"]
#[inline(always)]
pub fn spi1lpen(&mut self) -> SPI1LPEN_W {
SPI1LPEN_W { w: self }
}
#[doc = "Bit 13 - SPI 4 clock enable during Sleep mode"]
#[inline(always)]
pub fn spi4lpen(&mut self) -> SPI4LPEN_W {
SPI4LPEN_W { w: self }
}
#[doc = "Bit 14 - System configuration controller clock enable during Sleep mode"]
#[inline(always)]
pub fn syscfglpen(&mut self) -> SYSCFGLPEN_W {
SYSCFGLPEN_W { w: self }
}
#[doc = "Bit 16 - TIM9 clock enable during sleep mode"]
#[inline(always)]
pub fn tim9lpen(&mut self) -> TIM9LPEN_W {
TIM9LPEN_W { w: self }
}
#[doc = "Bit 17 - TIM10 clock enable during Sleep mode"]
#[inline(always)]
pub fn tim10lpen(&mut self) -> TIM10LPEN_W {
TIM10LPEN_W { w: self }
}
#[doc = "Bit 18 - TIM11 clock enable during Sleep mode"]
#[inline(always)]
pub fn tim11lpen(&mut self) -> TIM11LPEN_W {
TIM11LPEN_W { w: self }
}
#[doc = "Bit 20 - SPI 5 clock enable during Sleep mode"]
#[inline(always)]
pub fn spi5lpen(&mut self) -> SPI5LPEN_W {
SPI5LPEN_W { w: self }
}
#[doc = "Bit 21 - SPI 6 clock enable during Sleep mode"]
#[inline(always)]
pub fn spi6lpen(&mut self) -> SPI6LPEN_W {
SPI6LPEN_W { w: self }
}
#[doc = "Bit 22 - SAI1 clock enable during sleep mode"]
#[inline(always)]
pub fn sai1lpen(&mut self) -> SAI1LPEN_W {
SAI1LPEN_W { w: self }
}
#[doc = "Bit 26 - LTDC clock enable during sleep mode"]
#[inline(always)]
pub fn ltdclpen(&mut self) -> LTDCLPEN_W {
LTDCLPEN_W { w: self }
}
#[doc = "Bit 23 - SAI2 clock enable during sleep mode"]
#[inline(always)]
pub fn sai2lpen(&mut self) -> SAI2LPEN_W {
SAI2LPEN_W { w: self }
}
#[doc = "Bit 11 - SDMMC1 clock enable during Sleep mode"]
#[inline(always)]
pub fn sdmmc1lpen(&mut self) -> SDMMC1LPEN_W {
SDMMC1LPEN_W { w: self }
}
#[doc = "Writes raw bits to the register."]
#[inline(always)]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.0.bits(bits);
self
}
}
#[doc = "APB2 peripheral clock enabled in low power mode register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [apb2lpenr](index.html) module"]
pub struct APB2LPENR_SPEC;
impl crate::RegisterSpec for APB2LPENR_SPEC {
type Ux = u32;
}
#[doc = "`read()` method returns [apb2lpenr::R](R) reader structure"]
impl crate::Readable for APB2LPENR_SPEC {
type Reader = R;
}
#[doc = "`write(|w| ..)` method takes [apb2lpenr::W](W) writer structure"]
impl crate::Writable for APB2LPENR_SPEC {
type Writer = W;
}
#[doc = "`reset()` method sets APB2LPENR to value 0x0007_5f33"]
impl crate::Resettable for APB2LPENR_SPEC {
#[inline(always)]
fn reset_value() -> Self::Ux {
0x0007_5f33
}
}