#[doc = "Register `APB2ENR` reader"]
pub struct R(crate::R<APB2ENR_SPEC>);
impl core::ops::Deref for R {
type Target = crate::R<APB2ENR_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl From<crate::R<APB2ENR_SPEC>> for R {
#[inline(always)]
fn from(reader: crate::R<APB2ENR_SPEC>) -> Self {
R(reader)
}
}
#[doc = "Register `APB2ENR` writer"]
pub struct W(crate::W<APB2ENR_SPEC>);
impl core::ops::Deref for W {
type Target = crate::W<APB2ENR_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl core::ops::DerefMut for W {
#[inline(always)]
fn deref_mut(&mut self) -> &mut Self::Target {
&mut self.0
}
}
impl From<crate::W<APB2ENR_SPEC>> for W {
#[inline(always)]
fn from(writer: crate::W<APB2ENR_SPEC>) -> Self {
W(writer)
}
}
#[doc = "TIM1 clock enable\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum TIM1EN_A {
#[doc = "0: The selected clock is disabled"]
DISABLED = 0,
#[doc = "1: The selected clock is enabled"]
ENABLED = 1,
}
impl From<TIM1EN_A> for bool {
#[inline(always)]
fn from(variant: TIM1EN_A) -> Self {
variant as u8 != 0
}
}
#[doc = "Field `TIM1EN` reader - TIM1 clock enable"]
pub struct TIM1EN_R(crate::FieldReader<bool, TIM1EN_A>);
impl TIM1EN_R {
pub(crate) fn new(bits: bool) -> Self {
TIM1EN_R(crate::FieldReader::new(bits))
}
#[doc = r"Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> TIM1EN_A {
match self.bits {
false => TIM1EN_A::DISABLED,
true => TIM1EN_A::ENABLED,
}
}
#[doc = "Checks if the value of the field is `DISABLED`"]
#[inline(always)]
pub fn is_disabled(&self) -> bool {
**self == TIM1EN_A::DISABLED
}
#[doc = "Checks if the value of the field is `ENABLED`"]
#[inline(always)]
pub fn is_enabled(&self) -> bool {
**self == TIM1EN_A::ENABLED
}
}
impl core::ops::Deref for TIM1EN_R {
type Target = crate::FieldReader<bool, TIM1EN_A>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
#[doc = "Field `TIM1EN` writer - TIM1 clock enable"]
pub struct TIM1EN_W<'a> {
w: &'a mut W,
}
impl<'a> TIM1EN_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: TIM1EN_A) -> &'a mut W {
self.bit(variant.into())
}
#[doc = "The selected clock is disabled"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(TIM1EN_A::DISABLED)
}
#[doc = "The selected clock is enabled"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(TIM1EN_A::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01);
self.w
}
}
#[doc = "TIM8 clock enable"]
pub type TIM8EN_A = TIM1EN_A;
#[doc = "Field `TIM8EN` reader - TIM8 clock enable"]
pub type TIM8EN_R = TIM1EN_R;
#[doc = "Field `TIM8EN` writer - TIM8 clock enable"]
pub struct TIM8EN_W<'a> {
w: &'a mut W,
}
impl<'a> TIM8EN_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: TIM8EN_A) -> &'a mut W {
self.bit(variant.into())
}
#[doc = "The selected clock is disabled"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(TIM8EN_A::DISABLED)
}
#[doc = "The selected clock is enabled"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(TIM8EN_A::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1);
self.w
}
}
#[doc = "USART1 clock enable"]
pub type USART1EN_A = TIM1EN_A;
#[doc = "Field `USART1EN` reader - USART1 clock enable"]
pub type USART1EN_R = TIM1EN_R;
#[doc = "Field `USART1EN` writer - USART1 clock enable"]
pub struct USART1EN_W<'a> {
w: &'a mut W,
}
impl<'a> USART1EN_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: USART1EN_A) -> &'a mut W {
self.bit(variant.into())
}
#[doc = "The selected clock is disabled"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(USART1EN_A::DISABLED)
}
#[doc = "The selected clock is enabled"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(USART1EN_A::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4);
self.w
}
}
#[doc = "USART6 clock enable"]
pub type USART6EN_A = TIM1EN_A;
#[doc = "Field `USART6EN` reader - USART6 clock enable"]
pub type USART6EN_R = TIM1EN_R;
#[doc = "Field `USART6EN` writer - USART6 clock enable"]
pub struct USART6EN_W<'a> {
w: &'a mut W,
}
impl<'a> USART6EN_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: USART6EN_A) -> &'a mut W {
self.bit(variant.into())
}
#[doc = "The selected clock is disabled"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(USART6EN_A::DISABLED)
}
#[doc = "The selected clock is enabled"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(USART6EN_A::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u32 & 0x01) << 5);
self.w
}
}
#[doc = "ADC1 clock enable"]
pub type ADC1EN_A = TIM1EN_A;
#[doc = "Field `ADC1EN` reader - ADC1 clock enable"]
pub type ADC1EN_R = TIM1EN_R;
#[doc = "Field `ADC1EN` writer - ADC1 clock enable"]
pub struct ADC1EN_W<'a> {
w: &'a mut W,
}
impl<'a> ADC1EN_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: ADC1EN_A) -> &'a mut W {
self.bit(variant.into())
}
#[doc = "The selected clock is disabled"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(ADC1EN_A::DISABLED)
}
#[doc = "The selected clock is enabled"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(ADC1EN_A::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u32 & 0x01) << 8);
self.w
}
}
#[doc = "ADC2 clock enable"]
pub type ADC2EN_A = TIM1EN_A;
#[doc = "Field `ADC2EN` reader - ADC2 clock enable"]
pub type ADC2EN_R = TIM1EN_R;
#[doc = "Field `ADC2EN` writer - ADC2 clock enable"]
pub struct ADC2EN_W<'a> {
w: &'a mut W,
}
impl<'a> ADC2EN_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: ADC2EN_A) -> &'a mut W {
self.bit(variant.into())
}
#[doc = "The selected clock is disabled"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(ADC2EN_A::DISABLED)
}
#[doc = "The selected clock is enabled"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(ADC2EN_A::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 9)) | ((value as u32 & 0x01) << 9);
self.w
}
}
#[doc = "ADC3 clock enable"]
pub type ADC3EN_A = TIM1EN_A;
#[doc = "Field `ADC3EN` reader - ADC3 clock enable"]
pub type ADC3EN_R = TIM1EN_R;
#[doc = "Field `ADC3EN` writer - ADC3 clock enable"]
pub struct ADC3EN_W<'a> {
w: &'a mut W,
}
impl<'a> ADC3EN_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: ADC3EN_A) -> &'a mut W {
self.bit(variant.into())
}
#[doc = "The selected clock is disabled"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(ADC3EN_A::DISABLED)
}
#[doc = "The selected clock is enabled"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(ADC3EN_A::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 10)) | ((value as u32 & 0x01) << 10);
self.w
}
}
#[doc = "SPI1 clock enable"]
pub type SPI1EN_A = TIM1EN_A;
#[doc = "Field `SPI1EN` reader - SPI1 clock enable"]
pub type SPI1EN_R = TIM1EN_R;
#[doc = "Field `SPI1EN` writer - SPI1 clock enable"]
pub struct SPI1EN_W<'a> {
w: &'a mut W,
}
impl<'a> SPI1EN_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: SPI1EN_A) -> &'a mut W {
self.bit(variant.into())
}
#[doc = "The selected clock is disabled"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(SPI1EN_A::DISABLED)
}
#[doc = "The selected clock is enabled"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(SPI1EN_A::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 12)) | ((value as u32 & 0x01) << 12);
self.w
}
}
#[doc = "SPI4 clock enable"]
pub type SPI4EN_A = TIM1EN_A;
#[doc = "Field `SPI4EN` reader - SPI4 clock enable"]
pub type SPI4EN_R = TIM1EN_R;
#[doc = "Field `SPI4EN` writer - SPI4 clock enable"]
pub struct SPI4EN_W<'a> {
w: &'a mut W,
}
impl<'a> SPI4EN_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: SPI4EN_A) -> &'a mut W {
self.bit(variant.into())
}
#[doc = "The selected clock is disabled"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(SPI4EN_A::DISABLED)
}
#[doc = "The selected clock is enabled"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(SPI4EN_A::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 13)) | ((value as u32 & 0x01) << 13);
self.w
}
}
#[doc = "System configuration controller clock enable"]
pub type SYSCFGEN_A = TIM1EN_A;
#[doc = "Field `SYSCFGEN` reader - System configuration controller clock enable"]
pub type SYSCFGEN_R = TIM1EN_R;
#[doc = "Field `SYSCFGEN` writer - System configuration controller clock enable"]
pub struct SYSCFGEN_W<'a> {
w: &'a mut W,
}
impl<'a> SYSCFGEN_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: SYSCFGEN_A) -> &'a mut W {
self.bit(variant.into())
}
#[doc = "The selected clock is disabled"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(SYSCFGEN_A::DISABLED)
}
#[doc = "The selected clock is enabled"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(SYSCFGEN_A::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 14)) | ((value as u32 & 0x01) << 14);
self.w
}
}
#[doc = "TIM9 clock enable"]
pub type TIM9EN_A = TIM1EN_A;
#[doc = "Field `TIM9EN` reader - TIM9 clock enable"]
pub type TIM9EN_R = TIM1EN_R;
#[doc = "Field `TIM9EN` writer - TIM9 clock enable"]
pub struct TIM9EN_W<'a> {
w: &'a mut W,
}
impl<'a> TIM9EN_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: TIM9EN_A) -> &'a mut W {
self.bit(variant.into())
}
#[doc = "The selected clock is disabled"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(TIM9EN_A::DISABLED)
}
#[doc = "The selected clock is enabled"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(TIM9EN_A::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 16)) | ((value as u32 & 0x01) << 16);
self.w
}
}
#[doc = "TIM10 clock enable"]
pub type TIM10EN_A = TIM1EN_A;
#[doc = "Field `TIM10EN` reader - TIM10 clock enable"]
pub type TIM10EN_R = TIM1EN_R;
#[doc = "Field `TIM10EN` writer - TIM10 clock enable"]
pub struct TIM10EN_W<'a> {
w: &'a mut W,
}
impl<'a> TIM10EN_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: TIM10EN_A) -> &'a mut W {
self.bit(variant.into())
}
#[doc = "The selected clock is disabled"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(TIM10EN_A::DISABLED)
}
#[doc = "The selected clock is enabled"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(TIM10EN_A::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 17)) | ((value as u32 & 0x01) << 17);
self.w
}
}
#[doc = "TIM11 clock enable"]
pub type TIM11EN_A = TIM1EN_A;
#[doc = "Field `TIM11EN` reader - TIM11 clock enable"]
pub type TIM11EN_R = TIM1EN_R;
#[doc = "Field `TIM11EN` writer - TIM11 clock enable"]
pub struct TIM11EN_W<'a> {
w: &'a mut W,
}
impl<'a> TIM11EN_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: TIM11EN_A) -> &'a mut W {
self.bit(variant.into())
}
#[doc = "The selected clock is disabled"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(TIM11EN_A::DISABLED)
}
#[doc = "The selected clock is enabled"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(TIM11EN_A::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 18)) | ((value as u32 & 0x01) << 18);
self.w
}
}
#[doc = "SPI5 clock enable"]
pub type SPI5EN_A = TIM1EN_A;
#[doc = "Field `SPI5EN` reader - SPI5 clock enable"]
pub type SPI5EN_R = TIM1EN_R;
#[doc = "Field `SPI5EN` writer - SPI5 clock enable"]
pub struct SPI5EN_W<'a> {
w: &'a mut W,
}
impl<'a> SPI5EN_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: SPI5EN_A) -> &'a mut W {
self.bit(variant.into())
}
#[doc = "The selected clock is disabled"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(SPI5EN_A::DISABLED)
}
#[doc = "The selected clock is enabled"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(SPI5EN_A::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 20)) | ((value as u32 & 0x01) << 20);
self.w
}
}
#[doc = "SPI6 clock enable"]
pub type SPI6EN_A = TIM1EN_A;
#[doc = "Field `SPI6EN` reader - SPI6 clock enable"]
pub type SPI6EN_R = TIM1EN_R;
#[doc = "Field `SPI6EN` writer - SPI6 clock enable"]
pub struct SPI6EN_W<'a> {
w: &'a mut W,
}
impl<'a> SPI6EN_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: SPI6EN_A) -> &'a mut W {
self.bit(variant.into())
}
#[doc = "The selected clock is disabled"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(SPI6EN_A::DISABLED)
}
#[doc = "The selected clock is enabled"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(SPI6EN_A::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 21)) | ((value as u32 & 0x01) << 21);
self.w
}
}
#[doc = "SAI1 clock enable"]
pub type SAI1EN_A = TIM1EN_A;
#[doc = "Field `SAI1EN` reader - SAI1 clock enable"]
pub type SAI1EN_R = TIM1EN_R;
#[doc = "Field `SAI1EN` writer - SAI1 clock enable"]
pub struct SAI1EN_W<'a> {
w: &'a mut W,
}
impl<'a> SAI1EN_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: SAI1EN_A) -> &'a mut W {
self.bit(variant.into())
}
#[doc = "The selected clock is disabled"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(SAI1EN_A::DISABLED)
}
#[doc = "The selected clock is enabled"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(SAI1EN_A::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 22)) | ((value as u32 & 0x01) << 22);
self.w
}
}
#[doc = "LTDC clock enable"]
pub type LTDCEN_A = TIM1EN_A;
#[doc = "Field `LTDCEN` reader - LTDC clock enable"]
pub type LTDCEN_R = TIM1EN_R;
#[doc = "Field `LTDCEN` writer - LTDC clock enable"]
pub struct LTDCEN_W<'a> {
w: &'a mut W,
}
impl<'a> LTDCEN_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: LTDCEN_A) -> &'a mut W {
self.bit(variant.into())
}
#[doc = "The selected clock is disabled"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(LTDCEN_A::DISABLED)
}
#[doc = "The selected clock is enabled"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(LTDCEN_A::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 26)) | ((value as u32 & 0x01) << 26);
self.w
}
}
#[doc = "SAI2 clock enable"]
pub type SAI2EN_A = TIM1EN_A;
#[doc = "Field `SAI2EN` reader - SAI2 clock enable"]
pub type SAI2EN_R = TIM1EN_R;
#[doc = "Field `SAI2EN` writer - SAI2 clock enable"]
pub struct SAI2EN_W<'a> {
w: &'a mut W,
}
impl<'a> SAI2EN_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: SAI2EN_A) -> &'a mut W {
self.bit(variant.into())
}
#[doc = "The selected clock is disabled"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(SAI2EN_A::DISABLED)
}
#[doc = "The selected clock is enabled"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(SAI2EN_A::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 23)) | ((value as u32 & 0x01) << 23);
self.w
}
}
#[doc = "SDMMC1 clock enable"]
pub type SDMMC1EN_A = TIM1EN_A;
#[doc = "Field `SDMMC1EN` reader - SDMMC1 clock enable"]
pub type SDMMC1EN_R = TIM1EN_R;
#[doc = "Field `SDMMC1EN` writer - SDMMC1 clock enable"]
pub struct SDMMC1EN_W<'a> {
w: &'a mut W,
}
impl<'a> SDMMC1EN_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: SDMMC1EN_A) -> &'a mut W {
self.bit(variant.into())
}
#[doc = "The selected clock is disabled"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(SDMMC1EN_A::DISABLED)
}
#[doc = "The selected clock is enabled"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(SDMMC1EN_A::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 11)) | ((value as u32 & 0x01) << 11);
self.w
}
}
impl R {
#[doc = "Bit 0 - TIM1 clock enable"]
#[inline(always)]
pub fn tim1en(&self) -> TIM1EN_R {
TIM1EN_R::new((self.bits & 0x01) != 0)
}
#[doc = "Bit 1 - TIM8 clock enable"]
#[inline(always)]
pub fn tim8en(&self) -> TIM8EN_R {
TIM8EN_R::new(((self.bits >> 1) & 0x01) != 0)
}
#[doc = "Bit 4 - USART1 clock enable"]
#[inline(always)]
pub fn usart1en(&self) -> USART1EN_R {
USART1EN_R::new(((self.bits >> 4) & 0x01) != 0)
}
#[doc = "Bit 5 - USART6 clock enable"]
#[inline(always)]
pub fn usart6en(&self) -> USART6EN_R {
USART6EN_R::new(((self.bits >> 5) & 0x01) != 0)
}
#[doc = "Bit 8 - ADC1 clock enable"]
#[inline(always)]
pub fn adc1en(&self) -> ADC1EN_R {
ADC1EN_R::new(((self.bits >> 8) & 0x01) != 0)
}
#[doc = "Bit 9 - ADC2 clock enable"]
#[inline(always)]
pub fn adc2en(&self) -> ADC2EN_R {
ADC2EN_R::new(((self.bits >> 9) & 0x01) != 0)
}
#[doc = "Bit 10 - ADC3 clock enable"]
#[inline(always)]
pub fn adc3en(&self) -> ADC3EN_R {
ADC3EN_R::new(((self.bits >> 10) & 0x01) != 0)
}
#[doc = "Bit 12 - SPI1 clock enable"]
#[inline(always)]
pub fn spi1en(&self) -> SPI1EN_R {
SPI1EN_R::new(((self.bits >> 12) & 0x01) != 0)
}
#[doc = "Bit 13 - SPI4 clock enable"]
#[inline(always)]
pub fn spi4en(&self) -> SPI4EN_R {
SPI4EN_R::new(((self.bits >> 13) & 0x01) != 0)
}
#[doc = "Bit 14 - System configuration controller clock enable"]
#[inline(always)]
pub fn syscfgen(&self) -> SYSCFGEN_R {
SYSCFGEN_R::new(((self.bits >> 14) & 0x01) != 0)
}
#[doc = "Bit 16 - TIM9 clock enable"]
#[inline(always)]
pub fn tim9en(&self) -> TIM9EN_R {
TIM9EN_R::new(((self.bits >> 16) & 0x01) != 0)
}
#[doc = "Bit 17 - TIM10 clock enable"]
#[inline(always)]
pub fn tim10en(&self) -> TIM10EN_R {
TIM10EN_R::new(((self.bits >> 17) & 0x01) != 0)
}
#[doc = "Bit 18 - TIM11 clock enable"]
#[inline(always)]
pub fn tim11en(&self) -> TIM11EN_R {
TIM11EN_R::new(((self.bits >> 18) & 0x01) != 0)
}
#[doc = "Bit 20 - SPI5 clock enable"]
#[inline(always)]
pub fn spi5en(&self) -> SPI5EN_R {
SPI5EN_R::new(((self.bits >> 20) & 0x01) != 0)
}
#[doc = "Bit 21 - SPI6 clock enable"]
#[inline(always)]
pub fn spi6en(&self) -> SPI6EN_R {
SPI6EN_R::new(((self.bits >> 21) & 0x01) != 0)
}
#[doc = "Bit 22 - SAI1 clock enable"]
#[inline(always)]
pub fn sai1en(&self) -> SAI1EN_R {
SAI1EN_R::new(((self.bits >> 22) & 0x01) != 0)
}
#[doc = "Bit 26 - LTDC clock enable"]
#[inline(always)]
pub fn ltdcen(&self) -> LTDCEN_R {
LTDCEN_R::new(((self.bits >> 26) & 0x01) != 0)
}
#[doc = "Bit 23 - SAI2 clock enable"]
#[inline(always)]
pub fn sai2en(&self) -> SAI2EN_R {
SAI2EN_R::new(((self.bits >> 23) & 0x01) != 0)
}
#[doc = "Bit 11 - SDMMC1 clock enable"]
#[inline(always)]
pub fn sdmmc1en(&self) -> SDMMC1EN_R {
SDMMC1EN_R::new(((self.bits >> 11) & 0x01) != 0)
}
}
impl W {
#[doc = "Bit 0 - TIM1 clock enable"]
#[inline(always)]
pub fn tim1en(&mut self) -> TIM1EN_W {
TIM1EN_W { w: self }
}
#[doc = "Bit 1 - TIM8 clock enable"]
#[inline(always)]
pub fn tim8en(&mut self) -> TIM8EN_W {
TIM8EN_W { w: self }
}
#[doc = "Bit 4 - USART1 clock enable"]
#[inline(always)]
pub fn usart1en(&mut self) -> USART1EN_W {
USART1EN_W { w: self }
}
#[doc = "Bit 5 - USART6 clock enable"]
#[inline(always)]
pub fn usart6en(&mut self) -> USART6EN_W {
USART6EN_W { w: self }
}
#[doc = "Bit 8 - ADC1 clock enable"]
#[inline(always)]
pub fn adc1en(&mut self) -> ADC1EN_W {
ADC1EN_W { w: self }
}
#[doc = "Bit 9 - ADC2 clock enable"]
#[inline(always)]
pub fn adc2en(&mut self) -> ADC2EN_W {
ADC2EN_W { w: self }
}
#[doc = "Bit 10 - ADC3 clock enable"]
#[inline(always)]
pub fn adc3en(&mut self) -> ADC3EN_W {
ADC3EN_W { w: self }
}
#[doc = "Bit 12 - SPI1 clock enable"]
#[inline(always)]
pub fn spi1en(&mut self) -> SPI1EN_W {
SPI1EN_W { w: self }
}
#[doc = "Bit 13 - SPI4 clock enable"]
#[inline(always)]
pub fn spi4en(&mut self) -> SPI4EN_W {
SPI4EN_W { w: self }
}
#[doc = "Bit 14 - System configuration controller clock enable"]
#[inline(always)]
pub fn syscfgen(&mut self) -> SYSCFGEN_W {
SYSCFGEN_W { w: self }
}
#[doc = "Bit 16 - TIM9 clock enable"]
#[inline(always)]
pub fn tim9en(&mut self) -> TIM9EN_W {
TIM9EN_W { w: self }
}
#[doc = "Bit 17 - TIM10 clock enable"]
#[inline(always)]
pub fn tim10en(&mut self) -> TIM10EN_W {
TIM10EN_W { w: self }
}
#[doc = "Bit 18 - TIM11 clock enable"]
#[inline(always)]
pub fn tim11en(&mut self) -> TIM11EN_W {
TIM11EN_W { w: self }
}
#[doc = "Bit 20 - SPI5 clock enable"]
#[inline(always)]
pub fn spi5en(&mut self) -> SPI5EN_W {
SPI5EN_W { w: self }
}
#[doc = "Bit 21 - SPI6 clock enable"]
#[inline(always)]
pub fn spi6en(&mut self) -> SPI6EN_W {
SPI6EN_W { w: self }
}
#[doc = "Bit 22 - SAI1 clock enable"]
#[inline(always)]
pub fn sai1en(&mut self) -> SAI1EN_W {
SAI1EN_W { w: self }
}
#[doc = "Bit 26 - LTDC clock enable"]
#[inline(always)]
pub fn ltdcen(&mut self) -> LTDCEN_W {
LTDCEN_W { w: self }
}
#[doc = "Bit 23 - SAI2 clock enable"]
#[inline(always)]
pub fn sai2en(&mut self) -> SAI2EN_W {
SAI2EN_W { w: self }
}
#[doc = "Bit 11 - SDMMC1 clock enable"]
#[inline(always)]
pub fn sdmmc1en(&mut self) -> SDMMC1EN_W {
SDMMC1EN_W { w: self }
}
#[doc = "Writes raw bits to the register."]
#[inline(always)]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.0.bits(bits);
self
}
}
#[doc = "APB2 peripheral clock enable register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [apb2enr](index.html) module"]
pub struct APB2ENR_SPEC;
impl crate::RegisterSpec for APB2ENR_SPEC {
type Ux = u32;
}
#[doc = "`read()` method returns [apb2enr::R](R) reader structure"]
impl crate::Readable for APB2ENR_SPEC {
type Reader = R;
}
#[doc = "`write(|w| ..)` method takes [apb2enr::W](W) writer structure"]
impl crate::Writable for APB2ENR_SPEC {
type Writer = W;
}
#[doc = "`reset()` method sets APB2ENR to value 0"]
impl crate::Resettable for APB2ENR_SPEC {
#[inline(always)]
fn reset_value() -> Self::Ux {
0
}
}