#[doc = "Register `AHB1ENR` reader"]
pub struct R(crate::R<AHB1ENR_SPEC>);
impl core::ops::Deref for R {
type Target = crate::R<AHB1ENR_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl From<crate::R<AHB1ENR_SPEC>> for R {
#[inline(always)]
fn from(reader: crate::R<AHB1ENR_SPEC>) -> Self {
R(reader)
}
}
#[doc = "Register `AHB1ENR` writer"]
pub struct W(crate::W<AHB1ENR_SPEC>);
impl core::ops::Deref for W {
type Target = crate::W<AHB1ENR_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl core::ops::DerefMut for W {
#[inline(always)]
fn deref_mut(&mut self) -> &mut Self::Target {
&mut self.0
}
}
impl From<crate::W<AHB1ENR_SPEC>> for W {
#[inline(always)]
fn from(writer: crate::W<AHB1ENR_SPEC>) -> Self {
W(writer)
}
}
#[doc = "USB OTG HSULPI clock enable"]
pub type OTGHSULPIEN_A = GPIOAEN_A;
#[doc = "Field `OTGHSULPIEN` reader - USB OTG HSULPI clock enable"]
pub type OTGHSULPIEN_R = GPIOAEN_R;
#[doc = "Field `OTGHSULPIEN` writer - USB OTG HSULPI clock enable"]
pub struct OTGHSULPIEN_W<'a> {
w: &'a mut W,
}
impl<'a> OTGHSULPIEN_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: OTGHSULPIEN_A) -> &'a mut W {
self.bit(variant.into())
}
#[doc = "The selected clock is disabled"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(OTGHSULPIEN_A::DISABLED)
}
#[doc = "The selected clock is enabled"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(OTGHSULPIEN_A::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 30)) | ((value as u32 & 0x01) << 30);
self.w
}
}
#[doc = "USB OTG HS clock enable"]
pub type OTGHSEN_A = GPIOAEN_A;
#[doc = "Field `OTGHSEN` reader - USB OTG HS clock enable"]
pub type OTGHSEN_R = GPIOAEN_R;
#[doc = "Field `OTGHSEN` writer - USB OTG HS clock enable"]
pub struct OTGHSEN_W<'a> {
w: &'a mut W,
}
impl<'a> OTGHSEN_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: OTGHSEN_A) -> &'a mut W {
self.bit(variant.into())
}
#[doc = "The selected clock is disabled"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(OTGHSEN_A::DISABLED)
}
#[doc = "The selected clock is enabled"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(OTGHSEN_A::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 29)) | ((value as u32 & 0x01) << 29);
self.w
}
}
#[doc = "Ethernet PTP clock enable"]
pub type ETHMACPTPEN_A = GPIOAEN_A;
#[doc = "Field `ETHMACPTPEN` reader - Ethernet PTP clock enable"]
pub type ETHMACPTPEN_R = GPIOAEN_R;
#[doc = "Field `ETHMACPTPEN` writer - Ethernet PTP clock enable"]
pub struct ETHMACPTPEN_W<'a> {
w: &'a mut W,
}
impl<'a> ETHMACPTPEN_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: ETHMACPTPEN_A) -> &'a mut W {
self.bit(variant.into())
}
#[doc = "The selected clock is disabled"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(ETHMACPTPEN_A::DISABLED)
}
#[doc = "The selected clock is enabled"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(ETHMACPTPEN_A::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 28)) | ((value as u32 & 0x01) << 28);
self.w
}
}
#[doc = "Ethernet Reception clock enable"]
pub type ETHMACRXEN_A = GPIOAEN_A;
#[doc = "Field `ETHMACRXEN` reader - Ethernet Reception clock enable"]
pub type ETHMACRXEN_R = GPIOAEN_R;
#[doc = "Field `ETHMACRXEN` writer - Ethernet Reception clock enable"]
pub struct ETHMACRXEN_W<'a> {
w: &'a mut W,
}
impl<'a> ETHMACRXEN_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: ETHMACRXEN_A) -> &'a mut W {
self.bit(variant.into())
}
#[doc = "The selected clock is disabled"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(ETHMACRXEN_A::DISABLED)
}
#[doc = "The selected clock is enabled"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(ETHMACRXEN_A::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 27)) | ((value as u32 & 0x01) << 27);
self.w
}
}
#[doc = "Ethernet Transmission clock enable"]
pub type ETHMACTXEN_A = GPIOAEN_A;
#[doc = "Field `ETHMACTXEN` reader - Ethernet Transmission clock enable"]
pub type ETHMACTXEN_R = GPIOAEN_R;
#[doc = "Field `ETHMACTXEN` writer - Ethernet Transmission clock enable"]
pub struct ETHMACTXEN_W<'a> {
w: &'a mut W,
}
impl<'a> ETHMACTXEN_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: ETHMACTXEN_A) -> &'a mut W {
self.bit(variant.into())
}
#[doc = "The selected clock is disabled"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(ETHMACTXEN_A::DISABLED)
}
#[doc = "The selected clock is enabled"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(ETHMACTXEN_A::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 26)) | ((value as u32 & 0x01) << 26);
self.w
}
}
#[doc = "Ethernet MAC clock enable"]
pub type ETHMACEN_A = GPIOAEN_A;
#[doc = "Field `ETHMACEN` reader - Ethernet MAC clock enable"]
pub type ETHMACEN_R = GPIOAEN_R;
#[doc = "Field `ETHMACEN` writer - Ethernet MAC clock enable"]
pub struct ETHMACEN_W<'a> {
w: &'a mut W,
}
impl<'a> ETHMACEN_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: ETHMACEN_A) -> &'a mut W {
self.bit(variant.into())
}
#[doc = "The selected clock is disabled"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(ETHMACEN_A::DISABLED)
}
#[doc = "The selected clock is enabled"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(ETHMACEN_A::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 25)) | ((value as u32 & 0x01) << 25);
self.w
}
}
#[doc = "DMA2D clock enable"]
pub type DMA2DEN_A = GPIOAEN_A;
#[doc = "Field `DMA2DEN` reader - DMA2D clock enable"]
pub type DMA2DEN_R = GPIOAEN_R;
#[doc = "Field `DMA2DEN` writer - DMA2D clock enable"]
pub struct DMA2DEN_W<'a> {
w: &'a mut W,
}
impl<'a> DMA2DEN_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: DMA2DEN_A) -> &'a mut W {
self.bit(variant.into())
}
#[doc = "The selected clock is disabled"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(DMA2DEN_A::DISABLED)
}
#[doc = "The selected clock is enabled"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(DMA2DEN_A::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 23)) | ((value as u32 & 0x01) << 23);
self.w
}
}
#[doc = "DMA2 clock enable"]
pub type DMA2EN_A = GPIOAEN_A;
#[doc = "Field `DMA2EN` reader - DMA2 clock enable"]
pub type DMA2EN_R = GPIOAEN_R;
#[doc = "Field `DMA2EN` writer - DMA2 clock enable"]
pub struct DMA2EN_W<'a> {
w: &'a mut W,
}
impl<'a> DMA2EN_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: DMA2EN_A) -> &'a mut W {
self.bit(variant.into())
}
#[doc = "The selected clock is disabled"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(DMA2EN_A::DISABLED)
}
#[doc = "The selected clock is enabled"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(DMA2EN_A::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 22)) | ((value as u32 & 0x01) << 22);
self.w
}
}
#[doc = "DMA1 clock enable"]
pub type DMA1EN_A = GPIOAEN_A;
#[doc = "Field `DMA1EN` reader - DMA1 clock enable"]
pub type DMA1EN_R = GPIOAEN_R;
#[doc = "Field `DMA1EN` writer - DMA1 clock enable"]
pub struct DMA1EN_W<'a> {
w: &'a mut W,
}
impl<'a> DMA1EN_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: DMA1EN_A) -> &'a mut W {
self.bit(variant.into())
}
#[doc = "The selected clock is disabled"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(DMA1EN_A::DISABLED)
}
#[doc = "The selected clock is enabled"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(DMA1EN_A::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 21)) | ((value as u32 & 0x01) << 21);
self.w
}
}
#[doc = "CCM data RAM clock enable"]
pub type DTCMRAMEN_A = GPIOAEN_A;
#[doc = "Field `DTCMRAMEN` reader - CCM data RAM clock enable"]
pub type DTCMRAMEN_R = GPIOAEN_R;
#[doc = "Field `DTCMRAMEN` writer - CCM data RAM clock enable"]
pub struct DTCMRAMEN_W<'a> {
w: &'a mut W,
}
impl<'a> DTCMRAMEN_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: DTCMRAMEN_A) -> &'a mut W {
self.bit(variant.into())
}
#[doc = "The selected clock is disabled"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(DTCMRAMEN_A::DISABLED)
}
#[doc = "The selected clock is enabled"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(DTCMRAMEN_A::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 20)) | ((value as u32 & 0x01) << 20);
self.w
}
}
#[doc = "Backup SRAM interface clock enable"]
pub type BKPSRAMEN_A = GPIOAEN_A;
#[doc = "Field `BKPSRAMEN` reader - Backup SRAM interface clock enable"]
pub type BKPSRAMEN_R = GPIOAEN_R;
#[doc = "Field `BKPSRAMEN` writer - Backup SRAM interface clock enable"]
pub struct BKPSRAMEN_W<'a> {
w: &'a mut W,
}
impl<'a> BKPSRAMEN_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: BKPSRAMEN_A) -> &'a mut W {
self.bit(variant.into())
}
#[doc = "The selected clock is disabled"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(BKPSRAMEN_A::DISABLED)
}
#[doc = "The selected clock is enabled"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(BKPSRAMEN_A::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 18)) | ((value as u32 & 0x01) << 18);
self.w
}
}
#[doc = "CRC clock enable"]
pub type CRCEN_A = GPIOAEN_A;
#[doc = "Field `CRCEN` reader - CRC clock enable"]
pub type CRCEN_R = GPIOAEN_R;
#[doc = "Field `CRCEN` writer - CRC clock enable"]
pub struct CRCEN_W<'a> {
w: &'a mut W,
}
impl<'a> CRCEN_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: CRCEN_A) -> &'a mut W {
self.bit(variant.into())
}
#[doc = "The selected clock is disabled"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(CRCEN_A::DISABLED)
}
#[doc = "The selected clock is enabled"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(CRCEN_A::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 12)) | ((value as u32 & 0x01) << 12);
self.w
}
}
#[doc = "IO port K clock enable"]
pub type GPIOKEN_A = GPIOAEN_A;
#[doc = "Field `GPIOKEN` reader - IO port K clock enable"]
pub type GPIOKEN_R = GPIOAEN_R;
#[doc = "Field `GPIOKEN` writer - IO port K clock enable"]
pub struct GPIOKEN_W<'a> {
w: &'a mut W,
}
impl<'a> GPIOKEN_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: GPIOKEN_A) -> &'a mut W {
self.bit(variant.into())
}
#[doc = "The selected clock is disabled"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(GPIOKEN_A::DISABLED)
}
#[doc = "The selected clock is enabled"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(GPIOKEN_A::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 10)) | ((value as u32 & 0x01) << 10);
self.w
}
}
#[doc = "IO port J clock enable"]
pub type GPIOJEN_A = GPIOAEN_A;
#[doc = "Field `GPIOJEN` reader - IO port J clock enable"]
pub type GPIOJEN_R = GPIOAEN_R;
#[doc = "Field `GPIOJEN` writer - IO port J clock enable"]
pub struct GPIOJEN_W<'a> {
w: &'a mut W,
}
impl<'a> GPIOJEN_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: GPIOJEN_A) -> &'a mut W {
self.bit(variant.into())
}
#[doc = "The selected clock is disabled"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(GPIOJEN_A::DISABLED)
}
#[doc = "The selected clock is enabled"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(GPIOJEN_A::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 9)) | ((value as u32 & 0x01) << 9);
self.w
}
}
#[doc = "IO port I clock enable"]
pub type GPIOIEN_A = GPIOAEN_A;
#[doc = "Field `GPIOIEN` reader - IO port I clock enable"]
pub type GPIOIEN_R = GPIOAEN_R;
#[doc = "Field `GPIOIEN` writer - IO port I clock enable"]
pub struct GPIOIEN_W<'a> {
w: &'a mut W,
}
impl<'a> GPIOIEN_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: GPIOIEN_A) -> &'a mut W {
self.bit(variant.into())
}
#[doc = "The selected clock is disabled"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(GPIOIEN_A::DISABLED)
}
#[doc = "The selected clock is enabled"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(GPIOIEN_A::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u32 & 0x01) << 8);
self.w
}
}
#[doc = "IO port H clock enable"]
pub type GPIOHEN_A = GPIOAEN_A;
#[doc = "Field `GPIOHEN` reader - IO port H clock enable"]
pub type GPIOHEN_R = GPIOAEN_R;
#[doc = "Field `GPIOHEN` writer - IO port H clock enable"]
pub struct GPIOHEN_W<'a> {
w: &'a mut W,
}
impl<'a> GPIOHEN_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: GPIOHEN_A) -> &'a mut W {
self.bit(variant.into())
}
#[doc = "The selected clock is disabled"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(GPIOHEN_A::DISABLED)
}
#[doc = "The selected clock is enabled"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(GPIOHEN_A::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7);
self.w
}
}
#[doc = "IO port G clock enable"]
pub type GPIOGEN_A = GPIOAEN_A;
#[doc = "Field `GPIOGEN` reader - IO port G clock enable"]
pub type GPIOGEN_R = GPIOAEN_R;
#[doc = "Field `GPIOGEN` writer - IO port G clock enable"]
pub struct GPIOGEN_W<'a> {
w: &'a mut W,
}
impl<'a> GPIOGEN_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: GPIOGEN_A) -> &'a mut W {
self.bit(variant.into())
}
#[doc = "The selected clock is disabled"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(GPIOGEN_A::DISABLED)
}
#[doc = "The selected clock is enabled"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(GPIOGEN_A::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 6)) | ((value as u32 & 0x01) << 6);
self.w
}
}
#[doc = "IO port F clock enable"]
pub type GPIOFEN_A = GPIOAEN_A;
#[doc = "Field `GPIOFEN` reader - IO port F clock enable"]
pub type GPIOFEN_R = GPIOAEN_R;
#[doc = "Field `GPIOFEN` writer - IO port F clock enable"]
pub struct GPIOFEN_W<'a> {
w: &'a mut W,
}
impl<'a> GPIOFEN_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: GPIOFEN_A) -> &'a mut W {
self.bit(variant.into())
}
#[doc = "The selected clock is disabled"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(GPIOFEN_A::DISABLED)
}
#[doc = "The selected clock is enabled"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(GPIOFEN_A::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u32 & 0x01) << 5);
self.w
}
}
#[doc = "IO port E clock enable"]
pub type GPIOEEN_A = GPIOAEN_A;
#[doc = "Field `GPIOEEN` reader - IO port E clock enable"]
pub type GPIOEEN_R = GPIOAEN_R;
#[doc = "Field `GPIOEEN` writer - IO port E clock enable"]
pub struct GPIOEEN_W<'a> {
w: &'a mut W,
}
impl<'a> GPIOEEN_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: GPIOEEN_A) -> &'a mut W {
self.bit(variant.into())
}
#[doc = "The selected clock is disabled"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(GPIOEEN_A::DISABLED)
}
#[doc = "The selected clock is enabled"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(GPIOEEN_A::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4);
self.w
}
}
#[doc = "IO port D clock enable"]
pub type GPIODEN_A = GPIOAEN_A;
#[doc = "Field `GPIODEN` reader - IO port D clock enable"]
pub type GPIODEN_R = GPIOAEN_R;
#[doc = "Field `GPIODEN` writer - IO port D clock enable"]
pub struct GPIODEN_W<'a> {
w: &'a mut W,
}
impl<'a> GPIODEN_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: GPIODEN_A) -> &'a mut W {
self.bit(variant.into())
}
#[doc = "The selected clock is disabled"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(GPIODEN_A::DISABLED)
}
#[doc = "The selected clock is enabled"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(GPIODEN_A::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3);
self.w
}
}
#[doc = "IO port C clock enable"]
pub type GPIOCEN_A = GPIOAEN_A;
#[doc = "Field `GPIOCEN` reader - IO port C clock enable"]
pub type GPIOCEN_R = GPIOAEN_R;
#[doc = "Field `GPIOCEN` writer - IO port C clock enable"]
pub struct GPIOCEN_W<'a> {
w: &'a mut W,
}
impl<'a> GPIOCEN_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: GPIOCEN_A) -> &'a mut W {
self.bit(variant.into())
}
#[doc = "The selected clock is disabled"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(GPIOCEN_A::DISABLED)
}
#[doc = "The selected clock is enabled"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(GPIOCEN_A::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2);
self.w
}
}
#[doc = "IO port B clock enable"]
pub type GPIOBEN_A = GPIOAEN_A;
#[doc = "Field `GPIOBEN` reader - IO port B clock enable"]
pub type GPIOBEN_R = GPIOAEN_R;
#[doc = "Field `GPIOBEN` writer - IO port B clock enable"]
pub struct GPIOBEN_W<'a> {
w: &'a mut W,
}
impl<'a> GPIOBEN_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: GPIOBEN_A) -> &'a mut W {
self.bit(variant.into())
}
#[doc = "The selected clock is disabled"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(GPIOBEN_A::DISABLED)
}
#[doc = "The selected clock is enabled"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(GPIOBEN_A::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1);
self.w
}
}
#[doc = "IO port A clock enable\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum GPIOAEN_A {
#[doc = "0: The selected clock is disabled"]
DISABLED = 0,
#[doc = "1: The selected clock is enabled"]
ENABLED = 1,
}
impl From<GPIOAEN_A> for bool {
#[inline(always)]
fn from(variant: GPIOAEN_A) -> Self {
variant as u8 != 0
}
}
#[doc = "Field `GPIOAEN` reader - IO port A clock enable"]
pub struct GPIOAEN_R(crate::FieldReader<bool, GPIOAEN_A>);
impl GPIOAEN_R {
pub(crate) fn new(bits: bool) -> Self {
GPIOAEN_R(crate::FieldReader::new(bits))
}
#[doc = r"Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> GPIOAEN_A {
match self.bits {
false => GPIOAEN_A::DISABLED,
true => GPIOAEN_A::ENABLED,
}
}
#[doc = "Checks if the value of the field is `DISABLED`"]
#[inline(always)]
pub fn is_disabled(&self) -> bool {
**self == GPIOAEN_A::DISABLED
}
#[doc = "Checks if the value of the field is `ENABLED`"]
#[inline(always)]
pub fn is_enabled(&self) -> bool {
**self == GPIOAEN_A::ENABLED
}
}
impl core::ops::Deref for GPIOAEN_R {
type Target = crate::FieldReader<bool, GPIOAEN_A>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
#[doc = "Field `GPIOAEN` writer - IO port A clock enable"]
pub struct GPIOAEN_W<'a> {
w: &'a mut W,
}
impl<'a> GPIOAEN_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: GPIOAEN_A) -> &'a mut W {
self.bit(variant.into())
}
#[doc = "The selected clock is disabled"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(GPIOAEN_A::DISABLED)
}
#[doc = "The selected clock is enabled"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(GPIOAEN_A::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01);
self.w
}
}
impl R {
#[doc = "Bit 30 - USB OTG HSULPI clock enable"]
#[inline(always)]
pub fn otghsulpien(&self) -> OTGHSULPIEN_R {
OTGHSULPIEN_R::new(((self.bits >> 30) & 0x01) != 0)
}
#[doc = "Bit 29 - USB OTG HS clock enable"]
#[inline(always)]
pub fn otghsen(&self) -> OTGHSEN_R {
OTGHSEN_R::new(((self.bits >> 29) & 0x01) != 0)
}
#[doc = "Bit 28 - Ethernet PTP clock enable"]
#[inline(always)]
pub fn ethmacptpen(&self) -> ETHMACPTPEN_R {
ETHMACPTPEN_R::new(((self.bits >> 28) & 0x01) != 0)
}
#[doc = "Bit 27 - Ethernet Reception clock enable"]
#[inline(always)]
pub fn ethmacrxen(&self) -> ETHMACRXEN_R {
ETHMACRXEN_R::new(((self.bits >> 27) & 0x01) != 0)
}
#[doc = "Bit 26 - Ethernet Transmission clock enable"]
#[inline(always)]
pub fn ethmactxen(&self) -> ETHMACTXEN_R {
ETHMACTXEN_R::new(((self.bits >> 26) & 0x01) != 0)
}
#[doc = "Bit 25 - Ethernet MAC clock enable"]
#[inline(always)]
pub fn ethmacen(&self) -> ETHMACEN_R {
ETHMACEN_R::new(((self.bits >> 25) & 0x01) != 0)
}
#[doc = "Bit 23 - DMA2D clock enable"]
#[inline(always)]
pub fn dma2den(&self) -> DMA2DEN_R {
DMA2DEN_R::new(((self.bits >> 23) & 0x01) != 0)
}
#[doc = "Bit 22 - DMA2 clock enable"]
#[inline(always)]
pub fn dma2en(&self) -> DMA2EN_R {
DMA2EN_R::new(((self.bits >> 22) & 0x01) != 0)
}
#[doc = "Bit 21 - DMA1 clock enable"]
#[inline(always)]
pub fn dma1en(&self) -> DMA1EN_R {
DMA1EN_R::new(((self.bits >> 21) & 0x01) != 0)
}
#[doc = "Bit 20 - CCM data RAM clock enable"]
#[inline(always)]
pub fn dtcmramen(&self) -> DTCMRAMEN_R {
DTCMRAMEN_R::new(((self.bits >> 20) & 0x01) != 0)
}
#[doc = "Bit 18 - Backup SRAM interface clock enable"]
#[inline(always)]
pub fn bkpsramen(&self) -> BKPSRAMEN_R {
BKPSRAMEN_R::new(((self.bits >> 18) & 0x01) != 0)
}
#[doc = "Bit 12 - CRC clock enable"]
#[inline(always)]
pub fn crcen(&self) -> CRCEN_R {
CRCEN_R::new(((self.bits >> 12) & 0x01) != 0)
}
#[doc = "Bit 10 - IO port K clock enable"]
#[inline(always)]
pub fn gpioken(&self) -> GPIOKEN_R {
GPIOKEN_R::new(((self.bits >> 10) & 0x01) != 0)
}
#[doc = "Bit 9 - IO port J clock enable"]
#[inline(always)]
pub fn gpiojen(&self) -> GPIOJEN_R {
GPIOJEN_R::new(((self.bits >> 9) & 0x01) != 0)
}
#[doc = "Bit 8 - IO port I clock enable"]
#[inline(always)]
pub fn gpioien(&self) -> GPIOIEN_R {
GPIOIEN_R::new(((self.bits >> 8) & 0x01) != 0)
}
#[doc = "Bit 7 - IO port H clock enable"]
#[inline(always)]
pub fn gpiohen(&self) -> GPIOHEN_R {
GPIOHEN_R::new(((self.bits >> 7) & 0x01) != 0)
}
#[doc = "Bit 6 - IO port G clock enable"]
#[inline(always)]
pub fn gpiogen(&self) -> GPIOGEN_R {
GPIOGEN_R::new(((self.bits >> 6) & 0x01) != 0)
}
#[doc = "Bit 5 - IO port F clock enable"]
#[inline(always)]
pub fn gpiofen(&self) -> GPIOFEN_R {
GPIOFEN_R::new(((self.bits >> 5) & 0x01) != 0)
}
#[doc = "Bit 4 - IO port E clock enable"]
#[inline(always)]
pub fn gpioeen(&self) -> GPIOEEN_R {
GPIOEEN_R::new(((self.bits >> 4) & 0x01) != 0)
}
#[doc = "Bit 3 - IO port D clock enable"]
#[inline(always)]
pub fn gpioden(&self) -> GPIODEN_R {
GPIODEN_R::new(((self.bits >> 3) & 0x01) != 0)
}
#[doc = "Bit 2 - IO port C clock enable"]
#[inline(always)]
pub fn gpiocen(&self) -> GPIOCEN_R {
GPIOCEN_R::new(((self.bits >> 2) & 0x01) != 0)
}
#[doc = "Bit 1 - IO port B clock enable"]
#[inline(always)]
pub fn gpioben(&self) -> GPIOBEN_R {
GPIOBEN_R::new(((self.bits >> 1) & 0x01) != 0)
}
#[doc = "Bit 0 - IO port A clock enable"]
#[inline(always)]
pub fn gpioaen(&self) -> GPIOAEN_R {
GPIOAEN_R::new((self.bits & 0x01) != 0)
}
}
impl W {
#[doc = "Bit 30 - USB OTG HSULPI clock enable"]
#[inline(always)]
pub fn otghsulpien(&mut self) -> OTGHSULPIEN_W {
OTGHSULPIEN_W { w: self }
}
#[doc = "Bit 29 - USB OTG HS clock enable"]
#[inline(always)]
pub fn otghsen(&mut self) -> OTGHSEN_W {
OTGHSEN_W { w: self }
}
#[doc = "Bit 28 - Ethernet PTP clock enable"]
#[inline(always)]
pub fn ethmacptpen(&mut self) -> ETHMACPTPEN_W {
ETHMACPTPEN_W { w: self }
}
#[doc = "Bit 27 - Ethernet Reception clock enable"]
#[inline(always)]
pub fn ethmacrxen(&mut self) -> ETHMACRXEN_W {
ETHMACRXEN_W { w: self }
}
#[doc = "Bit 26 - Ethernet Transmission clock enable"]
#[inline(always)]
pub fn ethmactxen(&mut self) -> ETHMACTXEN_W {
ETHMACTXEN_W { w: self }
}
#[doc = "Bit 25 - Ethernet MAC clock enable"]
#[inline(always)]
pub fn ethmacen(&mut self) -> ETHMACEN_W {
ETHMACEN_W { w: self }
}
#[doc = "Bit 23 - DMA2D clock enable"]
#[inline(always)]
pub fn dma2den(&mut self) -> DMA2DEN_W {
DMA2DEN_W { w: self }
}
#[doc = "Bit 22 - DMA2 clock enable"]
#[inline(always)]
pub fn dma2en(&mut self) -> DMA2EN_W {
DMA2EN_W { w: self }
}
#[doc = "Bit 21 - DMA1 clock enable"]
#[inline(always)]
pub fn dma1en(&mut self) -> DMA1EN_W {
DMA1EN_W { w: self }
}
#[doc = "Bit 20 - CCM data RAM clock enable"]
#[inline(always)]
pub fn dtcmramen(&mut self) -> DTCMRAMEN_W {
DTCMRAMEN_W { w: self }
}
#[doc = "Bit 18 - Backup SRAM interface clock enable"]
#[inline(always)]
pub fn bkpsramen(&mut self) -> BKPSRAMEN_W {
BKPSRAMEN_W { w: self }
}
#[doc = "Bit 12 - CRC clock enable"]
#[inline(always)]
pub fn crcen(&mut self) -> CRCEN_W {
CRCEN_W { w: self }
}
#[doc = "Bit 10 - IO port K clock enable"]
#[inline(always)]
pub fn gpioken(&mut self) -> GPIOKEN_W {
GPIOKEN_W { w: self }
}
#[doc = "Bit 9 - IO port J clock enable"]
#[inline(always)]
pub fn gpiojen(&mut self) -> GPIOJEN_W {
GPIOJEN_W { w: self }
}
#[doc = "Bit 8 - IO port I clock enable"]
#[inline(always)]
pub fn gpioien(&mut self) -> GPIOIEN_W {
GPIOIEN_W { w: self }
}
#[doc = "Bit 7 - IO port H clock enable"]
#[inline(always)]
pub fn gpiohen(&mut self) -> GPIOHEN_W {
GPIOHEN_W { w: self }
}
#[doc = "Bit 6 - IO port G clock enable"]
#[inline(always)]
pub fn gpiogen(&mut self) -> GPIOGEN_W {
GPIOGEN_W { w: self }
}
#[doc = "Bit 5 - IO port F clock enable"]
#[inline(always)]
pub fn gpiofen(&mut self) -> GPIOFEN_W {
GPIOFEN_W { w: self }
}
#[doc = "Bit 4 - IO port E clock enable"]
#[inline(always)]
pub fn gpioeen(&mut self) -> GPIOEEN_W {
GPIOEEN_W { w: self }
}
#[doc = "Bit 3 - IO port D clock enable"]
#[inline(always)]
pub fn gpioden(&mut self) -> GPIODEN_W {
GPIODEN_W { w: self }
}
#[doc = "Bit 2 - IO port C clock enable"]
#[inline(always)]
pub fn gpiocen(&mut self) -> GPIOCEN_W {
GPIOCEN_W { w: self }
}
#[doc = "Bit 1 - IO port B clock enable"]
#[inline(always)]
pub fn gpioben(&mut self) -> GPIOBEN_W {
GPIOBEN_W { w: self }
}
#[doc = "Bit 0 - IO port A clock enable"]
#[inline(always)]
pub fn gpioaen(&mut self) -> GPIOAEN_W {
GPIOAEN_W { w: self }
}
#[doc = "Writes raw bits to the register."]
#[inline(always)]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.0.bits(bits);
self
}
}
#[doc = "AHB1 peripheral clock register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ahb1enr](index.html) module"]
pub struct AHB1ENR_SPEC;
impl crate::RegisterSpec for AHB1ENR_SPEC {
type Ux = u32;
}
#[doc = "`read()` method returns [ahb1enr::R](R) reader structure"]
impl crate::Readable for AHB1ENR_SPEC {
type Reader = R;
}
#[doc = "`write(|w| ..)` method takes [ahb1enr::W](W) writer structure"]
impl crate::Writable for AHB1ENR_SPEC {
type Writer = W;
}
#[doc = "`reset()` method sets AHB1ENR to value 0x0010_0000"]
impl crate::Resettable for AHB1ENR_SPEC {
#[inline(always)]
fn reset_value() -> Self::Ux {
0x0010_0000
}
}