rigless 0.1.0

// rigless svd from STM32F427.svd, sha256 5eb6bfd30833147f0cb93b74235b602f835fddd78d3795f67a5873804e80d414. Do not edit.
// Copyright (c) 2024 STMicroelectronics.
// SPDX-License-Identifier: Apache-2.0
//! Registers of `OTG_HS_HOST` and the instances derived from it.

use rigless::soc::{Access, FieldSpec, Layout, ReadAction, RegisterSpec, Width, WriteModify};

/// The registers by name, where a variant's index is its row in [`REGISTERS`].
#[derive(Debug, Clone, Copy, PartialEq, Eq)]
pub enum Register {
    /// `OTG_HS_HCFG` at offset `0x0`, resets to `0x0000_0000`, read-write.
    OtgHsHcfg = 0,
    /// `OTG_HS_HFIR` at offset `0x4`, resets to `0x0000_EA60`, read-write.
    OtgHsHfir = 1,
    /// `OTG_HS_HFNUM` at offset `0x8`, resets to `0x0000_3FFF`, read-only.
    OtgHsHfnum = 2,
    /// `OTG_HS_HPTXSTS` at offset `0x10`, resets to `0x0008_0100`, read-write.
    OtgHsHptxsts = 3,
    /// `OTG_HS_HAINT` at offset `0x14`, resets to `0x0000_0000`, read-only.
    OtgHsHaint = 4,
    /// `OTG_HS_HAINTMSK` at offset `0x18`, resets to `0x0000_0000`, read-write.
    OtgHsHaintmsk = 5,
    /// `OTG_HS_HPRT` at offset `0x40`, resets to `0x0000_0000`, read-write.
    OtgHsHprt = 6,
    /// `OTG_HS_HCCHAR0` at offset `0x100`, resets to `0x0000_0000`, read-write.
    OtgHsHcchar0 = 7,
    /// `OTG_HS_HCSPLT0` at offset `0x104`, resets to `0x0000_0000`, read-write.
    OtgHsHcsplt0 = 8,
    /// `OTG_HS_HCINT0` at offset `0x108`, resets to `0x0000_0000`, read-write.
    OtgHsHcint0 = 9,
    /// `OTG_HS_HCINTMSK0` at offset `0x10C`, resets to `0x0000_0000`, read-write.
    OtgHsHcintmsk0 = 10,
    /// `OTG_HS_HCTSIZ0` at offset `0x110`, resets to `0x0000_0000`, read-write.
    OtgHsHctsiz0 = 11,
    /// `OTG_HS_HCDMA0` at offset `0x114`, resets to `0x0000_0000`, read-write.
    OtgHsHcdma0 = 12,
    /// `OTG_HS_HCCHAR1` at offset `0x120`, resets to `0x0000_0000`, read-write.
    OtgHsHcchar1 = 13,
    /// `OTG_HS_HCSPLT1` at offset `0x124`, resets to `0x0000_0000`, read-write.
    OtgHsHcsplt1 = 14,
    /// `OTG_HS_HCINT1` at offset `0x128`, resets to `0x0000_0000`, read-write.
    OtgHsHcint1 = 15,
    /// `OTG_HS_HCINTMSK1` at offset `0x12C`, resets to `0x0000_0000`, read-write.
    OtgHsHcintmsk1 = 16,
    /// `OTG_HS_HCTSIZ1` at offset `0x130`, resets to `0x0000_0000`, read-write.
    OtgHsHctsiz1 = 17,
    /// `OTG_HS_HCDMA1` at offset `0x134`, resets to `0x0000_0000`, read-write.
    OtgHsHcdma1 = 18,
    /// `OTG_HS_HCCHAR2` at offset `0x140`, resets to `0x0000_0000`, read-write.
    OtgHsHcchar2 = 19,
    /// `OTG_HS_HCSPLT2` at offset `0x144`, resets to `0x0000_0000`, read-write.
    OtgHsHcsplt2 = 20,
    /// `OTG_HS_HCINT2` at offset `0x148`, resets to `0x0000_0000`, read-write.
    OtgHsHcint2 = 21,
    /// `OTG_HS_HCINTMSK2` at offset `0x14C`, resets to `0x0000_0000`, read-write.
    OtgHsHcintmsk2 = 22,
    /// `OTG_HS_HCTSIZ2` at offset `0x150`, resets to `0x0000_0000`, read-write.
    OtgHsHctsiz2 = 23,
    /// `OTG_HS_HCDMA2` at offset `0x154`, resets to `0x0000_0000`, read-write.
    OtgHsHcdma2 = 24,
    /// `OTG_HS_HCCHAR3` at offset `0x160`, resets to `0x0000_0000`, read-write.
    OtgHsHcchar3 = 25,
    /// `OTG_HS_HCSPLT3` at offset `0x164`, resets to `0x0000_0000`, read-write.
    OtgHsHcsplt3 = 26,
    /// `OTG_HS_HCINT3` at offset `0x168`, resets to `0x0000_0000`, read-write.
    OtgHsHcint3 = 27,
    /// `OTG_HS_HCINTMSK3` at offset `0x16C`, resets to `0x0000_0000`, read-write.
    OtgHsHcintmsk3 = 28,
    /// `OTG_HS_HCTSIZ3` at offset `0x170`, resets to `0x0000_0000`, read-write.
    OtgHsHctsiz3 = 29,
    /// `OTG_HS_HCDMA3` at offset `0x174`, resets to `0x0000_0000`, read-write.
    OtgHsHcdma3 = 30,
    /// `OTG_HS_HCCHAR4` at offset `0x180`, resets to `0x0000_0000`, read-write.
    OtgHsHcchar4 = 31,
    /// `OTG_HS_HCSPLT4` at offset `0x184`, resets to `0x0000_0000`, read-write.
    OtgHsHcsplt4 = 32,
    /// `OTG_HS_HCINT4` at offset `0x188`, resets to `0x0000_0000`, read-write.
    OtgHsHcint4 = 33,
    /// `OTG_HS_HCINTMSK4` at offset `0x18C`, resets to `0x0000_0000`, read-write.
    OtgHsHcintmsk4 = 34,
    /// `OTG_HS_HCTSIZ4` at offset `0x190`, resets to `0x0000_0000`, read-write.
    OtgHsHctsiz4 = 35,
    /// `OTG_HS_HCDMA4` at offset `0x194`, resets to `0x0000_0000`, read-write.
    OtgHsHcdma4 = 36,
    /// `OTG_HS_HCCHAR5` at offset `0x1A0`, resets to `0x0000_0000`, read-write.
    OtgHsHcchar5 = 37,
    /// `OTG_HS_HCSPLT5` at offset `0x1A4`, resets to `0x0000_0000`, read-write.
    OtgHsHcsplt5 = 38,
    /// `OTG_HS_HCINT5` at offset `0x1A8`, resets to `0x0000_0000`, read-write.
    OtgHsHcint5 = 39,
    /// `OTG_HS_HCINTMSK5` at offset `0x1AC`, resets to `0x0000_0000`, read-write.
    OtgHsHcintmsk5 = 40,
    /// `OTG_HS_HCTSIZ5` at offset `0x1B0`, resets to `0x0000_0000`, read-write.
    OtgHsHctsiz5 = 41,
    /// `OTG_HS_HCDMA5` at offset `0x1B4`, resets to `0x0000_0000`, read-write.
    OtgHsHcdma5 = 42,
    /// `OTG_HS_HCCHAR6` at offset `0x1C0`, resets to `0x0000_0000`, read-write.
    OtgHsHcchar6 = 43,
    /// `OTG_HS_HCSPLT6` at offset `0x1C4`, resets to `0x0000_0000`, read-write.
    OtgHsHcsplt6 = 44,
    /// `OTG_HS_HCINT6` at offset `0x1C8`, resets to `0x0000_0000`, read-write.
    OtgHsHcint6 = 45,
    /// `OTG_HS_HCINTMSK6` at offset `0x1CC`, resets to `0x0000_0000`, read-write.
    OtgHsHcintmsk6 = 46,
    /// `OTG_HS_HCTSIZ6` at offset `0x1D0`, resets to `0x0000_0000`, read-write.
    OtgHsHctsiz6 = 47,
    /// `OTG_HS_HCDMA6` at offset `0x1D4`, resets to `0x0000_0000`, read-write.
    OtgHsHcdma6 = 48,
    /// `OTG_HS_HCCHAR7` at offset `0x1E0`, resets to `0x0000_0000`, read-write.
    OtgHsHcchar7 = 49,
    /// `OTG_HS_HCSPLT7` at offset `0x1E4`, resets to `0x0000_0000`, read-write.
    OtgHsHcsplt7 = 50,
    /// `OTG_HS_HCINT7` at offset `0x1E8`, resets to `0x0000_0000`, read-write.
    OtgHsHcint7 = 51,
    /// `OTG_HS_HCINTMSK7` at offset `0x1EC`, resets to `0x0000_0000`, read-write.
    OtgHsHcintmsk7 = 52,
    /// `OTG_HS_HCTSIZ7` at offset `0x1F0`, resets to `0x0000_0000`, read-write.
    OtgHsHctsiz7 = 53,
    /// `OTG_HS_HCDMA7` at offset `0x1F4`, resets to `0x0000_0000`, read-write.
    OtgHsHcdma7 = 54,
    /// `OTG_HS_HCCHAR8` at offset `0x200`, resets to `0x0000_0000`, read-write.
    OtgHsHcchar8 = 55,
    /// `OTG_HS_HCSPLT8` at offset `0x204`, resets to `0x0000_0000`, read-write.
    OtgHsHcsplt8 = 56,
    /// `OTG_HS_HCINT8` at offset `0x208`, resets to `0x0000_0000`, read-write.
    OtgHsHcint8 = 57,
    /// `OTG_HS_HCINTMSK8` at offset `0x20C`, resets to `0x0000_0000`, read-write.
    OtgHsHcintmsk8 = 58,
    /// `OTG_HS_HCTSIZ8` at offset `0x210`, resets to `0x0000_0000`, read-write.
    OtgHsHctsiz8 = 59,
    /// `OTG_HS_HCDMA8` at offset `0x214`, resets to `0x0000_0000`, read-write.
    OtgHsHcdma8 = 60,
    /// `OTG_HS_HCCHAR9` at offset `0x220`, resets to `0x0000_0000`, read-write.
    OtgHsHcchar9 = 61,
    /// `OTG_HS_HCSPLT9` at offset `0x224`, resets to `0x0000_0000`, read-write.
    OtgHsHcsplt9 = 62,
    /// `OTG_HS_HCINT9` at offset `0x228`, resets to `0x0000_0000`, read-write.
    OtgHsHcint9 = 63,
    /// `OTG_HS_HCINTMSK9` at offset `0x22C`, resets to `0x0000_0000`, read-write.
    OtgHsHcintmsk9 = 64,
    /// `OTG_HS_HCTSIZ9` at offset `0x230`, resets to `0x0000_0000`, read-write.
    OtgHsHctsiz9 = 65,
    /// `OTG_HS_HCDMA9` at offset `0x234`, resets to `0x0000_0000`, read-write.
    OtgHsHcdma9 = 66,
    /// `OTG_HS_HCCHAR10` at offset `0x240`, resets to `0x0000_0000`, read-write.
    OtgHsHcchar10 = 67,
    /// `OTG_HS_HCSPLT10` at offset `0x244`, resets to `0x0000_0000`, read-write.
    OtgHsHcsplt10 = 68,
    /// `OTG_HS_HCINT10` at offset `0x248`, resets to `0x0000_0000`, read-write.
    OtgHsHcint10 = 69,
    /// `OTG_HS_HCINTMSK10` at offset `0x24C`, resets to `0x0000_0000`, read-write.
    OtgHsHcintmsk10 = 70,
    /// `OTG_HS_HCTSIZ10` at offset `0x250`, resets to `0x0000_0000`, read-write.
    OtgHsHctsiz10 = 71,
    /// `OTG_HS_HCDMA10` at offset `0x254`, resets to `0x0000_0000`, read-write.
    OtgHsHcdma10 = 72,
    /// `OTG_HS_HCCHAR11` at offset `0x260`, resets to `0x0000_0000`, read-write.
    OtgHsHcchar11 = 73,
    /// `OTG_HS_HCSPLT11` at offset `0x264`, resets to `0x0000_0000`, read-write.
    OtgHsHcsplt11 = 74,
    /// `OTG_HS_HCINT11` at offset `0x268`, resets to `0x0000_0000`, read-write.
    OtgHsHcint11 = 75,
    /// `OTG_HS_HCINTMSK11` at offset `0x26C`, resets to `0x0000_0000`, read-write.
    OtgHsHcintmsk11 = 76,
    /// `OTG_HS_HCTSIZ11` at offset `0x270`, resets to `0x0000_0000`, read-write.
    OtgHsHctsiz11 = 77,
    /// `OTG_HS_HCDMA11` at offset `0x274`, resets to `0x0000_0000`, read-write.
    OtgHsHcdma11 = 78,
    /// `OTG_HS_HCCHAR12` at offset `0x280`, resets to `0x0000_0000`, read-write.
    OtgHsHcchar12 = 79,
    /// `OTG_HS_HCSPLT12` at offset `0x284`, resets to `0x0000_0000`, read-write.
    OtgHsHcsplt12 = 80,
    /// `OTG_HS_HCINT12` at offset `0x288`, resets to `0x0000_0000`, read-write.
    OtgHsHcint12 = 81,
    /// `OTG_HS_HCINTMSK12` at offset `0x28C`, resets to `0x0000_0000`, read-write.
    OtgHsHcintmsk12 = 82,
    /// `OTG_HS_HCTSIZ12` at offset `0x290`, resets to `0x0000_0000`, read-write.
    OtgHsHctsiz12 = 83,
    /// `OTG_HS_HCDMA12` at offset `0x294`, resets to `0x0000_0000`, read-write.
    OtgHsHcdma12 = 84,
    /// `OTG_HS_HCCHAR13` at offset `0x2A0`, resets to `0x0000_0000`, read-write.
    OtgHsHcchar13 = 85,
    /// `OTG_HS_HCSPLT13` at offset `0x2A4`, resets to `0x0000_0000`, read-write.
    OtgHsHcsplt13 = 86,
    /// `OTG_HS_HCINT13` at offset `0x2A8`, resets to `0x0000_0000`, read-write.
    OtgHsHcint13 = 87,
    /// `OTG_HS_HCINTMSK13` at offset `0x2AC`, resets to `0x0000_0000`, read-write.
    OtgHsHcintmsk13 = 88,
    /// `OTG_HS_HCTSIZ13` at offset `0x2B0`, resets to `0x0000_0000`, read-write.
    OtgHsHctsiz13 = 89,
    /// `OTG_HS_HCDMA13` at offset `0x2B4`, resets to `0x0000_0000`, read-write.
    OtgHsHcdma13 = 90,
    /// `OTG_HS_HCCHAR14` at offset `0x2C0`, resets to `0x0000_0000`, read-write.
    OtgHsHcchar14 = 91,
    /// `OTG_HS_HCSPLT14` at offset `0x2C4`, resets to `0x0000_0000`, read-write.
    OtgHsHcsplt14 = 92,
    /// `OTG_HS_HCINT14` at offset `0x2C8`, resets to `0x0000_0000`, read-write.
    OtgHsHcint14 = 93,
    /// `OTG_HS_HCINTMSK14` at offset `0x2CC`, resets to `0x0000_0000`, read-write.
    OtgHsHcintmsk14 = 94,
    /// `OTG_HS_HCTSIZ14` at offset `0x2D0`, resets to `0x0000_0000`, read-write.
    OtgHsHctsiz14 = 95,
    /// `OTG_HS_HCDMA14` at offset `0x2D4`, resets to `0x0000_0000`, read-write.
    OtgHsHcdma14 = 96,
    /// `OTG_HS_HCCHAR15` at offset `0x2E0`, resets to `0x0000_0000`, read-write.
    OtgHsHcchar15 = 97,
    /// `OTG_HS_HCSPLT15` at offset `0x2E4`, resets to `0x0000_0000`, read-write.
    OtgHsHcsplt15 = 98,
    /// `OTG_HS_HCINT15` at offset `0x2E8`, resets to `0x0000_0000`, read-write.
    OtgHsHcint15 = 99,
    /// `OTG_HS_HCINTMSK15` at offset `0x2EC`, resets to `0x0000_0000`, read-write.
    OtgHsHcintmsk15 = 100,
    /// `OTG_HS_HCTSIZ15` at offset `0x2F0`, resets to `0x0000_0000`, read-write.
    OtgHsHctsiz15 = 101,
    /// `OTG_HS_HCDMA15` at offset `0x2F4`, resets to `0x0000_0000`, read-write.
    OtgHsHcdma15 = 102,
}

impl Register {
    /// Every register, in table order.
    pub const ALL: [Self; 103] = [Self::OtgHsHcfg, Self::OtgHsHfir, Self::OtgHsHfnum, Self::OtgHsHptxsts, Self::OtgHsHaint, Self::OtgHsHaintmsk, Self::OtgHsHprt, Self::OtgHsHcchar0, Self::OtgHsHcsplt0, Self::OtgHsHcint0, Self::OtgHsHcintmsk0, Self::OtgHsHctsiz0, Self::OtgHsHcdma0, Self::OtgHsHcchar1, Self::OtgHsHcsplt1, Self::OtgHsHcint1, Self::OtgHsHcintmsk1, Self::OtgHsHctsiz1, Self::OtgHsHcdma1, Self::OtgHsHcchar2, Self::OtgHsHcsplt2, Self::OtgHsHcint2, Self::OtgHsHcintmsk2, Self::OtgHsHctsiz2, Self::OtgHsHcdma2, Self::OtgHsHcchar3, Self::OtgHsHcsplt3, Self::OtgHsHcint3, Self::OtgHsHcintmsk3, Self::OtgHsHctsiz3, Self::OtgHsHcdma3, Self::OtgHsHcchar4, Self::OtgHsHcsplt4, Self::OtgHsHcint4, Self::OtgHsHcintmsk4, Self::OtgHsHctsiz4, Self::OtgHsHcdma4, Self::OtgHsHcchar5, Self::OtgHsHcsplt5, Self::OtgHsHcint5, Self::OtgHsHcintmsk5, Self::OtgHsHctsiz5, Self::OtgHsHcdma5, Self::OtgHsHcchar6, Self::OtgHsHcsplt6, Self::OtgHsHcint6, Self::OtgHsHcintmsk6, Self::OtgHsHctsiz6, Self::OtgHsHcdma6, Self::OtgHsHcchar7, Self::OtgHsHcsplt7, Self::OtgHsHcint7, Self::OtgHsHcintmsk7, Self::OtgHsHctsiz7, Self::OtgHsHcdma7, Self::OtgHsHcchar8, Self::OtgHsHcsplt8, Self::OtgHsHcint8, Self::OtgHsHcintmsk8, Self::OtgHsHctsiz8, Self::OtgHsHcdma8, Self::OtgHsHcchar9, Self::OtgHsHcsplt9, Self::OtgHsHcint9, Self::OtgHsHcintmsk9, Self::OtgHsHctsiz9, Self::OtgHsHcdma9, Self::OtgHsHcchar10, Self::OtgHsHcsplt10, Self::OtgHsHcint10, Self::OtgHsHcintmsk10, Self::OtgHsHctsiz10, Self::OtgHsHcdma10, Self::OtgHsHcchar11, Self::OtgHsHcsplt11, Self::OtgHsHcint11, Self::OtgHsHcintmsk11, Self::OtgHsHctsiz11, Self::OtgHsHcdma11, Self::OtgHsHcchar12, Self::OtgHsHcsplt12, Self::OtgHsHcint12, Self::OtgHsHcintmsk12, Self::OtgHsHctsiz12, Self::OtgHsHcdma12, Self::OtgHsHcchar13, Self::OtgHsHcsplt13, Self::OtgHsHcint13, Self::OtgHsHcintmsk13, Self::OtgHsHctsiz13, Self::OtgHsHcdma13, Self::OtgHsHcchar14, Self::OtgHsHcsplt14, Self::OtgHsHcint14, Self::OtgHsHcintmsk14, Self::OtgHsHctsiz14, Self::OtgHsHcdma14, Self::OtgHsHcchar15, Self::OtgHsHcsplt15, Self::OtgHsHcint15, Self::OtgHsHcintmsk15, Self::OtgHsHctsiz15, Self::OtgHsHcdma15];
}

impl Layout for Register {
    const REGISTERS: &'static [RegisterSpec] = &REGISTERS;
    fn from_index(index: usize) -> Option<Self> {
        Self::ALL.get(index).copied()
    }
    fn index(self) -> usize {
        self as usize
    }
}

/// The fields of `OTG_HS_HCFG`.
pub mod otg_hs_hcfg {
    use super::FieldSpec;
    /// `FSLSPCS`, bits 0..=1.
    pub const FSLSPCS: &FieldSpec = &super::REGISTERS[0].fields[0];
    /// `FSLSS`, bit 2, read-only.
    pub const FSLSS: &FieldSpec = &super::REGISTERS[0].fields[1];
}

/// The fields of `OTG_HS_HFIR`.
pub mod otg_hs_hfir {
    use super::FieldSpec;
    /// `FRIVL`, bits 0..=15.
    pub const FRIVL: &FieldSpec = &super::REGISTERS[1].fields[0];
    /// `RLDCTRL`, bit 16.
    pub const RLDCTRL: &FieldSpec = &super::REGISTERS[1].fields[1];
}

/// The fields of `OTG_HS_HFNUM`.
pub mod otg_hs_hfnum {
    use super::FieldSpec;
    /// `FRNUM`, bits 0..=15.
    pub const FRNUM: &FieldSpec = &super::REGISTERS[2].fields[0];
    /// `FTREM`, bits 16..=31.
    pub const FTREM: &FieldSpec = &super::REGISTERS[2].fields[1];
}

/// The fields of `OTG_HS_HPTXSTS`.
pub mod otg_hs_hptxsts {
    use super::FieldSpec;
    /// `PTXFSAVL`, bits 0..=15.
    pub const PTXFSAVL: &FieldSpec = &super::REGISTERS[3].fields[0];
    /// `PTXQSAV`, bits 16..=23, read-only.
    pub const PTXQSAV: &FieldSpec = &super::REGISTERS[3].fields[1];
    /// `PTXQTOP`, bits 24..=31, read-only.
    pub const PTXQTOP: &FieldSpec = &super::REGISTERS[3].fields[2];
}

/// The fields of `OTG_HS_HAINT`.
pub mod otg_hs_haint {
    use super::FieldSpec;
    /// `HAINT`, bits 0..=15.
    pub const HAINT: &FieldSpec = &super::REGISTERS[4].fields[0];
}

/// The fields of `OTG_HS_HAINTMSK`.
pub mod otg_hs_haintmsk {
    use super::FieldSpec;
    /// `HAINTM`, bits 0..=15.
    pub const HAINTM: &FieldSpec = &super::REGISTERS[5].fields[0];
}

/// The fields of `OTG_HS_HPRT`.
pub mod otg_hs_hprt {
    use super::FieldSpec;
    /// `PCSTS`, bit 0, read-only.
    pub const PCSTS: &FieldSpec = &super::REGISTERS[6].fields[0];
    /// `PCDET`, bit 1.
    pub const PCDET: &FieldSpec = &super::REGISTERS[6].fields[1];
    /// `PENA`, bit 2.
    pub const PENA: &FieldSpec = &super::REGISTERS[6].fields[2];
    /// `PENCHNG`, bit 3.
    pub const PENCHNG: &FieldSpec = &super::REGISTERS[6].fields[3];
    /// `POCA`, bit 4, read-only.
    pub const POCA: &FieldSpec = &super::REGISTERS[6].fields[4];
    /// `POCCHNG`, bit 5.
    pub const POCCHNG: &FieldSpec = &super::REGISTERS[6].fields[5];
    /// `PRES`, bit 6.
    pub const PRES: &FieldSpec = &super::REGISTERS[6].fields[6];
    /// `PSUSP`, bit 7.
    pub const PSUSP: &FieldSpec = &super::REGISTERS[6].fields[7];
    /// `PRST`, bit 8.
    pub const PRST: &FieldSpec = &super::REGISTERS[6].fields[8];
    /// `PLSTS`, bits 10..=11, read-only.
    pub const PLSTS: &FieldSpec = &super::REGISTERS[6].fields[9];
    /// `PPWR`, bit 12.
    pub const PPWR: &FieldSpec = &super::REGISTERS[6].fields[10];
    /// `PTCTL`, bits 13..=16.
    pub const PTCTL: &FieldSpec = &super::REGISTERS[6].fields[11];
    /// `PSPD`, bits 17..=18, read-only.
    pub const PSPD: &FieldSpec = &super::REGISTERS[6].fields[12];
}

/// The fields of `OTG_HS_HCCHAR0`.
pub mod otg_hs_hcchar0 {
    use super::FieldSpec;
    /// `MPSIZ`, bits 0..=10.
    pub const MPSIZ: &FieldSpec = &super::REGISTERS[7].fields[0];
    /// `EPNUM`, bits 11..=14.
    pub const EPNUM: &FieldSpec = &super::REGISTERS[7].fields[1];
    /// `EPDIR`, bit 15.
    pub const EPDIR: &FieldSpec = &super::REGISTERS[7].fields[2];
    /// `LSDEV`, bit 17.
    pub const LSDEV: &FieldSpec = &super::REGISTERS[7].fields[3];
    /// `EPTYP`, bits 18..=19.
    pub const EPTYP: &FieldSpec = &super::REGISTERS[7].fields[4];
    /// `MCNT`, bits 20..=21.
    pub const MCNT: &FieldSpec = &super::REGISTERS[7].fields[5];
    /// `DAD`, bits 22..=28.
    pub const DAD: &FieldSpec = &super::REGISTERS[7].fields[6];
    /// `ODDFRM`, bit 29.
    pub const ODDFRM: &FieldSpec = &super::REGISTERS[7].fields[7];
    /// `CHDIS`, bit 30.
    pub const CHDIS: &FieldSpec = &super::REGISTERS[7].fields[8];
    /// `CHENA`, bit 31.
    pub const CHENA: &FieldSpec = &super::REGISTERS[7].fields[9];
}

/// The fields of `OTG_HS_HCSPLT0`.
pub mod otg_hs_hcsplt0 {
    use super::FieldSpec;
    /// `PRTADDR`, bits 0..=6.
    pub const PRTADDR: &FieldSpec = &super::REGISTERS[8].fields[0];
    /// `HUBADDR`, bits 7..=13.
    pub const HUBADDR: &FieldSpec = &super::REGISTERS[8].fields[1];
    /// `XACTPOS`, bits 14..=15.
    pub const XACTPOS: &FieldSpec = &super::REGISTERS[8].fields[2];
    /// `COMPLSPLT`, bit 16.
    pub const COMPLSPLT: &FieldSpec = &super::REGISTERS[8].fields[3];
    /// `SPLITEN`, bit 31.
    pub const SPLITEN: &FieldSpec = &super::REGISTERS[8].fields[4];
}

/// The fields of `OTG_HS_HCINT0`.
pub mod otg_hs_hcint0 {
    use super::FieldSpec;
    /// `XFRC`, bit 0.
    pub const XFRC: &FieldSpec = &super::REGISTERS[9].fields[0];
    /// `CHH`, bit 1.
    pub const CHH: &FieldSpec = &super::REGISTERS[9].fields[1];
    /// `STALL`, bit 3.
    pub const STALL: &FieldSpec = &super::REGISTERS[9].fields[2];
    /// `NAK`, bit 4.
    pub const NAK: &FieldSpec = &super::REGISTERS[9].fields[3];
    /// `ACK`, bit 5.
    pub const ACK: &FieldSpec = &super::REGISTERS[9].fields[4];
    /// `TXERR`, bit 7.
    pub const TXERR: &FieldSpec = &super::REGISTERS[9].fields[5];
    /// `BBERR`, bit 8.
    pub const BBERR: &FieldSpec = &super::REGISTERS[9].fields[6];
    /// `FRMOR`, bit 9.
    pub const FRMOR: &FieldSpec = &super::REGISTERS[9].fields[7];
    /// `DTERR`, bit 10.
    pub const DTERR: &FieldSpec = &super::REGISTERS[9].fields[8];
}

/// The fields of `OTG_HS_HCINTMSK0`.
pub mod otg_hs_hcintmsk0 {
    use super::FieldSpec;
    /// `XFRCM`, bit 0.
    pub const XFRCM: &FieldSpec = &super::REGISTERS[10].fields[0];
    /// `CHHM`, bit 1.
    pub const CHHM: &FieldSpec = &super::REGISTERS[10].fields[1];
    /// `AHBERRM`, bit 2.
    pub const AHBERRM: &FieldSpec = &super::REGISTERS[10].fields[2];
    /// `STALLM`, bit 3.
    pub const STALLM: &FieldSpec = &super::REGISTERS[10].fields[3];
    /// `NAKM`, bit 4.
    pub const NAKM: &FieldSpec = &super::REGISTERS[10].fields[4];
    /// `ACKM`, bit 5.
    pub const ACKM: &FieldSpec = &super::REGISTERS[10].fields[5];
    /// `NYET`, bit 6.
    pub const NYET: &FieldSpec = &super::REGISTERS[10].fields[6];
    /// `TXERRM`, bit 7.
    pub const TXERRM: &FieldSpec = &super::REGISTERS[10].fields[7];
    /// `BBERRM`, bit 8.
    pub const BBERRM: &FieldSpec = &super::REGISTERS[10].fields[8];
    /// `FRMORM`, bit 9.
    pub const FRMORM: &FieldSpec = &super::REGISTERS[10].fields[9];
    /// `DTERRM`, bit 10.
    pub const DTERRM: &FieldSpec = &super::REGISTERS[10].fields[10];
}

/// The fields of `OTG_HS_HCTSIZ0`.
pub mod otg_hs_hctsiz0 {
    use super::FieldSpec;
    /// `XFRSIZ`, bits 0..=18.
    pub const XFRSIZ: &FieldSpec = &super::REGISTERS[11].fields[0];
    /// `PKTCNT`, bits 19..=28.
    pub const PKTCNT: &FieldSpec = &super::REGISTERS[11].fields[1];
    /// `DPID`, bits 29..=30.
    pub const DPID: &FieldSpec = &super::REGISTERS[11].fields[2];
}

/// The fields of `OTG_HS_HCDMA0`.
pub mod otg_hs_hcdma0 {
    use super::FieldSpec;
    /// `DMAADDR`, bits 0..=31.
    pub const DMAADDR: &FieldSpec = &super::REGISTERS[12].fields[0];
}

/// The fields of `OTG_HS_HCCHAR1`.
pub mod otg_hs_hcchar1 {
    use super::FieldSpec;
    /// `MPSIZ`, bits 0..=10.
    pub const MPSIZ: &FieldSpec = &super::REGISTERS[13].fields[0];
    /// `EPNUM`, bits 11..=14.
    pub const EPNUM: &FieldSpec = &super::REGISTERS[13].fields[1];
    /// `EPDIR`, bit 15.
    pub const EPDIR: &FieldSpec = &super::REGISTERS[13].fields[2];
    /// `LSDEV`, bit 17.
    pub const LSDEV: &FieldSpec = &super::REGISTERS[13].fields[3];
    /// `EPTYP`, bits 18..=19.
    pub const EPTYP: &FieldSpec = &super::REGISTERS[13].fields[4];
    /// `MCNT`, bits 20..=21.
    pub const MCNT: &FieldSpec = &super::REGISTERS[13].fields[5];
    /// `DAD`, bits 22..=28.
    pub const DAD: &FieldSpec = &super::REGISTERS[13].fields[6];
    /// `ODDFRM`, bit 29.
    pub const ODDFRM: &FieldSpec = &super::REGISTERS[13].fields[7];
    /// `CHDIS`, bit 30.
    pub const CHDIS: &FieldSpec = &super::REGISTERS[13].fields[8];
    /// `CHENA`, bit 31.
    pub const CHENA: &FieldSpec = &super::REGISTERS[13].fields[9];
}

/// The fields of `OTG_HS_HCSPLT1`.
pub mod otg_hs_hcsplt1 {
    use super::FieldSpec;
    /// `PRTADDR`, bits 0..=6.
    pub const PRTADDR: &FieldSpec = &super::REGISTERS[14].fields[0];
    /// `HUBADDR`, bits 7..=13.
    pub const HUBADDR: &FieldSpec = &super::REGISTERS[14].fields[1];
    /// `XACTPOS`, bits 14..=15.
    pub const XACTPOS: &FieldSpec = &super::REGISTERS[14].fields[2];
    /// `COMPLSPLT`, bit 16.
    pub const COMPLSPLT: &FieldSpec = &super::REGISTERS[14].fields[3];
    /// `SPLITEN`, bit 31.
    pub const SPLITEN: &FieldSpec = &super::REGISTERS[14].fields[4];
}

/// The fields of `OTG_HS_HCINT1`.
pub mod otg_hs_hcint1 {
    use super::FieldSpec;
    /// `XFRC`, bit 0.
    pub const XFRC: &FieldSpec = &super::REGISTERS[15].fields[0];
    /// `CHH`, bit 1.
    pub const CHH: &FieldSpec = &super::REGISTERS[15].fields[1];
    /// `AHBERR`, bit 2.
    pub const AHBERR: &FieldSpec = &super::REGISTERS[15].fields[2];
    /// `STALL`, bit 3.
    pub const STALL: &FieldSpec = &super::REGISTERS[15].fields[3];
    /// `NAK`, bit 4.
    pub const NAK: &FieldSpec = &super::REGISTERS[15].fields[4];
    /// `ACK`, bit 5.
    pub const ACK: &FieldSpec = &super::REGISTERS[15].fields[5];
    /// `NYET`, bit 6.
    pub const NYET: &FieldSpec = &super::REGISTERS[15].fields[6];
    /// `TXERR`, bit 7.
    pub const TXERR: &FieldSpec = &super::REGISTERS[15].fields[7];
    /// `BBERR`, bit 8.
    pub const BBERR: &FieldSpec = &super::REGISTERS[15].fields[8];
    /// `FRMOR`, bit 9.
    pub const FRMOR: &FieldSpec = &super::REGISTERS[15].fields[9];
    /// `DTERR`, bit 10.
    pub const DTERR: &FieldSpec = &super::REGISTERS[15].fields[10];
}

/// The fields of `OTG_HS_HCINTMSK1`.
pub mod otg_hs_hcintmsk1 {
    use super::FieldSpec;
    /// `XFRCM`, bit 0.
    pub const XFRCM: &FieldSpec = &super::REGISTERS[16].fields[0];
    /// `CHHM`, bit 1.
    pub const CHHM: &FieldSpec = &super::REGISTERS[16].fields[1];
    /// `AHBERRM`, bit 2.
    pub const AHBERRM: &FieldSpec = &super::REGISTERS[16].fields[2];
    /// `STALLM`, bit 3.
    pub const STALLM: &FieldSpec = &super::REGISTERS[16].fields[3];
    /// `NAKM`, bit 4.
    pub const NAKM: &FieldSpec = &super::REGISTERS[16].fields[4];
    /// `ACKM`, bit 5.
    pub const ACKM: &FieldSpec = &super::REGISTERS[16].fields[5];
    /// `NYET`, bit 6.
    pub const NYET: &FieldSpec = &super::REGISTERS[16].fields[6];
    /// `TXERRM`, bit 7.
    pub const TXERRM: &FieldSpec = &super::REGISTERS[16].fields[7];
    /// `BBERRM`, bit 8.
    pub const BBERRM: &FieldSpec = &super::REGISTERS[16].fields[8];
    /// `FRMORM`, bit 9.
    pub const FRMORM: &FieldSpec = &super::REGISTERS[16].fields[9];
    /// `DTERRM`, bit 10.
    pub const DTERRM: &FieldSpec = &super::REGISTERS[16].fields[10];
}

/// The fields of `OTG_HS_HCTSIZ1`.
pub mod otg_hs_hctsiz1 {
    use super::FieldSpec;
    /// `XFRSIZ`, bits 0..=18.
    pub const XFRSIZ: &FieldSpec = &super::REGISTERS[17].fields[0];
    /// `PKTCNT`, bits 19..=28.
    pub const PKTCNT: &FieldSpec = &super::REGISTERS[17].fields[1];
    /// `DPID`, bits 29..=30.
    pub const DPID: &FieldSpec = &super::REGISTERS[17].fields[2];
}

/// The fields of `OTG_HS_HCDMA1`.
pub mod otg_hs_hcdma1 {
    use super::FieldSpec;
    /// `DMAADDR`, bits 0..=31.
    pub const DMAADDR: &FieldSpec = &super::REGISTERS[18].fields[0];
}

/// The fields of `OTG_HS_HCCHAR2`.
pub mod otg_hs_hcchar2 {
    use super::FieldSpec;
    /// `MPSIZ`, bits 0..=10.
    pub const MPSIZ: &FieldSpec = &super::REGISTERS[19].fields[0];
    /// `EPNUM`, bits 11..=14.
    pub const EPNUM: &FieldSpec = &super::REGISTERS[19].fields[1];
    /// `EPDIR`, bit 15.
    pub const EPDIR: &FieldSpec = &super::REGISTERS[19].fields[2];
    /// `LSDEV`, bit 17.
    pub const LSDEV: &FieldSpec = &super::REGISTERS[19].fields[3];
    /// `EPTYP`, bits 18..=19.
    pub const EPTYP: &FieldSpec = &super::REGISTERS[19].fields[4];
    /// `MCNT`, bits 20..=21.
    pub const MCNT: &FieldSpec = &super::REGISTERS[19].fields[5];
    /// `DAD`, bits 22..=28.
    pub const DAD: &FieldSpec = &super::REGISTERS[19].fields[6];
    /// `ODDFRM`, bit 29.
    pub const ODDFRM: &FieldSpec = &super::REGISTERS[19].fields[7];
    /// `CHDIS`, bit 30.
    pub const CHDIS: &FieldSpec = &super::REGISTERS[19].fields[8];
    /// `CHENA`, bit 31.
    pub const CHENA: &FieldSpec = &super::REGISTERS[19].fields[9];
}

/// The fields of `OTG_HS_HCSPLT2`.
pub mod otg_hs_hcsplt2 {
    use super::FieldSpec;
    /// `PRTADDR`, bits 0..=6.
    pub const PRTADDR: &FieldSpec = &super::REGISTERS[20].fields[0];
    /// `HUBADDR`, bits 7..=13.
    pub const HUBADDR: &FieldSpec = &super::REGISTERS[20].fields[1];
    /// `XACTPOS`, bits 14..=15.
    pub const XACTPOS: &FieldSpec = &super::REGISTERS[20].fields[2];
    /// `COMPLSPLT`, bit 16.
    pub const COMPLSPLT: &FieldSpec = &super::REGISTERS[20].fields[3];
    /// `SPLITEN`, bit 31.
    pub const SPLITEN: &FieldSpec = &super::REGISTERS[20].fields[4];
}

/// The fields of `OTG_HS_HCINT2`.
pub mod otg_hs_hcint2 {
    use super::FieldSpec;
    /// `XFRC`, bit 0.
    pub const XFRC: &FieldSpec = &super::REGISTERS[21].fields[0];
    /// `CHH`, bit 1.
    pub const CHH: &FieldSpec = &super::REGISTERS[21].fields[1];
    /// `AHBERR`, bit 2.
    pub const AHBERR: &FieldSpec = &super::REGISTERS[21].fields[2];
    /// `STALL`, bit 3.
    pub const STALL: &FieldSpec = &super::REGISTERS[21].fields[3];
    /// `NAK`, bit 4.
    pub const NAK: &FieldSpec = &super::REGISTERS[21].fields[4];
    /// `ACK`, bit 5.
    pub const ACK: &FieldSpec = &super::REGISTERS[21].fields[5];
    /// `NYET`, bit 6.
    pub const NYET: &FieldSpec = &super::REGISTERS[21].fields[6];
    /// `TXERR`, bit 7.
    pub const TXERR: &FieldSpec = &super::REGISTERS[21].fields[7];
    /// `BBERR`, bit 8.
    pub const BBERR: &FieldSpec = &super::REGISTERS[21].fields[8];
    /// `FRMOR`, bit 9.
    pub const FRMOR: &FieldSpec = &super::REGISTERS[21].fields[9];
    /// `DTERR`, bit 10.
    pub const DTERR: &FieldSpec = &super::REGISTERS[21].fields[10];
}

/// The fields of `OTG_HS_HCINTMSK2`.
pub mod otg_hs_hcintmsk2 {
    use super::FieldSpec;
    /// `XFRCM`, bit 0.
    pub const XFRCM: &FieldSpec = &super::REGISTERS[22].fields[0];
    /// `CHHM`, bit 1.
    pub const CHHM: &FieldSpec = &super::REGISTERS[22].fields[1];
    /// `AHBERRM`, bit 2.
    pub const AHBERRM: &FieldSpec = &super::REGISTERS[22].fields[2];
    /// `STALLM`, bit 3.
    pub const STALLM: &FieldSpec = &super::REGISTERS[22].fields[3];
    /// `NAKM`, bit 4.
    pub const NAKM: &FieldSpec = &super::REGISTERS[22].fields[4];
    /// `ACKM`, bit 5.
    pub const ACKM: &FieldSpec = &super::REGISTERS[22].fields[5];
    /// `NYET`, bit 6.
    pub const NYET: &FieldSpec = &super::REGISTERS[22].fields[6];
    /// `TXERRM`, bit 7.
    pub const TXERRM: &FieldSpec = &super::REGISTERS[22].fields[7];
    /// `BBERRM`, bit 8.
    pub const BBERRM: &FieldSpec = &super::REGISTERS[22].fields[8];
    /// `FRMORM`, bit 9.
    pub const FRMORM: &FieldSpec = &super::REGISTERS[22].fields[9];
    /// `DTERRM`, bit 10.
    pub const DTERRM: &FieldSpec = &super::REGISTERS[22].fields[10];
}

/// The fields of `OTG_HS_HCTSIZ2`.
pub mod otg_hs_hctsiz2 {
    use super::FieldSpec;
    /// `XFRSIZ`, bits 0..=18.
    pub const XFRSIZ: &FieldSpec = &super::REGISTERS[23].fields[0];
    /// `PKTCNT`, bits 19..=28.
    pub const PKTCNT: &FieldSpec = &super::REGISTERS[23].fields[1];
    /// `DPID`, bits 29..=30.
    pub const DPID: &FieldSpec = &super::REGISTERS[23].fields[2];
}

/// The fields of `OTG_HS_HCDMA2`.
pub mod otg_hs_hcdma2 {
    use super::FieldSpec;
    /// `DMAADDR`, bits 0..=31.
    pub const DMAADDR: &FieldSpec = &super::REGISTERS[24].fields[0];
}

/// The fields of `OTG_HS_HCCHAR3`.
pub mod otg_hs_hcchar3 {
    use super::FieldSpec;
    /// `MPSIZ`, bits 0..=10.
    pub const MPSIZ: &FieldSpec = &super::REGISTERS[25].fields[0];
    /// `EPNUM`, bits 11..=14.
    pub const EPNUM: &FieldSpec = &super::REGISTERS[25].fields[1];
    /// `EPDIR`, bit 15.
    pub const EPDIR: &FieldSpec = &super::REGISTERS[25].fields[2];
    /// `LSDEV`, bit 17.
    pub const LSDEV: &FieldSpec = &super::REGISTERS[25].fields[3];
    /// `EPTYP`, bits 18..=19.
    pub const EPTYP: &FieldSpec = &super::REGISTERS[25].fields[4];
    /// `MCNT`, bits 20..=21.
    pub const MCNT: &FieldSpec = &super::REGISTERS[25].fields[5];
    /// `DAD`, bits 22..=28.
    pub const DAD: &FieldSpec = &super::REGISTERS[25].fields[6];
    /// `ODDFRM`, bit 29.
    pub const ODDFRM: &FieldSpec = &super::REGISTERS[25].fields[7];
    /// `CHDIS`, bit 30.
    pub const CHDIS: &FieldSpec = &super::REGISTERS[25].fields[8];
    /// `CHENA`, bit 31.
    pub const CHENA: &FieldSpec = &super::REGISTERS[25].fields[9];
}

/// The fields of `OTG_HS_HCSPLT3`.
pub mod otg_hs_hcsplt3 {
    use super::FieldSpec;
    /// `PRTADDR`, bits 0..=6.
    pub const PRTADDR: &FieldSpec = &super::REGISTERS[26].fields[0];
    /// `HUBADDR`, bits 7..=13.
    pub const HUBADDR: &FieldSpec = &super::REGISTERS[26].fields[1];
    /// `XACTPOS`, bits 14..=15.
    pub const XACTPOS: &FieldSpec = &super::REGISTERS[26].fields[2];
    /// `COMPLSPLT`, bit 16.
    pub const COMPLSPLT: &FieldSpec = &super::REGISTERS[26].fields[3];
    /// `SPLITEN`, bit 31.
    pub const SPLITEN: &FieldSpec = &super::REGISTERS[26].fields[4];
}

/// The fields of `OTG_HS_HCINT3`.
pub mod otg_hs_hcint3 {
    use super::FieldSpec;
    /// `XFRC`, bit 0.
    pub const XFRC: &FieldSpec = &super::REGISTERS[27].fields[0];
    /// `CHH`, bit 1.
    pub const CHH: &FieldSpec = &super::REGISTERS[27].fields[1];
    /// `AHBERR`, bit 2.
    pub const AHBERR: &FieldSpec = &super::REGISTERS[27].fields[2];
    /// `STALL`, bit 3.
    pub const STALL: &FieldSpec = &super::REGISTERS[27].fields[3];
    /// `NAK`, bit 4.
    pub const NAK: &FieldSpec = &super::REGISTERS[27].fields[4];
    /// `ACK`, bit 5.
    pub const ACK: &FieldSpec = &super::REGISTERS[27].fields[5];
    /// `NYET`, bit 6.
    pub const NYET: &FieldSpec = &super::REGISTERS[27].fields[6];
    /// `TXERR`, bit 7.
    pub const TXERR: &FieldSpec = &super::REGISTERS[27].fields[7];
    /// `BBERR`, bit 8.
    pub const BBERR: &FieldSpec = &super::REGISTERS[27].fields[8];
    /// `FRMOR`, bit 9.
    pub const FRMOR: &FieldSpec = &super::REGISTERS[27].fields[9];
    /// `DTERR`, bit 10.
    pub const DTERR: &FieldSpec = &super::REGISTERS[27].fields[10];
}

/// The fields of `OTG_HS_HCINTMSK3`.
pub mod otg_hs_hcintmsk3 {
    use super::FieldSpec;
    /// `XFRCM`, bit 0.
    pub const XFRCM: &FieldSpec = &super::REGISTERS[28].fields[0];
    /// `CHHM`, bit 1.
    pub const CHHM: &FieldSpec = &super::REGISTERS[28].fields[1];
    /// `AHBERRM`, bit 2.
    pub const AHBERRM: &FieldSpec = &super::REGISTERS[28].fields[2];
    /// `STALLM`, bit 3.
    pub const STALLM: &FieldSpec = &super::REGISTERS[28].fields[3];
    /// `NAKM`, bit 4.
    pub const NAKM: &FieldSpec = &super::REGISTERS[28].fields[4];
    /// `ACKM`, bit 5.
    pub const ACKM: &FieldSpec = &super::REGISTERS[28].fields[5];
    /// `NYET`, bit 6.
    pub const NYET: &FieldSpec = &super::REGISTERS[28].fields[6];
    /// `TXERRM`, bit 7.
    pub const TXERRM: &FieldSpec = &super::REGISTERS[28].fields[7];
    /// `BBERRM`, bit 8.
    pub const BBERRM: &FieldSpec = &super::REGISTERS[28].fields[8];
    /// `FRMORM`, bit 9.
    pub const FRMORM: &FieldSpec = &super::REGISTERS[28].fields[9];
    /// `DTERRM`, bit 10.
    pub const DTERRM: &FieldSpec = &super::REGISTERS[28].fields[10];
}

/// The fields of `OTG_HS_HCTSIZ3`.
pub mod otg_hs_hctsiz3 {
    use super::FieldSpec;
    /// `XFRSIZ`, bits 0..=18.
    pub const XFRSIZ: &FieldSpec = &super::REGISTERS[29].fields[0];
    /// `PKTCNT`, bits 19..=28.
    pub const PKTCNT: &FieldSpec = &super::REGISTERS[29].fields[1];
    /// `DPID`, bits 29..=30.
    pub const DPID: &FieldSpec = &super::REGISTERS[29].fields[2];
}

/// The fields of `OTG_HS_HCDMA3`.
pub mod otg_hs_hcdma3 {
    use super::FieldSpec;
    /// `DMAADDR`, bits 0..=31.
    pub const DMAADDR: &FieldSpec = &super::REGISTERS[30].fields[0];
}

/// The fields of `OTG_HS_HCCHAR4`.
pub mod otg_hs_hcchar4 {
    use super::FieldSpec;
    /// `MPSIZ`, bits 0..=10.
    pub const MPSIZ: &FieldSpec = &super::REGISTERS[31].fields[0];
    /// `EPNUM`, bits 11..=14.
    pub const EPNUM: &FieldSpec = &super::REGISTERS[31].fields[1];
    /// `EPDIR`, bit 15.
    pub const EPDIR: &FieldSpec = &super::REGISTERS[31].fields[2];
    /// `LSDEV`, bit 17.
    pub const LSDEV: &FieldSpec = &super::REGISTERS[31].fields[3];
    /// `EPTYP`, bits 18..=19.
    pub const EPTYP: &FieldSpec = &super::REGISTERS[31].fields[4];
    /// `MCNT`, bits 20..=21.
    pub const MCNT: &FieldSpec = &super::REGISTERS[31].fields[5];
    /// `DAD`, bits 22..=28.
    pub const DAD: &FieldSpec = &super::REGISTERS[31].fields[6];
    /// `ODDFRM`, bit 29.
    pub const ODDFRM: &FieldSpec = &super::REGISTERS[31].fields[7];
    /// `CHDIS`, bit 30.
    pub const CHDIS: &FieldSpec = &super::REGISTERS[31].fields[8];
    /// `CHENA`, bit 31.
    pub const CHENA: &FieldSpec = &super::REGISTERS[31].fields[9];
}

/// The fields of `OTG_HS_HCSPLT4`.
pub mod otg_hs_hcsplt4 {
    use super::FieldSpec;
    /// `PRTADDR`, bits 0..=6.
    pub const PRTADDR: &FieldSpec = &super::REGISTERS[32].fields[0];
    /// `HUBADDR`, bits 7..=13.
    pub const HUBADDR: &FieldSpec = &super::REGISTERS[32].fields[1];
    /// `XACTPOS`, bits 14..=15.
    pub const XACTPOS: &FieldSpec = &super::REGISTERS[32].fields[2];
    /// `COMPLSPLT`, bit 16.
    pub const COMPLSPLT: &FieldSpec = &super::REGISTERS[32].fields[3];
    /// `SPLITEN`, bit 31.
    pub const SPLITEN: &FieldSpec = &super::REGISTERS[32].fields[4];
}

/// The fields of `OTG_HS_HCINT4`.
pub mod otg_hs_hcint4 {
    use super::FieldSpec;
    /// `XFRC`, bit 0.
    pub const XFRC: &FieldSpec = &super::REGISTERS[33].fields[0];
    /// `CHH`, bit 1.
    pub const CHH: &FieldSpec = &super::REGISTERS[33].fields[1];
    /// `AHBERR`, bit 2.
    pub const AHBERR: &FieldSpec = &super::REGISTERS[33].fields[2];
    /// `STALL`, bit 3.
    pub const STALL: &FieldSpec = &super::REGISTERS[33].fields[3];
    /// `NAK`, bit 4.
    pub const NAK: &FieldSpec = &super::REGISTERS[33].fields[4];
    /// `ACK`, bit 5.
    pub const ACK: &FieldSpec = &super::REGISTERS[33].fields[5];
    /// `NYET`, bit 6.
    pub const NYET: &FieldSpec = &super::REGISTERS[33].fields[6];
    /// `TXERR`, bit 7.
    pub const TXERR: &FieldSpec = &super::REGISTERS[33].fields[7];
    /// `BBERR`, bit 8.
    pub const BBERR: &FieldSpec = &super::REGISTERS[33].fields[8];
    /// `FRMOR`, bit 9.
    pub const FRMOR: &FieldSpec = &super::REGISTERS[33].fields[9];
    /// `DTERR`, bit 10.
    pub const DTERR: &FieldSpec = &super::REGISTERS[33].fields[10];
}

/// The fields of `OTG_HS_HCINTMSK4`.
pub mod otg_hs_hcintmsk4 {
    use super::FieldSpec;
    /// `XFRCM`, bit 0.
    pub const XFRCM: &FieldSpec = &super::REGISTERS[34].fields[0];
    /// `CHHM`, bit 1.
    pub const CHHM: &FieldSpec = &super::REGISTERS[34].fields[1];
    /// `AHBERRM`, bit 2.
    pub const AHBERRM: &FieldSpec = &super::REGISTERS[34].fields[2];
    /// `STALLM`, bit 3.
    pub const STALLM: &FieldSpec = &super::REGISTERS[34].fields[3];
    /// `NAKM`, bit 4.
    pub const NAKM: &FieldSpec = &super::REGISTERS[34].fields[4];
    /// `ACKM`, bit 5.
    pub const ACKM: &FieldSpec = &super::REGISTERS[34].fields[5];
    /// `NYET`, bit 6.
    pub const NYET: &FieldSpec = &super::REGISTERS[34].fields[6];
    /// `TXERRM`, bit 7.
    pub const TXERRM: &FieldSpec = &super::REGISTERS[34].fields[7];
    /// `BBERRM`, bit 8.
    pub const BBERRM: &FieldSpec = &super::REGISTERS[34].fields[8];
    /// `FRMORM`, bit 9.
    pub const FRMORM: &FieldSpec = &super::REGISTERS[34].fields[9];
    /// `DTERRM`, bit 10.
    pub const DTERRM: &FieldSpec = &super::REGISTERS[34].fields[10];
}

/// The fields of `OTG_HS_HCTSIZ4`.
pub mod otg_hs_hctsiz4 {
    use super::FieldSpec;
    /// `XFRSIZ`, bits 0..=18.
    pub const XFRSIZ: &FieldSpec = &super::REGISTERS[35].fields[0];
    /// `PKTCNT`, bits 19..=28.
    pub const PKTCNT: &FieldSpec = &super::REGISTERS[35].fields[1];
    /// `DPID`, bits 29..=30.
    pub const DPID: &FieldSpec = &super::REGISTERS[35].fields[2];
}

/// The fields of `OTG_HS_HCDMA4`.
pub mod otg_hs_hcdma4 {
    use super::FieldSpec;
    /// `DMAADDR`, bits 0..=31.
    pub const DMAADDR: &FieldSpec = &super::REGISTERS[36].fields[0];
}

/// The fields of `OTG_HS_HCCHAR5`.
pub mod otg_hs_hcchar5 {
    use super::FieldSpec;
    /// `MPSIZ`, bits 0..=10.
    pub const MPSIZ: &FieldSpec = &super::REGISTERS[37].fields[0];
    /// `EPNUM`, bits 11..=14.
    pub const EPNUM: &FieldSpec = &super::REGISTERS[37].fields[1];
    /// `EPDIR`, bit 15.
    pub const EPDIR: &FieldSpec = &super::REGISTERS[37].fields[2];
    /// `LSDEV`, bit 17.
    pub const LSDEV: &FieldSpec = &super::REGISTERS[37].fields[3];
    /// `EPTYP`, bits 18..=19.
    pub const EPTYP: &FieldSpec = &super::REGISTERS[37].fields[4];
    /// `MCNT`, bits 20..=21.
    pub const MCNT: &FieldSpec = &super::REGISTERS[37].fields[5];
    /// `DAD`, bits 22..=28.
    pub const DAD: &FieldSpec = &super::REGISTERS[37].fields[6];
    /// `ODDFRM`, bit 29.
    pub const ODDFRM: &FieldSpec = &super::REGISTERS[37].fields[7];
    /// `CHDIS`, bit 30.
    pub const CHDIS: &FieldSpec = &super::REGISTERS[37].fields[8];
    /// `CHENA`, bit 31.
    pub const CHENA: &FieldSpec = &super::REGISTERS[37].fields[9];
}

/// The fields of `OTG_HS_HCSPLT5`.
pub mod otg_hs_hcsplt5 {
    use super::FieldSpec;
    /// `PRTADDR`, bits 0..=6.
    pub const PRTADDR: &FieldSpec = &super::REGISTERS[38].fields[0];
    /// `HUBADDR`, bits 7..=13.
    pub const HUBADDR: &FieldSpec = &super::REGISTERS[38].fields[1];
    /// `XACTPOS`, bits 14..=15.
    pub const XACTPOS: &FieldSpec = &super::REGISTERS[38].fields[2];
    /// `COMPLSPLT`, bit 16.
    pub const COMPLSPLT: &FieldSpec = &super::REGISTERS[38].fields[3];
    /// `SPLITEN`, bit 31.
    pub const SPLITEN: &FieldSpec = &super::REGISTERS[38].fields[4];
}

/// The fields of `OTG_HS_HCINT5`.
pub mod otg_hs_hcint5 {
    use super::FieldSpec;
    /// `XFRC`, bit 0.
    pub const XFRC: &FieldSpec = &super::REGISTERS[39].fields[0];
    /// `CHH`, bit 1.
    pub const CHH: &FieldSpec = &super::REGISTERS[39].fields[1];
    /// `AHBERR`, bit 2.
    pub const AHBERR: &FieldSpec = &super::REGISTERS[39].fields[2];
    /// `STALL`, bit 3.
    pub const STALL: &FieldSpec = &super::REGISTERS[39].fields[3];
    /// `NAK`, bit 4.
    pub const NAK: &FieldSpec = &super::REGISTERS[39].fields[4];
    /// `ACK`, bit 5.
    pub const ACK: &FieldSpec = &super::REGISTERS[39].fields[5];
    /// `NYET`, bit 6.
    pub const NYET: &FieldSpec = &super::REGISTERS[39].fields[6];
    /// `TXERR`, bit 7.
    pub const TXERR: &FieldSpec = &super::REGISTERS[39].fields[7];
    /// `BBERR`, bit 8.
    pub const BBERR: &FieldSpec = &super::REGISTERS[39].fields[8];
    /// `FRMOR`, bit 9.
    pub const FRMOR: &FieldSpec = &super::REGISTERS[39].fields[9];
    /// `DTERR`, bit 10.
    pub const DTERR: &FieldSpec = &super::REGISTERS[39].fields[10];
}

/// The fields of `OTG_HS_HCINTMSK5`.
pub mod otg_hs_hcintmsk5 {
    use super::FieldSpec;
    /// `XFRCM`, bit 0.
    pub const XFRCM: &FieldSpec = &super::REGISTERS[40].fields[0];
    /// `CHHM`, bit 1.
    pub const CHHM: &FieldSpec = &super::REGISTERS[40].fields[1];
    /// `AHBERRM`, bit 2.
    pub const AHBERRM: &FieldSpec = &super::REGISTERS[40].fields[2];
    /// `STALLM`, bit 3.
    pub const STALLM: &FieldSpec = &super::REGISTERS[40].fields[3];
    /// `NAKM`, bit 4.
    pub const NAKM: &FieldSpec = &super::REGISTERS[40].fields[4];
    /// `ACKM`, bit 5.
    pub const ACKM: &FieldSpec = &super::REGISTERS[40].fields[5];
    /// `NYET`, bit 6.
    pub const NYET: &FieldSpec = &super::REGISTERS[40].fields[6];
    /// `TXERRM`, bit 7.
    pub const TXERRM: &FieldSpec = &super::REGISTERS[40].fields[7];
    /// `BBERRM`, bit 8.
    pub const BBERRM: &FieldSpec = &super::REGISTERS[40].fields[8];
    /// `FRMORM`, bit 9.
    pub const FRMORM: &FieldSpec = &super::REGISTERS[40].fields[9];
    /// `DTERRM`, bit 10.
    pub const DTERRM: &FieldSpec = &super::REGISTERS[40].fields[10];
}

/// The fields of `OTG_HS_HCTSIZ5`.
pub mod otg_hs_hctsiz5 {
    use super::FieldSpec;
    /// `XFRSIZ`, bits 0..=18.
    pub const XFRSIZ: &FieldSpec = &super::REGISTERS[41].fields[0];
    /// `PKTCNT`, bits 19..=28.
    pub const PKTCNT: &FieldSpec = &super::REGISTERS[41].fields[1];
    /// `DPID`, bits 29..=30.
    pub const DPID: &FieldSpec = &super::REGISTERS[41].fields[2];
}

/// The fields of `OTG_HS_HCDMA5`.
pub mod otg_hs_hcdma5 {
    use super::FieldSpec;
    /// `DMAADDR`, bits 0..=31.
    pub const DMAADDR: &FieldSpec = &super::REGISTERS[42].fields[0];
}

/// The fields of `OTG_HS_HCCHAR6`.
pub mod otg_hs_hcchar6 {
    use super::FieldSpec;
    /// `MPSIZ`, bits 0..=10.
    pub const MPSIZ: &FieldSpec = &super::REGISTERS[43].fields[0];
    /// `EPNUM`, bits 11..=14.
    pub const EPNUM: &FieldSpec = &super::REGISTERS[43].fields[1];
    /// `EPDIR`, bit 15.
    pub const EPDIR: &FieldSpec = &super::REGISTERS[43].fields[2];
    /// `LSDEV`, bit 17.
    pub const LSDEV: &FieldSpec = &super::REGISTERS[43].fields[3];
    /// `EPTYP`, bits 18..=19.
    pub const EPTYP: &FieldSpec = &super::REGISTERS[43].fields[4];
    /// `MCNT`, bits 20..=21.
    pub const MCNT: &FieldSpec = &super::REGISTERS[43].fields[5];
    /// `DAD`, bits 22..=28.
    pub const DAD: &FieldSpec = &super::REGISTERS[43].fields[6];
    /// `ODDFRM`, bit 29.
    pub const ODDFRM: &FieldSpec = &super::REGISTERS[43].fields[7];
    /// `CHDIS`, bit 30.
    pub const CHDIS: &FieldSpec = &super::REGISTERS[43].fields[8];
    /// `CHENA`, bit 31.
    pub const CHENA: &FieldSpec = &super::REGISTERS[43].fields[9];
}

/// The fields of `OTG_HS_HCSPLT6`.
pub mod otg_hs_hcsplt6 {
    use super::FieldSpec;
    /// `PRTADDR`, bits 0..=6.
    pub const PRTADDR: &FieldSpec = &super::REGISTERS[44].fields[0];
    /// `HUBADDR`, bits 7..=13.
    pub const HUBADDR: &FieldSpec = &super::REGISTERS[44].fields[1];
    /// `XACTPOS`, bits 14..=15.
    pub const XACTPOS: &FieldSpec = &super::REGISTERS[44].fields[2];
    /// `COMPLSPLT`, bit 16.
    pub const COMPLSPLT: &FieldSpec = &super::REGISTERS[44].fields[3];
    /// `SPLITEN`, bit 31.
    pub const SPLITEN: &FieldSpec = &super::REGISTERS[44].fields[4];
}

/// The fields of `OTG_HS_HCINT6`.
pub mod otg_hs_hcint6 {
    use super::FieldSpec;
    /// `XFRC`, bit 0.
    pub const XFRC: &FieldSpec = &super::REGISTERS[45].fields[0];
    /// `CHH`, bit 1.
    pub const CHH: &FieldSpec = &super::REGISTERS[45].fields[1];
    /// `AHBERR`, bit 2.
    pub const AHBERR: &FieldSpec = &super::REGISTERS[45].fields[2];
    /// `STALL`, bit 3.
    pub const STALL: &FieldSpec = &super::REGISTERS[45].fields[3];
    /// `NAK`, bit 4.
    pub const NAK: &FieldSpec = &super::REGISTERS[45].fields[4];
    /// `ACK`, bit 5.
    pub const ACK: &FieldSpec = &super::REGISTERS[45].fields[5];
    /// `NYET`, bit 6.
    pub const NYET: &FieldSpec = &super::REGISTERS[45].fields[6];
    /// `TXERR`, bit 7.
    pub const TXERR: &FieldSpec = &super::REGISTERS[45].fields[7];
    /// `BBERR`, bit 8.
    pub const BBERR: &FieldSpec = &super::REGISTERS[45].fields[8];
    /// `FRMOR`, bit 9.
    pub const FRMOR: &FieldSpec = &super::REGISTERS[45].fields[9];
    /// `DTERR`, bit 10.
    pub const DTERR: &FieldSpec = &super::REGISTERS[45].fields[10];
}

/// The fields of `OTG_HS_HCINTMSK6`.
pub mod otg_hs_hcintmsk6 {
    use super::FieldSpec;
    /// `XFRCM`, bit 0.
    pub const XFRCM: &FieldSpec = &super::REGISTERS[46].fields[0];
    /// `CHHM`, bit 1.
    pub const CHHM: &FieldSpec = &super::REGISTERS[46].fields[1];
    /// `AHBERRM`, bit 2.
    pub const AHBERRM: &FieldSpec = &super::REGISTERS[46].fields[2];
    /// `STALLM`, bit 3.
    pub const STALLM: &FieldSpec = &super::REGISTERS[46].fields[3];
    /// `NAKM`, bit 4.
    pub const NAKM: &FieldSpec = &super::REGISTERS[46].fields[4];
    /// `ACKM`, bit 5.
    pub const ACKM: &FieldSpec = &super::REGISTERS[46].fields[5];
    /// `NYET`, bit 6.
    pub const NYET: &FieldSpec = &super::REGISTERS[46].fields[6];
    /// `TXERRM`, bit 7.
    pub const TXERRM: &FieldSpec = &super::REGISTERS[46].fields[7];
    /// `BBERRM`, bit 8.
    pub const BBERRM: &FieldSpec = &super::REGISTERS[46].fields[8];
    /// `FRMORM`, bit 9.
    pub const FRMORM: &FieldSpec = &super::REGISTERS[46].fields[9];
    /// `DTERRM`, bit 10.
    pub const DTERRM: &FieldSpec = &super::REGISTERS[46].fields[10];
}

/// The fields of `OTG_HS_HCTSIZ6`.
pub mod otg_hs_hctsiz6 {
    use super::FieldSpec;
    /// `XFRSIZ`, bits 0..=18.
    pub const XFRSIZ: &FieldSpec = &super::REGISTERS[47].fields[0];
    /// `PKTCNT`, bits 19..=28.
    pub const PKTCNT: &FieldSpec = &super::REGISTERS[47].fields[1];
    /// `DPID`, bits 29..=30.
    pub const DPID: &FieldSpec = &super::REGISTERS[47].fields[2];
}

/// The fields of `OTG_HS_HCDMA6`.
pub mod otg_hs_hcdma6 {
    use super::FieldSpec;
    /// `DMAADDR`, bits 0..=31.
    pub const DMAADDR: &FieldSpec = &super::REGISTERS[48].fields[0];
}

/// The fields of `OTG_HS_HCCHAR7`.
pub mod otg_hs_hcchar7 {
    use super::FieldSpec;
    /// `MPSIZ`, bits 0..=10.
    pub const MPSIZ: &FieldSpec = &super::REGISTERS[49].fields[0];
    /// `EPNUM`, bits 11..=14.
    pub const EPNUM: &FieldSpec = &super::REGISTERS[49].fields[1];
    /// `EPDIR`, bit 15.
    pub const EPDIR: &FieldSpec = &super::REGISTERS[49].fields[2];
    /// `LSDEV`, bit 17.
    pub const LSDEV: &FieldSpec = &super::REGISTERS[49].fields[3];
    /// `EPTYP`, bits 18..=19.
    pub const EPTYP: &FieldSpec = &super::REGISTERS[49].fields[4];
    /// `MCNT`, bits 20..=21.
    pub const MCNT: &FieldSpec = &super::REGISTERS[49].fields[5];
    /// `DAD`, bits 22..=28.
    pub const DAD: &FieldSpec = &super::REGISTERS[49].fields[6];
    /// `ODDFRM`, bit 29.
    pub const ODDFRM: &FieldSpec = &super::REGISTERS[49].fields[7];
    /// `CHDIS`, bit 30.
    pub const CHDIS: &FieldSpec = &super::REGISTERS[49].fields[8];
    /// `CHENA`, bit 31.
    pub const CHENA: &FieldSpec = &super::REGISTERS[49].fields[9];
}

/// The fields of `OTG_HS_HCSPLT7`.
pub mod otg_hs_hcsplt7 {
    use super::FieldSpec;
    /// `PRTADDR`, bits 0..=6.
    pub const PRTADDR: &FieldSpec = &super::REGISTERS[50].fields[0];
    /// `HUBADDR`, bits 7..=13.
    pub const HUBADDR: &FieldSpec = &super::REGISTERS[50].fields[1];
    /// `XACTPOS`, bits 14..=15.
    pub const XACTPOS: &FieldSpec = &super::REGISTERS[50].fields[2];
    /// `COMPLSPLT`, bit 16.
    pub const COMPLSPLT: &FieldSpec = &super::REGISTERS[50].fields[3];
    /// `SPLITEN`, bit 31.
    pub const SPLITEN: &FieldSpec = &super::REGISTERS[50].fields[4];
}

/// The fields of `OTG_HS_HCINT7`.
pub mod otg_hs_hcint7 {
    use super::FieldSpec;
    /// `XFRC`, bit 0.
    pub const XFRC: &FieldSpec = &super::REGISTERS[51].fields[0];
    /// `CHH`, bit 1.
    pub const CHH: &FieldSpec = &super::REGISTERS[51].fields[1];
    /// `AHBERR`, bit 2.
    pub const AHBERR: &FieldSpec = &super::REGISTERS[51].fields[2];
    /// `STALL`, bit 3.
    pub const STALL: &FieldSpec = &super::REGISTERS[51].fields[3];
    /// `NAK`, bit 4.
    pub const NAK: &FieldSpec = &super::REGISTERS[51].fields[4];
    /// `ACK`, bit 5.
    pub const ACK: &FieldSpec = &super::REGISTERS[51].fields[5];
    /// `NYET`, bit 6.
    pub const NYET: &FieldSpec = &super::REGISTERS[51].fields[6];
    /// `TXERR`, bit 7.
    pub const TXERR: &FieldSpec = &super::REGISTERS[51].fields[7];
    /// `BBERR`, bit 8.
    pub const BBERR: &FieldSpec = &super::REGISTERS[51].fields[8];
    /// `FRMOR`, bit 9.
    pub const FRMOR: &FieldSpec = &super::REGISTERS[51].fields[9];
    /// `DTERR`, bit 10.
    pub const DTERR: &FieldSpec = &super::REGISTERS[51].fields[10];
}

/// The fields of `OTG_HS_HCINTMSK7`.
pub mod otg_hs_hcintmsk7 {
    use super::FieldSpec;
    /// `XFRCM`, bit 0.
    pub const XFRCM: &FieldSpec = &super::REGISTERS[52].fields[0];
    /// `CHHM`, bit 1.
    pub const CHHM: &FieldSpec = &super::REGISTERS[52].fields[1];
    /// `AHBERRM`, bit 2.
    pub const AHBERRM: &FieldSpec = &super::REGISTERS[52].fields[2];
    /// `STALLM`, bit 3.
    pub const STALLM: &FieldSpec = &super::REGISTERS[52].fields[3];
    /// `NAKM`, bit 4.
    pub const NAKM: &FieldSpec = &super::REGISTERS[52].fields[4];
    /// `ACKM`, bit 5.
    pub const ACKM: &FieldSpec = &super::REGISTERS[52].fields[5];
    /// `NYET`, bit 6.
    pub const NYET: &FieldSpec = &super::REGISTERS[52].fields[6];
    /// `TXERRM`, bit 7.
    pub const TXERRM: &FieldSpec = &super::REGISTERS[52].fields[7];
    /// `BBERRM`, bit 8.
    pub const BBERRM: &FieldSpec = &super::REGISTERS[52].fields[8];
    /// `FRMORM`, bit 9.
    pub const FRMORM: &FieldSpec = &super::REGISTERS[52].fields[9];
    /// `DTERRM`, bit 10.
    pub const DTERRM: &FieldSpec = &super::REGISTERS[52].fields[10];
}

/// The fields of `OTG_HS_HCTSIZ7`.
pub mod otg_hs_hctsiz7 {
    use super::FieldSpec;
    /// `XFRSIZ`, bits 0..=18.
    pub const XFRSIZ: &FieldSpec = &super::REGISTERS[53].fields[0];
    /// `PKTCNT`, bits 19..=28.
    pub const PKTCNT: &FieldSpec = &super::REGISTERS[53].fields[1];
    /// `DPID`, bits 29..=30.
    pub const DPID: &FieldSpec = &super::REGISTERS[53].fields[2];
}

/// The fields of `OTG_HS_HCDMA7`.
pub mod otg_hs_hcdma7 {
    use super::FieldSpec;
    /// `DMAADDR`, bits 0..=31.
    pub const DMAADDR: &FieldSpec = &super::REGISTERS[54].fields[0];
}

/// The fields of `OTG_HS_HCCHAR8`.
pub mod otg_hs_hcchar8 {
    use super::FieldSpec;
    /// `MPSIZ`, bits 0..=10.
    pub const MPSIZ: &FieldSpec = &super::REGISTERS[55].fields[0];
    /// `EPNUM`, bits 11..=14.
    pub const EPNUM: &FieldSpec = &super::REGISTERS[55].fields[1];
    /// `EPDIR`, bit 15.
    pub const EPDIR: &FieldSpec = &super::REGISTERS[55].fields[2];
    /// `LSDEV`, bit 17.
    pub const LSDEV: &FieldSpec = &super::REGISTERS[55].fields[3];
    /// `EPTYP`, bits 18..=19.
    pub const EPTYP: &FieldSpec = &super::REGISTERS[55].fields[4];
    /// `MCNT`, bits 20..=21.
    pub const MCNT: &FieldSpec = &super::REGISTERS[55].fields[5];
    /// `DAD`, bits 22..=28.
    pub const DAD: &FieldSpec = &super::REGISTERS[55].fields[6];
    /// `ODDFRM`, bit 29.
    pub const ODDFRM: &FieldSpec = &super::REGISTERS[55].fields[7];
    /// `CHDIS`, bit 30.
    pub const CHDIS: &FieldSpec = &super::REGISTERS[55].fields[8];
    /// `CHENA`, bit 31.
    pub const CHENA: &FieldSpec = &super::REGISTERS[55].fields[9];
}

/// The fields of `OTG_HS_HCSPLT8`.
pub mod otg_hs_hcsplt8 {
    use super::FieldSpec;
    /// `PRTADDR`, bits 0..=6.
    pub const PRTADDR: &FieldSpec = &super::REGISTERS[56].fields[0];
    /// `HUBADDR`, bits 7..=13.
    pub const HUBADDR: &FieldSpec = &super::REGISTERS[56].fields[1];
    /// `XACTPOS`, bits 14..=15.
    pub const XACTPOS: &FieldSpec = &super::REGISTERS[56].fields[2];
    /// `COMPLSPLT`, bit 16.
    pub const COMPLSPLT: &FieldSpec = &super::REGISTERS[56].fields[3];
    /// `SPLITEN`, bit 31.
    pub const SPLITEN: &FieldSpec = &super::REGISTERS[56].fields[4];
}

/// The fields of `OTG_HS_HCINT8`.
pub mod otg_hs_hcint8 {
    use super::FieldSpec;
    /// `XFRC`, bit 0.
    pub const XFRC: &FieldSpec = &super::REGISTERS[57].fields[0];
    /// `CHH`, bit 1.
    pub const CHH: &FieldSpec = &super::REGISTERS[57].fields[1];
    /// `AHBERR`, bit 2.
    pub const AHBERR: &FieldSpec = &super::REGISTERS[57].fields[2];
    /// `STALL`, bit 3.
    pub const STALL: &FieldSpec = &super::REGISTERS[57].fields[3];
    /// `NAK`, bit 4.
    pub const NAK: &FieldSpec = &super::REGISTERS[57].fields[4];
    /// `ACK`, bit 5.
    pub const ACK: &FieldSpec = &super::REGISTERS[57].fields[5];
    /// `NYET`, bit 6.
    pub const NYET: &FieldSpec = &super::REGISTERS[57].fields[6];
    /// `TXERR`, bit 7.
    pub const TXERR: &FieldSpec = &super::REGISTERS[57].fields[7];
    /// `BBERR`, bit 8.
    pub const BBERR: &FieldSpec = &super::REGISTERS[57].fields[8];
    /// `FRMOR`, bit 9.
    pub const FRMOR: &FieldSpec = &super::REGISTERS[57].fields[9];
    /// `DTERR`, bit 10.
    pub const DTERR: &FieldSpec = &super::REGISTERS[57].fields[10];
}

/// The fields of `OTG_HS_HCINTMSK8`.
pub mod otg_hs_hcintmsk8 {
    use super::FieldSpec;
    /// `XFRCM`, bit 0.
    pub const XFRCM: &FieldSpec = &super::REGISTERS[58].fields[0];
    /// `CHHM`, bit 1.
    pub const CHHM: &FieldSpec = &super::REGISTERS[58].fields[1];
    /// `AHBERRM`, bit 2.
    pub const AHBERRM: &FieldSpec = &super::REGISTERS[58].fields[2];
    /// `STALLM`, bit 3.
    pub const STALLM: &FieldSpec = &super::REGISTERS[58].fields[3];
    /// `NAKM`, bit 4.
    pub const NAKM: &FieldSpec = &super::REGISTERS[58].fields[4];
    /// `ACKM`, bit 5.
    pub const ACKM: &FieldSpec = &super::REGISTERS[58].fields[5];
    /// `NYET`, bit 6.
    pub const NYET: &FieldSpec = &super::REGISTERS[58].fields[6];
    /// `TXERRM`, bit 7.
    pub const TXERRM: &FieldSpec = &super::REGISTERS[58].fields[7];
    /// `BBERRM`, bit 8.
    pub const BBERRM: &FieldSpec = &super::REGISTERS[58].fields[8];
    /// `FRMORM`, bit 9.
    pub const FRMORM: &FieldSpec = &super::REGISTERS[58].fields[9];
    /// `DTERRM`, bit 10.
    pub const DTERRM: &FieldSpec = &super::REGISTERS[58].fields[10];
}

/// The fields of `OTG_HS_HCTSIZ8`.
pub mod otg_hs_hctsiz8 {
    use super::FieldSpec;
    /// `XFRSIZ`, bits 0..=18.
    pub const XFRSIZ: &FieldSpec = &super::REGISTERS[59].fields[0];
    /// `PKTCNT`, bits 19..=28.
    pub const PKTCNT: &FieldSpec = &super::REGISTERS[59].fields[1];
    /// `DPID`, bits 29..=30.
    pub const DPID: &FieldSpec = &super::REGISTERS[59].fields[2];
}

/// The fields of `OTG_HS_HCDMA8`.
pub mod otg_hs_hcdma8 {
    use super::FieldSpec;
    /// `DMAADDR`, bits 0..=31.
    pub const DMAADDR: &FieldSpec = &super::REGISTERS[60].fields[0];
}

/// The fields of `OTG_HS_HCCHAR9`.
pub mod otg_hs_hcchar9 {
    use super::FieldSpec;
    /// `MPSIZ`, bits 0..=10.
    pub const MPSIZ: &FieldSpec = &super::REGISTERS[61].fields[0];
    /// `EPNUM`, bits 11..=14.
    pub const EPNUM: &FieldSpec = &super::REGISTERS[61].fields[1];
    /// `EPDIR`, bit 15.
    pub const EPDIR: &FieldSpec = &super::REGISTERS[61].fields[2];
    /// `LSDEV`, bit 17.
    pub const LSDEV: &FieldSpec = &super::REGISTERS[61].fields[3];
    /// `EPTYP`, bits 18..=19.
    pub const EPTYP: &FieldSpec = &super::REGISTERS[61].fields[4];
    /// `MCNT`, bits 20..=21.
    pub const MCNT: &FieldSpec = &super::REGISTERS[61].fields[5];
    /// `DAD`, bits 22..=28.
    pub const DAD: &FieldSpec = &super::REGISTERS[61].fields[6];
    /// `ODDFRM`, bit 29.
    pub const ODDFRM: &FieldSpec = &super::REGISTERS[61].fields[7];
    /// `CHDIS`, bit 30.
    pub const CHDIS: &FieldSpec = &super::REGISTERS[61].fields[8];
    /// `CHENA`, bit 31.
    pub const CHENA: &FieldSpec = &super::REGISTERS[61].fields[9];
}

/// The fields of `OTG_HS_HCSPLT9`.
pub mod otg_hs_hcsplt9 {
    use super::FieldSpec;
    /// `PRTADDR`, bits 0..=6.
    pub const PRTADDR: &FieldSpec = &super::REGISTERS[62].fields[0];
    /// `HUBADDR`, bits 7..=13.
    pub const HUBADDR: &FieldSpec = &super::REGISTERS[62].fields[1];
    /// `XACTPOS`, bits 14..=15.
    pub const XACTPOS: &FieldSpec = &super::REGISTERS[62].fields[2];
    /// `COMPLSPLT`, bit 16.
    pub const COMPLSPLT: &FieldSpec = &super::REGISTERS[62].fields[3];
    /// `SPLITEN`, bit 31.
    pub const SPLITEN: &FieldSpec = &super::REGISTERS[62].fields[4];
}

/// The fields of `OTG_HS_HCINT9`.
pub mod otg_hs_hcint9 {
    use super::FieldSpec;
    /// `XFRC`, bit 0.
    pub const XFRC: &FieldSpec = &super::REGISTERS[63].fields[0];
    /// `CHH`, bit 1.
    pub const CHH: &FieldSpec = &super::REGISTERS[63].fields[1];
    /// `AHBERR`, bit 2.
    pub const AHBERR: &FieldSpec = &super::REGISTERS[63].fields[2];
    /// `STALL`, bit 3.
    pub const STALL: &FieldSpec = &super::REGISTERS[63].fields[3];
    /// `NAK`, bit 4.
    pub const NAK: &FieldSpec = &super::REGISTERS[63].fields[4];
    /// `ACK`, bit 5.
    pub const ACK: &FieldSpec = &super::REGISTERS[63].fields[5];
    /// `NYET`, bit 6.
    pub const NYET: &FieldSpec = &super::REGISTERS[63].fields[6];
    /// `TXERR`, bit 7.
    pub const TXERR: &FieldSpec = &super::REGISTERS[63].fields[7];
    /// `BBERR`, bit 8.
    pub const BBERR: &FieldSpec = &super::REGISTERS[63].fields[8];
    /// `FRMOR`, bit 9.
    pub const FRMOR: &FieldSpec = &super::REGISTERS[63].fields[9];
    /// `DTERR`, bit 10.
    pub const DTERR: &FieldSpec = &super::REGISTERS[63].fields[10];
}

/// The fields of `OTG_HS_HCINTMSK9`.
pub mod otg_hs_hcintmsk9 {
    use super::FieldSpec;
    /// `XFRCM`, bit 0.
    pub const XFRCM: &FieldSpec = &super::REGISTERS[64].fields[0];
    /// `CHHM`, bit 1.
    pub const CHHM: &FieldSpec = &super::REGISTERS[64].fields[1];
    /// `AHBERRM`, bit 2.
    pub const AHBERRM: &FieldSpec = &super::REGISTERS[64].fields[2];
    /// `STALLM`, bit 3.
    pub const STALLM: &FieldSpec = &super::REGISTERS[64].fields[3];
    /// `NAKM`, bit 4.
    pub const NAKM: &FieldSpec = &super::REGISTERS[64].fields[4];
    /// `ACKM`, bit 5.
    pub const ACKM: &FieldSpec = &super::REGISTERS[64].fields[5];
    /// `NYET`, bit 6.
    pub const NYET: &FieldSpec = &super::REGISTERS[64].fields[6];
    /// `TXERRM`, bit 7.
    pub const TXERRM: &FieldSpec = &super::REGISTERS[64].fields[7];
    /// `BBERRM`, bit 8.
    pub const BBERRM: &FieldSpec = &super::REGISTERS[64].fields[8];
    /// `FRMORM`, bit 9.
    pub const FRMORM: &FieldSpec = &super::REGISTERS[64].fields[9];
    /// `DTERRM`, bit 10.
    pub const DTERRM: &FieldSpec = &super::REGISTERS[64].fields[10];
}

/// The fields of `OTG_HS_HCTSIZ9`.
pub mod otg_hs_hctsiz9 {
    use super::FieldSpec;
    /// `XFRSIZ`, bits 0..=18.
    pub const XFRSIZ: &FieldSpec = &super::REGISTERS[65].fields[0];
    /// `PKTCNT`, bits 19..=28.
    pub const PKTCNT: &FieldSpec = &super::REGISTERS[65].fields[1];
    /// `DPID`, bits 29..=30.
    pub const DPID: &FieldSpec = &super::REGISTERS[65].fields[2];
}

/// The fields of `OTG_HS_HCDMA9`.
pub mod otg_hs_hcdma9 {
    use super::FieldSpec;
    /// `DMAADDR`, bits 0..=31.
    pub const DMAADDR: &FieldSpec = &super::REGISTERS[66].fields[0];
}

/// The fields of `OTG_HS_HCCHAR10`.
pub mod otg_hs_hcchar10 {
    use super::FieldSpec;
    /// `MPSIZ`, bits 0..=10.
    pub const MPSIZ: &FieldSpec = &super::REGISTERS[67].fields[0];
    /// `EPNUM`, bits 11..=14.
    pub const EPNUM: &FieldSpec = &super::REGISTERS[67].fields[1];
    /// `EPDIR`, bit 15.
    pub const EPDIR: &FieldSpec = &super::REGISTERS[67].fields[2];
    /// `LSDEV`, bit 17.
    pub const LSDEV: &FieldSpec = &super::REGISTERS[67].fields[3];
    /// `EPTYP`, bits 18..=19.
    pub const EPTYP: &FieldSpec = &super::REGISTERS[67].fields[4];
    /// `MCNT`, bits 20..=21.
    pub const MCNT: &FieldSpec = &super::REGISTERS[67].fields[5];
    /// `DAD`, bits 22..=28.
    pub const DAD: &FieldSpec = &super::REGISTERS[67].fields[6];
    /// `ODDFRM`, bit 29.
    pub const ODDFRM: &FieldSpec = &super::REGISTERS[67].fields[7];
    /// `CHDIS`, bit 30.
    pub const CHDIS: &FieldSpec = &super::REGISTERS[67].fields[8];
    /// `CHENA`, bit 31.
    pub const CHENA: &FieldSpec = &super::REGISTERS[67].fields[9];
}

/// The fields of `OTG_HS_HCSPLT10`.
pub mod otg_hs_hcsplt10 {
    use super::FieldSpec;
    /// `PRTADDR`, bits 0..=6.
    pub const PRTADDR: &FieldSpec = &super::REGISTERS[68].fields[0];
    /// `HUBADDR`, bits 7..=13.
    pub const HUBADDR: &FieldSpec = &super::REGISTERS[68].fields[1];
    /// `XACTPOS`, bits 14..=15.
    pub const XACTPOS: &FieldSpec = &super::REGISTERS[68].fields[2];
    /// `COMPLSPLT`, bit 16.
    pub const COMPLSPLT: &FieldSpec = &super::REGISTERS[68].fields[3];
    /// `SPLITEN`, bit 31.
    pub const SPLITEN: &FieldSpec = &super::REGISTERS[68].fields[4];
}

/// The fields of `OTG_HS_HCINT10`.
pub mod otg_hs_hcint10 {
    use super::FieldSpec;
    /// `XFRC`, bit 0.
    pub const XFRC: &FieldSpec = &super::REGISTERS[69].fields[0];
    /// `CHH`, bit 1.
    pub const CHH: &FieldSpec = &super::REGISTERS[69].fields[1];
    /// `AHBERR`, bit 2.
    pub const AHBERR: &FieldSpec = &super::REGISTERS[69].fields[2];
    /// `STALL`, bit 3.
    pub const STALL: &FieldSpec = &super::REGISTERS[69].fields[3];
    /// `NAK`, bit 4.
    pub const NAK: &FieldSpec = &super::REGISTERS[69].fields[4];
    /// `ACK`, bit 5.
    pub const ACK: &FieldSpec = &super::REGISTERS[69].fields[5];
    /// `NYET`, bit 6.
    pub const NYET: &FieldSpec = &super::REGISTERS[69].fields[6];
    /// `TXERR`, bit 7.
    pub const TXERR: &FieldSpec = &super::REGISTERS[69].fields[7];
    /// `BBERR`, bit 8.
    pub const BBERR: &FieldSpec = &super::REGISTERS[69].fields[8];
    /// `FRMOR`, bit 9.
    pub const FRMOR: &FieldSpec = &super::REGISTERS[69].fields[9];
    /// `DTERR`, bit 10.
    pub const DTERR: &FieldSpec = &super::REGISTERS[69].fields[10];
}

/// The fields of `OTG_HS_HCINTMSK10`.
pub mod otg_hs_hcintmsk10 {
    use super::FieldSpec;
    /// `XFRCM`, bit 0.
    pub const XFRCM: &FieldSpec = &super::REGISTERS[70].fields[0];
    /// `CHHM`, bit 1.
    pub const CHHM: &FieldSpec = &super::REGISTERS[70].fields[1];
    /// `AHBERRM`, bit 2.
    pub const AHBERRM: &FieldSpec = &super::REGISTERS[70].fields[2];
    /// `STALLM`, bit 3.
    pub const STALLM: &FieldSpec = &super::REGISTERS[70].fields[3];
    /// `NAKM`, bit 4.
    pub const NAKM: &FieldSpec = &super::REGISTERS[70].fields[4];
    /// `ACKM`, bit 5.
    pub const ACKM: &FieldSpec = &super::REGISTERS[70].fields[5];
    /// `NYET`, bit 6.
    pub const NYET: &FieldSpec = &super::REGISTERS[70].fields[6];
    /// `TXERRM`, bit 7.
    pub const TXERRM: &FieldSpec = &super::REGISTERS[70].fields[7];
    /// `BBERRM`, bit 8.
    pub const BBERRM: &FieldSpec = &super::REGISTERS[70].fields[8];
    /// `FRMORM`, bit 9.
    pub const FRMORM: &FieldSpec = &super::REGISTERS[70].fields[9];
    /// `DTERRM`, bit 10.
    pub const DTERRM: &FieldSpec = &super::REGISTERS[70].fields[10];
}

/// The fields of `OTG_HS_HCTSIZ10`.
pub mod otg_hs_hctsiz10 {
    use super::FieldSpec;
    /// `XFRSIZ`, bits 0..=18.
    pub const XFRSIZ: &FieldSpec = &super::REGISTERS[71].fields[0];
    /// `PKTCNT`, bits 19..=28.
    pub const PKTCNT: &FieldSpec = &super::REGISTERS[71].fields[1];
    /// `DPID`, bits 29..=30.
    pub const DPID: &FieldSpec = &super::REGISTERS[71].fields[2];
}

/// The fields of `OTG_HS_HCDMA10`.
pub mod otg_hs_hcdma10 {
    use super::FieldSpec;
    /// `DMAADDR`, bits 0..=31.
    pub const DMAADDR: &FieldSpec = &super::REGISTERS[72].fields[0];
}

/// The fields of `OTG_HS_HCCHAR11`.
pub mod otg_hs_hcchar11 {
    use super::FieldSpec;
    /// `MPSIZ`, bits 0..=10.
    pub const MPSIZ: &FieldSpec = &super::REGISTERS[73].fields[0];
    /// `EPNUM`, bits 11..=14.
    pub const EPNUM: &FieldSpec = &super::REGISTERS[73].fields[1];
    /// `EPDIR`, bit 15.
    pub const EPDIR: &FieldSpec = &super::REGISTERS[73].fields[2];
    /// `LSDEV`, bit 17.
    pub const LSDEV: &FieldSpec = &super::REGISTERS[73].fields[3];
    /// `EPTYP`, bits 18..=19.
    pub const EPTYP: &FieldSpec = &super::REGISTERS[73].fields[4];
    /// `MCNT`, bits 20..=21.
    pub const MCNT: &FieldSpec = &super::REGISTERS[73].fields[5];
    /// `DAD`, bits 22..=28.
    pub const DAD: &FieldSpec = &super::REGISTERS[73].fields[6];
    /// `ODDFRM`, bit 29.
    pub const ODDFRM: &FieldSpec = &super::REGISTERS[73].fields[7];
    /// `CHDIS`, bit 30.
    pub const CHDIS: &FieldSpec = &super::REGISTERS[73].fields[8];
    /// `CHENA`, bit 31.
    pub const CHENA: &FieldSpec = &super::REGISTERS[73].fields[9];
}

/// The fields of `OTG_HS_HCSPLT11`.
pub mod otg_hs_hcsplt11 {
    use super::FieldSpec;
    /// `PRTADDR`, bits 0..=6.
    pub const PRTADDR: &FieldSpec = &super::REGISTERS[74].fields[0];
    /// `HUBADDR`, bits 7..=13.
    pub const HUBADDR: &FieldSpec = &super::REGISTERS[74].fields[1];
    /// `XACTPOS`, bits 14..=15.
    pub const XACTPOS: &FieldSpec = &super::REGISTERS[74].fields[2];
    /// `COMPLSPLT`, bit 16.
    pub const COMPLSPLT: &FieldSpec = &super::REGISTERS[74].fields[3];
    /// `SPLITEN`, bit 31.
    pub const SPLITEN: &FieldSpec = &super::REGISTERS[74].fields[4];
}

/// The fields of `OTG_HS_HCINT11`.
pub mod otg_hs_hcint11 {
    use super::FieldSpec;
    /// `XFRC`, bit 0.
    pub const XFRC: &FieldSpec = &super::REGISTERS[75].fields[0];
    /// `CHH`, bit 1.
    pub const CHH: &FieldSpec = &super::REGISTERS[75].fields[1];
    /// `AHBERR`, bit 2.
    pub const AHBERR: &FieldSpec = &super::REGISTERS[75].fields[2];
    /// `STALL`, bit 3.
    pub const STALL: &FieldSpec = &super::REGISTERS[75].fields[3];
    /// `NAK`, bit 4.
    pub const NAK: &FieldSpec = &super::REGISTERS[75].fields[4];
    /// `ACK`, bit 5.
    pub const ACK: &FieldSpec = &super::REGISTERS[75].fields[5];
    /// `NYET`, bit 6.
    pub const NYET: &FieldSpec = &super::REGISTERS[75].fields[6];
    /// `TXERR`, bit 7.
    pub const TXERR: &FieldSpec = &super::REGISTERS[75].fields[7];
    /// `BBERR`, bit 8.
    pub const BBERR: &FieldSpec = &super::REGISTERS[75].fields[8];
    /// `FRMOR`, bit 9.
    pub const FRMOR: &FieldSpec = &super::REGISTERS[75].fields[9];
    /// `DTERR`, bit 10.
    pub const DTERR: &FieldSpec = &super::REGISTERS[75].fields[10];
}

/// The fields of `OTG_HS_HCINTMSK11`.
pub mod otg_hs_hcintmsk11 {
    use super::FieldSpec;
    /// `XFRCM`, bit 0.
    pub const XFRCM: &FieldSpec = &super::REGISTERS[76].fields[0];
    /// `CHHM`, bit 1.
    pub const CHHM: &FieldSpec = &super::REGISTERS[76].fields[1];
    /// `AHBERRM`, bit 2.
    pub const AHBERRM: &FieldSpec = &super::REGISTERS[76].fields[2];
    /// `STALLM`, bit 3.
    pub const STALLM: &FieldSpec = &super::REGISTERS[76].fields[3];
    /// `NAKM`, bit 4.
    pub const NAKM: &FieldSpec = &super::REGISTERS[76].fields[4];
    /// `ACKM`, bit 5.
    pub const ACKM: &FieldSpec = &super::REGISTERS[76].fields[5];
    /// `NYET`, bit 6.
    pub const NYET: &FieldSpec = &super::REGISTERS[76].fields[6];
    /// `TXERRM`, bit 7.
    pub const TXERRM: &FieldSpec = &super::REGISTERS[76].fields[7];
    /// `BBERRM`, bit 8.
    pub const BBERRM: &FieldSpec = &super::REGISTERS[76].fields[8];
    /// `FRMORM`, bit 9.
    pub const FRMORM: &FieldSpec = &super::REGISTERS[76].fields[9];
    /// `DTERRM`, bit 10.
    pub const DTERRM: &FieldSpec = &super::REGISTERS[76].fields[10];
}

/// The fields of `OTG_HS_HCTSIZ11`.
pub mod otg_hs_hctsiz11 {
    use super::FieldSpec;
    /// `XFRSIZ`, bits 0..=18.
    pub const XFRSIZ: &FieldSpec = &super::REGISTERS[77].fields[0];
    /// `PKTCNT`, bits 19..=28.
    pub const PKTCNT: &FieldSpec = &super::REGISTERS[77].fields[1];
    /// `DPID`, bits 29..=30.
    pub const DPID: &FieldSpec = &super::REGISTERS[77].fields[2];
}

/// The fields of `OTG_HS_HCDMA11`.
pub mod otg_hs_hcdma11 {
    use super::FieldSpec;
    /// `DMAADDR`, bits 0..=31.
    pub const DMAADDR: &FieldSpec = &super::REGISTERS[78].fields[0];
}

/// The fields of `OTG_HS_HCCHAR12`.
pub mod otg_hs_hcchar12 {
    use super::FieldSpec;
    /// `MPSIZ`, bits 0..=10.
    pub const MPSIZ: &FieldSpec = &super::REGISTERS[79].fields[0];
    /// `EPNUM`, bits 11..=14.
    pub const EPNUM: &FieldSpec = &super::REGISTERS[79].fields[1];
    /// `EPDIR`, bit 15.
    pub const EPDIR: &FieldSpec = &super::REGISTERS[79].fields[2];
    /// `LSDEV`, bit 17.
    pub const LSDEV: &FieldSpec = &super::REGISTERS[79].fields[3];
    /// `EPTYP`, bits 18..=19.
    pub const EPTYP: &FieldSpec = &super::REGISTERS[79].fields[4];
    /// `MCNT`, bits 20..=21.
    pub const MCNT: &FieldSpec = &super::REGISTERS[79].fields[5];
    /// `DAD`, bits 22..=28.
    pub const DAD: &FieldSpec = &super::REGISTERS[79].fields[6];
    /// `ODDFRM`, bit 29.
    pub const ODDFRM: &FieldSpec = &super::REGISTERS[79].fields[7];
    /// `CHDIS`, bit 30.
    pub const CHDIS: &FieldSpec = &super::REGISTERS[79].fields[8];
    /// `CHENA`, bit 31.
    pub const CHENA: &FieldSpec = &super::REGISTERS[79].fields[9];
}

/// The fields of `OTG_HS_HCSPLT12`.
pub mod otg_hs_hcsplt12 {
    use super::FieldSpec;
    /// `PRTADDR`, bits 0..=6.
    pub const PRTADDR: &FieldSpec = &super::REGISTERS[80].fields[0];
    /// `HUBADDR`, bits 7..=13.
    pub const HUBADDR: &FieldSpec = &super::REGISTERS[80].fields[1];
    /// `XACTPOS`, bits 14..=15.
    pub const XACTPOS: &FieldSpec = &super::REGISTERS[80].fields[2];
    /// `COMPLSPLT`, bit 16.
    pub const COMPLSPLT: &FieldSpec = &super::REGISTERS[80].fields[3];
    /// `SPLITEN`, bit 31.
    pub const SPLITEN: &FieldSpec = &super::REGISTERS[80].fields[4];
}

/// The fields of `OTG_HS_HCINT12`.
pub mod otg_hs_hcint12 {
    use super::FieldSpec;
    /// `XFRC`, bit 0.
    pub const XFRC: &FieldSpec = &super::REGISTERS[81].fields[0];
    /// `CHH`, bit 1.
    pub const CHH: &FieldSpec = &super::REGISTERS[81].fields[1];
    /// `AHBERR`, bit 2.
    pub const AHBERR: &FieldSpec = &super::REGISTERS[81].fields[2];
    /// `STALL`, bit 3.
    pub const STALL: &FieldSpec = &super::REGISTERS[81].fields[3];
    /// `NAK`, bit 4.
    pub const NAK: &FieldSpec = &super::REGISTERS[81].fields[4];
    /// `ACK`, bit 5.
    pub const ACK: &FieldSpec = &super::REGISTERS[81].fields[5];
    /// `NYET`, bit 6.
    pub const NYET: &FieldSpec = &super::REGISTERS[81].fields[6];
    /// `TXERR`, bit 7.
    pub const TXERR: &FieldSpec = &super::REGISTERS[81].fields[7];
    /// `BBERR`, bit 8.
    pub const BBERR: &FieldSpec = &super::REGISTERS[81].fields[8];
    /// `FRMOR`, bit 9.
    pub const FRMOR: &FieldSpec = &super::REGISTERS[81].fields[9];
    /// `DTERR`, bit 10.
    pub const DTERR: &FieldSpec = &super::REGISTERS[81].fields[10];
}

/// The fields of `OTG_HS_HCINTMSK12`.
pub mod otg_hs_hcintmsk12 {
    use super::FieldSpec;
    /// `XFRCM`, bit 0.
    pub const XFRCM: &FieldSpec = &super::REGISTERS[82].fields[0];
    /// `CHHM`, bit 1.
    pub const CHHM: &FieldSpec = &super::REGISTERS[82].fields[1];
    /// `AHBERRM`, bit 2.
    pub const AHBERRM: &FieldSpec = &super::REGISTERS[82].fields[2];
    /// `STALLM`, bit 3.
    pub const STALLM: &FieldSpec = &super::REGISTERS[82].fields[3];
    /// `NAKM`, bit 4.
    pub const NAKM: &FieldSpec = &super::REGISTERS[82].fields[4];
    /// `ACKM`, bit 5.
    pub const ACKM: &FieldSpec = &super::REGISTERS[82].fields[5];
    /// `NYET`, bit 6.
    pub const NYET: &FieldSpec = &super::REGISTERS[82].fields[6];
    /// `TXERRM`, bit 7.
    pub const TXERRM: &FieldSpec = &super::REGISTERS[82].fields[7];
    /// `BBERRM`, bit 8.
    pub const BBERRM: &FieldSpec = &super::REGISTERS[82].fields[8];
    /// `FRMORM`, bit 9.
    pub const FRMORM: &FieldSpec = &super::REGISTERS[82].fields[9];
    /// `DTERRM`, bit 10.
    pub const DTERRM: &FieldSpec = &super::REGISTERS[82].fields[10];
}

/// The fields of `OTG_HS_HCTSIZ12`.
pub mod otg_hs_hctsiz12 {
    use super::FieldSpec;
    /// `XFRSIZ`, bits 0..=18.
    pub const XFRSIZ: &FieldSpec = &super::REGISTERS[83].fields[0];
    /// `PKTCNT`, bits 19..=28.
    pub const PKTCNT: &FieldSpec = &super::REGISTERS[83].fields[1];
    /// `DPID`, bits 29..=30.
    pub const DPID: &FieldSpec = &super::REGISTERS[83].fields[2];
}

/// The fields of `OTG_HS_HCDMA12`.
pub mod otg_hs_hcdma12 {
    use super::FieldSpec;
    /// `DMAADDR`, bits 0..=31.
    pub const DMAADDR: &FieldSpec = &super::REGISTERS[84].fields[0];
}

/// The fields of `OTG_HS_HCCHAR13`.
pub mod otg_hs_hcchar13 {
    use super::FieldSpec;
    /// `MPSIZ`, bits 0..=10.
    pub const MPSIZ: &FieldSpec = &super::REGISTERS[85].fields[0];
    /// `EPNUM`, bits 11..=14.
    pub const EPNUM: &FieldSpec = &super::REGISTERS[85].fields[1];
    /// `EPDIR`, bit 15.
    pub const EPDIR: &FieldSpec = &super::REGISTERS[85].fields[2];
    /// `LSDEV`, bit 17.
    pub const LSDEV: &FieldSpec = &super::REGISTERS[85].fields[3];
    /// `EPTYP`, bits 18..=19.
    pub const EPTYP: &FieldSpec = &super::REGISTERS[85].fields[4];
    /// `MCNT`, bits 20..=21.
    pub const MCNT: &FieldSpec = &super::REGISTERS[85].fields[5];
    /// `DAD`, bits 22..=28.
    pub const DAD: &FieldSpec = &super::REGISTERS[85].fields[6];
    /// `ODDFRM`, bit 29.
    pub const ODDFRM: &FieldSpec = &super::REGISTERS[85].fields[7];
    /// `CHDIS`, bit 30.
    pub const CHDIS: &FieldSpec = &super::REGISTERS[85].fields[8];
    /// `CHENA`, bit 31.
    pub const CHENA: &FieldSpec = &super::REGISTERS[85].fields[9];
}

/// The fields of `OTG_HS_HCSPLT13`.
pub mod otg_hs_hcsplt13 {
    use super::FieldSpec;
    /// `PRTADDR`, bits 0..=6.
    pub const PRTADDR: &FieldSpec = &super::REGISTERS[86].fields[0];
    /// `HUBADDR`, bits 7..=13.
    pub const HUBADDR: &FieldSpec = &super::REGISTERS[86].fields[1];
    /// `XACTPOS`, bits 14..=15.
    pub const XACTPOS: &FieldSpec = &super::REGISTERS[86].fields[2];
    /// `COMPLSPLT`, bit 16.
    pub const COMPLSPLT: &FieldSpec = &super::REGISTERS[86].fields[3];
    /// `SPLITEN`, bit 31.
    pub const SPLITEN: &FieldSpec = &super::REGISTERS[86].fields[4];
}

/// The fields of `OTG_HS_HCINT13`.
pub mod otg_hs_hcint13 {
    use super::FieldSpec;
    /// `XFRC`, bit 0.
    pub const XFRC: &FieldSpec = &super::REGISTERS[87].fields[0];
    /// `CHH`, bit 1.
    pub const CHH: &FieldSpec = &super::REGISTERS[87].fields[1];
    /// `AHBERR`, bit 2.
    pub const AHBERR: &FieldSpec = &super::REGISTERS[87].fields[2];
    /// `STALL`, bit 3.
    pub const STALL: &FieldSpec = &super::REGISTERS[87].fields[3];
    /// `NAK`, bit 4.
    pub const NAK: &FieldSpec = &super::REGISTERS[87].fields[4];
    /// `ACK`, bit 5.
    pub const ACK: &FieldSpec = &super::REGISTERS[87].fields[5];
    /// `NYET`, bit 6.
    pub const NYET: &FieldSpec = &super::REGISTERS[87].fields[6];
    /// `TXERR`, bit 7.
    pub const TXERR: &FieldSpec = &super::REGISTERS[87].fields[7];
    /// `BBERR`, bit 8.
    pub const BBERR: &FieldSpec = &super::REGISTERS[87].fields[8];
    /// `FRMOR`, bit 9.
    pub const FRMOR: &FieldSpec = &super::REGISTERS[87].fields[9];
    /// `DTERR`, bit 10.
    pub const DTERR: &FieldSpec = &super::REGISTERS[87].fields[10];
}

/// The fields of `OTG_HS_HCINTMSK13`.
pub mod otg_hs_hcintmsk13 {
    use super::FieldSpec;
    /// `XFRCM`, bit 0.
    pub const XFRCM: &FieldSpec = &super::REGISTERS[88].fields[0];
    /// `CHHM`, bit 1.
    pub const CHHM: &FieldSpec = &super::REGISTERS[88].fields[1];
    /// `AHBERRM`, bit 2.
    pub const AHBERRM: &FieldSpec = &super::REGISTERS[88].fields[2];
    /// `STALLM`, bit 3.
    pub const STALLM: &FieldSpec = &super::REGISTERS[88].fields[3];
    /// `NAKM`, bit 4.
    pub const NAKM: &FieldSpec = &super::REGISTERS[88].fields[4];
    /// `ACKM`, bit 5.
    pub const ACKM: &FieldSpec = &super::REGISTERS[88].fields[5];
    /// `NYET`, bit 6.
    pub const NYET: &FieldSpec = &super::REGISTERS[88].fields[6];
    /// `TXERRM`, bit 7.
    pub const TXERRM: &FieldSpec = &super::REGISTERS[88].fields[7];
    /// `BBERRM`, bit 8.
    pub const BBERRM: &FieldSpec = &super::REGISTERS[88].fields[8];
    /// `FRMORM`, bit 9.
    pub const FRMORM: &FieldSpec = &super::REGISTERS[88].fields[9];
    /// `DTERRM`, bit 10.
    pub const DTERRM: &FieldSpec = &super::REGISTERS[88].fields[10];
}

/// The fields of `OTG_HS_HCTSIZ13`.
pub mod otg_hs_hctsiz13 {
    use super::FieldSpec;
    /// `XFRSIZ`, bits 0..=18.
    pub const XFRSIZ: &FieldSpec = &super::REGISTERS[89].fields[0];
    /// `PKTCNT`, bits 19..=28.
    pub const PKTCNT: &FieldSpec = &super::REGISTERS[89].fields[1];
    /// `DPID`, bits 29..=30.
    pub const DPID: &FieldSpec = &super::REGISTERS[89].fields[2];
}

/// The fields of `OTG_HS_HCDMA13`.
pub mod otg_hs_hcdma13 {
    use super::FieldSpec;
    /// `DMAADDR`, bits 0..=31.
    pub const DMAADDR: &FieldSpec = &super::REGISTERS[90].fields[0];
}

/// The fields of `OTG_HS_HCCHAR14`.
pub mod otg_hs_hcchar14 {
    use super::FieldSpec;
    /// `MPSIZ`, bits 0..=10.
    pub const MPSIZ: &FieldSpec = &super::REGISTERS[91].fields[0];
    /// `EPNUM`, bits 11..=14.
    pub const EPNUM: &FieldSpec = &super::REGISTERS[91].fields[1];
    /// `EPDIR`, bit 15.
    pub const EPDIR: &FieldSpec = &super::REGISTERS[91].fields[2];
    /// `LSDEV`, bit 17.
    pub const LSDEV: &FieldSpec = &super::REGISTERS[91].fields[3];
    /// `EPTYP`, bits 18..=19.
    pub const EPTYP: &FieldSpec = &super::REGISTERS[91].fields[4];
    /// `MCNT`, bits 20..=21.
    pub const MCNT: &FieldSpec = &super::REGISTERS[91].fields[5];
    /// `DAD`, bits 22..=28.
    pub const DAD: &FieldSpec = &super::REGISTERS[91].fields[6];
    /// `ODDFRM`, bit 29.
    pub const ODDFRM: &FieldSpec = &super::REGISTERS[91].fields[7];
    /// `CHDIS`, bit 30.
    pub const CHDIS: &FieldSpec = &super::REGISTERS[91].fields[8];
    /// `CHENA`, bit 31.
    pub const CHENA: &FieldSpec = &super::REGISTERS[91].fields[9];
}

/// The fields of `OTG_HS_HCSPLT14`.
pub mod otg_hs_hcsplt14 {
    use super::FieldSpec;
    /// `PRTADDR`, bits 0..=6.
    pub const PRTADDR: &FieldSpec = &super::REGISTERS[92].fields[0];
    /// `HUBADDR`, bits 7..=13.
    pub const HUBADDR: &FieldSpec = &super::REGISTERS[92].fields[1];
    /// `XACTPOS`, bits 14..=15.
    pub const XACTPOS: &FieldSpec = &super::REGISTERS[92].fields[2];
    /// `COMPLSPLT`, bit 16.
    pub const COMPLSPLT: &FieldSpec = &super::REGISTERS[92].fields[3];
    /// `SPLITEN`, bit 31.
    pub const SPLITEN: &FieldSpec = &super::REGISTERS[92].fields[4];
}

/// The fields of `OTG_HS_HCINT14`.
pub mod otg_hs_hcint14 {
    use super::FieldSpec;
    /// `XFRC`, bit 0.
    pub const XFRC: &FieldSpec = &super::REGISTERS[93].fields[0];
    /// `CHH`, bit 1.
    pub const CHH: &FieldSpec = &super::REGISTERS[93].fields[1];
    /// `AHBERR`, bit 2.
    pub const AHBERR: &FieldSpec = &super::REGISTERS[93].fields[2];
    /// `STALL`, bit 3.
    pub const STALL: &FieldSpec = &super::REGISTERS[93].fields[3];
    /// `NAK`, bit 4.
    pub const NAK: &FieldSpec = &super::REGISTERS[93].fields[4];
    /// `ACK`, bit 5.
    pub const ACK: &FieldSpec = &super::REGISTERS[93].fields[5];
    /// `NYET`, bit 6.
    pub const NYET: &FieldSpec = &super::REGISTERS[93].fields[6];
    /// `TXERR`, bit 7.
    pub const TXERR: &FieldSpec = &super::REGISTERS[93].fields[7];
    /// `BBERR`, bit 8.
    pub const BBERR: &FieldSpec = &super::REGISTERS[93].fields[8];
    /// `FRMOR`, bit 9.
    pub const FRMOR: &FieldSpec = &super::REGISTERS[93].fields[9];
    /// `DTERR`, bit 10.
    pub const DTERR: &FieldSpec = &super::REGISTERS[93].fields[10];
}

/// The fields of `OTG_HS_HCINTMSK14`.
pub mod otg_hs_hcintmsk14 {
    use super::FieldSpec;
    /// `XFRCM`, bit 0.
    pub const XFRCM: &FieldSpec = &super::REGISTERS[94].fields[0];
    /// `CHHM`, bit 1.
    pub const CHHM: &FieldSpec = &super::REGISTERS[94].fields[1];
    /// `AHBERRM`, bit 2.
    pub const AHBERRM: &FieldSpec = &super::REGISTERS[94].fields[2];
    /// `STALLM`, bit 3.
    pub const STALLM: &FieldSpec = &super::REGISTERS[94].fields[3];
    /// `NAKM`, bit 4.
    pub const NAKM: &FieldSpec = &super::REGISTERS[94].fields[4];
    /// `ACKM`, bit 5.
    pub const ACKM: &FieldSpec = &super::REGISTERS[94].fields[5];
    /// `NYET`, bit 6.
    pub const NYET: &FieldSpec = &super::REGISTERS[94].fields[6];
    /// `TXERRM`, bit 7.
    pub const TXERRM: &FieldSpec = &super::REGISTERS[94].fields[7];
    /// `BBERRM`, bit 8.
    pub const BBERRM: &FieldSpec = &super::REGISTERS[94].fields[8];
    /// `FRMORM`, bit 9.
    pub const FRMORM: &FieldSpec = &super::REGISTERS[94].fields[9];
    /// `DTERRM`, bit 10.
    pub const DTERRM: &FieldSpec = &super::REGISTERS[94].fields[10];
}

/// The fields of `OTG_HS_HCTSIZ14`.
pub mod otg_hs_hctsiz14 {
    use super::FieldSpec;
    /// `XFRSIZ`, bits 0..=18.
    pub const XFRSIZ: &FieldSpec = &super::REGISTERS[95].fields[0];
    /// `PKTCNT`, bits 19..=28.
    pub const PKTCNT: &FieldSpec = &super::REGISTERS[95].fields[1];
    /// `DPID`, bits 29..=30.
    pub const DPID: &FieldSpec = &super::REGISTERS[95].fields[2];
}

/// The fields of `OTG_HS_HCDMA14`.
pub mod otg_hs_hcdma14 {
    use super::FieldSpec;
    /// `DMAADDR`, bits 0..=31.
    pub const DMAADDR: &FieldSpec = &super::REGISTERS[96].fields[0];
}

/// The fields of `OTG_HS_HCCHAR15`.
pub mod otg_hs_hcchar15 {
    use super::FieldSpec;
    /// `MPSIZ`, bits 0..=10.
    pub const MPSIZ: &FieldSpec = &super::REGISTERS[97].fields[0];
    /// `EPNUM`, bits 11..=14.
    pub const EPNUM: &FieldSpec = &super::REGISTERS[97].fields[1];
    /// `EPDIR`, bit 15.
    pub const EPDIR: &FieldSpec = &super::REGISTERS[97].fields[2];
    /// `LSDEV`, bit 17.
    pub const LSDEV: &FieldSpec = &super::REGISTERS[97].fields[3];
    /// `EPTYP`, bits 18..=19.
    pub const EPTYP: &FieldSpec = &super::REGISTERS[97].fields[4];
    /// `MCNT`, bits 20..=21.
    pub const MCNT: &FieldSpec = &super::REGISTERS[97].fields[5];
    /// `DAD`, bits 22..=28.
    pub const DAD: &FieldSpec = &super::REGISTERS[97].fields[6];
    /// `ODDFRM`, bit 29.
    pub const ODDFRM: &FieldSpec = &super::REGISTERS[97].fields[7];
    /// `CHDIS`, bit 30.
    pub const CHDIS: &FieldSpec = &super::REGISTERS[97].fields[8];
    /// `CHENA`, bit 31.
    pub const CHENA: &FieldSpec = &super::REGISTERS[97].fields[9];
}

/// The fields of `OTG_HS_HCSPLT15`.
pub mod otg_hs_hcsplt15 {
    use super::FieldSpec;
    /// `PRTADDR`, bits 0..=6.
    pub const PRTADDR: &FieldSpec = &super::REGISTERS[98].fields[0];
    /// `HUBADDR`, bits 7..=13.
    pub const HUBADDR: &FieldSpec = &super::REGISTERS[98].fields[1];
    /// `XACTPOS`, bits 14..=15.
    pub const XACTPOS: &FieldSpec = &super::REGISTERS[98].fields[2];
    /// `COMPLSPLT`, bit 16.
    pub const COMPLSPLT: &FieldSpec = &super::REGISTERS[98].fields[3];
    /// `SPLITEN`, bit 31.
    pub const SPLITEN: &FieldSpec = &super::REGISTERS[98].fields[4];
}

/// The fields of `OTG_HS_HCINT15`.
pub mod otg_hs_hcint15 {
    use super::FieldSpec;
    /// `XFRC`, bit 0.
    pub const XFRC: &FieldSpec = &super::REGISTERS[99].fields[0];
    /// `CHH`, bit 1.
    pub const CHH: &FieldSpec = &super::REGISTERS[99].fields[1];
    /// `AHBERR`, bit 2.
    pub const AHBERR: &FieldSpec = &super::REGISTERS[99].fields[2];
    /// `STALL`, bit 3.
    pub const STALL: &FieldSpec = &super::REGISTERS[99].fields[3];
    /// `NAK`, bit 4.
    pub const NAK: &FieldSpec = &super::REGISTERS[99].fields[4];
    /// `ACK`, bit 5.
    pub const ACK: &FieldSpec = &super::REGISTERS[99].fields[5];
    /// `NYET`, bit 6.
    pub const NYET: &FieldSpec = &super::REGISTERS[99].fields[6];
    /// `TXERR`, bit 7.
    pub const TXERR: &FieldSpec = &super::REGISTERS[99].fields[7];
    /// `BBERR`, bit 8.
    pub const BBERR: &FieldSpec = &super::REGISTERS[99].fields[8];
    /// `FRMOR`, bit 9.
    pub const FRMOR: &FieldSpec = &super::REGISTERS[99].fields[9];
    /// `DTERR`, bit 10.
    pub const DTERR: &FieldSpec = &super::REGISTERS[99].fields[10];
}

/// The fields of `OTG_HS_HCINTMSK15`.
pub mod otg_hs_hcintmsk15 {
    use super::FieldSpec;
    /// `XFRCM`, bit 0.
    pub const XFRCM: &FieldSpec = &super::REGISTERS[100].fields[0];
    /// `CHHM`, bit 1.
    pub const CHHM: &FieldSpec = &super::REGISTERS[100].fields[1];
    /// `AHBERRM`, bit 2.
    pub const AHBERRM: &FieldSpec = &super::REGISTERS[100].fields[2];
    /// `STALLM`, bit 3.
    pub const STALLM: &FieldSpec = &super::REGISTERS[100].fields[3];
    /// `NAKM`, bit 4.
    pub const NAKM: &FieldSpec = &super::REGISTERS[100].fields[4];
    /// `ACKM`, bit 5.
    pub const ACKM: &FieldSpec = &super::REGISTERS[100].fields[5];
    /// `NYET`, bit 6.
    pub const NYET: &FieldSpec = &super::REGISTERS[100].fields[6];
    /// `TXERRM`, bit 7.
    pub const TXERRM: &FieldSpec = &super::REGISTERS[100].fields[7];
    /// `BBERRM`, bit 8.
    pub const BBERRM: &FieldSpec = &super::REGISTERS[100].fields[8];
    /// `FRMORM`, bit 9.
    pub const FRMORM: &FieldSpec = &super::REGISTERS[100].fields[9];
    /// `DTERRM`, bit 10.
    pub const DTERRM: &FieldSpec = &super::REGISTERS[100].fields[10];
}

/// The fields of `OTG_HS_HCTSIZ15`.
pub mod otg_hs_hctsiz15 {
    use super::FieldSpec;
    /// `XFRSIZ`, bits 0..=18.
    pub const XFRSIZ: &FieldSpec = &super::REGISTERS[101].fields[0];
    /// `PKTCNT`, bits 19..=28.
    pub const PKTCNT: &FieldSpec = &super::REGISTERS[101].fields[1];
    /// `DPID`, bits 29..=30.
    pub const DPID: &FieldSpec = &super::REGISTERS[101].fields[2];
}

/// The fields of `OTG_HS_HCDMA15`.
pub mod otg_hs_hcdma15 {
    use super::FieldSpec;
    /// `DMAADDR`, bits 0..=31.
    pub const DMAADDR: &FieldSpec = &super::REGISTERS[102].fields[0];
}

/// The register table.
pub static REGISTERS: [RegisterSpec; 103] = [
    RegisterSpec { name: "OTG_HS_HCFG", offset: 0x0, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "FSLSPCS", bit: 0, width: 2, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "FSLSS", bit: 2, width: 1, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "OTG_HS_HFIR", offset: 0x4, width: Width::W32, reset: 0x0000_EA60, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "FRIVL", bit: 0, width: 16, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "RLDCTRL", bit: 16, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "OTG_HS_HFNUM", offset: 0x8, width: Width::W32, reset: 0x0000_3FFF, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "FRNUM", bit: 0, width: 16, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "FTREM", bit: 16, width: 16, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "OTG_HS_HPTXSTS", offset: 0x10, width: Width::W32, reset: 0x0008_0100, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "PTXFSAVL", bit: 0, width: 16, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "PTXQSAV", bit: 16, width: 8, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "PTXQTOP", bit: 24, width: 8, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "OTG_HS_HAINT", offset: 0x14, width: Width::W32, reset: 0x0000_0000, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "HAINT", bit: 0, width: 16, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "OTG_HS_HAINTMSK", offset: 0x18, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "HAINTM", bit: 0, width: 16, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "OTG_HS_HPRT", offset: 0x40, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "PCSTS", bit: 0, width: 1, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "PCDET", bit: 1, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "PENA", bit: 2, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "PENCHNG", bit: 3, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "POCA", bit: 4, width: 1, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "POCCHNG", bit: 5, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "PRES", bit: 6, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "PSUSP", bit: 7, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "PRST", bit: 8, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "PLSTS", bit: 10, width: 2, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "PPWR", bit: 12, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "PTCTL", bit: 13, width: 4, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "PSPD", bit: 17, width: 2, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "OTG_HS_HCCHAR0", offset: 0x100, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "MPSIZ", bit: 0, width: 11, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "EPNUM", bit: 11, width: 4, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "EPDIR", bit: 15, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "LSDEV", bit: 17, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "EPTYP", bit: 18, width: 2, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "MCNT", bit: 20, width: 2, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "DAD", bit: 22, width: 7, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "ODDFRM", bit: 29, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "CHDIS", bit: 30, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "CHENA", bit: 31, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "OTG_HS_HCSPLT0", offset: 0x104, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "PRTADDR", bit: 0, width: 7, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "HUBADDR", bit: 7, width: 7, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "XACTPOS", bit: 14, width: 2, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "COMPLSPLT", bit: 16, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "SPLITEN", bit: 31, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "OTG_HS_HCINT0", offset: 0x108, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "XFRC", bit: 0, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "CHH", bit: 1, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "STALL", bit: 3, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "NAK", bit: 4, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "ACK", bit: 5, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "TXERR", bit: 7, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "BBERR", bit: 8, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "FRMOR", bit: 9, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "DTERR", bit: 10, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "OTG_HS_HCINTMSK0", offset: 0x10C, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "XFRCM", bit: 0, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "CHHM", bit: 1, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "AHBERRM", bit: 2, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "STALLM", bit: 3, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "NAKM", bit: 4, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "ACKM", bit: 5, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "NYET", bit: 6, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "TXERRM", bit: 7, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "BBERRM", bit: 8, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "FRMORM", bit: 9, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "DTERRM", bit: 10, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "OTG_HS_HCTSIZ0", offset: 0x110, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "XFRSIZ", bit: 0, width: 19, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "PKTCNT", bit: 19, width: 10, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "DPID", bit: 29, width: 2, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "OTG_HS_HCDMA0", offset: 0x114, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "DMAADDR", bit: 0, width: 32, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "OTG_HS_HCCHAR1", offset: 0x120, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "MPSIZ", bit: 0, width: 11, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "EPNUM", bit: 11, width: 4, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "EPDIR", bit: 15, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "LSDEV", bit: 17, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "EPTYP", bit: 18, width: 2, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "MCNT", bit: 20, width: 2, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "DAD", bit: 22, width: 7, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "ODDFRM", bit: 29, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "CHDIS", bit: 30, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "CHENA", bit: 31, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "OTG_HS_HCSPLT1", offset: 0x124, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "PRTADDR", bit: 0, width: 7, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "HUBADDR", bit: 7, width: 7, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "XACTPOS", bit: 14, width: 2, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "COMPLSPLT", bit: 16, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "SPLITEN", bit: 31, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "OTG_HS_HCINT1", offset: 0x128, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "XFRC", bit: 0, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "CHH", bit: 1, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "AHBERR", bit: 2, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "STALL", bit: 3, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "NAK", bit: 4, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "ACK", bit: 5, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "NYET", bit: 6, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "TXERR", bit: 7, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "BBERR", bit: 8, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "FRMOR", bit: 9, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "DTERR", bit: 10, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "OTG_HS_HCINTMSK1", offset: 0x12C, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "XFRCM", bit: 0, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "CHHM", bit: 1, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "AHBERRM", bit: 2, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "STALLM", bit: 3, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "NAKM", bit: 4, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "ACKM", bit: 5, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "NYET", bit: 6, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "TXERRM", bit: 7, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "BBERRM", bit: 8, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "FRMORM", bit: 9, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "DTERRM", bit: 10, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "OTG_HS_HCTSIZ1", offset: 0x130, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "XFRSIZ", bit: 0, width: 19, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "PKTCNT", bit: 19, width: 10, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "DPID", bit: 29, width: 2, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "OTG_HS_HCDMA1", offset: 0x134, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "DMAADDR", bit: 0, width: 32, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "OTG_HS_HCCHAR2", offset: 0x140, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "MPSIZ", bit: 0, width: 11, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "EPNUM", bit: 11, width: 4, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "EPDIR", bit: 15, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "LSDEV", bit: 17, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "EPTYP", bit: 18, width: 2, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "MCNT", bit: 20, width: 2, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "DAD", bit: 22, width: 7, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "ODDFRM", bit: 29, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "CHDIS", bit: 30, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "CHENA", bit: 31, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "OTG_HS_HCSPLT2", offset: 0x144, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "PRTADDR", bit: 0, width: 7, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "HUBADDR", bit: 7, width: 7, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "XACTPOS", bit: 14, width: 2, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "COMPLSPLT", bit: 16, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "SPLITEN", bit: 31, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "OTG_HS_HCINT2", offset: 0x148, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "XFRC", bit: 0, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "CHH", bit: 1, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "AHBERR", bit: 2, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "STALL", bit: 3, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "NAK", bit: 4, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "ACK", bit: 5, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "NYET", bit: 6, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "TXERR", bit: 7, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "BBERR", bit: 8, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "FRMOR", bit: 9, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "DTERR", bit: 10, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "OTG_HS_HCINTMSK2", offset: 0x14C, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "XFRCM", bit: 0, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "CHHM", bit: 1, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "AHBERRM", bit: 2, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "STALLM", bit: 3, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "NAKM", bit: 4, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "ACKM", bit: 5, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "NYET", bit: 6, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "TXERRM", bit: 7, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "BBERRM", bit: 8, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "FRMORM", bit: 9, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "DTERRM", bit: 10, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "OTG_HS_HCTSIZ2", offset: 0x150, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "XFRSIZ", bit: 0, width: 19, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "PKTCNT", bit: 19, width: 10, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "DPID", bit: 29, width: 2, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "OTG_HS_HCDMA2", offset: 0x154, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "DMAADDR", bit: 0, width: 32, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "OTG_HS_HCCHAR3", offset: 0x160, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "MPSIZ", bit: 0, width: 11, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "EPNUM", bit: 11, width: 4, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "EPDIR", bit: 15, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "LSDEV", bit: 17, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "EPTYP", bit: 18, width: 2, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "MCNT", bit: 20, width: 2, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "DAD", bit: 22, width: 7, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "ODDFRM", bit: 29, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "CHDIS", bit: 30, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "CHENA", bit: 31, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "OTG_HS_HCSPLT3", offset: 0x164, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "PRTADDR", bit: 0, width: 7, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "HUBADDR", bit: 7, width: 7, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "XACTPOS", bit: 14, width: 2, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "COMPLSPLT", bit: 16, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "SPLITEN", bit: 31, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "OTG_HS_HCINT3", offset: 0x168, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "XFRC", bit: 0, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "CHH", bit: 1, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "AHBERR", bit: 2, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "STALL", bit: 3, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "NAK", bit: 4, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "ACK", bit: 5, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "NYET", bit: 6, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "TXERR", bit: 7, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "BBERR", bit: 8, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "FRMOR", bit: 9, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "DTERR", bit: 10, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "OTG_HS_HCINTMSK3", offset: 0x16C, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "XFRCM", bit: 0, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "CHHM", bit: 1, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "AHBERRM", bit: 2, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "STALLM", bit: 3, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "NAKM", bit: 4, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "ACKM", bit: 5, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "NYET", bit: 6, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "TXERRM", bit: 7, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "BBERRM", bit: 8, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "FRMORM", bit: 9, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "DTERRM", bit: 10, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "OTG_HS_HCTSIZ3", offset: 0x170, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "XFRSIZ", bit: 0, width: 19, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "PKTCNT", bit: 19, width: 10, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "DPID", bit: 29, width: 2, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "OTG_HS_HCDMA3", offset: 0x174, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "DMAADDR", bit: 0, width: 32, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "OTG_HS_HCCHAR4", offset: 0x180, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "MPSIZ", bit: 0, width: 11, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "EPNUM", bit: 11, width: 4, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "EPDIR", bit: 15, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "LSDEV", bit: 17, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "EPTYP", bit: 18, width: 2, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "MCNT", bit: 20, width: 2, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "DAD", bit: 22, width: 7, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "ODDFRM", bit: 29, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "CHDIS", bit: 30, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "CHENA", bit: 31, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "OTG_HS_HCSPLT4", offset: 0x184, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "PRTADDR", bit: 0, width: 7, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "HUBADDR", bit: 7, width: 7, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "XACTPOS", bit: 14, width: 2, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "COMPLSPLT", bit: 16, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "SPLITEN", bit: 31, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "OTG_HS_HCINT4", offset: 0x188, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "XFRC", bit: 0, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "CHH", bit: 1, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "AHBERR", bit: 2, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "STALL", bit: 3, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "NAK", bit: 4, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "ACK", bit: 5, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "NYET", bit: 6, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "TXERR", bit: 7, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "BBERR", bit: 8, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "FRMOR", bit: 9, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "DTERR", bit: 10, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "OTG_HS_HCINTMSK4", offset: 0x18C, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "XFRCM", bit: 0, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "CHHM", bit: 1, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "AHBERRM", bit: 2, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "STALLM", bit: 3, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "NAKM", bit: 4, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "ACKM", bit: 5, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "NYET", bit: 6, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "TXERRM", bit: 7, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "BBERRM", bit: 8, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "FRMORM", bit: 9, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "DTERRM", bit: 10, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "OTG_HS_HCTSIZ4", offset: 0x190, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "XFRSIZ", bit: 0, width: 19, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "PKTCNT", bit: 19, width: 10, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "DPID", bit: 29, width: 2, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "OTG_HS_HCDMA4", offset: 0x194, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "DMAADDR", bit: 0, width: 32, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "OTG_HS_HCCHAR5", offset: 0x1A0, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "MPSIZ", bit: 0, width: 11, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "EPNUM", bit: 11, width: 4, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "EPDIR", bit: 15, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "LSDEV", bit: 17, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "EPTYP", bit: 18, width: 2, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "MCNT", bit: 20, width: 2, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "DAD", bit: 22, width: 7, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "ODDFRM", bit: 29, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "CHDIS", bit: 30, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "CHENA", bit: 31, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "OTG_HS_HCSPLT5", offset: 0x1A4, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "PRTADDR", bit: 0, width: 7, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "HUBADDR", bit: 7, width: 7, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "XACTPOS", bit: 14, width: 2, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "COMPLSPLT", bit: 16, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "SPLITEN", bit: 31, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "OTG_HS_HCINT5", offset: 0x1A8, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "XFRC", bit: 0, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "CHH", bit: 1, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "AHBERR", bit: 2, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "STALL", bit: 3, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "NAK", bit: 4, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "ACK", bit: 5, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "NYET", bit: 6, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "TXERR", bit: 7, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "BBERR", bit: 8, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "FRMOR", bit: 9, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "DTERR", bit: 10, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "OTG_HS_HCINTMSK5", offset: 0x1AC, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "XFRCM", bit: 0, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "CHHM", bit: 1, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "AHBERRM", bit: 2, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "STALLM", bit: 3, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "NAKM", bit: 4, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "ACKM", bit: 5, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "NYET", bit: 6, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "TXERRM", bit: 7, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "BBERRM", bit: 8, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "FRMORM", bit: 9, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "DTERRM", bit: 10, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "OTG_HS_HCTSIZ5", offset: 0x1B0, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "XFRSIZ", bit: 0, width: 19, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "PKTCNT", bit: 19, width: 10, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "DPID", bit: 29, width: 2, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "OTG_HS_HCDMA5", offset: 0x1B4, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "DMAADDR", bit: 0, width: 32, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "OTG_HS_HCCHAR6", offset: 0x1C0, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "MPSIZ", bit: 0, width: 11, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "EPNUM", bit: 11, width: 4, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "EPDIR", bit: 15, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "LSDEV", bit: 17, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "EPTYP", bit: 18, width: 2, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "MCNT", bit: 20, width: 2, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "DAD", bit: 22, width: 7, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "ODDFRM", bit: 29, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "CHDIS", bit: 30, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "CHENA", bit: 31, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "OTG_HS_HCSPLT6", offset: 0x1C4, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "PRTADDR", bit: 0, width: 7, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "HUBADDR", bit: 7, width: 7, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "XACTPOS", bit: 14, width: 2, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "COMPLSPLT", bit: 16, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "SPLITEN", bit: 31, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "OTG_HS_HCINT6", offset: 0x1C8, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "XFRC", bit: 0, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "CHH", bit: 1, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "AHBERR", bit: 2, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "STALL", bit: 3, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "NAK", bit: 4, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "ACK", bit: 5, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "NYET", bit: 6, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "TXERR", bit: 7, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "BBERR", bit: 8, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "FRMOR", bit: 9, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "DTERR", bit: 10, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "OTG_HS_HCINTMSK6", offset: 0x1CC, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "XFRCM", bit: 0, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "CHHM", bit: 1, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "AHBERRM", bit: 2, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "STALLM", bit: 3, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "NAKM", bit: 4, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "ACKM", bit: 5, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "NYET", bit: 6, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "TXERRM", bit: 7, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "BBERRM", bit: 8, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "FRMORM", bit: 9, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "DTERRM", bit: 10, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "OTG_HS_HCTSIZ6", offset: 0x1D0, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "XFRSIZ", bit: 0, width: 19, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "PKTCNT", bit: 19, width: 10, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "DPID", bit: 29, width: 2, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "OTG_HS_HCDMA6", offset: 0x1D4, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "DMAADDR", bit: 0, width: 32, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "OTG_HS_HCCHAR7", offset: 0x1E0, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "MPSIZ", bit: 0, width: 11, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "EPNUM", bit: 11, width: 4, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "EPDIR", bit: 15, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "LSDEV", bit: 17, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "EPTYP", bit: 18, width: 2, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "MCNT", bit: 20, width: 2, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "DAD", bit: 22, width: 7, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "ODDFRM", bit: 29, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "CHDIS", bit: 30, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "CHENA", bit: 31, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "OTG_HS_HCSPLT7", offset: 0x1E4, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "PRTADDR", bit: 0, width: 7, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "HUBADDR", bit: 7, width: 7, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "XACTPOS", bit: 14, width: 2, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "COMPLSPLT", bit: 16, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "SPLITEN", bit: 31, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "OTG_HS_HCINT7", offset: 0x1E8, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "XFRC", bit: 0, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "CHH", bit: 1, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "AHBERR", bit: 2, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "STALL", bit: 3, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "NAK", bit: 4, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "ACK", bit: 5, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "NYET", bit: 6, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "TXERR", bit: 7, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "BBERR", bit: 8, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "FRMOR", bit: 9, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "DTERR", bit: 10, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "OTG_HS_HCINTMSK7", offset: 0x1EC, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "XFRCM", bit: 0, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "CHHM", bit: 1, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "AHBERRM", bit: 2, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "STALLM", bit: 3, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "NAKM", bit: 4, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "ACKM", bit: 5, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "NYET", bit: 6, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "TXERRM", bit: 7, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "BBERRM", bit: 8, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "FRMORM", bit: 9, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "DTERRM", bit: 10, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "OTG_HS_HCTSIZ7", offset: 0x1F0, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "XFRSIZ", bit: 0, width: 19, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "PKTCNT", bit: 19, width: 10, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "DPID", bit: 29, width: 2, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "OTG_HS_HCDMA7", offset: 0x1F4, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "DMAADDR", bit: 0, width: 32, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "OTG_HS_HCCHAR8", offset: 0x200, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "MPSIZ", bit: 0, width: 11, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "EPNUM", bit: 11, width: 4, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "EPDIR", bit: 15, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "LSDEV", bit: 17, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "EPTYP", bit: 18, width: 2, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "MCNT", bit: 20, width: 2, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "DAD", bit: 22, width: 7, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "ODDFRM", bit: 29, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "CHDIS", bit: 30, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "CHENA", bit: 31, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "OTG_HS_HCSPLT8", offset: 0x204, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "PRTADDR", bit: 0, width: 7, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "HUBADDR", bit: 7, width: 7, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "XACTPOS", bit: 14, width: 2, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "COMPLSPLT", bit: 16, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "SPLITEN", bit: 31, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "OTG_HS_HCINT8", offset: 0x208, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "XFRC", bit: 0, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "CHH", bit: 1, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "AHBERR", bit: 2, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "STALL", bit: 3, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "NAK", bit: 4, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "ACK", bit: 5, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "NYET", bit: 6, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "TXERR", bit: 7, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "BBERR", bit: 8, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "FRMOR", bit: 9, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "DTERR", bit: 10, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "OTG_HS_HCINTMSK8", offset: 0x20C, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "XFRCM", bit: 0, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "CHHM", bit: 1, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "AHBERRM", bit: 2, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "STALLM", bit: 3, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "NAKM", bit: 4, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "ACKM", bit: 5, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "NYET", bit: 6, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "TXERRM", bit: 7, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "BBERRM", bit: 8, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "FRMORM", bit: 9, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "DTERRM", bit: 10, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "OTG_HS_HCTSIZ8", offset: 0x210, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "XFRSIZ", bit: 0, width: 19, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "PKTCNT", bit: 19, width: 10, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "DPID", bit: 29, width: 2, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "OTG_HS_HCDMA8", offset: 0x214, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "DMAADDR", bit: 0, width: 32, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "OTG_HS_HCCHAR9", offset: 0x220, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "MPSIZ", bit: 0, width: 11, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "EPNUM", bit: 11, width: 4, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "EPDIR", bit: 15, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "LSDEV", bit: 17, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "EPTYP", bit: 18, width: 2, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "MCNT", bit: 20, width: 2, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "DAD", bit: 22, width: 7, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "ODDFRM", bit: 29, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "CHDIS", bit: 30, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "CHENA", bit: 31, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "OTG_HS_HCSPLT9", offset: 0x224, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "PRTADDR", bit: 0, width: 7, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "HUBADDR", bit: 7, width: 7, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "XACTPOS", bit: 14, width: 2, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "COMPLSPLT", bit: 16, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "SPLITEN", bit: 31, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "OTG_HS_HCINT9", offset: 0x228, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "XFRC", bit: 0, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "CHH", bit: 1, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "AHBERR", bit: 2, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "STALL", bit: 3, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "NAK", bit: 4, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "ACK", bit: 5, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "NYET", bit: 6, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "TXERR", bit: 7, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "BBERR", bit: 8, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "FRMOR", bit: 9, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "DTERR", bit: 10, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "OTG_HS_HCINTMSK9", offset: 0x22C, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "XFRCM", bit: 0, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "CHHM", bit: 1, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "AHBERRM", bit: 2, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "STALLM", bit: 3, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "NAKM", bit: 4, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "ACKM", bit: 5, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "NYET", bit: 6, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "TXERRM", bit: 7, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "BBERRM", bit: 8, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "FRMORM", bit: 9, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "DTERRM", bit: 10, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "OTG_HS_HCTSIZ9", offset: 0x230, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "XFRSIZ", bit: 0, width: 19, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "PKTCNT", bit: 19, width: 10, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "DPID", bit: 29, width: 2, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "OTG_HS_HCDMA9", offset: 0x234, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "DMAADDR", bit: 0, width: 32, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "OTG_HS_HCCHAR10", offset: 0x240, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "MPSIZ", bit: 0, width: 11, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "EPNUM", bit: 11, width: 4, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "EPDIR", bit: 15, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "LSDEV", bit: 17, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "EPTYP", bit: 18, width: 2, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "MCNT", bit: 20, width: 2, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "DAD", bit: 22, width: 7, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "ODDFRM", bit: 29, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "CHDIS", bit: 30, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "CHENA", bit: 31, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "OTG_HS_HCSPLT10", offset: 0x244, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "PRTADDR", bit: 0, width: 7, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "HUBADDR", bit: 7, width: 7, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "XACTPOS", bit: 14, width: 2, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "COMPLSPLT", bit: 16, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "SPLITEN", bit: 31, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "OTG_HS_HCINT10", offset: 0x248, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "XFRC", bit: 0, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "CHH", bit: 1, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "AHBERR", bit: 2, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "STALL", bit: 3, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "NAK", bit: 4, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "ACK", bit: 5, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "NYET", bit: 6, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "TXERR", bit: 7, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "BBERR", bit: 8, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "FRMOR", bit: 9, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "DTERR", bit: 10, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "OTG_HS_HCINTMSK10", offset: 0x24C, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "XFRCM", bit: 0, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "CHHM", bit: 1, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "AHBERRM", bit: 2, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "STALLM", bit: 3, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "NAKM", bit: 4, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "ACKM", bit: 5, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "NYET", bit: 6, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "TXERRM", bit: 7, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "BBERRM", bit: 8, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "FRMORM", bit: 9, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "DTERRM", bit: 10, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "OTG_HS_HCTSIZ10", offset: 0x250, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "XFRSIZ", bit: 0, width: 19, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "PKTCNT", bit: 19, width: 10, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "DPID", bit: 29, width: 2, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "OTG_HS_HCDMA10", offset: 0x254, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "DMAADDR", bit: 0, width: 32, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "OTG_HS_HCCHAR11", offset: 0x260, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "MPSIZ", bit: 0, width: 11, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "EPNUM", bit: 11, width: 4, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "EPDIR", bit: 15, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "LSDEV", bit: 17, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "EPTYP", bit: 18, width: 2, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "MCNT", bit: 20, width: 2, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "DAD", bit: 22, width: 7, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "ODDFRM", bit: 29, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "CHDIS", bit: 30, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "CHENA", bit: 31, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "OTG_HS_HCSPLT11", offset: 0x264, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "PRTADDR", bit: 0, width: 7, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "HUBADDR", bit: 7, width: 7, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "XACTPOS", bit: 14, width: 2, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "COMPLSPLT", bit: 16, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "SPLITEN", bit: 31, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "OTG_HS_HCINT11", offset: 0x268, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "XFRC", bit: 0, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "CHH", bit: 1, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "AHBERR", bit: 2, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "STALL", bit: 3, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "NAK", bit: 4, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "ACK", bit: 5, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "NYET", bit: 6, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "TXERR", bit: 7, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "BBERR", bit: 8, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "FRMOR", bit: 9, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "DTERR", bit: 10, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "OTG_HS_HCINTMSK11", offset: 0x26C, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "XFRCM", bit: 0, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "CHHM", bit: 1, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "AHBERRM", bit: 2, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "STALLM", bit: 3, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "NAKM", bit: 4, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "ACKM", bit: 5, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "NYET", bit: 6, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "TXERRM", bit: 7, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "BBERRM", bit: 8, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "FRMORM", bit: 9, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "DTERRM", bit: 10, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "OTG_HS_HCTSIZ11", offset: 0x270, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "XFRSIZ", bit: 0, width: 19, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "PKTCNT", bit: 19, width: 10, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "DPID", bit: 29, width: 2, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "OTG_HS_HCDMA11", offset: 0x274, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "DMAADDR", bit: 0, width: 32, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "OTG_HS_HCCHAR12", offset: 0x280, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "MPSIZ", bit: 0, width: 11, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "EPNUM", bit: 11, width: 4, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "EPDIR", bit: 15, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "LSDEV", bit: 17, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "EPTYP", bit: 18, width: 2, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "MCNT", bit: 20, width: 2, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "DAD", bit: 22, width: 7, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "ODDFRM", bit: 29, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "CHDIS", bit: 30, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "CHENA", bit: 31, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "OTG_HS_HCSPLT12", offset: 0x284, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "PRTADDR", bit: 0, width: 7, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "HUBADDR", bit: 7, width: 7, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "XACTPOS", bit: 14, width: 2, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "COMPLSPLT", bit: 16, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "SPLITEN", bit: 31, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "OTG_HS_HCINT12", offset: 0x288, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "XFRC", bit: 0, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "CHH", bit: 1, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "AHBERR", bit: 2, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "STALL", bit: 3, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "NAK", bit: 4, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "ACK", bit: 5, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "NYET", bit: 6, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "TXERR", bit: 7, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "BBERR", bit: 8, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "FRMOR", bit: 9, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "DTERR", bit: 10, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "OTG_HS_HCINTMSK12", offset: 0x28C, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "XFRCM", bit: 0, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "CHHM", bit: 1, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "AHBERRM", bit: 2, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "STALLM", bit: 3, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "NAKM", bit: 4, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "ACKM", bit: 5, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "NYET", bit: 6, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "TXERRM", bit: 7, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "BBERRM", bit: 8, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "FRMORM", bit: 9, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "DTERRM", bit: 10, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "OTG_HS_HCTSIZ12", offset: 0x290, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "XFRSIZ", bit: 0, width: 19, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "PKTCNT", bit: 19, width: 10, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "DPID", bit: 29, width: 2, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "OTG_HS_HCDMA12", offset: 0x294, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "DMAADDR", bit: 0, width: 32, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "OTG_HS_HCCHAR13", offset: 0x2A0, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "MPSIZ", bit: 0, width: 11, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "EPNUM", bit: 11, width: 4, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "EPDIR", bit: 15, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "LSDEV", bit: 17, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "EPTYP", bit: 18, width: 2, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "MCNT", bit: 20, width: 2, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "DAD", bit: 22, width: 7, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "ODDFRM", bit: 29, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "CHDIS", bit: 30, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "CHENA", bit: 31, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "OTG_HS_HCSPLT13", offset: 0x2A4, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "PRTADDR", bit: 0, width: 7, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "HUBADDR", bit: 7, width: 7, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "XACTPOS", bit: 14, width: 2, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "COMPLSPLT", bit: 16, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "SPLITEN", bit: 31, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "OTG_HS_HCINT13", offset: 0x2A8, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "XFRC", bit: 0, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "CHH", bit: 1, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "AHBERR", bit: 2, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "STALL", bit: 3, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "NAK", bit: 4, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "ACK", bit: 5, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "NYET", bit: 6, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "TXERR", bit: 7, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "BBERR", bit: 8, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "FRMOR", bit: 9, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "DTERR", bit: 10, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "OTG_HS_HCINTMSK13", offset: 0x2AC, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "XFRCM", bit: 0, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "CHHM", bit: 1, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "AHBERRM", bit: 2, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "STALLM", bit: 3, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "NAKM", bit: 4, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "ACKM", bit: 5, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "NYET", bit: 6, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "TXERRM", bit: 7, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "BBERRM", bit: 8, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "FRMORM", bit: 9, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "DTERRM", bit: 10, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "OTG_HS_HCTSIZ13", offset: 0x2B0, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "XFRSIZ", bit: 0, width: 19, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "PKTCNT", bit: 19, width: 10, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "DPID", bit: 29, width: 2, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "OTG_HS_HCDMA13", offset: 0x2B4, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "DMAADDR", bit: 0, width: 32, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "OTG_HS_HCCHAR14", offset: 0x2C0, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "MPSIZ", bit: 0, width: 11, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "EPNUM", bit: 11, width: 4, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "EPDIR", bit: 15, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "LSDEV", bit: 17, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "EPTYP", bit: 18, width: 2, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "MCNT", bit: 20, width: 2, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "DAD", bit: 22, width: 7, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "ODDFRM", bit: 29, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "CHDIS", bit: 30, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "CHENA", bit: 31, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "OTG_HS_HCSPLT14", offset: 0x2C4, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "PRTADDR", bit: 0, width: 7, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "HUBADDR", bit: 7, width: 7, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "XACTPOS", bit: 14, width: 2, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "COMPLSPLT", bit: 16, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "SPLITEN", bit: 31, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "OTG_HS_HCINT14", offset: 0x2C8, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "XFRC", bit: 0, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "CHH", bit: 1, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "AHBERR", bit: 2, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "STALL", bit: 3, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "NAK", bit: 4, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "ACK", bit: 5, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "NYET", bit: 6, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "TXERR", bit: 7, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "BBERR", bit: 8, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "FRMOR", bit: 9, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "DTERR", bit: 10, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "OTG_HS_HCINTMSK14", offset: 0x2CC, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "XFRCM", bit: 0, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "CHHM", bit: 1, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "AHBERRM", bit: 2, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "STALLM", bit: 3, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "NAKM", bit: 4, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "ACKM", bit: 5, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "NYET", bit: 6, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "TXERRM", bit: 7, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "BBERRM", bit: 8, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "FRMORM", bit: 9, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "DTERRM", bit: 10, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "OTG_HS_HCTSIZ14", offset: 0x2D0, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "XFRSIZ", bit: 0, width: 19, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "PKTCNT", bit: 19, width: 10, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "DPID", bit: 29, width: 2, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "OTG_HS_HCDMA14", offset: 0x2D4, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "DMAADDR", bit: 0, width: 32, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "OTG_HS_HCCHAR15", offset: 0x2E0, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "MPSIZ", bit: 0, width: 11, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "EPNUM", bit: 11, width: 4, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "EPDIR", bit: 15, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "LSDEV", bit: 17, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "EPTYP", bit: 18, width: 2, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "MCNT", bit: 20, width: 2, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "DAD", bit: 22, width: 7, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "ODDFRM", bit: 29, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "CHDIS", bit: 30, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "CHENA", bit: 31, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "OTG_HS_HCSPLT15", offset: 0x2E4, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "PRTADDR", bit: 0, width: 7, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "HUBADDR", bit: 7, width: 7, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "XACTPOS", bit: 14, width: 2, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "COMPLSPLT", bit: 16, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "SPLITEN", bit: 31, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "OTG_HS_HCINT15", offset: 0x2E8, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "XFRC", bit: 0, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "CHH", bit: 1, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "AHBERR", bit: 2, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "STALL", bit: 3, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "NAK", bit: 4, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "ACK", bit: 5, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "NYET", bit: 6, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "TXERR", bit: 7, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "BBERR", bit: 8, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "FRMOR", bit: 9, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "DTERR", bit: 10, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "OTG_HS_HCINTMSK15", offset: 0x2EC, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "XFRCM", bit: 0, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "CHHM", bit: 1, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "AHBERRM", bit: 2, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "STALLM", bit: 3, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "NAKM", bit: 4, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "ACKM", bit: 5, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "NYET", bit: 6, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "TXERRM", bit: 7, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "BBERRM", bit: 8, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "FRMORM", bit: 9, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "DTERRM", bit: 10, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "OTG_HS_HCTSIZ15", offset: 0x2F0, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "XFRSIZ", bit: 0, width: 19, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "PKTCNT", bit: 19, width: 10, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "DPID", bit: 29, width: 2, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "OTG_HS_HCDMA15", offset: 0x2F4, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "DMAADDR", bit: 0, width: 32, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
];