// rigless svd from STM32F427.svd, sha256 5eb6bfd30833147f0cb93b74235b602f835fddd78d3795f67a5873804e80d414. Do not edit.
// Copyright (c) 2024 STMicroelectronics.
// SPDX-License-Identifier: Apache-2.0
//! Registers of `OTG_FS_HOST` and the instances derived from it.
use rigless::soc::{Access, FieldSpec, Layout, ReadAction, RegisterSpec, Width, WriteModify};
/// The registers by name, where a variant's index is its row in [`REGISTERS`].
#[derive(Debug, Clone, Copy, PartialEq, Eq)]
pub enum Register {
/// `FS_HCFG` at offset `0x0`, resets to `0x0000_0000`, read-write.
FsHcfg = 0,
/// `HFIR` at offset `0x4`, resets to `0x0000_EA60`, read-write.
Hfir = 1,
/// `FS_HFNUM` at offset `0x8`, resets to `0x0000_3FFF`, read-only.
FsHfnum = 2,
/// `FS_HPTXSTS` at offset `0x10`, resets to `0x0008_0100`, read-write.
FsHptxsts = 3,
/// `HAINT` at offset `0x14`, resets to `0x0000_0000`, read-only.
Haint = 4,
/// `HAINTMSK` at offset `0x18`, resets to `0x0000_0000`, read-write.
Haintmsk = 5,
/// `FS_HPRT` at offset `0x40`, resets to `0x0000_0000`, read-write.
FsHprt = 6,
/// `FS_HCCHAR0` at offset `0x100`, resets to `0x0000_0000`, read-write.
FsHcchar0 = 7,
/// `FS_HCINT0` at offset `0x108`, resets to `0x0000_0000`, read-write.
FsHcint0 = 8,
/// `FS_HCINTMSK0` at offset `0x10C`, resets to `0x0000_0000`, read-write.
FsHcintmsk0 = 9,
/// `FS_HCTSIZ0` at offset `0x110`, resets to `0x0000_0000`, read-write.
FsHctsiz0 = 10,
/// `FS_HCCHAR1` at offset `0x120`, resets to `0x0000_0000`, read-write.
FsHcchar1 = 11,
/// `FS_HCINT1` at offset `0x128`, resets to `0x0000_0000`, read-write.
FsHcint1 = 12,
/// `FS_HCINTMSK1` at offset `0x12C`, resets to `0x0000_0000`, read-write.
FsHcintmsk1 = 13,
/// `FS_HCTSIZ1` at offset `0x130`, resets to `0x0000_0000`, read-write.
FsHctsiz1 = 14,
/// `FS_HCCHAR2` at offset `0x140`, resets to `0x0000_0000`, read-write.
FsHcchar2 = 15,
/// `FS_HCINT2` at offset `0x148`, resets to `0x0000_0000`, read-write.
FsHcint2 = 16,
/// `FS_HCINTMSK2` at offset `0x14C`, resets to `0x0000_0000`, read-write.
FsHcintmsk2 = 17,
/// `FS_HCTSIZ2` at offset `0x150`, resets to `0x0000_0000`, read-write.
FsHctsiz2 = 18,
/// `FS_HCCHAR3` at offset `0x160`, resets to `0x0000_0000`, read-write.
FsHcchar3 = 19,
/// `FS_HCINT3` at offset `0x168`, resets to `0x0000_0000`, read-write.
FsHcint3 = 20,
/// `FS_HCINTMSK3` at offset `0x16C`, resets to `0x0000_0000`, read-write.
FsHcintmsk3 = 21,
/// `FS_HCTSIZ3` at offset `0x170`, resets to `0x0000_0000`, read-write.
FsHctsiz3 = 22,
/// `FS_HCCHAR4` at offset `0x180`, resets to `0x0000_0000`, read-write.
FsHcchar4 = 23,
/// `FS_HCINT4` at offset `0x188`, resets to `0x0000_0000`, read-write.
FsHcint4 = 24,
/// `FS_HCINTMSK4` at offset `0x18C`, resets to `0x0000_0000`, read-write.
FsHcintmsk4 = 25,
/// `FS_HCTSIZ4` at offset `0x190`, resets to `0x0000_0000`, read-write.
FsHctsiz4 = 26,
/// `FS_HCCHAR5` at offset `0x1A0`, resets to `0x0000_0000`, read-write.
FsHcchar5 = 27,
/// `FS_HCINT5` at offset `0x1A8`, resets to `0x0000_0000`, read-write.
FsHcint5 = 28,
/// `FS_HCINTMSK5` at offset `0x1AC`, resets to `0x0000_0000`, read-write.
FsHcintmsk5 = 29,
/// `FS_HCTSIZ5` at offset `0x1B0`, resets to `0x0000_0000`, read-write.
FsHctsiz5 = 30,
/// `FS_HCCHAR6` at offset `0x1C0`, resets to `0x0000_0000`, read-write.
FsHcchar6 = 31,
/// `FS_HCINT6` at offset `0x1C8`, resets to `0x0000_0000`, read-write.
FsHcint6 = 32,
/// `FS_HCINTMSK6` at offset `0x1CC`, resets to `0x0000_0000`, read-write.
FsHcintmsk6 = 33,
/// `FS_HCTSIZ6` at offset `0x1D0`, resets to `0x0000_0000`, read-write.
FsHctsiz6 = 34,
/// `FS_HCCHAR7` at offset `0x1E0`, resets to `0x0000_0000`, read-write.
FsHcchar7 = 35,
/// `FS_HCINT7` at offset `0x1E8`, resets to `0x0000_0000`, read-write.
FsHcint7 = 36,
/// `FS_HCINTMSK7` at offset `0x1EC`, resets to `0x0000_0000`, read-write.
FsHcintmsk7 = 37,
/// `FS_HCTSIZ7` at offset `0x1F0`, resets to `0x0000_0000`, read-write.
FsHctsiz7 = 38,
}
impl Register {
/// Every register, in table order.
pub const ALL: [Self; 39] = [Self::FsHcfg, Self::Hfir, Self::FsHfnum, Self::FsHptxsts, Self::Haint, Self::Haintmsk, Self::FsHprt, Self::FsHcchar0, Self::FsHcint0, Self::FsHcintmsk0, Self::FsHctsiz0, Self::FsHcchar1, Self::FsHcint1, Self::FsHcintmsk1, Self::FsHctsiz1, Self::FsHcchar2, Self::FsHcint2, Self::FsHcintmsk2, Self::FsHctsiz2, Self::FsHcchar3, Self::FsHcint3, Self::FsHcintmsk3, Self::FsHctsiz3, Self::FsHcchar4, Self::FsHcint4, Self::FsHcintmsk4, Self::FsHctsiz4, Self::FsHcchar5, Self::FsHcint5, Self::FsHcintmsk5, Self::FsHctsiz5, Self::FsHcchar6, Self::FsHcint6, Self::FsHcintmsk6, Self::FsHctsiz6, Self::FsHcchar7, Self::FsHcint7, Self::FsHcintmsk7, Self::FsHctsiz7];
}
impl Layout for Register {
const REGISTERS: &'static [RegisterSpec] = ®ISTERS;
fn from_index(index: usize) -> Option<Self> {
Self::ALL.get(index).copied()
}
fn index(self) -> usize {
self as usize
}
}
/// The fields of `FS_HCFG`.
pub mod fs_hcfg {
use super::FieldSpec;
/// `FSLSPCS`, bits 0..=1.
pub const FSLSPCS: &FieldSpec = &super::REGISTERS[0].fields[0];
/// `FSLSS`, bit 2, read-only.
pub const FSLSS: &FieldSpec = &super::REGISTERS[0].fields[1];
}
/// The fields of `HFIR`.
pub mod hfir {
use super::FieldSpec;
/// `FRIVL`, bits 0..=15.
pub const FRIVL: &FieldSpec = &super::REGISTERS[1].fields[0];
}
/// The fields of `FS_HFNUM`.
pub mod fs_hfnum {
use super::FieldSpec;
/// `FRNUM`, bits 0..=15.
pub const FRNUM: &FieldSpec = &super::REGISTERS[2].fields[0];
/// `FTREM`, bits 16..=31.
pub const FTREM: &FieldSpec = &super::REGISTERS[2].fields[1];
}
/// The fields of `FS_HPTXSTS`.
pub mod fs_hptxsts {
use super::FieldSpec;
/// `PTXFSAVL`, bits 0..=15.
pub const PTXFSAVL: &FieldSpec = &super::REGISTERS[3].fields[0];
/// `PTXQSAV`, bits 16..=23, read-only.
pub const PTXQSAV: &FieldSpec = &super::REGISTERS[3].fields[1];
/// `PTXQTOP`, bits 24..=31, read-only.
pub const PTXQTOP: &FieldSpec = &super::REGISTERS[3].fields[2];
}
/// The fields of `HAINT`.
pub mod haint {
use super::FieldSpec;
/// `HAINT`, bits 0..=15.
pub const HAINT: &FieldSpec = &super::REGISTERS[4].fields[0];
}
/// The fields of `HAINTMSK`.
pub mod haintmsk {
use super::FieldSpec;
/// `HAINTM`, bits 0..=15.
pub const HAINTM: &FieldSpec = &super::REGISTERS[5].fields[0];
}
/// The fields of `FS_HPRT`.
pub mod fs_hprt {
use super::FieldSpec;
/// `PCSTS`, bit 0, read-only.
pub const PCSTS: &FieldSpec = &super::REGISTERS[6].fields[0];
/// `PCDET`, bit 1.
pub const PCDET: &FieldSpec = &super::REGISTERS[6].fields[1];
/// `PENA`, bit 2.
pub const PENA: &FieldSpec = &super::REGISTERS[6].fields[2];
/// `PENCHNG`, bit 3.
pub const PENCHNG: &FieldSpec = &super::REGISTERS[6].fields[3];
/// `POCA`, bit 4, read-only.
pub const POCA: &FieldSpec = &super::REGISTERS[6].fields[4];
/// `POCCHNG`, bit 5.
pub const POCCHNG: &FieldSpec = &super::REGISTERS[6].fields[5];
/// `PRES`, bit 6.
pub const PRES: &FieldSpec = &super::REGISTERS[6].fields[6];
/// `PSUSP`, bit 7.
pub const PSUSP: &FieldSpec = &super::REGISTERS[6].fields[7];
/// `PRST`, bit 8.
pub const PRST: &FieldSpec = &super::REGISTERS[6].fields[8];
/// `PLSTS`, bits 10..=11, read-only.
pub const PLSTS: &FieldSpec = &super::REGISTERS[6].fields[9];
/// `PPWR`, bit 12.
pub const PPWR: &FieldSpec = &super::REGISTERS[6].fields[10];
/// `PTCTL`, bits 13..=16.
pub const PTCTL: &FieldSpec = &super::REGISTERS[6].fields[11];
/// `PSPD`, bits 17..=18, read-only.
pub const PSPD: &FieldSpec = &super::REGISTERS[6].fields[12];
}
/// The fields of `FS_HCCHAR0`.
pub mod fs_hcchar0 {
use super::FieldSpec;
/// `MPSIZ`, bits 0..=10.
pub const MPSIZ: &FieldSpec = &super::REGISTERS[7].fields[0];
/// `EPNUM`, bits 11..=14.
pub const EPNUM: &FieldSpec = &super::REGISTERS[7].fields[1];
/// `EPDIR`, bit 15.
pub const EPDIR: &FieldSpec = &super::REGISTERS[7].fields[2];
/// `LSDEV`, bit 17.
pub const LSDEV: &FieldSpec = &super::REGISTERS[7].fields[3];
/// `EPTYP`, bits 18..=19.
pub const EPTYP: &FieldSpec = &super::REGISTERS[7].fields[4];
/// `MCNT`, bits 20..=21.
pub const MCNT: &FieldSpec = &super::REGISTERS[7].fields[5];
/// `DAD`, bits 22..=28.
pub const DAD: &FieldSpec = &super::REGISTERS[7].fields[6];
/// `ODDFRM`, bit 29.
pub const ODDFRM: &FieldSpec = &super::REGISTERS[7].fields[7];
/// `CHDIS`, bit 30.
pub const CHDIS: &FieldSpec = &super::REGISTERS[7].fields[8];
/// `CHENA`, bit 31.
pub const CHENA: &FieldSpec = &super::REGISTERS[7].fields[9];
}
/// The fields of `FS_HCINT0`.
pub mod fs_hcint0 {
use super::FieldSpec;
/// `XFRC`, bit 0.
pub const XFRC: &FieldSpec = &super::REGISTERS[8].fields[0];
/// `CHH`, bit 1.
pub const CHH: &FieldSpec = &super::REGISTERS[8].fields[1];
/// `STALL`, bit 3.
pub const STALL: &FieldSpec = &super::REGISTERS[8].fields[2];
/// `NAK`, bit 4.
pub const NAK: &FieldSpec = &super::REGISTERS[8].fields[3];
/// `ACK`, bit 5.
pub const ACK: &FieldSpec = &super::REGISTERS[8].fields[4];
/// `TXERR`, bit 7.
pub const TXERR: &FieldSpec = &super::REGISTERS[8].fields[5];
/// `BBERR`, bit 8.
pub const BBERR: &FieldSpec = &super::REGISTERS[8].fields[6];
/// `FRMOR`, bit 9.
pub const FRMOR: &FieldSpec = &super::REGISTERS[8].fields[7];
/// `DTERR`, bit 10.
pub const DTERR: &FieldSpec = &super::REGISTERS[8].fields[8];
}
/// The fields of `FS_HCINTMSK0`.
pub mod fs_hcintmsk0 {
use super::FieldSpec;
/// `XFRCM`, bit 0.
pub const XFRCM: &FieldSpec = &super::REGISTERS[9].fields[0];
/// `CHHM`, bit 1.
pub const CHHM: &FieldSpec = &super::REGISTERS[9].fields[1];
/// `STALLM`, bit 3.
pub const STALLM: &FieldSpec = &super::REGISTERS[9].fields[2];
/// `NAKM`, bit 4.
pub const NAKM: &FieldSpec = &super::REGISTERS[9].fields[3];
/// `ACKM`, bit 5.
pub const ACKM: &FieldSpec = &super::REGISTERS[9].fields[4];
/// `NYET`, bit 6.
pub const NYET: &FieldSpec = &super::REGISTERS[9].fields[5];
/// `TXERRM`, bit 7.
pub const TXERRM: &FieldSpec = &super::REGISTERS[9].fields[6];
/// `BBERRM`, bit 8.
pub const BBERRM: &FieldSpec = &super::REGISTERS[9].fields[7];
/// `FRMORM`, bit 9.
pub const FRMORM: &FieldSpec = &super::REGISTERS[9].fields[8];
/// `DTERRM`, bit 10.
pub const DTERRM: &FieldSpec = &super::REGISTERS[9].fields[9];
}
/// The fields of `FS_HCTSIZ0`.
pub mod fs_hctsiz0 {
use super::FieldSpec;
/// `XFRSIZ`, bits 0..=18.
pub const XFRSIZ: &FieldSpec = &super::REGISTERS[10].fields[0];
/// `PKTCNT`, bits 19..=28.
pub const PKTCNT: &FieldSpec = &super::REGISTERS[10].fields[1];
/// `DPID`, bits 29..=30.
pub const DPID: &FieldSpec = &super::REGISTERS[10].fields[2];
}
/// The fields of `FS_HCCHAR1`.
pub mod fs_hcchar1 {
use super::FieldSpec;
/// `MPSIZ`, bits 0..=10.
pub const MPSIZ: &FieldSpec = &super::REGISTERS[11].fields[0];
/// `EPNUM`, bits 11..=14.
pub const EPNUM: &FieldSpec = &super::REGISTERS[11].fields[1];
/// `EPDIR`, bit 15.
pub const EPDIR: &FieldSpec = &super::REGISTERS[11].fields[2];
/// `LSDEV`, bit 17.
pub const LSDEV: &FieldSpec = &super::REGISTERS[11].fields[3];
/// `EPTYP`, bits 18..=19.
pub const EPTYP: &FieldSpec = &super::REGISTERS[11].fields[4];
/// `MCNT`, bits 20..=21.
pub const MCNT: &FieldSpec = &super::REGISTERS[11].fields[5];
/// `DAD`, bits 22..=28.
pub const DAD: &FieldSpec = &super::REGISTERS[11].fields[6];
/// `ODDFRM`, bit 29.
pub const ODDFRM: &FieldSpec = &super::REGISTERS[11].fields[7];
/// `CHDIS`, bit 30.
pub const CHDIS: &FieldSpec = &super::REGISTERS[11].fields[8];
/// `CHENA`, bit 31.
pub const CHENA: &FieldSpec = &super::REGISTERS[11].fields[9];
}
/// The fields of `FS_HCINT1`.
pub mod fs_hcint1 {
use super::FieldSpec;
/// `XFRC`, bit 0.
pub const XFRC: &FieldSpec = &super::REGISTERS[12].fields[0];
/// `CHH`, bit 1.
pub const CHH: &FieldSpec = &super::REGISTERS[12].fields[1];
/// `STALL`, bit 3.
pub const STALL: &FieldSpec = &super::REGISTERS[12].fields[2];
/// `NAK`, bit 4.
pub const NAK: &FieldSpec = &super::REGISTERS[12].fields[3];
/// `ACK`, bit 5.
pub const ACK: &FieldSpec = &super::REGISTERS[12].fields[4];
/// `TXERR`, bit 7.
pub const TXERR: &FieldSpec = &super::REGISTERS[12].fields[5];
/// `BBERR`, bit 8.
pub const BBERR: &FieldSpec = &super::REGISTERS[12].fields[6];
/// `FRMOR`, bit 9.
pub const FRMOR: &FieldSpec = &super::REGISTERS[12].fields[7];
/// `DTERR`, bit 10.
pub const DTERR: &FieldSpec = &super::REGISTERS[12].fields[8];
}
/// The fields of `FS_HCINTMSK1`.
pub mod fs_hcintmsk1 {
use super::FieldSpec;
/// `XFRCM`, bit 0.
pub const XFRCM: &FieldSpec = &super::REGISTERS[13].fields[0];
/// `CHHM`, bit 1.
pub const CHHM: &FieldSpec = &super::REGISTERS[13].fields[1];
/// `STALLM`, bit 3.
pub const STALLM: &FieldSpec = &super::REGISTERS[13].fields[2];
/// `NAKM`, bit 4.
pub const NAKM: &FieldSpec = &super::REGISTERS[13].fields[3];
/// `ACKM`, bit 5.
pub const ACKM: &FieldSpec = &super::REGISTERS[13].fields[4];
/// `NYET`, bit 6.
pub const NYET: &FieldSpec = &super::REGISTERS[13].fields[5];
/// `TXERRM`, bit 7.
pub const TXERRM: &FieldSpec = &super::REGISTERS[13].fields[6];
/// `BBERRM`, bit 8.
pub const BBERRM: &FieldSpec = &super::REGISTERS[13].fields[7];
/// `FRMORM`, bit 9.
pub const FRMORM: &FieldSpec = &super::REGISTERS[13].fields[8];
/// `DTERRM`, bit 10.
pub const DTERRM: &FieldSpec = &super::REGISTERS[13].fields[9];
}
/// The fields of `FS_HCTSIZ1`.
pub mod fs_hctsiz1 {
use super::FieldSpec;
/// `XFRSIZ`, bits 0..=18.
pub const XFRSIZ: &FieldSpec = &super::REGISTERS[14].fields[0];
/// `PKTCNT`, bits 19..=28.
pub const PKTCNT: &FieldSpec = &super::REGISTERS[14].fields[1];
/// `DPID`, bits 29..=30.
pub const DPID: &FieldSpec = &super::REGISTERS[14].fields[2];
}
/// The fields of `FS_HCCHAR2`.
pub mod fs_hcchar2 {
use super::FieldSpec;
/// `MPSIZ`, bits 0..=10.
pub const MPSIZ: &FieldSpec = &super::REGISTERS[15].fields[0];
/// `EPNUM`, bits 11..=14.
pub const EPNUM: &FieldSpec = &super::REGISTERS[15].fields[1];
/// `EPDIR`, bit 15.
pub const EPDIR: &FieldSpec = &super::REGISTERS[15].fields[2];
/// `LSDEV`, bit 17.
pub const LSDEV: &FieldSpec = &super::REGISTERS[15].fields[3];
/// `EPTYP`, bits 18..=19.
pub const EPTYP: &FieldSpec = &super::REGISTERS[15].fields[4];
/// `MCNT`, bits 20..=21.
pub const MCNT: &FieldSpec = &super::REGISTERS[15].fields[5];
/// `DAD`, bits 22..=28.
pub const DAD: &FieldSpec = &super::REGISTERS[15].fields[6];
/// `ODDFRM`, bit 29.
pub const ODDFRM: &FieldSpec = &super::REGISTERS[15].fields[7];
/// `CHDIS`, bit 30.
pub const CHDIS: &FieldSpec = &super::REGISTERS[15].fields[8];
/// `CHENA`, bit 31.
pub const CHENA: &FieldSpec = &super::REGISTERS[15].fields[9];
}
/// The fields of `FS_HCINT2`.
pub mod fs_hcint2 {
use super::FieldSpec;
/// `XFRC`, bit 0.
pub const XFRC: &FieldSpec = &super::REGISTERS[16].fields[0];
/// `CHH`, bit 1.
pub const CHH: &FieldSpec = &super::REGISTERS[16].fields[1];
/// `STALL`, bit 3.
pub const STALL: &FieldSpec = &super::REGISTERS[16].fields[2];
/// `NAK`, bit 4.
pub const NAK: &FieldSpec = &super::REGISTERS[16].fields[3];
/// `ACK`, bit 5.
pub const ACK: &FieldSpec = &super::REGISTERS[16].fields[4];
/// `TXERR`, bit 7.
pub const TXERR: &FieldSpec = &super::REGISTERS[16].fields[5];
/// `BBERR`, bit 8.
pub const BBERR: &FieldSpec = &super::REGISTERS[16].fields[6];
/// `FRMOR`, bit 9.
pub const FRMOR: &FieldSpec = &super::REGISTERS[16].fields[7];
/// `DTERR`, bit 10.
pub const DTERR: &FieldSpec = &super::REGISTERS[16].fields[8];
}
/// The fields of `FS_HCINTMSK2`.
pub mod fs_hcintmsk2 {
use super::FieldSpec;
/// `XFRCM`, bit 0.
pub const XFRCM: &FieldSpec = &super::REGISTERS[17].fields[0];
/// `CHHM`, bit 1.
pub const CHHM: &FieldSpec = &super::REGISTERS[17].fields[1];
/// `STALLM`, bit 3.
pub const STALLM: &FieldSpec = &super::REGISTERS[17].fields[2];
/// `NAKM`, bit 4.
pub const NAKM: &FieldSpec = &super::REGISTERS[17].fields[3];
/// `ACKM`, bit 5.
pub const ACKM: &FieldSpec = &super::REGISTERS[17].fields[4];
/// `NYET`, bit 6.
pub const NYET: &FieldSpec = &super::REGISTERS[17].fields[5];
/// `TXERRM`, bit 7.
pub const TXERRM: &FieldSpec = &super::REGISTERS[17].fields[6];
/// `BBERRM`, bit 8.
pub const BBERRM: &FieldSpec = &super::REGISTERS[17].fields[7];
/// `FRMORM`, bit 9.
pub const FRMORM: &FieldSpec = &super::REGISTERS[17].fields[8];
/// `DTERRM`, bit 10.
pub const DTERRM: &FieldSpec = &super::REGISTERS[17].fields[9];
}
/// The fields of `FS_HCTSIZ2`.
pub mod fs_hctsiz2 {
use super::FieldSpec;
/// `XFRSIZ`, bits 0..=18.
pub const XFRSIZ: &FieldSpec = &super::REGISTERS[18].fields[0];
/// `PKTCNT`, bits 19..=28.
pub const PKTCNT: &FieldSpec = &super::REGISTERS[18].fields[1];
/// `DPID`, bits 29..=30.
pub const DPID: &FieldSpec = &super::REGISTERS[18].fields[2];
}
/// The fields of `FS_HCCHAR3`.
pub mod fs_hcchar3 {
use super::FieldSpec;
/// `MPSIZ`, bits 0..=10.
pub const MPSIZ: &FieldSpec = &super::REGISTERS[19].fields[0];
/// `EPNUM`, bits 11..=14.
pub const EPNUM: &FieldSpec = &super::REGISTERS[19].fields[1];
/// `EPDIR`, bit 15.
pub const EPDIR: &FieldSpec = &super::REGISTERS[19].fields[2];
/// `LSDEV`, bit 17.
pub const LSDEV: &FieldSpec = &super::REGISTERS[19].fields[3];
/// `EPTYP`, bits 18..=19.
pub const EPTYP: &FieldSpec = &super::REGISTERS[19].fields[4];
/// `MCNT`, bits 20..=21.
pub const MCNT: &FieldSpec = &super::REGISTERS[19].fields[5];
/// `DAD`, bits 22..=28.
pub const DAD: &FieldSpec = &super::REGISTERS[19].fields[6];
/// `ODDFRM`, bit 29.
pub const ODDFRM: &FieldSpec = &super::REGISTERS[19].fields[7];
/// `CHDIS`, bit 30.
pub const CHDIS: &FieldSpec = &super::REGISTERS[19].fields[8];
/// `CHENA`, bit 31.
pub const CHENA: &FieldSpec = &super::REGISTERS[19].fields[9];
}
/// The fields of `FS_HCINT3`.
pub mod fs_hcint3 {
use super::FieldSpec;
/// `XFRC`, bit 0.
pub const XFRC: &FieldSpec = &super::REGISTERS[20].fields[0];
/// `CHH`, bit 1.
pub const CHH: &FieldSpec = &super::REGISTERS[20].fields[1];
/// `STALL`, bit 3.
pub const STALL: &FieldSpec = &super::REGISTERS[20].fields[2];
/// `NAK`, bit 4.
pub const NAK: &FieldSpec = &super::REGISTERS[20].fields[3];
/// `ACK`, bit 5.
pub const ACK: &FieldSpec = &super::REGISTERS[20].fields[4];
/// `TXERR`, bit 7.
pub const TXERR: &FieldSpec = &super::REGISTERS[20].fields[5];
/// `BBERR`, bit 8.
pub const BBERR: &FieldSpec = &super::REGISTERS[20].fields[6];
/// `FRMOR`, bit 9.
pub const FRMOR: &FieldSpec = &super::REGISTERS[20].fields[7];
/// `DTERR`, bit 10.
pub const DTERR: &FieldSpec = &super::REGISTERS[20].fields[8];
}
/// The fields of `FS_HCINTMSK3`.
pub mod fs_hcintmsk3 {
use super::FieldSpec;
/// `XFRCM`, bit 0.
pub const XFRCM: &FieldSpec = &super::REGISTERS[21].fields[0];
/// `CHHM`, bit 1.
pub const CHHM: &FieldSpec = &super::REGISTERS[21].fields[1];
/// `STALLM`, bit 3.
pub const STALLM: &FieldSpec = &super::REGISTERS[21].fields[2];
/// `NAKM`, bit 4.
pub const NAKM: &FieldSpec = &super::REGISTERS[21].fields[3];
/// `ACKM`, bit 5.
pub const ACKM: &FieldSpec = &super::REGISTERS[21].fields[4];
/// `NYET`, bit 6.
pub const NYET: &FieldSpec = &super::REGISTERS[21].fields[5];
/// `TXERRM`, bit 7.
pub const TXERRM: &FieldSpec = &super::REGISTERS[21].fields[6];
/// `BBERRM`, bit 8.
pub const BBERRM: &FieldSpec = &super::REGISTERS[21].fields[7];
/// `FRMORM`, bit 9.
pub const FRMORM: &FieldSpec = &super::REGISTERS[21].fields[8];
/// `DTERRM`, bit 10.
pub const DTERRM: &FieldSpec = &super::REGISTERS[21].fields[9];
}
/// The fields of `FS_HCTSIZ3`.
pub mod fs_hctsiz3 {
use super::FieldSpec;
/// `XFRSIZ`, bits 0..=18.
pub const XFRSIZ: &FieldSpec = &super::REGISTERS[22].fields[0];
/// `PKTCNT`, bits 19..=28.
pub const PKTCNT: &FieldSpec = &super::REGISTERS[22].fields[1];
/// `DPID`, bits 29..=30.
pub const DPID: &FieldSpec = &super::REGISTERS[22].fields[2];
}
/// The fields of `FS_HCCHAR4`.
pub mod fs_hcchar4 {
use super::FieldSpec;
/// `MPSIZ`, bits 0..=10.
pub const MPSIZ: &FieldSpec = &super::REGISTERS[23].fields[0];
/// `EPNUM`, bits 11..=14.
pub const EPNUM: &FieldSpec = &super::REGISTERS[23].fields[1];
/// `EPDIR`, bit 15.
pub const EPDIR: &FieldSpec = &super::REGISTERS[23].fields[2];
/// `LSDEV`, bit 17.
pub const LSDEV: &FieldSpec = &super::REGISTERS[23].fields[3];
/// `EPTYP`, bits 18..=19.
pub const EPTYP: &FieldSpec = &super::REGISTERS[23].fields[4];
/// `MCNT`, bits 20..=21.
pub const MCNT: &FieldSpec = &super::REGISTERS[23].fields[5];
/// `DAD`, bits 22..=28.
pub const DAD: &FieldSpec = &super::REGISTERS[23].fields[6];
/// `ODDFRM`, bit 29.
pub const ODDFRM: &FieldSpec = &super::REGISTERS[23].fields[7];
/// `CHDIS`, bit 30.
pub const CHDIS: &FieldSpec = &super::REGISTERS[23].fields[8];
/// `CHENA`, bit 31.
pub const CHENA: &FieldSpec = &super::REGISTERS[23].fields[9];
}
/// The fields of `FS_HCINT4`.
pub mod fs_hcint4 {
use super::FieldSpec;
/// `XFRC`, bit 0.
pub const XFRC: &FieldSpec = &super::REGISTERS[24].fields[0];
/// `CHH`, bit 1.
pub const CHH: &FieldSpec = &super::REGISTERS[24].fields[1];
/// `STALL`, bit 3.
pub const STALL: &FieldSpec = &super::REGISTERS[24].fields[2];
/// `NAK`, bit 4.
pub const NAK: &FieldSpec = &super::REGISTERS[24].fields[3];
/// `ACK`, bit 5.
pub const ACK: &FieldSpec = &super::REGISTERS[24].fields[4];
/// `TXERR`, bit 7.
pub const TXERR: &FieldSpec = &super::REGISTERS[24].fields[5];
/// `BBERR`, bit 8.
pub const BBERR: &FieldSpec = &super::REGISTERS[24].fields[6];
/// `FRMOR`, bit 9.
pub const FRMOR: &FieldSpec = &super::REGISTERS[24].fields[7];
/// `DTERR`, bit 10.
pub const DTERR: &FieldSpec = &super::REGISTERS[24].fields[8];
}
/// The fields of `FS_HCINTMSK4`.
pub mod fs_hcintmsk4 {
use super::FieldSpec;
/// `XFRCM`, bit 0.
pub const XFRCM: &FieldSpec = &super::REGISTERS[25].fields[0];
/// `CHHM`, bit 1.
pub const CHHM: &FieldSpec = &super::REGISTERS[25].fields[1];
/// `STALLM`, bit 3.
pub const STALLM: &FieldSpec = &super::REGISTERS[25].fields[2];
/// `NAKM`, bit 4.
pub const NAKM: &FieldSpec = &super::REGISTERS[25].fields[3];
/// `ACKM`, bit 5.
pub const ACKM: &FieldSpec = &super::REGISTERS[25].fields[4];
/// `NYET`, bit 6.
pub const NYET: &FieldSpec = &super::REGISTERS[25].fields[5];
/// `TXERRM`, bit 7.
pub const TXERRM: &FieldSpec = &super::REGISTERS[25].fields[6];
/// `BBERRM`, bit 8.
pub const BBERRM: &FieldSpec = &super::REGISTERS[25].fields[7];
/// `FRMORM`, bit 9.
pub const FRMORM: &FieldSpec = &super::REGISTERS[25].fields[8];
/// `DTERRM`, bit 10.
pub const DTERRM: &FieldSpec = &super::REGISTERS[25].fields[9];
}
/// The fields of `FS_HCTSIZ4`.
pub mod fs_hctsiz4 {
use super::FieldSpec;
/// `XFRSIZ`, bits 0..=18.
pub const XFRSIZ: &FieldSpec = &super::REGISTERS[26].fields[0];
/// `PKTCNT`, bits 19..=28.
pub const PKTCNT: &FieldSpec = &super::REGISTERS[26].fields[1];
/// `DPID`, bits 29..=30.
pub const DPID: &FieldSpec = &super::REGISTERS[26].fields[2];
}
/// The fields of `FS_HCCHAR5`.
pub mod fs_hcchar5 {
use super::FieldSpec;
/// `MPSIZ`, bits 0..=10.
pub const MPSIZ: &FieldSpec = &super::REGISTERS[27].fields[0];
/// `EPNUM`, bits 11..=14.
pub const EPNUM: &FieldSpec = &super::REGISTERS[27].fields[1];
/// `EPDIR`, bit 15.
pub const EPDIR: &FieldSpec = &super::REGISTERS[27].fields[2];
/// `LSDEV`, bit 17.
pub const LSDEV: &FieldSpec = &super::REGISTERS[27].fields[3];
/// `EPTYP`, bits 18..=19.
pub const EPTYP: &FieldSpec = &super::REGISTERS[27].fields[4];
/// `MCNT`, bits 20..=21.
pub const MCNT: &FieldSpec = &super::REGISTERS[27].fields[5];
/// `DAD`, bits 22..=28.
pub const DAD: &FieldSpec = &super::REGISTERS[27].fields[6];
/// `ODDFRM`, bit 29.
pub const ODDFRM: &FieldSpec = &super::REGISTERS[27].fields[7];
/// `CHDIS`, bit 30.
pub const CHDIS: &FieldSpec = &super::REGISTERS[27].fields[8];
/// `CHENA`, bit 31.
pub const CHENA: &FieldSpec = &super::REGISTERS[27].fields[9];
}
/// The fields of `FS_HCINT5`.
pub mod fs_hcint5 {
use super::FieldSpec;
/// `XFRC`, bit 0.
pub const XFRC: &FieldSpec = &super::REGISTERS[28].fields[0];
/// `CHH`, bit 1.
pub const CHH: &FieldSpec = &super::REGISTERS[28].fields[1];
/// `STALL`, bit 3.
pub const STALL: &FieldSpec = &super::REGISTERS[28].fields[2];
/// `NAK`, bit 4.
pub const NAK: &FieldSpec = &super::REGISTERS[28].fields[3];
/// `ACK`, bit 5.
pub const ACK: &FieldSpec = &super::REGISTERS[28].fields[4];
/// `TXERR`, bit 7.
pub const TXERR: &FieldSpec = &super::REGISTERS[28].fields[5];
/// `BBERR`, bit 8.
pub const BBERR: &FieldSpec = &super::REGISTERS[28].fields[6];
/// `FRMOR`, bit 9.
pub const FRMOR: &FieldSpec = &super::REGISTERS[28].fields[7];
/// `DTERR`, bit 10.
pub const DTERR: &FieldSpec = &super::REGISTERS[28].fields[8];
}
/// The fields of `FS_HCINTMSK5`.
pub mod fs_hcintmsk5 {
use super::FieldSpec;
/// `XFRCM`, bit 0.
pub const XFRCM: &FieldSpec = &super::REGISTERS[29].fields[0];
/// `CHHM`, bit 1.
pub const CHHM: &FieldSpec = &super::REGISTERS[29].fields[1];
/// `STALLM`, bit 3.
pub const STALLM: &FieldSpec = &super::REGISTERS[29].fields[2];
/// `NAKM`, bit 4.
pub const NAKM: &FieldSpec = &super::REGISTERS[29].fields[3];
/// `ACKM`, bit 5.
pub const ACKM: &FieldSpec = &super::REGISTERS[29].fields[4];
/// `NYET`, bit 6.
pub const NYET: &FieldSpec = &super::REGISTERS[29].fields[5];
/// `TXERRM`, bit 7.
pub const TXERRM: &FieldSpec = &super::REGISTERS[29].fields[6];
/// `BBERRM`, bit 8.
pub const BBERRM: &FieldSpec = &super::REGISTERS[29].fields[7];
/// `FRMORM`, bit 9.
pub const FRMORM: &FieldSpec = &super::REGISTERS[29].fields[8];
/// `DTERRM`, bit 10.
pub const DTERRM: &FieldSpec = &super::REGISTERS[29].fields[9];
}
/// The fields of `FS_HCTSIZ5`.
pub mod fs_hctsiz5 {
use super::FieldSpec;
/// `XFRSIZ`, bits 0..=18.
pub const XFRSIZ: &FieldSpec = &super::REGISTERS[30].fields[0];
/// `PKTCNT`, bits 19..=28.
pub const PKTCNT: &FieldSpec = &super::REGISTERS[30].fields[1];
/// `DPID`, bits 29..=30.
pub const DPID: &FieldSpec = &super::REGISTERS[30].fields[2];
}
/// The fields of `FS_HCCHAR6`.
pub mod fs_hcchar6 {
use super::FieldSpec;
/// `MPSIZ`, bits 0..=10.
pub const MPSIZ: &FieldSpec = &super::REGISTERS[31].fields[0];
/// `EPNUM`, bits 11..=14.
pub const EPNUM: &FieldSpec = &super::REGISTERS[31].fields[1];
/// `EPDIR`, bit 15.
pub const EPDIR: &FieldSpec = &super::REGISTERS[31].fields[2];
/// `LSDEV`, bit 17.
pub const LSDEV: &FieldSpec = &super::REGISTERS[31].fields[3];
/// `EPTYP`, bits 18..=19.
pub const EPTYP: &FieldSpec = &super::REGISTERS[31].fields[4];
/// `MCNT`, bits 20..=21.
pub const MCNT: &FieldSpec = &super::REGISTERS[31].fields[5];
/// `DAD`, bits 22..=28.
pub const DAD: &FieldSpec = &super::REGISTERS[31].fields[6];
/// `ODDFRM`, bit 29.
pub const ODDFRM: &FieldSpec = &super::REGISTERS[31].fields[7];
/// `CHDIS`, bit 30.
pub const CHDIS: &FieldSpec = &super::REGISTERS[31].fields[8];
/// `CHENA`, bit 31.
pub const CHENA: &FieldSpec = &super::REGISTERS[31].fields[9];
}
/// The fields of `FS_HCINT6`.
pub mod fs_hcint6 {
use super::FieldSpec;
/// `XFRC`, bit 0.
pub const XFRC: &FieldSpec = &super::REGISTERS[32].fields[0];
/// `CHH`, bit 1.
pub const CHH: &FieldSpec = &super::REGISTERS[32].fields[1];
/// `STALL`, bit 3.
pub const STALL: &FieldSpec = &super::REGISTERS[32].fields[2];
/// `NAK`, bit 4.
pub const NAK: &FieldSpec = &super::REGISTERS[32].fields[3];
/// `ACK`, bit 5.
pub const ACK: &FieldSpec = &super::REGISTERS[32].fields[4];
/// `TXERR`, bit 7.
pub const TXERR: &FieldSpec = &super::REGISTERS[32].fields[5];
/// `BBERR`, bit 8.
pub const BBERR: &FieldSpec = &super::REGISTERS[32].fields[6];
/// `FRMOR`, bit 9.
pub const FRMOR: &FieldSpec = &super::REGISTERS[32].fields[7];
/// `DTERR`, bit 10.
pub const DTERR: &FieldSpec = &super::REGISTERS[32].fields[8];
}
/// The fields of `FS_HCINTMSK6`.
pub mod fs_hcintmsk6 {
use super::FieldSpec;
/// `XFRCM`, bit 0.
pub const XFRCM: &FieldSpec = &super::REGISTERS[33].fields[0];
/// `CHHM`, bit 1.
pub const CHHM: &FieldSpec = &super::REGISTERS[33].fields[1];
/// `STALLM`, bit 3.
pub const STALLM: &FieldSpec = &super::REGISTERS[33].fields[2];
/// `NAKM`, bit 4.
pub const NAKM: &FieldSpec = &super::REGISTERS[33].fields[3];
/// `ACKM`, bit 5.
pub const ACKM: &FieldSpec = &super::REGISTERS[33].fields[4];
/// `NYET`, bit 6.
pub const NYET: &FieldSpec = &super::REGISTERS[33].fields[5];
/// `TXERRM`, bit 7.
pub const TXERRM: &FieldSpec = &super::REGISTERS[33].fields[6];
/// `BBERRM`, bit 8.
pub const BBERRM: &FieldSpec = &super::REGISTERS[33].fields[7];
/// `FRMORM`, bit 9.
pub const FRMORM: &FieldSpec = &super::REGISTERS[33].fields[8];
/// `DTERRM`, bit 10.
pub const DTERRM: &FieldSpec = &super::REGISTERS[33].fields[9];
}
/// The fields of `FS_HCTSIZ6`.
pub mod fs_hctsiz6 {
use super::FieldSpec;
/// `XFRSIZ`, bits 0..=18.
pub const XFRSIZ: &FieldSpec = &super::REGISTERS[34].fields[0];
/// `PKTCNT`, bits 19..=28.
pub const PKTCNT: &FieldSpec = &super::REGISTERS[34].fields[1];
/// `DPID`, bits 29..=30.
pub const DPID: &FieldSpec = &super::REGISTERS[34].fields[2];
}
/// The fields of `FS_HCCHAR7`.
pub mod fs_hcchar7 {
use super::FieldSpec;
/// `MPSIZ`, bits 0..=10.
pub const MPSIZ: &FieldSpec = &super::REGISTERS[35].fields[0];
/// `EPNUM`, bits 11..=14.
pub const EPNUM: &FieldSpec = &super::REGISTERS[35].fields[1];
/// `EPDIR`, bit 15.
pub const EPDIR: &FieldSpec = &super::REGISTERS[35].fields[2];
/// `LSDEV`, bit 17.
pub const LSDEV: &FieldSpec = &super::REGISTERS[35].fields[3];
/// `EPTYP`, bits 18..=19.
pub const EPTYP: &FieldSpec = &super::REGISTERS[35].fields[4];
/// `MCNT`, bits 20..=21.
pub const MCNT: &FieldSpec = &super::REGISTERS[35].fields[5];
/// `DAD`, bits 22..=28.
pub const DAD: &FieldSpec = &super::REGISTERS[35].fields[6];
/// `ODDFRM`, bit 29.
pub const ODDFRM: &FieldSpec = &super::REGISTERS[35].fields[7];
/// `CHDIS`, bit 30.
pub const CHDIS: &FieldSpec = &super::REGISTERS[35].fields[8];
/// `CHENA`, bit 31.
pub const CHENA: &FieldSpec = &super::REGISTERS[35].fields[9];
}
/// The fields of `FS_HCINT7`.
pub mod fs_hcint7 {
use super::FieldSpec;
/// `XFRC`, bit 0.
pub const XFRC: &FieldSpec = &super::REGISTERS[36].fields[0];
/// `CHH`, bit 1.
pub const CHH: &FieldSpec = &super::REGISTERS[36].fields[1];
/// `STALL`, bit 3.
pub const STALL: &FieldSpec = &super::REGISTERS[36].fields[2];
/// `NAK`, bit 4.
pub const NAK: &FieldSpec = &super::REGISTERS[36].fields[3];
/// `ACK`, bit 5.
pub const ACK: &FieldSpec = &super::REGISTERS[36].fields[4];
/// `TXERR`, bit 7.
pub const TXERR: &FieldSpec = &super::REGISTERS[36].fields[5];
/// `BBERR`, bit 8.
pub const BBERR: &FieldSpec = &super::REGISTERS[36].fields[6];
/// `FRMOR`, bit 9.
pub const FRMOR: &FieldSpec = &super::REGISTERS[36].fields[7];
/// `DTERR`, bit 10.
pub const DTERR: &FieldSpec = &super::REGISTERS[36].fields[8];
}
/// The fields of `FS_HCINTMSK7`.
pub mod fs_hcintmsk7 {
use super::FieldSpec;
/// `XFRCM`, bit 0.
pub const XFRCM: &FieldSpec = &super::REGISTERS[37].fields[0];
/// `CHHM`, bit 1.
pub const CHHM: &FieldSpec = &super::REGISTERS[37].fields[1];
/// `STALLM`, bit 3.
pub const STALLM: &FieldSpec = &super::REGISTERS[37].fields[2];
/// `NAKM`, bit 4.
pub const NAKM: &FieldSpec = &super::REGISTERS[37].fields[3];
/// `ACKM`, bit 5.
pub const ACKM: &FieldSpec = &super::REGISTERS[37].fields[4];
/// `NYET`, bit 6.
pub const NYET: &FieldSpec = &super::REGISTERS[37].fields[5];
/// `TXERRM`, bit 7.
pub const TXERRM: &FieldSpec = &super::REGISTERS[37].fields[6];
/// `BBERRM`, bit 8.
pub const BBERRM: &FieldSpec = &super::REGISTERS[37].fields[7];
/// `FRMORM`, bit 9.
pub const FRMORM: &FieldSpec = &super::REGISTERS[37].fields[8];
/// `DTERRM`, bit 10.
pub const DTERRM: &FieldSpec = &super::REGISTERS[37].fields[9];
}
/// The fields of `FS_HCTSIZ7`.
pub mod fs_hctsiz7 {
use super::FieldSpec;
/// `XFRSIZ`, bits 0..=18.
pub const XFRSIZ: &FieldSpec = &super::REGISTERS[38].fields[0];
/// `PKTCNT`, bits 19..=28.
pub const PKTCNT: &FieldSpec = &super::REGISTERS[38].fields[1];
/// `DPID`, bits 29..=30.
pub const DPID: &FieldSpec = &super::REGISTERS[38].fields[2];
}
/// The register table.
pub static REGISTERS: [RegisterSpec; 39] = [
RegisterSpec { name: "FS_HCFG", offset: 0x0, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
FieldSpec { name: "FSLSPCS", bit: 0, width: 2, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "FSLSS", bit: 2, width: 1, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
] },
RegisterSpec { name: "HFIR", offset: 0x4, width: Width::W32, reset: 0x0000_EA60, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
FieldSpec { name: "FRIVL", bit: 0, width: 16, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
] },
RegisterSpec { name: "FS_HFNUM", offset: 0x8, width: Width::W32, reset: 0x0000_3FFF, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None, fields: &[
FieldSpec { name: "FRNUM", bit: 0, width: 16, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "FTREM", bit: 16, width: 16, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
] },
RegisterSpec { name: "FS_HPTXSTS", offset: 0x10, width: Width::W32, reset: 0x0008_0100, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
FieldSpec { name: "PTXFSAVL", bit: 0, width: 16, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "PTXQSAV", bit: 16, width: 8, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "PTXQTOP", bit: 24, width: 8, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
] },
RegisterSpec { name: "HAINT", offset: 0x14, width: Width::W32, reset: 0x0000_0000, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None, fields: &[
FieldSpec { name: "HAINT", bit: 0, width: 16, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
] },
RegisterSpec { name: "HAINTMSK", offset: 0x18, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
FieldSpec { name: "HAINTM", bit: 0, width: 16, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
] },
RegisterSpec { name: "FS_HPRT", offset: 0x40, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
FieldSpec { name: "PCSTS", bit: 0, width: 1, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "PCDET", bit: 1, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "PENA", bit: 2, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "PENCHNG", bit: 3, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "POCA", bit: 4, width: 1, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "POCCHNG", bit: 5, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "PRES", bit: 6, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "PSUSP", bit: 7, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "PRST", bit: 8, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "PLSTS", bit: 10, width: 2, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "PPWR", bit: 12, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "PTCTL", bit: 13, width: 4, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "PSPD", bit: 17, width: 2, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
] },
RegisterSpec { name: "FS_HCCHAR0", offset: 0x100, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
FieldSpec { name: "MPSIZ", bit: 0, width: 11, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "EPNUM", bit: 11, width: 4, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "EPDIR", bit: 15, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "LSDEV", bit: 17, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "EPTYP", bit: 18, width: 2, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "MCNT", bit: 20, width: 2, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "DAD", bit: 22, width: 7, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "ODDFRM", bit: 29, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "CHDIS", bit: 30, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "CHENA", bit: 31, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
] },
RegisterSpec { name: "FS_HCINT0", offset: 0x108, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
FieldSpec { name: "XFRC", bit: 0, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "CHH", bit: 1, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "STALL", bit: 3, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "NAK", bit: 4, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "ACK", bit: 5, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "TXERR", bit: 7, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "BBERR", bit: 8, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "FRMOR", bit: 9, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "DTERR", bit: 10, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
] },
RegisterSpec { name: "FS_HCINTMSK0", offset: 0x10C, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
FieldSpec { name: "XFRCM", bit: 0, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "CHHM", bit: 1, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "STALLM", bit: 3, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "NAKM", bit: 4, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "ACKM", bit: 5, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "NYET", bit: 6, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "TXERRM", bit: 7, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "BBERRM", bit: 8, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "FRMORM", bit: 9, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "DTERRM", bit: 10, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
] },
RegisterSpec { name: "FS_HCTSIZ0", offset: 0x110, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
FieldSpec { name: "XFRSIZ", bit: 0, width: 19, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "PKTCNT", bit: 19, width: 10, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "DPID", bit: 29, width: 2, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
] },
RegisterSpec { name: "FS_HCCHAR1", offset: 0x120, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
FieldSpec { name: "MPSIZ", bit: 0, width: 11, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "EPNUM", bit: 11, width: 4, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "EPDIR", bit: 15, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "LSDEV", bit: 17, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "EPTYP", bit: 18, width: 2, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "MCNT", bit: 20, width: 2, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "DAD", bit: 22, width: 7, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "ODDFRM", bit: 29, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "CHDIS", bit: 30, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "CHENA", bit: 31, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
] },
RegisterSpec { name: "FS_HCINT1", offset: 0x128, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
FieldSpec { name: "XFRC", bit: 0, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "CHH", bit: 1, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "STALL", bit: 3, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "NAK", bit: 4, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "ACK", bit: 5, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "TXERR", bit: 7, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "BBERR", bit: 8, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "FRMOR", bit: 9, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "DTERR", bit: 10, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
] },
RegisterSpec { name: "FS_HCINTMSK1", offset: 0x12C, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
FieldSpec { name: "XFRCM", bit: 0, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "CHHM", bit: 1, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "STALLM", bit: 3, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "NAKM", bit: 4, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "ACKM", bit: 5, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "NYET", bit: 6, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "TXERRM", bit: 7, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "BBERRM", bit: 8, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "FRMORM", bit: 9, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "DTERRM", bit: 10, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
] },
RegisterSpec { name: "FS_HCTSIZ1", offset: 0x130, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
FieldSpec { name: "XFRSIZ", bit: 0, width: 19, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "PKTCNT", bit: 19, width: 10, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "DPID", bit: 29, width: 2, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
] },
RegisterSpec { name: "FS_HCCHAR2", offset: 0x140, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
FieldSpec { name: "MPSIZ", bit: 0, width: 11, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "EPNUM", bit: 11, width: 4, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "EPDIR", bit: 15, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "LSDEV", bit: 17, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "EPTYP", bit: 18, width: 2, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "MCNT", bit: 20, width: 2, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "DAD", bit: 22, width: 7, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "ODDFRM", bit: 29, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "CHDIS", bit: 30, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "CHENA", bit: 31, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
] },
RegisterSpec { name: "FS_HCINT2", offset: 0x148, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
FieldSpec { name: "XFRC", bit: 0, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "CHH", bit: 1, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "STALL", bit: 3, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "NAK", bit: 4, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "ACK", bit: 5, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "TXERR", bit: 7, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "BBERR", bit: 8, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "FRMOR", bit: 9, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "DTERR", bit: 10, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
] },
RegisterSpec { name: "FS_HCINTMSK2", offset: 0x14C, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
FieldSpec { name: "XFRCM", bit: 0, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "CHHM", bit: 1, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "STALLM", bit: 3, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "NAKM", bit: 4, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "ACKM", bit: 5, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "NYET", bit: 6, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "TXERRM", bit: 7, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "BBERRM", bit: 8, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "FRMORM", bit: 9, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "DTERRM", bit: 10, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
] },
RegisterSpec { name: "FS_HCTSIZ2", offset: 0x150, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
FieldSpec { name: "XFRSIZ", bit: 0, width: 19, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "PKTCNT", bit: 19, width: 10, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "DPID", bit: 29, width: 2, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
] },
RegisterSpec { name: "FS_HCCHAR3", offset: 0x160, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
FieldSpec { name: "MPSIZ", bit: 0, width: 11, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "EPNUM", bit: 11, width: 4, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "EPDIR", bit: 15, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "LSDEV", bit: 17, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "EPTYP", bit: 18, width: 2, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "MCNT", bit: 20, width: 2, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "DAD", bit: 22, width: 7, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "ODDFRM", bit: 29, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "CHDIS", bit: 30, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "CHENA", bit: 31, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
] },
RegisterSpec { name: "FS_HCINT3", offset: 0x168, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
FieldSpec { name: "XFRC", bit: 0, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "CHH", bit: 1, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "STALL", bit: 3, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "NAK", bit: 4, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "ACK", bit: 5, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "TXERR", bit: 7, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "BBERR", bit: 8, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "FRMOR", bit: 9, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "DTERR", bit: 10, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
] },
RegisterSpec { name: "FS_HCINTMSK3", offset: 0x16C, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
FieldSpec { name: "XFRCM", bit: 0, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "CHHM", bit: 1, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "STALLM", bit: 3, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "NAKM", bit: 4, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "ACKM", bit: 5, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "NYET", bit: 6, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "TXERRM", bit: 7, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "BBERRM", bit: 8, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "FRMORM", bit: 9, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "DTERRM", bit: 10, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
] },
RegisterSpec { name: "FS_HCTSIZ3", offset: 0x170, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
FieldSpec { name: "XFRSIZ", bit: 0, width: 19, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "PKTCNT", bit: 19, width: 10, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "DPID", bit: 29, width: 2, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
] },
RegisterSpec { name: "FS_HCCHAR4", offset: 0x180, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
FieldSpec { name: "MPSIZ", bit: 0, width: 11, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "EPNUM", bit: 11, width: 4, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "EPDIR", bit: 15, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "LSDEV", bit: 17, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "EPTYP", bit: 18, width: 2, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "MCNT", bit: 20, width: 2, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "DAD", bit: 22, width: 7, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "ODDFRM", bit: 29, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "CHDIS", bit: 30, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "CHENA", bit: 31, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
] },
RegisterSpec { name: "FS_HCINT4", offset: 0x188, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
FieldSpec { name: "XFRC", bit: 0, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "CHH", bit: 1, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "STALL", bit: 3, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "NAK", bit: 4, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "ACK", bit: 5, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "TXERR", bit: 7, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "BBERR", bit: 8, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "FRMOR", bit: 9, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "DTERR", bit: 10, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
] },
RegisterSpec { name: "FS_HCINTMSK4", offset: 0x18C, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
FieldSpec { name: "XFRCM", bit: 0, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "CHHM", bit: 1, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "STALLM", bit: 3, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "NAKM", bit: 4, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "ACKM", bit: 5, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "NYET", bit: 6, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "TXERRM", bit: 7, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "BBERRM", bit: 8, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "FRMORM", bit: 9, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "DTERRM", bit: 10, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
] },
RegisterSpec { name: "FS_HCTSIZ4", offset: 0x190, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
FieldSpec { name: "XFRSIZ", bit: 0, width: 19, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "PKTCNT", bit: 19, width: 10, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "DPID", bit: 29, width: 2, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
] },
RegisterSpec { name: "FS_HCCHAR5", offset: 0x1A0, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
FieldSpec { name: "MPSIZ", bit: 0, width: 11, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "EPNUM", bit: 11, width: 4, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "EPDIR", bit: 15, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "LSDEV", bit: 17, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "EPTYP", bit: 18, width: 2, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "MCNT", bit: 20, width: 2, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "DAD", bit: 22, width: 7, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "ODDFRM", bit: 29, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "CHDIS", bit: 30, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "CHENA", bit: 31, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
] },
RegisterSpec { name: "FS_HCINT5", offset: 0x1A8, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
FieldSpec { name: "XFRC", bit: 0, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "CHH", bit: 1, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "STALL", bit: 3, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "NAK", bit: 4, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "ACK", bit: 5, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "TXERR", bit: 7, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "BBERR", bit: 8, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "FRMOR", bit: 9, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "DTERR", bit: 10, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
] },
RegisterSpec { name: "FS_HCINTMSK5", offset: 0x1AC, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
FieldSpec { name: "XFRCM", bit: 0, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "CHHM", bit: 1, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "STALLM", bit: 3, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "NAKM", bit: 4, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "ACKM", bit: 5, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "NYET", bit: 6, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "TXERRM", bit: 7, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "BBERRM", bit: 8, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "FRMORM", bit: 9, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "DTERRM", bit: 10, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
] },
RegisterSpec { name: "FS_HCTSIZ5", offset: 0x1B0, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
FieldSpec { name: "XFRSIZ", bit: 0, width: 19, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "PKTCNT", bit: 19, width: 10, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "DPID", bit: 29, width: 2, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
] },
RegisterSpec { name: "FS_HCCHAR6", offset: 0x1C0, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
FieldSpec { name: "MPSIZ", bit: 0, width: 11, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "EPNUM", bit: 11, width: 4, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "EPDIR", bit: 15, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "LSDEV", bit: 17, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "EPTYP", bit: 18, width: 2, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "MCNT", bit: 20, width: 2, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "DAD", bit: 22, width: 7, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "ODDFRM", bit: 29, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "CHDIS", bit: 30, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "CHENA", bit: 31, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
] },
RegisterSpec { name: "FS_HCINT6", offset: 0x1C8, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
FieldSpec { name: "XFRC", bit: 0, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "CHH", bit: 1, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "STALL", bit: 3, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "NAK", bit: 4, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "ACK", bit: 5, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "TXERR", bit: 7, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "BBERR", bit: 8, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "FRMOR", bit: 9, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "DTERR", bit: 10, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
] },
RegisterSpec { name: "FS_HCINTMSK6", offset: 0x1CC, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
FieldSpec { name: "XFRCM", bit: 0, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "CHHM", bit: 1, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "STALLM", bit: 3, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "NAKM", bit: 4, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "ACKM", bit: 5, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "NYET", bit: 6, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "TXERRM", bit: 7, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "BBERRM", bit: 8, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "FRMORM", bit: 9, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "DTERRM", bit: 10, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
] },
RegisterSpec { name: "FS_HCTSIZ6", offset: 0x1D0, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
FieldSpec { name: "XFRSIZ", bit: 0, width: 19, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "PKTCNT", bit: 19, width: 10, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "DPID", bit: 29, width: 2, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
] },
RegisterSpec { name: "FS_HCCHAR7", offset: 0x1E0, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
FieldSpec { name: "MPSIZ", bit: 0, width: 11, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "EPNUM", bit: 11, width: 4, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "EPDIR", bit: 15, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "LSDEV", bit: 17, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "EPTYP", bit: 18, width: 2, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "MCNT", bit: 20, width: 2, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "DAD", bit: 22, width: 7, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "ODDFRM", bit: 29, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "CHDIS", bit: 30, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "CHENA", bit: 31, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
] },
RegisterSpec { name: "FS_HCINT7", offset: 0x1E8, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
FieldSpec { name: "XFRC", bit: 0, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "CHH", bit: 1, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "STALL", bit: 3, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "NAK", bit: 4, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "ACK", bit: 5, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "TXERR", bit: 7, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "BBERR", bit: 8, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "FRMOR", bit: 9, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "DTERR", bit: 10, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
] },
RegisterSpec { name: "FS_HCINTMSK7", offset: 0x1EC, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
FieldSpec { name: "XFRCM", bit: 0, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "CHHM", bit: 1, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "STALLM", bit: 3, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "NAKM", bit: 4, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "ACKM", bit: 5, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "NYET", bit: 6, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "TXERRM", bit: 7, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "BBERRM", bit: 8, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "FRMORM", bit: 9, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "DTERRM", bit: 10, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
] },
RegisterSpec { name: "FS_HCTSIZ7", offset: 0x1F0, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
FieldSpec { name: "XFRSIZ", bit: 0, width: 19, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "PKTCNT", bit: 19, width: 10, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
FieldSpec { name: "DPID", bit: 29, width: 2, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
] },
];