1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
//! Mapper 059 - BMC-T3H53 / BMC-D1038
//!
//! Specifications:
//! - Main: <https://www.nesdev.org/wiki/INES_Mapper_059>
//!
//! Known Limitations:
//! - No known gameplay-blocking functional limitations are currently documented.
use crate::cartridge::NametableLayout;
use crate::cartridge::base_mapper::BaseMapper;
use crate::cartridge::mapper::{Mapper, MapperCapabilities};
/// Mapper 059 – BMC-T3H53 / BMC-D1038
///
/// Hardware: BMC-T3H53 / BMC-D1038 multicart board
///
/// Specifications:
/// - Main: <https://www.nesdev.org/wiki/INES_Mapper_059>
/// - PRG-ROM: Up to 256 KiB (16 × 16 KiB banks or 8 × 32 KiB blocks)
/// - CHR: Up to 64 KiB (8 × 8 KiB banks)
/// - PRG-RAM: None
/// - Mirroring: Programmable (H/V)
/// - Bus conflicts: None
///
/// The "register" is encoded in the CPU ADDRESS written to $8000-$FFFF,
/// not the data value. Address bit layout:
///
/// ```text
/// A~FEDC BA98 7654 3210
/// 1... ..LD SPPp MCCC
/// ```
/// - A9 = L: Lock bit (1 = ignore further writes until hard reset)
/// - A8 = D: Jumper read mode (1 = reads return jumper value 0x00)
/// - A7 = S: PRG size (0 = NROM-256/32KB, 1 = NROM-128/16KB)
/// - A6:A5 = PP: high 2 bits of PRG block/bank
/// - A4 = p: low PRG bank bit (only meaningful in NROM-128 mode)
/// - A3 = M: Mirroring (0 = Vertical, 1 = Horizontal)
/// - A2:A0 = CCC: 8 KiB CHR bank
///
/// PRG banking:
/// - NROM-128 (S=1): 16 KB bank = PPp; same bank at $8000–$BFFF and $C000–$FFFF
/// - NROM-256 (S=0): 32 KB window; $8000→PP<<1 (16KB), $C000→(PP<<1)+1 (16KB)
pub struct Mapper59 {
base: BaseMapper,
chr_bank: u8, // 3 bits: CCC
prg_pp: u8, // 2 bits: high PRG bits
prg_p: u8, // 1 bit: low PRG bank bit (NROM-128 only)
prg_mode_128: bool, // S: true = NROM-128 (16KB), false = NROM-256 (32KB)
jumper_mode: bool, // D: true = return jumper value (0x00) on reads
locked: bool, // L: true = ignore further writes
}
impl Mapper59 {
pub fn new(ctx: super::mapper::MapperContext) -> Self {
let capabilities = MapperCapabilities {
has_chr_banking: true,
has_dynamic_mirroring: true,
max_prg_ram_kb: 0,
prg_bank_size_kb: 16,
chr_bank_size_kb: 8,
..Default::default()
};
let mut base = BaseMapper::new(&ctx, capabilities);
base.configure_prg_banking(16 * 1024);
base.configure_chr_banking(8 * 1024);
// Default NROM-256: slot 0 = 0, slot 1 = 1
base.select_prg_page(1, 1);
Self {
base,
chr_bank: 0,
prg_pp: 0,
prg_p: 0,
prg_mode_128: false,
jumper_mode: false,
locked: false,
}
}
fn update_banks(&mut self) {
let bank = (self.prg_pp << 1) | self.prg_p;
self.base.apply_nrom_prg_banking(bank, self.prg_mode_128);
self.base.select_chr_page(0, self.chr_bank as i16);
}
}
impl Mapper for Mapper59 {
fn base(&self) -> &BaseMapper {
&self.base
}
fn base_mut(&mut self) -> &mut BaseMapper {
&mut self.base
}
fn read_prg(&self, addr: u16) -> u8 {
if self.jumper_mode {
return 0x00;
}
match addr {
0x8000..=0xFFFF => self.base.read_prg_banked(addr),
_ => 0,
}
}
fn write_prg(&mut self, addr: u16, value: u8) {
let _ = value; // data is ignored; info is in address bits
if self.locked {
return;
}
if let 0x8000..=0xFFFF = addr {
let a = addr as usize;
self.chr_bank = (a & 0x07) as u8;
let mirroring_h = (a >> 3) & 1 != 0;
self.prg_p = ((a >> 4) & 1) as u8;
self.prg_pp = ((a >> 5) & 3) as u8;
self.prg_mode_128 = (a >> 7) & 1 != 0;
self.jumper_mode = (a >> 8) & 1 != 0;
if (a >> 9) & 1 != 0 {
self.locked = true;
}
self.base.set_mirroring_hv(mirroring_h);
self.update_banks();
}
}
fn registers_snapshot(&self) -> Vec<u8> {
let flags = (self.prg_mode_128 as u8)
| ((self.jumper_mode as u8) << 1)
| ((self.locked as u8) << 2)
| ((if self.base.mirroring() == NametableLayout::Horizontal {
1u8
} else {
0u8
}) << 3);
vec![self.chr_bank, self.prg_pp, self.prg_p, flags]
}
fn restore_registers(&mut self, data: &[u8]) {
if data.len() >= 4 {
self.chr_bank = data[0];
self.prg_pp = data[1];
self.prg_p = data[2];
let flags = data[3];
self.prg_mode_128 = flags & 1 != 0;
self.jumper_mode = flags & 2 != 0;
self.locked = flags & 4 != 0;
self.base.set_mirroring_hv(flags & 8 != 0);
self.update_banks();
}
}
fn reset(&mut self) {
self.locked = false;
}
}
#[cfg(test)]
mod tests {
use super::Mapper59;
use crate::cartridge::NametableLayout;
use crate::cartridge::mapper::{Mapper, MapperContext, create_mapper};
use crate::cartridge::test_helpers::banked_data;
const CHR_BANKS: usize = 5; // non-power-of-two to catch wrapping bugs
const PRG_BANKS: usize = 6; // 6 × 16KB = 96KB
fn make_mapper() -> Mapper59 {
Mapper59::new(MapperContext::new_for_test(
59,
banked_data(0x4000, PRG_BANKS),
banked_data(0x2000, CHR_BANKS),
NametableLayout::Vertical,
))
}
// ── Factory ────────────────────────────────────────────────────────────
#[test]
fn mapper_59_is_registered() {
let result = create_mapper(MapperContext::new_for_test(
59,
banked_data(0x4000, PRG_BANKS),
banked_data(0x2000, CHR_BANKS),
NametableLayout::Vertical,
));
assert!(
result.is_ok(),
"Mapper 59 must be registered in the factory"
);
}
// ── Power-on state ─────────────────────────────────────────────────────
#[test]
fn power_on_state_prg_bank_0_chr_bank_0_vertical_mirroring() {
let mapper = make_mapper();
assert_eq!(mapper.read_prg(0x8000), 0, "PRG bank 0 at $8000");
assert_eq!(mapper.get_mirroring(), NametableLayout::Vertical);
}
// ── CHR banking ────────────────────────────────────────────────────────
#[test]
fn chr_bank_selected_by_address_bits_2_0() {
let mut mapper = make_mapper();
// Write addr = 0x8000 | (bank << 0) for CCC bits
// Select CHR bank 3: A2:A0 = 011
mapper.write_prg(0x8003, 0);
// bank 3 % 5 = 3; each bank is filled with its bank index
assert_eq!(mapper.read_chr(0x0000), 3, "CHR bank 3 should be selected");
}
// ── Mirroring ──────────────────────────────────────────────────────────
#[test]
fn mirroring_selected_by_address_bit_3() {
let mut mapper = make_mapper();
mapper.write_prg(0x8000 | (1 << 3), 0); // A3=1 → Horizontal
assert_eq!(mapper.get_mirroring(), NametableLayout::Horizontal);
mapper.write_prg(0x8000, 0); // A3=0 → Vertical
assert_eq!(mapper.get_mirroring(), NametableLayout::Vertical);
}
// ── PRG NROM-128 (S=1) ─────────────────────────────────────────────────
#[test]
fn nrom128_mode_s1_both_halves_same_bank() {
let mut mapper = make_mapper();
// S=1 (bit 7), PP=0 (bits 6:5), p=1 (bit 4) → bank 1
// addr = 0x8000 | (1<<7) | (1<<4) = 0x8090
mapper.write_prg(0x8090, 0);
let lo = mapper.read_prg(0x8000); // bank 1
let hi = mapper.read_prg(0xC000); // same bank 1
assert_eq!(lo, 1, "$8000 must read bank 1 in NROM-128 mode");
assert_eq!(hi, 1, "$C000 must read same bank 1 in NROM-128 mode");
}
// ── PRG NROM-256 (S=0) ─────────────────────────────────────────────────
#[test]
fn nrom256_mode_s0_8000_and_c000_are_different_halves() {
let mut mapper = make_mapper();
// S=0, PP=1 (bits 6:5 = 01 → A6=0, A5=1) → base = PP<<1 = 2
// addr = 0x8000 | (1<<5) = 0x8020
mapper.write_prg(0x8020, 0);
let lo = mapper.read_prg(0x8000); // bank 2
let hi = mapper.read_prg(0xC000); // bank 3
assert_eq!(lo, 2, "$8000 must read bank 2 in NROM-256 PP=1 mode");
assert_eq!(hi, 3, "$C000 must read bank 3 in NROM-256 PP=1 mode");
}
// ── Lock bit ───────────────────────────────────────────────────────────
#[test]
fn lock_bit_prevents_further_writes() {
let mut mapper = make_mapper();
// Lock while simultaneously selecting CHR bank 2 (A9=1, A2:A0=2 → addr = $8202)
mapper.write_prg(0x8000 | (1 << 9) | 2, 0); // A9=1 (lock), A2:A0=2
mapper.write_prg(0x8004, 0); // attempt to set CHR bank 4 → ignored
assert_eq!(
mapper.read_chr(0x0000),
2,
"Lock must prevent further writes"
);
}
#[test]
fn lock_releases_on_reset() {
let mut mapper = make_mapper();
mapper.write_prg(0x8000 | (1 << 9), 0); // lock
mapper.reset();
mapper.write_prg(0x8004, 0); // CHR bank 4
assert_eq!(
mapper.read_chr(0x0000),
4,
"After reset, lock must be released"
);
}
// ── Snapshot round-trip ────────────────────────────────────────────────
#[test]
fn registers_snapshot_round_trips() {
let mut original = make_mapper();
original.write_prg(0x8000 | (1 << 7) | (2 << 5) | (1 << 4) | (1 << 3) | 3, 0);
// S=1, PP=2, p=1, M=1, CCC=3
let snap = original.registers_snapshot();
let mut restored = make_mapper();
restored.restore_registers(&snap);
assert_eq!(restored.read_prg(0x8000), original.read_prg(0x8000));
assert_eq!(restored.get_mirroring(), original.get_mirroring());
}
}