pub const ADC_SEQ_A: u32 = 0;
pub const ADC_SEQ_B: u32 = 1;
pub const ADC_CH0: u32 = 0;
pub const ADC_CH1: u32 = 1;
pub const ADC_CH2: u32 = 2;
pub const ADC_CH3: u32 = 3;
pub const ADC_CH4: u32 = 4;
pub const ADC_CH5: u32 = 5;
pub const ADC_CH6: u32 = 6;
pub const ADC_CH7: u32 = 7;
pub const ADC_CH8: u32 = 8;
pub const ADC_CH9: u32 = 9;
pub const ADC_CH10: u32 = 10;
pub const ADC_CH11: u32 = 11;
pub const ADC_CH12: u32 = 12;
pub const ADC_CH13: u32 = 13;
pub const ADC_CH14: u32 = 14;
pub const ADC_CH15: u32 = 15;
pub const ADC_CH16: u32 = 16;
pub const ADC1_EXT_CH: u32 = 16;
pub const ADC2_EXT_CH: u32 = 8;
pub const ADC_MX_CH0: u32 = 1;
pub const ADC_MX_CH1: u32 = 2;
pub const ADC_MX_CH2: u32 = 4;
pub const ADC_MX_CH3: u32 = 8;
pub const ADC_MX_CH4: u32 = 16;
pub const ADC_MX_CH5: u32 = 32;
pub const ADC_MX_CH6: u32 = 64;
pub const ADC_MX_CH7: u32 = 128;
pub const ADC_MX_CH8: u32 = 256;
pub const ADC_MX_CH9: u32 = 512;
pub const ADC_MX_CH10: u32 = 1024;
pub const ADC_MX_CH11: u32 = 2048;
pub const ADC_MX_CH12: u32 = 4096;
pub const ADC_MX_CH13: u32 = 8192;
pub const ADC_MX_CH14: u32 = 16384;
pub const ADC_MX_CH15: u32 = 32768;
pub const ADC_MX_CH16: u32 = 65536;
pub const ADC1_MX_CH_ALL: u32 = 65535;
pub const ADC2_MX_CH_ALL: u32 = 511;
pub const ADC_MD_SEQA_SINGLESHOT: u32 = 0;
pub const ADC_MD_SEQA_CONT: u32 = 1;
pub const ADC_MD_SEQA_SEQB_SINGLESHOT: u32 = 2;
pub const ADC_MD_SEQA_CONT_SEQB_SINGLESHOT: u32 = 3;
pub const ADC_RESOLUTION_12BIT: u32 = 0;
pub const ADC_RESOLUTION_10BIT: u32 = 16;
pub const ADC_RESOLUTION_8BIT: u32 = 32;
pub const ADC_DATAALIGN_RIGHT: u32 = 0;
pub const ADC_DATAALIGN_LEFT: u32 = 128;
pub const ADC_AVG_CNT2: u32 = 0;
pub const ADC_AVG_CNT4: u32 = 256;
pub const ADC_AVG_CNT8: u32 = 512;
pub const ADC_AVG_CNT16: u32 = 768;
pub const ADC_AVG_CNT32: u32 = 1024;
pub const ADC_AVG_CNT64: u32 = 1280;
pub const ADC_AVG_CNT128: u32 = 1536;
pub const ADC_AVG_CNT256: u32 = 1792;
pub const ADC_SEQA_RESUME_SCAN_CONT: u32 = 0;
pub const ADC_SEQA_RESUME_SCAN_RESTART: u32 = 4;
pub const ADC_HARDTRIG_ADTRG_PIN: u32 = 0;
pub const ADC_HARDTRIG_EVT0: u32 = 1;
pub const ADC_HARDTRIG_EVT1: u32 = 2;
pub const ADC_HARDTRIG_EVT0_EVT1: u32 = 3;
pub const ADC_INT_EOCA: u32 = 1;
pub const ADC_INT_EOCB: u32 = 2;
pub const ADC_INT_ALL: u32 = 3;
pub const ADC_FLAG_EOCA: u32 = 1;
pub const ADC_FLAG_EOCB: u32 = 2;
pub const ADC_FLAG_ALL: u32 = 3;
pub const ADC_SYNC_ADC1_ADC2: u32 = 0;
pub const ADC_SYNC_SINGLE_DELAY_TRIG: u32 = 0;
pub const ADC_SYNC_SINGLE_PARALLEL_TRIG: u32 = 32;
pub const ADC_SYNC_CYCLIC_DELAY_TRIG: u32 = 64;
pub const ADC_SYNC_CYCLIC_PARALLEL_TRIG: u32 = 96;
pub const ADC_AWD0: u32 = 0;
pub const ADC_AWD_INT_SEQA: u32 = 64;
pub const ADC_AWD_INT_SEQB: u32 = 128;
pub const ADC_AWD_INT_ALL: u32 = 192;
pub const ADC_AWD_MD_CMP_OUT: u32 = 0;
pub const ADC_AWD_MD_CMP_IN: u32 = 1;
pub const ADC_AWD_FLAG_CH0: u32 = 1;
pub const ADC_AWD_FLAG_CH1: u32 = 2;
pub const ADC_AWD_FLAG_CH2: u32 = 4;
pub const ADC_AWD_FLAG_CH3: u32 = 8;
pub const ADC_AWD_FLAG_CH4: u32 = 16;
pub const ADC_AWD_FLAG_CH5: u32 = 32;
pub const ADC_AWD_FLAG_CH6: u32 = 64;
pub const ADC_AWD_FLAG_CH7: u32 = 128;
pub const ADC_AWD_FLAG_CH8: u32 = 256;
pub const ADC_AWD_FLAG_CH9: u32 = 512;
pub const ADC_AWD_FLAG_CH10: u32 = 1024;
pub const ADC_AWD_FLAG_CH11: u32 = 2048;
pub const ADC_AWD_FLAG_CH12: u32 = 4096;
pub const ADC_AWD_FLAG_CH13: u32 = 8192;
pub const ADC_AWD_FLAG_CH14: u32 = 16384;
pub const ADC_AWD_FLAG_CH15: u32 = 32768;
pub const ADC_AWD_FLAG_CH16: u32 = 65536;
pub const ADC1_AWD_FLAG_ALL: u32 = 131071;
pub const ADC2_AWD_FLAG_ALL: u32 = 511;
pub const ADC_PGA1: u32 = 0;
pub const ADC_PGA_GAIN_2: u32 = 0;
pub const ADC_PGA_GAIN_2P133: u32 = 1;
pub const ADC_PGA_GAIN_2P286: u32 = 2;
pub const ADC_PGA_GAIN_2P667: u32 = 3;
pub const ADC_PGA_GAIN_2P909: u32 = 4;
pub const ADC_PGA_GAIN_3P2: u32 = 5;
pub const ADC_PGA_GAIN_3P556: u32 = 6;
pub const ADC_PGA_GAIN_4: u32 = 7;
pub const ADC_PGA_GAIN_4P571: u32 = 8;
pub const ADC_PGA_GAIN_5P333: u32 = 9;
pub const ADC_PGA_GAIN_6P4: u32 = 10;
pub const ADC_PGA_GAIN_8: u32 = 11;
pub const ADC_PGA_GAIN_10P667: u32 = 12;
pub const ADC_PGA_GAIN_16: u32 = 13;
pub const ADC_PGA_GAIN_32: u32 = 14;
pub const ADC_PGA_VSS_PGAVSS: u32 = 0;
pub const ADC_PGA_VSS_AVSS: u32 = 1;
pub const ADC_PGA_PIN_ADC1_PA0: u32 = 1;
pub const ADC_PGA_PIN_ADC1_PA1: u32 = 2;
pub const ADC_PGA_PIN_ADC1_PA2: u32 = 4;
pub const ADC_PGA_PIN_ADC1_PA3: u32 = 8;
pub const ADC_PGA_PIN_ADC1_PA4: u32 = 16;
pub const ADC_PGA_PIN_ADC1_PA5: u32 = 32;
pub const ADC_PGA_PIN_ADC1_PA6: u32 = 64;
pub const ADC_PGA_PIN_ADC1_PA7: u32 = 128;
pub const ADC_PGA_8BIT_DAC: u32 = 256;
pub const ADC1_PIN_PA0: u32 = 0;
pub const ADC1_PIN_PA1: u32 = 1;
pub const ADC1_PIN_PA2: u32 = 2;
pub const ADC1_PIN_PA3: u32 = 3;
pub const ADC1_PIN_PA4: u32 = 4;
pub const ADC1_PIN_PA5: u32 = 5;
pub const ADC1_PIN_PA6: u32 = 6;
pub const ADC1_PIN_PA7: u32 = 7;
pub const ADC1_PIN_PB0: u32 = 8;
pub const ADC1_PIN_PB1: u32 = 9;
pub const ADC1_PIN_PC0: u32 = 10;
pub const ADC1_PIN_PC1: u32 = 11;
pub const ADC1_PIN_PC2: u32 = 12;
pub const ADC1_PIN_PC3: u32 = 13;
pub const ADC1_PIN_PC4: u32 = 14;
pub const ADC1_PIN_PC5: u32 = 15;
pub const ADC2_PIN_PA4: u32 = 0;
pub const ADC2_PIN_PA5: u32 = 1;
pub const ADC2_PIN_PA6: u32 = 2;
pub const ADC2_PIN_PA7: u32 = 3;
pub const ADC2_PIN_PB0: u32 = 4;
pub const ADC2_PIN_PB1: u32 = 5;
pub const ADC2_PIN_PC0: u32 = 6;
pub const ADC2_PIN_PC1: u32 = 7;
pub const en_functional_state_t_DISABLE: en_functional_state_t = 0;
pub const en_functional_state_t_ENABLE: en_functional_state_t = 1;
#[doc = " @brief Functional state"]
pub type en_functional_state_t = ::core::ffi::c_uint;
pub const en_flag_status_t_RESET: en_flag_status_t = 0;
pub const en_flag_status_t_SET: en_flag_status_t = 1;
#[doc = " @brief Flag status"]
pub type en_flag_status_t = ::core::ffi::c_uint;
#[doc = " @brief ADC"]
#[repr(C)]
#[derive(Debug, Copy, Clone, PartialEq)]
pub struct CM_ADC_TypeDef {
pub STR: u8,
pub RESERVED0: [u8; 1usize],
pub CR0: u16,
pub CR1: u16,
pub RESERVED1: [u8; 4usize],
pub TRGSR: u16,
pub CHSELRA: u32,
pub CHSELRB: u32,
pub AVCHSELR: u32,
pub RESERVED2: [u8; 8usize],
pub SSTR0: u8,
pub SSTR1: u8,
pub SSTR2: u8,
pub SSTR3: u8,
pub SSTR4: u8,
pub SSTR5: u8,
pub SSTR6: u8,
pub SSTR7: u8,
pub SSTR8: u8,
pub SSTR9: u8,
pub SSTR10: u8,
pub SSTR11: u8,
pub SSTR12: u8,
pub SSTR13: u8,
pub SSTR14: u8,
pub SSTR15: u8,
pub SSTRL: u8,
pub RESERVED3: [u8; 7usize],
pub CHMUXR0: u16,
pub CHMUXR1: u16,
pub CHMUXR2: u16,
pub CHMUXR3: u16,
pub RESERVED4: [u8; 6usize],
pub ISR: u8,
pub ICR: u8,
pub RESERVED5: [u8; 4usize],
pub SYNCCR: u16,
pub RESERVED6: [u8; 2usize],
pub DR0: u16,
pub DR1: u16,
pub DR2: u16,
pub DR3: u16,
pub DR4: u16,
pub DR5: u16,
pub DR6: u16,
pub DR7: u16,
pub DR8: u16,
pub DR9: u16,
pub DR10: u16,
pub DR11: u16,
pub DR12: u16,
pub DR13: u16,
pub DR14: u16,
pub DR15: u16,
pub DR16: u16,
pub RESERVED7: [u8; 46usize],
pub AWDCR: u16,
pub RESERVED8: [u8; 2usize],
pub AWDDR0: u16,
pub AWDDR1: u16,
pub RESERVED9: [u8; 4usize],
pub AWDCHSR: u32,
pub AWDSR: u32,
pub RESERVED10: [u8; 12usize],
pub PGACR: u16,
pub PGAGSR: u16,
pub RESERVED11: [u8; 8usize],
pub PGAINSR0: u16,
pub PGAINSR1: u16,
}
#[doc = " Global type definitions ('typedef')\n/\n/**\n @defgroup ADC_Global_Types ADC Global Types\n @{\n/\n/**\n @brief Structure definition of analog watchdog(AWD) configuration."]
#[repr(C)]
#[derive(Debug, Copy, Clone, PartialEq)]
pub struct stc_adc_awd_config_t {
#[doc = "< Specifies the ADC analog watchdog mode.\nThis parameter can be a value of @ref ADC_AWD_Mode"]
pub u16WatchdogMode: u16,
#[doc = "< Specifies the ADC analog watchdog Low threshold value."]
pub u16LowThreshold: u16,
#[doc = "< Specifies the ADC analog watchdog High threshold value."]
pub u16HighThreshold: u16,
}
#[doc = " @brief Structure definition of ADC initialization."]
#[repr(C)]
#[derive(Debug, Copy, Clone, PartialEq)]
pub struct stc_adc_init_t {
#[doc = "< Specifies the ADC scan convert mode.\nThis parameter can be a value of @ref ADC_Scan_Mode"]
pub u16ScanMode: u16,
#[doc = "< Specifies the ADC resolution.\nThis parameter can be a value of @ref ADC_Resolution"]
pub u16Resolution: u16,
#[doc = "< Specifies ADC data alignment.\nThis parameter can be a value of @ref ADC_Data_Align"]
pub u16DataAlign: u16,
}
unsafe extern "C" {
#[doc = "Global function prototypes (definition in C source)\n/\n/**\n @addtogroup ADC_Global_Functions\n @{\n/\n/*******************************************************************************\nBasic features"]
pub fn ADC_Init(ADCx: *mut CM_ADC_TypeDef, pstcAdcInit: *const stc_adc_init_t) -> i32;
pub fn ADC_DeInit(ADCx: *mut CM_ADC_TypeDef) -> i32;
pub fn ADC_StructInit(pstcAdcInit: *mut stc_adc_init_t) -> i32;
pub fn ADC_ChCmd(
ADCx: *mut CM_ADC_TypeDef,
u8Seq: u8,
u8Ch: u8,
enNewState: en_functional_state_t,
);
pub fn ADC_MxChCmd(
ADCx: *mut CM_ADC_TypeDef,
u8Seq: u8,
u32MxCh: u32,
enNewState: en_functional_state_t,
);
pub fn ADC_SetSampleTime(ADCx: *mut CM_ADC_TypeDef, u8Ch: u8, u8SampleTime: u8);
pub fn ADC_ConvDataAverageConfig(ADCx: *mut CM_ADC_TypeDef, u16AverageCount: u16);
pub fn ADC_ConvDataAverageChCmd(
ADCx: *mut CM_ADC_TypeDef,
u8Ch: u8,
enNewState: en_functional_state_t,
);
pub fn ADC_ConvDataAverageMxChCmd(
ADCx: *mut CM_ADC_TypeDef,
u32MxCh: u32,
enNewState: en_functional_state_t,
);
pub fn ADC_TriggerConfig(ADCx: *mut CM_ADC_TypeDef, u8Seq: u8, u16TriggerSel: u16);
pub fn ADC_TriggerCmd(ADCx: *mut CM_ADC_TypeDef, u8Seq: u8, enNewState: en_functional_state_t);
pub fn ADC_IntCmd(ADCx: *mut CM_ADC_TypeDef, u8IntType: u8, enNewState: en_functional_state_t);
pub fn ADC_Start(ADCx: *mut CM_ADC_TypeDef) -> i32;
pub fn ADC_Stop(ADCx: *mut CM_ADC_TypeDef);
pub fn ADC_GetValue(ADCx: *const CM_ADC_TypeDef, u8Ch: u8) -> u16;
pub fn ADC_GetResolution(ADCx: *const CM_ADC_TypeDef) -> u16;
pub fn ADC_GetStatus(ADCx: *const CM_ADC_TypeDef, u8Flag: u8) -> en_flag_status_t;
pub fn ADC_ClearStatus(ADCx: *mut CM_ADC_TypeDef, u8Flag: u8);
#[doc = "Advanced features"]
pub fn ADC_ChRemap(ADCx: *mut CM_ADC_TypeDef, u8Ch: u8, u8AdcPin: u8);
pub fn ADC_GetChPin(ADCx: *const CM_ADC_TypeDef, u8Ch: u8) -> u8;
pub fn ADC_ResetChMapping(ADCx: *mut CM_ADC_TypeDef);
pub fn ADC_SyncModeConfig(u16SyncUnit: u16, u16SyncMode: u16, u8TriggerDelay: u8);
pub fn ADC_SyncModeCmd(enNewState: en_functional_state_t);
pub fn ADC_AWD_Config(
ADCx: *mut CM_ADC_TypeDef,
u8AwdUnit: u8,
u8Ch: u8,
pstcAwd: *const stc_adc_awd_config_t,
) -> i32;
pub fn ADC_AWD_SetMode(ADCx: *mut CM_ADC_TypeDef, u8AwdUnit: u8, u16WatchdogMode: u16);
pub fn ADC_AWD_GetMode(ADCx: *mut CM_ADC_TypeDef, u8AwdUnit: u8) -> u16;
pub fn ADC_AWD_SetThreshold(
ADCx: *mut CM_ADC_TypeDef,
u8AwdUnit: u8,
u16LowThreshold: u16,
u16HighThreshold: u16,
);
pub fn ADC_AWD_SelectCh(ADCx: *mut CM_ADC_TypeDef, u8AwdUnit: u8, u8Ch: u8);
pub fn ADC_AWD_DeselectCh(ADCx: *mut CM_ADC_TypeDef, u8AwdUnit: u8, u8Ch: u8);
pub fn ADC_AWD_Cmd(ADCx: *mut CM_ADC_TypeDef, u8AwdUnit: u8, enNewState: en_functional_state_t);
pub fn ADC_AWD_IntCmd(
ADCx: *mut CM_ADC_TypeDef,
u16IntType: u16,
enNewState: en_functional_state_t,
);
pub fn ADC_AWD_GetStatus(ADCx: *const CM_ADC_TypeDef, u32Flag: u32) -> en_flag_status_t;
pub fn ADC_AWD_ClearStatus(ADCx: *mut CM_ADC_TypeDef, u32Flag: u32);
pub fn ADC_PGA_Config(ADCx: *mut CM_ADC_TypeDef, u8PgaUnit: u8, u8Gain: u8, u8PgaVss: u8);
pub fn ADC_PGA_Cmd(ADCx: *mut CM_ADC_TypeDef, u8PgaUnit: u8, enNewState: en_functional_state_t);
pub fn ADC_PGA_SelectInputSrc(ADCx: *mut CM_ADC_TypeDef, u16PgaInputSrc: u16);
pub fn ADC_PGA_DeselectInputSrc(ADCx: *mut CM_ADC_TypeDef);
pub fn ADC_DataRegAutoClearCmd(ADCx: *mut CM_ADC_TypeDef, enNewState: en_functional_state_t);
pub fn ADC_SetSeqAResumeMode(ADCx: *mut CM_ADC_TypeDef, u16SeqAResumeMode: u16);
}