#[doc = "Register `SOC_CLK_CTRL1` reader"]
pub type R = crate::R<SOC_CLK_CTRL1_SPEC>;
#[doc = "Register `SOC_CLK_CTRL1` writer"]
pub type W = crate::W<SOC_CLK_CTRL1_SPEC>;
#[doc = "Field `GPSPI2_SYS_CLK_EN` reader - Reserved"]
pub type GPSPI2_SYS_CLK_EN_R = crate::BitReader;
#[doc = "Field `GPSPI2_SYS_CLK_EN` writer - Reserved"]
pub type GPSPI2_SYS_CLK_EN_W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `GPSPI3_SYS_CLK_EN` reader - Reserved"]
pub type GPSPI3_SYS_CLK_EN_R = crate::BitReader;
#[doc = "Field `GPSPI3_SYS_CLK_EN` writer - Reserved"]
pub type GPSPI3_SYS_CLK_EN_W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `REGDMA_SYS_CLK_EN` reader - Reserved"]
pub type REGDMA_SYS_CLK_EN_R = crate::BitReader;
#[doc = "Field `REGDMA_SYS_CLK_EN` writer - Reserved"]
pub type REGDMA_SYS_CLK_EN_W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `AHB_PDMA_SYS_CLK_EN` reader - Reserved"]
pub type AHB_PDMA_SYS_CLK_EN_R = crate::BitReader;
#[doc = "Field `AHB_PDMA_SYS_CLK_EN` writer - Reserved"]
pub type AHB_PDMA_SYS_CLK_EN_W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `AXI_PDMA_SYS_CLK_EN` reader - Reserved"]
pub type AXI_PDMA_SYS_CLK_EN_R = crate::BitReader;
#[doc = "Field `AXI_PDMA_SYS_CLK_EN` writer - Reserved"]
pub type AXI_PDMA_SYS_CLK_EN_W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `GDMA_SYS_CLK_EN` reader - Reserved"]
pub type GDMA_SYS_CLK_EN_R = crate::BitReader;
#[doc = "Field `GDMA_SYS_CLK_EN` writer - Reserved"]
pub type GDMA_SYS_CLK_EN_W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `DMA2D_SYS_CLK_EN` reader - Reserved"]
pub type DMA2D_SYS_CLK_EN_R = crate::BitReader;
#[doc = "Field `DMA2D_SYS_CLK_EN` writer - Reserved"]
pub type DMA2D_SYS_CLK_EN_W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `VPU_SYS_CLK_EN` reader - Reserved"]
pub type VPU_SYS_CLK_EN_R = crate::BitReader;
#[doc = "Field `VPU_SYS_CLK_EN` writer - Reserved"]
pub type VPU_SYS_CLK_EN_W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `JPEG_SYS_CLK_EN` reader - Reserved"]
pub type JPEG_SYS_CLK_EN_R = crate::BitReader;
#[doc = "Field `JPEG_SYS_CLK_EN` writer - Reserved"]
pub type JPEG_SYS_CLK_EN_W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `PPA_SYS_CLK_EN` reader - Reserved"]
pub type PPA_SYS_CLK_EN_R = crate::BitReader;
#[doc = "Field `PPA_SYS_CLK_EN` writer - Reserved"]
pub type PPA_SYS_CLK_EN_W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `CSI_BRG_SYS_CLK_EN` reader - Reserved"]
pub type CSI_BRG_SYS_CLK_EN_R = crate::BitReader;
#[doc = "Field `CSI_BRG_SYS_CLK_EN` writer - Reserved"]
pub type CSI_BRG_SYS_CLK_EN_W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `CSI_HOST_SYS_CLK_EN` reader - Reserved"]
pub type CSI_HOST_SYS_CLK_EN_R = crate::BitReader;
#[doc = "Field `CSI_HOST_SYS_CLK_EN` writer - Reserved"]
pub type CSI_HOST_SYS_CLK_EN_W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `DSI_SYS_CLK_EN` reader - Reserved"]
pub type DSI_SYS_CLK_EN_R = crate::BitReader;
#[doc = "Field `DSI_SYS_CLK_EN` writer - Reserved"]
pub type DSI_SYS_CLK_EN_W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `EMAC_SYS_CLK_EN` reader - Reserved"]
pub type EMAC_SYS_CLK_EN_R = crate::BitReader;
#[doc = "Field `EMAC_SYS_CLK_EN` writer - Reserved"]
pub type EMAC_SYS_CLK_EN_W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `SDMMC_SYS_CLK_EN` reader - Reserved"]
pub type SDMMC_SYS_CLK_EN_R = crate::BitReader;
#[doc = "Field `SDMMC_SYS_CLK_EN` writer - Reserved"]
pub type SDMMC_SYS_CLK_EN_W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `USB_OTG11_SYS_CLK_EN` reader - Reserved"]
pub type USB_OTG11_SYS_CLK_EN_R = crate::BitReader;
#[doc = "Field `USB_OTG11_SYS_CLK_EN` writer - Reserved"]
pub type USB_OTG11_SYS_CLK_EN_W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `USB_OTG20_SYS_CLK_EN` reader - Reserved"]
pub type USB_OTG20_SYS_CLK_EN_R = crate::BitReader;
#[doc = "Field `USB_OTG20_SYS_CLK_EN` writer - Reserved"]
pub type USB_OTG20_SYS_CLK_EN_W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `UHCI_SYS_CLK_EN` reader - Reserved"]
pub type UHCI_SYS_CLK_EN_R = crate::BitReader;
#[doc = "Field `UHCI_SYS_CLK_EN` writer - Reserved"]
pub type UHCI_SYS_CLK_EN_W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `UART0_SYS_CLK_EN` reader - Reserved"]
pub type UART0_SYS_CLK_EN_R = crate::BitReader;
#[doc = "Field `UART0_SYS_CLK_EN` writer - Reserved"]
pub type UART0_SYS_CLK_EN_W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `UART1_SYS_CLK_EN` reader - Reserved"]
pub type UART1_SYS_CLK_EN_R = crate::BitReader;
#[doc = "Field `UART1_SYS_CLK_EN` writer - Reserved"]
pub type UART1_SYS_CLK_EN_W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `UART2_SYS_CLK_EN` reader - Reserved"]
pub type UART2_SYS_CLK_EN_R = crate::BitReader;
#[doc = "Field `UART2_SYS_CLK_EN` writer - Reserved"]
pub type UART2_SYS_CLK_EN_W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `UART3_SYS_CLK_EN` reader - Reserved"]
pub type UART3_SYS_CLK_EN_R = crate::BitReader;
#[doc = "Field `UART3_SYS_CLK_EN` writer - Reserved"]
pub type UART3_SYS_CLK_EN_W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `UART4_SYS_CLK_EN` reader - Reserved"]
pub type UART4_SYS_CLK_EN_R = crate::BitReader;
#[doc = "Field `UART4_SYS_CLK_EN` writer - Reserved"]
pub type UART4_SYS_CLK_EN_W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `PARLIO_SYS_CLK_EN` reader - Reserved"]
pub type PARLIO_SYS_CLK_EN_R = crate::BitReader;
#[doc = "Field `PARLIO_SYS_CLK_EN` writer - Reserved"]
pub type PARLIO_SYS_CLK_EN_W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `ETM_SYS_CLK_EN` reader - Reserved"]
pub type ETM_SYS_CLK_EN_R = crate::BitReader;
#[doc = "Field `ETM_SYS_CLK_EN` writer - Reserved"]
pub type ETM_SYS_CLK_EN_W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `PVT_SYS_CLK_EN` reader - Reserved"]
pub type PVT_SYS_CLK_EN_R = crate::BitReader;
#[doc = "Field `PVT_SYS_CLK_EN` writer - Reserved"]
pub type PVT_SYS_CLK_EN_W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `CRYPTO_SYS_CLK_EN` reader - Reserved"]
pub type CRYPTO_SYS_CLK_EN_R = crate::BitReader;
#[doc = "Field `CRYPTO_SYS_CLK_EN` writer - Reserved"]
pub type CRYPTO_SYS_CLK_EN_W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `KEY_MANAGER_SYS_CLK_EN` reader - Reserved"]
pub type KEY_MANAGER_SYS_CLK_EN_R = crate::BitReader;
#[doc = "Field `KEY_MANAGER_SYS_CLK_EN` writer - Reserved"]
pub type KEY_MANAGER_SYS_CLK_EN_W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `BITSRAMBLER_SYS_CLK_EN` reader - Reserved"]
pub type BITSRAMBLER_SYS_CLK_EN_R = crate::BitReader;
#[doc = "Field `BITSRAMBLER_SYS_CLK_EN` writer - Reserved"]
pub type BITSRAMBLER_SYS_CLK_EN_W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `BITSRAMBLER_RX_SYS_CLK_EN` reader - Reserved"]
pub type BITSRAMBLER_RX_SYS_CLK_EN_R = crate::BitReader;
#[doc = "Field `BITSRAMBLER_RX_SYS_CLK_EN` writer - Reserved"]
pub type BITSRAMBLER_RX_SYS_CLK_EN_W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `BITSRAMBLER_TX_SYS_CLK_EN` reader - Reserved"]
pub type BITSRAMBLER_TX_SYS_CLK_EN_R = crate::BitReader;
#[doc = "Field `BITSRAMBLER_TX_SYS_CLK_EN` writer - Reserved"]
pub type BITSRAMBLER_TX_SYS_CLK_EN_W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `H264_SYS_CLK_EN` reader - Reserved"]
pub type H264_SYS_CLK_EN_R = crate::BitReader;
#[doc = "Field `H264_SYS_CLK_EN` writer - Reserved"]
pub type H264_SYS_CLK_EN_W<'a, REG> = crate::BitWriter<'a, REG>;
impl R {
#[doc = "Bit 0 - Reserved"]
#[inline(always)]
pub fn gpspi2_sys_clk_en(&self) -> GPSPI2_SYS_CLK_EN_R {
GPSPI2_SYS_CLK_EN_R::new((self.bits & 1) != 0)
}
#[doc = "Bit 1 - Reserved"]
#[inline(always)]
pub fn gpspi3_sys_clk_en(&self) -> GPSPI3_SYS_CLK_EN_R {
GPSPI3_SYS_CLK_EN_R::new(((self.bits >> 1) & 1) != 0)
}
#[doc = "Bit 2 - Reserved"]
#[inline(always)]
pub fn regdma_sys_clk_en(&self) -> REGDMA_SYS_CLK_EN_R {
REGDMA_SYS_CLK_EN_R::new(((self.bits >> 2) & 1) != 0)
}
#[doc = "Bit 3 - Reserved"]
#[inline(always)]
pub fn ahb_pdma_sys_clk_en(&self) -> AHB_PDMA_SYS_CLK_EN_R {
AHB_PDMA_SYS_CLK_EN_R::new(((self.bits >> 3) & 1) != 0)
}
#[doc = "Bit 4 - Reserved"]
#[inline(always)]
pub fn axi_pdma_sys_clk_en(&self) -> AXI_PDMA_SYS_CLK_EN_R {
AXI_PDMA_SYS_CLK_EN_R::new(((self.bits >> 4) & 1) != 0)
}
#[doc = "Bit 5 - Reserved"]
#[inline(always)]
pub fn gdma_sys_clk_en(&self) -> GDMA_SYS_CLK_EN_R {
GDMA_SYS_CLK_EN_R::new(((self.bits >> 5) & 1) != 0)
}
#[doc = "Bit 6 - Reserved"]
#[inline(always)]
pub fn dma2d_sys_clk_en(&self) -> DMA2D_SYS_CLK_EN_R {
DMA2D_SYS_CLK_EN_R::new(((self.bits >> 6) & 1) != 0)
}
#[doc = "Bit 7 - Reserved"]
#[inline(always)]
pub fn vpu_sys_clk_en(&self) -> VPU_SYS_CLK_EN_R {
VPU_SYS_CLK_EN_R::new(((self.bits >> 7) & 1) != 0)
}
#[doc = "Bit 8 - Reserved"]
#[inline(always)]
pub fn jpeg_sys_clk_en(&self) -> JPEG_SYS_CLK_EN_R {
JPEG_SYS_CLK_EN_R::new(((self.bits >> 8) & 1) != 0)
}
#[doc = "Bit 9 - Reserved"]
#[inline(always)]
pub fn ppa_sys_clk_en(&self) -> PPA_SYS_CLK_EN_R {
PPA_SYS_CLK_EN_R::new(((self.bits >> 9) & 1) != 0)
}
#[doc = "Bit 10 - Reserved"]
#[inline(always)]
pub fn csi_brg_sys_clk_en(&self) -> CSI_BRG_SYS_CLK_EN_R {
CSI_BRG_SYS_CLK_EN_R::new(((self.bits >> 10) & 1) != 0)
}
#[doc = "Bit 11 - Reserved"]
#[inline(always)]
pub fn csi_host_sys_clk_en(&self) -> CSI_HOST_SYS_CLK_EN_R {
CSI_HOST_SYS_CLK_EN_R::new(((self.bits >> 11) & 1) != 0)
}
#[doc = "Bit 12 - Reserved"]
#[inline(always)]
pub fn dsi_sys_clk_en(&self) -> DSI_SYS_CLK_EN_R {
DSI_SYS_CLK_EN_R::new(((self.bits >> 12) & 1) != 0)
}
#[doc = "Bit 13 - Reserved"]
#[inline(always)]
pub fn emac_sys_clk_en(&self) -> EMAC_SYS_CLK_EN_R {
EMAC_SYS_CLK_EN_R::new(((self.bits >> 13) & 1) != 0)
}
#[doc = "Bit 14 - Reserved"]
#[inline(always)]
pub fn sdmmc_sys_clk_en(&self) -> SDMMC_SYS_CLK_EN_R {
SDMMC_SYS_CLK_EN_R::new(((self.bits >> 14) & 1) != 0)
}
#[doc = "Bit 15 - Reserved"]
#[inline(always)]
pub fn usb_otg11_sys_clk_en(&self) -> USB_OTG11_SYS_CLK_EN_R {
USB_OTG11_SYS_CLK_EN_R::new(((self.bits >> 15) & 1) != 0)
}
#[doc = "Bit 16 - Reserved"]
#[inline(always)]
pub fn usb_otg20_sys_clk_en(&self) -> USB_OTG20_SYS_CLK_EN_R {
USB_OTG20_SYS_CLK_EN_R::new(((self.bits >> 16) & 1) != 0)
}
#[doc = "Bit 17 - Reserved"]
#[inline(always)]
pub fn uhci_sys_clk_en(&self) -> UHCI_SYS_CLK_EN_R {
UHCI_SYS_CLK_EN_R::new(((self.bits >> 17) & 1) != 0)
}
#[doc = "Bit 18 - Reserved"]
#[inline(always)]
pub fn uart0_sys_clk_en(&self) -> UART0_SYS_CLK_EN_R {
UART0_SYS_CLK_EN_R::new(((self.bits >> 18) & 1) != 0)
}
#[doc = "Bit 19 - Reserved"]
#[inline(always)]
pub fn uart1_sys_clk_en(&self) -> UART1_SYS_CLK_EN_R {
UART1_SYS_CLK_EN_R::new(((self.bits >> 19) & 1) != 0)
}
#[doc = "Bit 20 - Reserved"]
#[inline(always)]
pub fn uart2_sys_clk_en(&self) -> UART2_SYS_CLK_EN_R {
UART2_SYS_CLK_EN_R::new(((self.bits >> 20) & 1) != 0)
}
#[doc = "Bit 21 - Reserved"]
#[inline(always)]
pub fn uart3_sys_clk_en(&self) -> UART3_SYS_CLK_EN_R {
UART3_SYS_CLK_EN_R::new(((self.bits >> 21) & 1) != 0)
}
#[doc = "Bit 22 - Reserved"]
#[inline(always)]
pub fn uart4_sys_clk_en(&self) -> UART4_SYS_CLK_EN_R {
UART4_SYS_CLK_EN_R::new(((self.bits >> 22) & 1) != 0)
}
#[doc = "Bit 23 - Reserved"]
#[inline(always)]
pub fn parlio_sys_clk_en(&self) -> PARLIO_SYS_CLK_EN_R {
PARLIO_SYS_CLK_EN_R::new(((self.bits >> 23) & 1) != 0)
}
#[doc = "Bit 24 - Reserved"]
#[inline(always)]
pub fn etm_sys_clk_en(&self) -> ETM_SYS_CLK_EN_R {
ETM_SYS_CLK_EN_R::new(((self.bits >> 24) & 1) != 0)
}
#[doc = "Bit 25 - Reserved"]
#[inline(always)]
pub fn pvt_sys_clk_en(&self) -> PVT_SYS_CLK_EN_R {
PVT_SYS_CLK_EN_R::new(((self.bits >> 25) & 1) != 0)
}
#[doc = "Bit 26 - Reserved"]
#[inline(always)]
pub fn crypto_sys_clk_en(&self) -> CRYPTO_SYS_CLK_EN_R {
CRYPTO_SYS_CLK_EN_R::new(((self.bits >> 26) & 1) != 0)
}
#[doc = "Bit 27 - Reserved"]
#[inline(always)]
pub fn key_manager_sys_clk_en(&self) -> KEY_MANAGER_SYS_CLK_EN_R {
KEY_MANAGER_SYS_CLK_EN_R::new(((self.bits >> 27) & 1) != 0)
}
#[doc = "Bit 28 - Reserved"]
#[inline(always)]
pub fn bitsrambler_sys_clk_en(&self) -> BITSRAMBLER_SYS_CLK_EN_R {
BITSRAMBLER_SYS_CLK_EN_R::new(((self.bits >> 28) & 1) != 0)
}
#[doc = "Bit 29 - Reserved"]
#[inline(always)]
pub fn bitsrambler_rx_sys_clk_en(&self) -> BITSRAMBLER_RX_SYS_CLK_EN_R {
BITSRAMBLER_RX_SYS_CLK_EN_R::new(((self.bits >> 29) & 1) != 0)
}
#[doc = "Bit 30 - Reserved"]
#[inline(always)]
pub fn bitsrambler_tx_sys_clk_en(&self) -> BITSRAMBLER_TX_SYS_CLK_EN_R {
BITSRAMBLER_TX_SYS_CLK_EN_R::new(((self.bits >> 30) & 1) != 0)
}
#[doc = "Bit 31 - Reserved"]
#[inline(always)]
pub fn h264_sys_clk_en(&self) -> H264_SYS_CLK_EN_R {
H264_SYS_CLK_EN_R::new(((self.bits >> 31) & 1) != 0)
}
}
#[cfg(feature = "impl-register-debug")]
impl core::fmt::Debug for R {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("SOC_CLK_CTRL1")
.field(
"gpspi2_sys_clk_en",
&format_args!("{}", self.gpspi2_sys_clk_en().bit()),
)
.field(
"gpspi3_sys_clk_en",
&format_args!("{}", self.gpspi3_sys_clk_en().bit()),
)
.field(
"regdma_sys_clk_en",
&format_args!("{}", self.regdma_sys_clk_en().bit()),
)
.field(
"ahb_pdma_sys_clk_en",
&format_args!("{}", self.ahb_pdma_sys_clk_en().bit()),
)
.field(
"axi_pdma_sys_clk_en",
&format_args!("{}", self.axi_pdma_sys_clk_en().bit()),
)
.field(
"gdma_sys_clk_en",
&format_args!("{}", self.gdma_sys_clk_en().bit()),
)
.field(
"dma2d_sys_clk_en",
&format_args!("{}", self.dma2d_sys_clk_en().bit()),
)
.field(
"vpu_sys_clk_en",
&format_args!("{}", self.vpu_sys_clk_en().bit()),
)
.field(
"jpeg_sys_clk_en",
&format_args!("{}", self.jpeg_sys_clk_en().bit()),
)
.field(
"ppa_sys_clk_en",
&format_args!("{}", self.ppa_sys_clk_en().bit()),
)
.field(
"csi_brg_sys_clk_en",
&format_args!("{}", self.csi_brg_sys_clk_en().bit()),
)
.field(
"csi_host_sys_clk_en",
&format_args!("{}", self.csi_host_sys_clk_en().bit()),
)
.field(
"dsi_sys_clk_en",
&format_args!("{}", self.dsi_sys_clk_en().bit()),
)
.field(
"emac_sys_clk_en",
&format_args!("{}", self.emac_sys_clk_en().bit()),
)
.field(
"sdmmc_sys_clk_en",
&format_args!("{}", self.sdmmc_sys_clk_en().bit()),
)
.field(
"usb_otg11_sys_clk_en",
&format_args!("{}", self.usb_otg11_sys_clk_en().bit()),
)
.field(
"usb_otg20_sys_clk_en",
&format_args!("{}", self.usb_otg20_sys_clk_en().bit()),
)
.field(
"uhci_sys_clk_en",
&format_args!("{}", self.uhci_sys_clk_en().bit()),
)
.field(
"uart0_sys_clk_en",
&format_args!("{}", self.uart0_sys_clk_en().bit()),
)
.field(
"uart1_sys_clk_en",
&format_args!("{}", self.uart1_sys_clk_en().bit()),
)
.field(
"uart2_sys_clk_en",
&format_args!("{}", self.uart2_sys_clk_en().bit()),
)
.field(
"uart3_sys_clk_en",
&format_args!("{}", self.uart3_sys_clk_en().bit()),
)
.field(
"uart4_sys_clk_en",
&format_args!("{}", self.uart4_sys_clk_en().bit()),
)
.field(
"parlio_sys_clk_en",
&format_args!("{}", self.parlio_sys_clk_en().bit()),
)
.field(
"etm_sys_clk_en",
&format_args!("{}", self.etm_sys_clk_en().bit()),
)
.field(
"pvt_sys_clk_en",
&format_args!("{}", self.pvt_sys_clk_en().bit()),
)
.field(
"crypto_sys_clk_en",
&format_args!("{}", self.crypto_sys_clk_en().bit()),
)
.field(
"key_manager_sys_clk_en",
&format_args!("{}", self.key_manager_sys_clk_en().bit()),
)
.field(
"bitsrambler_sys_clk_en",
&format_args!("{}", self.bitsrambler_sys_clk_en().bit()),
)
.field(
"bitsrambler_rx_sys_clk_en",
&format_args!("{}", self.bitsrambler_rx_sys_clk_en().bit()),
)
.field(
"bitsrambler_tx_sys_clk_en",
&format_args!("{}", self.bitsrambler_tx_sys_clk_en().bit()),
)
.field(
"h264_sys_clk_en",
&format_args!("{}", self.h264_sys_clk_en().bit()),
)
.finish()
}
}
#[cfg(feature = "impl-register-debug")]
impl core::fmt::Debug for crate::generic::Reg<SOC_CLK_CTRL1_SPEC> {
fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
core::fmt::Debug::fmt(&self.read(), f)
}
}
impl W {
#[doc = "Bit 0 - Reserved"]
#[inline(always)]
#[must_use]
pub fn gpspi2_sys_clk_en(&mut self) -> GPSPI2_SYS_CLK_EN_W<SOC_CLK_CTRL1_SPEC> {
GPSPI2_SYS_CLK_EN_W::new(self, 0)
}
#[doc = "Bit 1 - Reserved"]
#[inline(always)]
#[must_use]
pub fn gpspi3_sys_clk_en(&mut self) -> GPSPI3_SYS_CLK_EN_W<SOC_CLK_CTRL1_SPEC> {
GPSPI3_SYS_CLK_EN_W::new(self, 1)
}
#[doc = "Bit 2 - Reserved"]
#[inline(always)]
#[must_use]
pub fn regdma_sys_clk_en(&mut self) -> REGDMA_SYS_CLK_EN_W<SOC_CLK_CTRL1_SPEC> {
REGDMA_SYS_CLK_EN_W::new(self, 2)
}
#[doc = "Bit 3 - Reserved"]
#[inline(always)]
#[must_use]
pub fn ahb_pdma_sys_clk_en(&mut self) -> AHB_PDMA_SYS_CLK_EN_W<SOC_CLK_CTRL1_SPEC> {
AHB_PDMA_SYS_CLK_EN_W::new(self, 3)
}
#[doc = "Bit 4 - Reserved"]
#[inline(always)]
#[must_use]
pub fn axi_pdma_sys_clk_en(&mut self) -> AXI_PDMA_SYS_CLK_EN_W<SOC_CLK_CTRL1_SPEC> {
AXI_PDMA_SYS_CLK_EN_W::new(self, 4)
}
#[doc = "Bit 5 - Reserved"]
#[inline(always)]
#[must_use]
pub fn gdma_sys_clk_en(&mut self) -> GDMA_SYS_CLK_EN_W<SOC_CLK_CTRL1_SPEC> {
GDMA_SYS_CLK_EN_W::new(self, 5)
}
#[doc = "Bit 6 - Reserved"]
#[inline(always)]
#[must_use]
pub fn dma2d_sys_clk_en(&mut self) -> DMA2D_SYS_CLK_EN_W<SOC_CLK_CTRL1_SPEC> {
DMA2D_SYS_CLK_EN_W::new(self, 6)
}
#[doc = "Bit 7 - Reserved"]
#[inline(always)]
#[must_use]
pub fn vpu_sys_clk_en(&mut self) -> VPU_SYS_CLK_EN_W<SOC_CLK_CTRL1_SPEC> {
VPU_SYS_CLK_EN_W::new(self, 7)
}
#[doc = "Bit 8 - Reserved"]
#[inline(always)]
#[must_use]
pub fn jpeg_sys_clk_en(&mut self) -> JPEG_SYS_CLK_EN_W<SOC_CLK_CTRL1_SPEC> {
JPEG_SYS_CLK_EN_W::new(self, 8)
}
#[doc = "Bit 9 - Reserved"]
#[inline(always)]
#[must_use]
pub fn ppa_sys_clk_en(&mut self) -> PPA_SYS_CLK_EN_W<SOC_CLK_CTRL1_SPEC> {
PPA_SYS_CLK_EN_W::new(self, 9)
}
#[doc = "Bit 10 - Reserved"]
#[inline(always)]
#[must_use]
pub fn csi_brg_sys_clk_en(&mut self) -> CSI_BRG_SYS_CLK_EN_W<SOC_CLK_CTRL1_SPEC> {
CSI_BRG_SYS_CLK_EN_W::new(self, 10)
}
#[doc = "Bit 11 - Reserved"]
#[inline(always)]
#[must_use]
pub fn csi_host_sys_clk_en(&mut self) -> CSI_HOST_SYS_CLK_EN_W<SOC_CLK_CTRL1_SPEC> {
CSI_HOST_SYS_CLK_EN_W::new(self, 11)
}
#[doc = "Bit 12 - Reserved"]
#[inline(always)]
#[must_use]
pub fn dsi_sys_clk_en(&mut self) -> DSI_SYS_CLK_EN_W<SOC_CLK_CTRL1_SPEC> {
DSI_SYS_CLK_EN_W::new(self, 12)
}
#[doc = "Bit 13 - Reserved"]
#[inline(always)]
#[must_use]
pub fn emac_sys_clk_en(&mut self) -> EMAC_SYS_CLK_EN_W<SOC_CLK_CTRL1_SPEC> {
EMAC_SYS_CLK_EN_W::new(self, 13)
}
#[doc = "Bit 14 - Reserved"]
#[inline(always)]
#[must_use]
pub fn sdmmc_sys_clk_en(&mut self) -> SDMMC_SYS_CLK_EN_W<SOC_CLK_CTRL1_SPEC> {
SDMMC_SYS_CLK_EN_W::new(self, 14)
}
#[doc = "Bit 15 - Reserved"]
#[inline(always)]
#[must_use]
pub fn usb_otg11_sys_clk_en(&mut self) -> USB_OTG11_SYS_CLK_EN_W<SOC_CLK_CTRL1_SPEC> {
USB_OTG11_SYS_CLK_EN_W::new(self, 15)
}
#[doc = "Bit 16 - Reserved"]
#[inline(always)]
#[must_use]
pub fn usb_otg20_sys_clk_en(&mut self) -> USB_OTG20_SYS_CLK_EN_W<SOC_CLK_CTRL1_SPEC> {
USB_OTG20_SYS_CLK_EN_W::new(self, 16)
}
#[doc = "Bit 17 - Reserved"]
#[inline(always)]
#[must_use]
pub fn uhci_sys_clk_en(&mut self) -> UHCI_SYS_CLK_EN_W<SOC_CLK_CTRL1_SPEC> {
UHCI_SYS_CLK_EN_W::new(self, 17)
}
#[doc = "Bit 18 - Reserved"]
#[inline(always)]
#[must_use]
pub fn uart0_sys_clk_en(&mut self) -> UART0_SYS_CLK_EN_W<SOC_CLK_CTRL1_SPEC> {
UART0_SYS_CLK_EN_W::new(self, 18)
}
#[doc = "Bit 19 - Reserved"]
#[inline(always)]
#[must_use]
pub fn uart1_sys_clk_en(&mut self) -> UART1_SYS_CLK_EN_W<SOC_CLK_CTRL1_SPEC> {
UART1_SYS_CLK_EN_W::new(self, 19)
}
#[doc = "Bit 20 - Reserved"]
#[inline(always)]
#[must_use]
pub fn uart2_sys_clk_en(&mut self) -> UART2_SYS_CLK_EN_W<SOC_CLK_CTRL1_SPEC> {
UART2_SYS_CLK_EN_W::new(self, 20)
}
#[doc = "Bit 21 - Reserved"]
#[inline(always)]
#[must_use]
pub fn uart3_sys_clk_en(&mut self) -> UART3_SYS_CLK_EN_W<SOC_CLK_CTRL1_SPEC> {
UART3_SYS_CLK_EN_W::new(self, 21)
}
#[doc = "Bit 22 - Reserved"]
#[inline(always)]
#[must_use]
pub fn uart4_sys_clk_en(&mut self) -> UART4_SYS_CLK_EN_W<SOC_CLK_CTRL1_SPEC> {
UART4_SYS_CLK_EN_W::new(self, 22)
}
#[doc = "Bit 23 - Reserved"]
#[inline(always)]
#[must_use]
pub fn parlio_sys_clk_en(&mut self) -> PARLIO_SYS_CLK_EN_W<SOC_CLK_CTRL1_SPEC> {
PARLIO_SYS_CLK_EN_W::new(self, 23)
}
#[doc = "Bit 24 - Reserved"]
#[inline(always)]
#[must_use]
pub fn etm_sys_clk_en(&mut self) -> ETM_SYS_CLK_EN_W<SOC_CLK_CTRL1_SPEC> {
ETM_SYS_CLK_EN_W::new(self, 24)
}
#[doc = "Bit 25 - Reserved"]
#[inline(always)]
#[must_use]
pub fn pvt_sys_clk_en(&mut self) -> PVT_SYS_CLK_EN_W<SOC_CLK_CTRL1_SPEC> {
PVT_SYS_CLK_EN_W::new(self, 25)
}
#[doc = "Bit 26 - Reserved"]
#[inline(always)]
#[must_use]
pub fn crypto_sys_clk_en(&mut self) -> CRYPTO_SYS_CLK_EN_W<SOC_CLK_CTRL1_SPEC> {
CRYPTO_SYS_CLK_EN_W::new(self, 26)
}
#[doc = "Bit 27 - Reserved"]
#[inline(always)]
#[must_use]
pub fn key_manager_sys_clk_en(&mut self) -> KEY_MANAGER_SYS_CLK_EN_W<SOC_CLK_CTRL1_SPEC> {
KEY_MANAGER_SYS_CLK_EN_W::new(self, 27)
}
#[doc = "Bit 28 - Reserved"]
#[inline(always)]
#[must_use]
pub fn bitsrambler_sys_clk_en(&mut self) -> BITSRAMBLER_SYS_CLK_EN_W<SOC_CLK_CTRL1_SPEC> {
BITSRAMBLER_SYS_CLK_EN_W::new(self, 28)
}
#[doc = "Bit 29 - Reserved"]
#[inline(always)]
#[must_use]
pub fn bitsrambler_rx_sys_clk_en(&mut self) -> BITSRAMBLER_RX_SYS_CLK_EN_W<SOC_CLK_CTRL1_SPEC> {
BITSRAMBLER_RX_SYS_CLK_EN_W::new(self, 29)
}
#[doc = "Bit 30 - Reserved"]
#[inline(always)]
#[must_use]
pub fn bitsrambler_tx_sys_clk_en(&mut self) -> BITSRAMBLER_TX_SYS_CLK_EN_W<SOC_CLK_CTRL1_SPEC> {
BITSRAMBLER_TX_SYS_CLK_EN_W::new(self, 30)
}
#[doc = "Bit 31 - Reserved"]
#[inline(always)]
#[must_use]
pub fn h264_sys_clk_en(&mut self) -> H264_SYS_CLK_EN_W<SOC_CLK_CTRL1_SPEC> {
H264_SYS_CLK_EN_W::new(self, 31)
}
}
#[doc = "Reserved\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`soc_clk_ctrl1::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`soc_clk_ctrl1::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
pub struct SOC_CLK_CTRL1_SPEC;
impl crate::RegisterSpec for SOC_CLK_CTRL1_SPEC {
type Ux = u32;
}
#[doc = "`read()` method returns [`soc_clk_ctrl1::R`](R) reader structure"]
impl crate::Readable for SOC_CLK_CTRL1_SPEC {}
#[doc = "`write(|w| ..)` method takes [`soc_clk_ctrl1::W`](W) writer structure"]
impl crate::Writable for SOC_CLK_CTRL1_SPEC {
type Safety = crate::Unsafe;
const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
}
#[doc = "`reset()` method sets SOC_CLK_CTRL1 to value 0x7c7f_801f"]
impl crate::Resettable for SOC_CLK_CTRL1_SPEC {
const RESET_VALUE: u32 = 0x7c7f_801f;
}