#[doc = "Register `CLK_FORCE_ON_CTRL0` reader"]
pub type R = crate::R<CLK_FORCE_ON_CTRL0_SPEC>;
#[doc = "Register `CLK_FORCE_ON_CTRL0` writer"]
pub type W = crate::W<CLK_FORCE_ON_CTRL0_SPEC>;
#[doc = "Field `CPUICM_GATED_CLK_FORCE_ON` reader - Reserved"]
pub type CPUICM_GATED_CLK_FORCE_ON_R = crate::BitReader;
#[doc = "Field `CPUICM_GATED_CLK_FORCE_ON` writer - Reserved"]
pub type CPUICM_GATED_CLK_FORCE_ON_W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `TCM_CPU_CLK_FORCE_ON` reader - Reserved"]
pub type TCM_CPU_CLK_FORCE_ON_R = crate::BitReader;
#[doc = "Field `TCM_CPU_CLK_FORCE_ON` writer - Reserved"]
pub type TCM_CPU_CLK_FORCE_ON_W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `BUSMON_CPU_CLK_FORCE_ON` reader - Reserved"]
pub type BUSMON_CPU_CLK_FORCE_ON_R = crate::BitReader;
#[doc = "Field `BUSMON_CPU_CLK_FORCE_ON` writer - Reserved"]
pub type BUSMON_CPU_CLK_FORCE_ON_W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `L1CACHE_CPU_CLK_FORCE_ON` reader - Reserved"]
pub type L1CACHE_CPU_CLK_FORCE_ON_R = crate::BitReader;
#[doc = "Field `L1CACHE_CPU_CLK_FORCE_ON` writer - Reserved"]
pub type L1CACHE_CPU_CLK_FORCE_ON_W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `L1CACHE_D_CPU_CLK_FORCE_ON` reader - Reserved"]
pub type L1CACHE_D_CPU_CLK_FORCE_ON_R = crate::BitReader;
#[doc = "Field `L1CACHE_D_CPU_CLK_FORCE_ON` writer - Reserved"]
pub type L1CACHE_D_CPU_CLK_FORCE_ON_W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `L1CACHE_I0_CPU_CLK_FORCE_ON` reader - Reserved"]
pub type L1CACHE_I0_CPU_CLK_FORCE_ON_R = crate::BitReader;
#[doc = "Field `L1CACHE_I0_CPU_CLK_FORCE_ON` writer - Reserved"]
pub type L1CACHE_I0_CPU_CLK_FORCE_ON_W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `L1CACHE_I1_CPU_CLK_FORCE_ON` reader - Reserved"]
pub type L1CACHE_I1_CPU_CLK_FORCE_ON_R = crate::BitReader;
#[doc = "Field `L1CACHE_I1_CPU_CLK_FORCE_ON` writer - Reserved"]
pub type L1CACHE_I1_CPU_CLK_FORCE_ON_W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `TRACE_CPU_CLK_FORCE_ON` reader - Reserved"]
pub type TRACE_CPU_CLK_FORCE_ON_R = crate::BitReader;
#[doc = "Field `TRACE_CPU_CLK_FORCE_ON` writer - Reserved"]
pub type TRACE_CPU_CLK_FORCE_ON_W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `TRACE_SYS_CLK_FORCE_ON` reader - Reserved"]
pub type TRACE_SYS_CLK_FORCE_ON_R = crate::BitReader;
#[doc = "Field `TRACE_SYS_CLK_FORCE_ON` writer - Reserved"]
pub type TRACE_SYS_CLK_FORCE_ON_W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `L1CACHE_MEM_CLK_FORCE_ON` reader - Reserved"]
pub type L1CACHE_MEM_CLK_FORCE_ON_R = crate::BitReader;
#[doc = "Field `L1CACHE_MEM_CLK_FORCE_ON` writer - Reserved"]
pub type L1CACHE_MEM_CLK_FORCE_ON_W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `L1CACHE_D_MEM_CLK_FORCE_ON` reader - Reserved"]
pub type L1CACHE_D_MEM_CLK_FORCE_ON_R = crate::BitReader;
#[doc = "Field `L1CACHE_D_MEM_CLK_FORCE_ON` writer - Reserved"]
pub type L1CACHE_D_MEM_CLK_FORCE_ON_W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `L1CACHE_I0_MEM_CLK_FORCE_ON` reader - Reserved"]
pub type L1CACHE_I0_MEM_CLK_FORCE_ON_R = crate::BitReader;
#[doc = "Field `L1CACHE_I0_MEM_CLK_FORCE_ON` writer - Reserved"]
pub type L1CACHE_I0_MEM_CLK_FORCE_ON_W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `L1CACHE_I1_MEM_CLK_FORCE_ON` reader - Reserved"]
pub type L1CACHE_I1_MEM_CLK_FORCE_ON_R = crate::BitReader;
#[doc = "Field `L1CACHE_I1_MEM_CLK_FORCE_ON` writer - Reserved"]
pub type L1CACHE_I1_MEM_CLK_FORCE_ON_W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `L2CACHE_MEM_CLK_FORCE_ON` reader - Reserved"]
pub type L2CACHE_MEM_CLK_FORCE_ON_R = crate::BitReader;
#[doc = "Field `L2CACHE_MEM_CLK_FORCE_ON` writer - Reserved"]
pub type L2CACHE_MEM_CLK_FORCE_ON_W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `L2MEM_MEM_CLK_FORCE_ON` reader - Reserved"]
pub type L2MEM_MEM_CLK_FORCE_ON_R = crate::BitReader;
#[doc = "Field `L2MEM_MEM_CLK_FORCE_ON` writer - Reserved"]
pub type L2MEM_MEM_CLK_FORCE_ON_W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `SAR1_CLK_FORCE_ON` reader - Reserved"]
pub type SAR1_CLK_FORCE_ON_R = crate::BitReader;
#[doc = "Field `SAR1_CLK_FORCE_ON` writer - Reserved"]
pub type SAR1_CLK_FORCE_ON_W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `SAR2_CLK_FORCE_ON` reader - Reserved"]
pub type SAR2_CLK_FORCE_ON_R = crate::BitReader;
#[doc = "Field `SAR2_CLK_FORCE_ON` writer - Reserved"]
pub type SAR2_CLK_FORCE_ON_W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `GMAC_TX_CLK_FORCE_ON` reader - Reserved"]
pub type GMAC_TX_CLK_FORCE_ON_R = crate::BitReader;
#[doc = "Field `GMAC_TX_CLK_FORCE_ON` writer - Reserved"]
pub type GMAC_TX_CLK_FORCE_ON_W<'a, REG> = crate::BitWriter<'a, REG>;
impl R {
#[doc = "Bit 0 - Reserved"]
#[inline(always)]
pub fn cpuicm_gated_clk_force_on(&self) -> CPUICM_GATED_CLK_FORCE_ON_R {
CPUICM_GATED_CLK_FORCE_ON_R::new((self.bits & 1) != 0)
}
#[doc = "Bit 1 - Reserved"]
#[inline(always)]
pub fn tcm_cpu_clk_force_on(&self) -> TCM_CPU_CLK_FORCE_ON_R {
TCM_CPU_CLK_FORCE_ON_R::new(((self.bits >> 1) & 1) != 0)
}
#[doc = "Bit 2 - Reserved"]
#[inline(always)]
pub fn busmon_cpu_clk_force_on(&self) -> BUSMON_CPU_CLK_FORCE_ON_R {
BUSMON_CPU_CLK_FORCE_ON_R::new(((self.bits >> 2) & 1) != 0)
}
#[doc = "Bit 3 - Reserved"]
#[inline(always)]
pub fn l1cache_cpu_clk_force_on(&self) -> L1CACHE_CPU_CLK_FORCE_ON_R {
L1CACHE_CPU_CLK_FORCE_ON_R::new(((self.bits >> 3) & 1) != 0)
}
#[doc = "Bit 4 - Reserved"]
#[inline(always)]
pub fn l1cache_d_cpu_clk_force_on(&self) -> L1CACHE_D_CPU_CLK_FORCE_ON_R {
L1CACHE_D_CPU_CLK_FORCE_ON_R::new(((self.bits >> 4) & 1) != 0)
}
#[doc = "Bit 5 - Reserved"]
#[inline(always)]
pub fn l1cache_i0_cpu_clk_force_on(&self) -> L1CACHE_I0_CPU_CLK_FORCE_ON_R {
L1CACHE_I0_CPU_CLK_FORCE_ON_R::new(((self.bits >> 5) & 1) != 0)
}
#[doc = "Bit 6 - Reserved"]
#[inline(always)]
pub fn l1cache_i1_cpu_clk_force_on(&self) -> L1CACHE_I1_CPU_CLK_FORCE_ON_R {
L1CACHE_I1_CPU_CLK_FORCE_ON_R::new(((self.bits >> 6) & 1) != 0)
}
#[doc = "Bit 7 - Reserved"]
#[inline(always)]
pub fn trace_cpu_clk_force_on(&self) -> TRACE_CPU_CLK_FORCE_ON_R {
TRACE_CPU_CLK_FORCE_ON_R::new(((self.bits >> 7) & 1) != 0)
}
#[doc = "Bit 8 - Reserved"]
#[inline(always)]
pub fn trace_sys_clk_force_on(&self) -> TRACE_SYS_CLK_FORCE_ON_R {
TRACE_SYS_CLK_FORCE_ON_R::new(((self.bits >> 8) & 1) != 0)
}
#[doc = "Bit 9 - Reserved"]
#[inline(always)]
pub fn l1cache_mem_clk_force_on(&self) -> L1CACHE_MEM_CLK_FORCE_ON_R {
L1CACHE_MEM_CLK_FORCE_ON_R::new(((self.bits >> 9) & 1) != 0)
}
#[doc = "Bit 10 - Reserved"]
#[inline(always)]
pub fn l1cache_d_mem_clk_force_on(&self) -> L1CACHE_D_MEM_CLK_FORCE_ON_R {
L1CACHE_D_MEM_CLK_FORCE_ON_R::new(((self.bits >> 10) & 1) != 0)
}
#[doc = "Bit 11 - Reserved"]
#[inline(always)]
pub fn l1cache_i0_mem_clk_force_on(&self) -> L1CACHE_I0_MEM_CLK_FORCE_ON_R {
L1CACHE_I0_MEM_CLK_FORCE_ON_R::new(((self.bits >> 11) & 1) != 0)
}
#[doc = "Bit 12 - Reserved"]
#[inline(always)]
pub fn l1cache_i1_mem_clk_force_on(&self) -> L1CACHE_I1_MEM_CLK_FORCE_ON_R {
L1CACHE_I1_MEM_CLK_FORCE_ON_R::new(((self.bits >> 12) & 1) != 0)
}
#[doc = "Bit 13 - Reserved"]
#[inline(always)]
pub fn l2cache_mem_clk_force_on(&self) -> L2CACHE_MEM_CLK_FORCE_ON_R {
L2CACHE_MEM_CLK_FORCE_ON_R::new(((self.bits >> 13) & 1) != 0)
}
#[doc = "Bit 14 - Reserved"]
#[inline(always)]
pub fn l2mem_mem_clk_force_on(&self) -> L2MEM_MEM_CLK_FORCE_ON_R {
L2MEM_MEM_CLK_FORCE_ON_R::new(((self.bits >> 14) & 1) != 0)
}
#[doc = "Bit 15 - Reserved"]
#[inline(always)]
pub fn sar1_clk_force_on(&self) -> SAR1_CLK_FORCE_ON_R {
SAR1_CLK_FORCE_ON_R::new(((self.bits >> 15) & 1) != 0)
}
#[doc = "Bit 16 - Reserved"]
#[inline(always)]
pub fn sar2_clk_force_on(&self) -> SAR2_CLK_FORCE_ON_R {
SAR2_CLK_FORCE_ON_R::new(((self.bits >> 16) & 1) != 0)
}
#[doc = "Bit 17 - Reserved"]
#[inline(always)]
pub fn gmac_tx_clk_force_on(&self) -> GMAC_TX_CLK_FORCE_ON_R {
GMAC_TX_CLK_FORCE_ON_R::new(((self.bits >> 17) & 1) != 0)
}
}
#[cfg(feature = "impl-register-debug")]
impl core::fmt::Debug for R {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("CLK_FORCE_ON_CTRL0")
.field(
"cpuicm_gated_clk_force_on",
&format_args!("{}", self.cpuicm_gated_clk_force_on().bit()),
)
.field(
"tcm_cpu_clk_force_on",
&format_args!("{}", self.tcm_cpu_clk_force_on().bit()),
)
.field(
"busmon_cpu_clk_force_on",
&format_args!("{}", self.busmon_cpu_clk_force_on().bit()),
)
.field(
"l1cache_cpu_clk_force_on",
&format_args!("{}", self.l1cache_cpu_clk_force_on().bit()),
)
.field(
"l1cache_d_cpu_clk_force_on",
&format_args!("{}", self.l1cache_d_cpu_clk_force_on().bit()),
)
.field(
"l1cache_i0_cpu_clk_force_on",
&format_args!("{}", self.l1cache_i0_cpu_clk_force_on().bit()),
)
.field(
"l1cache_i1_cpu_clk_force_on",
&format_args!("{}", self.l1cache_i1_cpu_clk_force_on().bit()),
)
.field(
"trace_cpu_clk_force_on",
&format_args!("{}", self.trace_cpu_clk_force_on().bit()),
)
.field(
"trace_sys_clk_force_on",
&format_args!("{}", self.trace_sys_clk_force_on().bit()),
)
.field(
"l1cache_mem_clk_force_on",
&format_args!("{}", self.l1cache_mem_clk_force_on().bit()),
)
.field(
"l1cache_d_mem_clk_force_on",
&format_args!("{}", self.l1cache_d_mem_clk_force_on().bit()),
)
.field(
"l1cache_i0_mem_clk_force_on",
&format_args!("{}", self.l1cache_i0_mem_clk_force_on().bit()),
)
.field(
"l1cache_i1_mem_clk_force_on",
&format_args!("{}", self.l1cache_i1_mem_clk_force_on().bit()),
)
.field(
"l2cache_mem_clk_force_on",
&format_args!("{}", self.l2cache_mem_clk_force_on().bit()),
)
.field(
"l2mem_mem_clk_force_on",
&format_args!("{}", self.l2mem_mem_clk_force_on().bit()),
)
.field(
"sar1_clk_force_on",
&format_args!("{}", self.sar1_clk_force_on().bit()),
)
.field(
"sar2_clk_force_on",
&format_args!("{}", self.sar2_clk_force_on().bit()),
)
.field(
"gmac_tx_clk_force_on",
&format_args!("{}", self.gmac_tx_clk_force_on().bit()),
)
.finish()
}
}
#[cfg(feature = "impl-register-debug")]
impl core::fmt::Debug for crate::generic::Reg<CLK_FORCE_ON_CTRL0_SPEC> {
fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
core::fmt::Debug::fmt(&self.read(), f)
}
}
impl W {
#[doc = "Bit 0 - Reserved"]
#[inline(always)]
#[must_use]
pub fn cpuicm_gated_clk_force_on(
&mut self,
) -> CPUICM_GATED_CLK_FORCE_ON_W<CLK_FORCE_ON_CTRL0_SPEC> {
CPUICM_GATED_CLK_FORCE_ON_W::new(self, 0)
}
#[doc = "Bit 1 - Reserved"]
#[inline(always)]
#[must_use]
pub fn tcm_cpu_clk_force_on(&mut self) -> TCM_CPU_CLK_FORCE_ON_W<CLK_FORCE_ON_CTRL0_SPEC> {
TCM_CPU_CLK_FORCE_ON_W::new(self, 1)
}
#[doc = "Bit 2 - Reserved"]
#[inline(always)]
#[must_use]
pub fn busmon_cpu_clk_force_on(
&mut self,
) -> BUSMON_CPU_CLK_FORCE_ON_W<CLK_FORCE_ON_CTRL0_SPEC> {
BUSMON_CPU_CLK_FORCE_ON_W::new(self, 2)
}
#[doc = "Bit 3 - Reserved"]
#[inline(always)]
#[must_use]
pub fn l1cache_cpu_clk_force_on(
&mut self,
) -> L1CACHE_CPU_CLK_FORCE_ON_W<CLK_FORCE_ON_CTRL0_SPEC> {
L1CACHE_CPU_CLK_FORCE_ON_W::new(self, 3)
}
#[doc = "Bit 4 - Reserved"]
#[inline(always)]
#[must_use]
pub fn l1cache_d_cpu_clk_force_on(
&mut self,
) -> L1CACHE_D_CPU_CLK_FORCE_ON_W<CLK_FORCE_ON_CTRL0_SPEC> {
L1CACHE_D_CPU_CLK_FORCE_ON_W::new(self, 4)
}
#[doc = "Bit 5 - Reserved"]
#[inline(always)]
#[must_use]
pub fn l1cache_i0_cpu_clk_force_on(
&mut self,
) -> L1CACHE_I0_CPU_CLK_FORCE_ON_W<CLK_FORCE_ON_CTRL0_SPEC> {
L1CACHE_I0_CPU_CLK_FORCE_ON_W::new(self, 5)
}
#[doc = "Bit 6 - Reserved"]
#[inline(always)]
#[must_use]
pub fn l1cache_i1_cpu_clk_force_on(
&mut self,
) -> L1CACHE_I1_CPU_CLK_FORCE_ON_W<CLK_FORCE_ON_CTRL0_SPEC> {
L1CACHE_I1_CPU_CLK_FORCE_ON_W::new(self, 6)
}
#[doc = "Bit 7 - Reserved"]
#[inline(always)]
#[must_use]
pub fn trace_cpu_clk_force_on(&mut self) -> TRACE_CPU_CLK_FORCE_ON_W<CLK_FORCE_ON_CTRL0_SPEC> {
TRACE_CPU_CLK_FORCE_ON_W::new(self, 7)
}
#[doc = "Bit 8 - Reserved"]
#[inline(always)]
#[must_use]
pub fn trace_sys_clk_force_on(&mut self) -> TRACE_SYS_CLK_FORCE_ON_W<CLK_FORCE_ON_CTRL0_SPEC> {
TRACE_SYS_CLK_FORCE_ON_W::new(self, 8)
}
#[doc = "Bit 9 - Reserved"]
#[inline(always)]
#[must_use]
pub fn l1cache_mem_clk_force_on(
&mut self,
) -> L1CACHE_MEM_CLK_FORCE_ON_W<CLK_FORCE_ON_CTRL0_SPEC> {
L1CACHE_MEM_CLK_FORCE_ON_W::new(self, 9)
}
#[doc = "Bit 10 - Reserved"]
#[inline(always)]
#[must_use]
pub fn l1cache_d_mem_clk_force_on(
&mut self,
) -> L1CACHE_D_MEM_CLK_FORCE_ON_W<CLK_FORCE_ON_CTRL0_SPEC> {
L1CACHE_D_MEM_CLK_FORCE_ON_W::new(self, 10)
}
#[doc = "Bit 11 - Reserved"]
#[inline(always)]
#[must_use]
pub fn l1cache_i0_mem_clk_force_on(
&mut self,
) -> L1CACHE_I0_MEM_CLK_FORCE_ON_W<CLK_FORCE_ON_CTRL0_SPEC> {
L1CACHE_I0_MEM_CLK_FORCE_ON_W::new(self, 11)
}
#[doc = "Bit 12 - Reserved"]
#[inline(always)]
#[must_use]
pub fn l1cache_i1_mem_clk_force_on(
&mut self,
) -> L1CACHE_I1_MEM_CLK_FORCE_ON_W<CLK_FORCE_ON_CTRL0_SPEC> {
L1CACHE_I1_MEM_CLK_FORCE_ON_W::new(self, 12)
}
#[doc = "Bit 13 - Reserved"]
#[inline(always)]
#[must_use]
pub fn l2cache_mem_clk_force_on(
&mut self,
) -> L2CACHE_MEM_CLK_FORCE_ON_W<CLK_FORCE_ON_CTRL0_SPEC> {
L2CACHE_MEM_CLK_FORCE_ON_W::new(self, 13)
}
#[doc = "Bit 14 - Reserved"]
#[inline(always)]
#[must_use]
pub fn l2mem_mem_clk_force_on(&mut self) -> L2MEM_MEM_CLK_FORCE_ON_W<CLK_FORCE_ON_CTRL0_SPEC> {
L2MEM_MEM_CLK_FORCE_ON_W::new(self, 14)
}
#[doc = "Bit 15 - Reserved"]
#[inline(always)]
#[must_use]
pub fn sar1_clk_force_on(&mut self) -> SAR1_CLK_FORCE_ON_W<CLK_FORCE_ON_CTRL0_SPEC> {
SAR1_CLK_FORCE_ON_W::new(self, 15)
}
#[doc = "Bit 16 - Reserved"]
#[inline(always)]
#[must_use]
pub fn sar2_clk_force_on(&mut self) -> SAR2_CLK_FORCE_ON_W<CLK_FORCE_ON_CTRL0_SPEC> {
SAR2_CLK_FORCE_ON_W::new(self, 16)
}
#[doc = "Bit 17 - Reserved"]
#[inline(always)]
#[must_use]
pub fn gmac_tx_clk_force_on(&mut self) -> GMAC_TX_CLK_FORCE_ON_W<CLK_FORCE_ON_CTRL0_SPEC> {
GMAC_TX_CLK_FORCE_ON_W::new(self, 17)
}
}
#[doc = "Reserved\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`clk_force_on_ctrl0::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`clk_force_on_ctrl0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
pub struct CLK_FORCE_ON_CTRL0_SPEC;
impl crate::RegisterSpec for CLK_FORCE_ON_CTRL0_SPEC {
type Ux = u32;
}
#[doc = "`read()` method returns [`clk_force_on_ctrl0::R`](R) reader structure"]
impl crate::Readable for CLK_FORCE_ON_CTRL0_SPEC {}
#[doc = "`write(|w| ..)` method takes [`clk_force_on_ctrl0::W`](W) writer structure"]
impl crate::Writable for CLK_FORCE_ON_CTRL0_SPEC {
type Safety = crate::Unsafe;
const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
}
#[doc = "`reset()` method sets CLK_FORCE_ON_CTRL0 to value 0x0003_ffff"]
impl crate::Resettable for CLK_FORCE_ON_CTRL0_SPEC {
const RESET_VALUE: u32 = 0x0003_ffff;
}