use crate::metadata::ir::*;
pub(crate) static REGISTERS: IR = IR {
blocks: &[Block {
name: "Usbpd",
extends: None,
description: Some("USBPD configuration."),
items: &[
BlockItem {
name: "config",
description: Some("PD interrupt enable register."),
array: None,
byte_offset: 0x0,
inner: BlockItemInner::Register(Register {
access: Access::ReadWrite,
bit_size: 16,
fieldset: Some("Config"),
}),
},
BlockItem {
name: "bmc_clk_cnt",
description: Some("BMC sampling clock counter."),
array: None,
byte_offset: 0x2,
inner: BlockItemInner::Register(Register {
access: Access::ReadWrite,
bit_size: 16,
fieldset: Some("BmcClkCnt"),
}),
},
BlockItem {
name: "control",
description: Some("PD Send and receive enable register."),
array: None,
byte_offset: 0x4,
inner: BlockItemInner::Register(Register {
access: Access::ReadWrite,
bit_size: 8,
fieldset: Some("Control"),
}),
},
BlockItem {
name: "tx_sel",
description: Some("SOP port selection register."),
array: None,
byte_offset: 0x5,
inner: BlockItemInner::Register(Register {
access: Access::ReadWrite,
bit_size: 8,
fieldset: Some("TxSel"),
}),
},
BlockItem {
name: "bmc_tx_sz",
description: Some("PD send length register."),
array: None,
byte_offset: 0x6,
inner: BlockItemInner::Register(Register {
access: Access::ReadWrite,
bit_size: 16,
fieldset: Some("BmcTxSz"),
}),
},
BlockItem {
name: "data_buf",
description: Some("DMA cache data register."),
array: None,
byte_offset: 0x8,
inner: BlockItemInner::Register(Register {
access: Access::ReadWrite,
bit_size: 8,
fieldset: Some("DataBuf"),
}),
},
BlockItem {
name: "status",
description: Some("PD interrupt flag register."),
array: None,
byte_offset: 0x9,
inner: BlockItemInner::Register(Register {
access: Access::ReadWrite,
bit_size: 8,
fieldset: Some("Status"),
}),
},
BlockItem {
name: "bmc_byte_cnt",
description: Some("Byte counter."),
array: None,
byte_offset: 0xa,
inner: BlockItemInner::Register(Register {
access: Access::ReadWrite,
bit_size: 16,
fieldset: Some("BmcByteCnt"),
}),
},
BlockItem {
name: "port_cc1",
description: Some("CC1 port control register."),
array: None,
byte_offset: 0xc,
inner: BlockItemInner::Register(Register {
access: Access::ReadWrite,
bit_size: 16,
fieldset: Some("PortCc1"),
}),
},
BlockItem {
name: "port_cc2",
description: Some("CC2 port control register."),
array: None,
byte_offset: 0xe,
inner: BlockItemInner::Register(Register {
access: Access::ReadWrite,
bit_size: 16,
fieldset: Some("PortCc2"),
}),
},
BlockItem {
name: "dma",
description: Some("PD buffer start address register."),
array: None,
byte_offset: 0x10,
inner: BlockItemInner::Register(Register {
access: Access::ReadWrite,
bit_size: 32,
fieldset: Some("Dma"),
}),
},
],
}],
fieldsets: &[
FieldSet {
name: "BmcByteCnt",
extends: None,
description: Some("Byte counter."),
bit_size: 16,
fields: &[Field {
name: "bmc_byte_cnt",
description: Some("BMC_BYTE_CNT value."),
bit_offset: BitOffset::Regular(RegularBitOffset { offset: 0 }),
bit_size: 9,
array: None,
enumm: None,
}],
},
FieldSet {
name: "BmcClkCnt",
extends: None,
description: Some("BMC sampling clock counter."),
bit_size: 16,
fields: &[Field {
name: "bmc_clk_cnt",
description: Some("R/T counter."),
bit_offset: BitOffset::Regular(RegularBitOffset { offset: 0 }),
bit_size: 9,
array: None,
enumm: None,
}],
},
FieldSet {
name: "BmcTxSz",
extends: None,
description: Some("PD send length register."),
bit_size: 16,
fields: &[Field {
name: "bmc_tx_sz",
description: Some("BMC_TX_SZ value."),
bit_offset: BitOffset::Regular(RegularBitOffset { offset: 0 }),
bit_size: 9,
array: None,
enumm: None,
}],
},
FieldSet {
name: "Config",
extends: None,
description: Some("PD interrupt enable register."),
bit_size: 16,
fields: &[
Field {
name: "pd_filt_en",
description: Some("control PD pin input filter enable."),
bit_offset: BitOffset::Regular(RegularBitOffset { offset: 0 }),
bit_size: 1,
array: None,
enumm: None,
},
Field {
name: "pd_all_clr",
description: Some("PD ITClear."),
bit_offset: BitOffset::Regular(RegularBitOffset { offset: 1 }),
bit_size: 1,
array: None,
enumm: None,
},
Field {
name: "cc_sel",
description: Some("PD Commutation port."),
bit_offset: BitOffset::Regular(RegularBitOffset { offset: 2 }),
bit_size: 1,
array: None,
enumm: None,
},
Field {
name: "pd_dma_en",
description: Some("PD DMA Enable."),
bit_offset: BitOffset::Regular(RegularBitOffset { offset: 3 }),
bit_size: 1,
array: None,
enumm: None,
},
Field {
name: "pd_rst_en",
description: Some("PD RST Enable."),
bit_offset: BitOffset::Regular(RegularBitOffset { offset: 4 }),
bit_size: 1,
array: None,
enumm: None,
},
Field {
name: "wake_polar",
description: Some("wakeup polarity."),
bit_offset: BitOffset::Regular(RegularBitOffset { offset: 5 }),
bit_size: 1,
array: None,
enumm: None,
},
Field {
name: "cc_tr",
description: Some("TR conditioning of the CC LV waveform."),
bit_offset: BitOffset::Regular(RegularBitOffset { offset: 6 }),
bit_size: 1,
array: None,
enumm: None,
},
Field {
name: "cc_inc",
description: Some("CC bias current adjustment bit."),
bit_offset: BitOffset::Regular(RegularBitOffset { offset: 7 }),
bit_size: 1,
array: None,
enumm: None,
},
Field {
name: "rx_multi_0",
description: Some("Continuously receive several bits of 0 indicator flag."),
bit_offset: BitOffset::Regular(RegularBitOffset { offset: 8 }),
bit_size: 1,
array: None,
enumm: None,
},
Field {
name: "ie_pd_io",
description: Some("IO Enable."),
bit_offset: BitOffset::Regular(RegularBitOffset { offset: 10 }),
bit_size: 1,
array: None,
enumm: None,
},
Field {
name: "ie_rx_bit",
description: Some("bit interrupt Enable."),
bit_offset: BitOffset::Regular(RegularBitOffset { offset: 11 }),
bit_size: 1,
array: None,
enumm: None,
},
Field {
name: "ie_rx_byte",
description: Some("Receive byte register."),
bit_offset: BitOffset::Regular(RegularBitOffset { offset: 12 }),
bit_size: 1,
array: None,
enumm: None,
},
Field {
name: "ie_rx_act",
description: Some("Receive complete register."),
bit_offset: BitOffset::Regular(RegularBitOffset { offset: 13 }),
bit_size: 1,
array: None,
enumm: None,
},
Field {
name: "ie_rx_reset",
description: Some("Receive complete rst register."),
bit_offset: BitOffset::Regular(RegularBitOffset { offset: 14 }),
bit_size: 1,
array: None,
enumm: None,
},
Field {
name: "ie_tx_end",
description: Some("transfer complete register."),
bit_offset: BitOffset::Regular(RegularBitOffset { offset: 15 }),
bit_size: 1,
array: None,
enumm: None,
},
],
},
FieldSet {
name: "Control",
extends: None,
description: Some("PD Send and receive enable register."),
bit_size: 8,
fields: &[
Field {
name: "pd_tx_en",
description: Some("PD_TX_EN value."),
bit_offset: BitOffset::Regular(RegularBitOffset { offset: 0 }),
bit_size: 1,
array: None,
enumm: None,
},
Field {
name: "bmc_start",
description: Some("BMC_START value."),
bit_offset: BitOffset::Regular(RegularBitOffset { offset: 1 }),
bit_size: 1,
array: None,
enumm: None,
},
Field {
name: "rx_state",
description: Some("PD receive status identification."),
bit_offset: BitOffset::Regular(RegularBitOffset { offset: 2 }),
bit_size: 3,
array: None,
enumm: None,
},
Field {
name: "data_flag",
description: Some("DATA_FLAG value."),
bit_offset: BitOffset::Regular(RegularBitOffset { offset: 5 }),
bit_size: 1,
array: None,
enumm: None,
},
Field {
name: "tx_bit_back",
description: Some("TX_BIT_BACK value."),
bit_offset: BitOffset::Regular(RegularBitOffset { offset: 6 }),
bit_size: 1,
array: None,
enumm: None,
},
Field {
name: "bmc_byte_hi",
description: Some("BMC_BYTE_HI value."),
bit_offset: BitOffset::Regular(RegularBitOffset { offset: 7 }),
bit_size: 1,
array: None,
enumm: None,
},
],
},
FieldSet {
name: "DataBuf",
extends: None,
description: Some("DMA cache data register."),
bit_size: 8,
fields: &[Field {
name: "data_buf",
description: Some("DATA_BUF value."),
bit_offset: BitOffset::Regular(RegularBitOffset { offset: 0 }),
bit_size: 8,
array: None,
enumm: None,
}],
},
FieldSet {
name: "Dma",
extends: None,
description: Some("PD buffer start address register."),
bit_size: 32,
fields: &[Field {
name: "usbpd_dma_addr",
description: Some("USBPD_DMA_ADDR value."),
bit_offset: BitOffset::Regular(RegularBitOffset { offset: 0 }),
bit_size: 21,
array: None,
enumm: None,
}],
},
FieldSet {
name: "PortCc1",
extends: None,
description: Some("CC1 port control register."),
bit_size: 16,
fields: &[
Field {
name: "pa_cc1_ai",
description: Some("PA_CC1_AI value."),
bit_offset: BitOffset::Regular(RegularBitOffset { offset: 0 }),
bit_size: 1,
array: None,
enumm: None,
},
Field {
name: "cc1_pd",
description: Some("port pull-down resistor enable."),
bit_offset: BitOffset::Regular(RegularBitOffset { offset: 1 }),
bit_size: 1,
array: None,
enumm: None,
},
Field {
name: "cc1_pu",
description: Some("CC1_PU value."),
bit_offset: BitOffset::Regular(RegularBitOffset { offset: 2 }),
bit_size: 2,
array: None,
enumm: None,
},
Field {
name: "cc1_lve",
description: Some("CC1_LVE value."),
bit_offset: BitOffset::Regular(RegularBitOffset { offset: 4 }),
bit_size: 1,
array: None,
enumm: None,
},
Field {
name: "cc1_ce",
description: Some("CC1_CE value."),
bit_offset: BitOffset::Regular(RegularBitOffset { offset: 5 }),
bit_size: 3,
array: None,
enumm: None,
},
],
},
FieldSet {
name: "PortCc2",
extends: None,
description: Some("CC2 port control register."),
bit_size: 16,
fields: &[
Field {
name: "pa_cc2_ai",
description: Some("PA_CC2_AI value."),
bit_offset: BitOffset::Regular(RegularBitOffset { offset: 0 }),
bit_size: 1,
array: None,
enumm: None,
},
Field {
name: "cc2_pd",
description: Some("port pull-down resistor enable."),
bit_offset: BitOffset::Regular(RegularBitOffset { offset: 1 }),
bit_size: 1,
array: None,
enumm: None,
},
Field {
name: "cc2_pu",
description: Some("CC2_PU value."),
bit_offset: BitOffset::Regular(RegularBitOffset { offset: 2 }),
bit_size: 2,
array: None,
enumm: None,
},
Field {
name: "cc2_lve",
description: Some("CC2_LVE value."),
bit_offset: BitOffset::Regular(RegularBitOffset { offset: 4 }),
bit_size: 1,
array: None,
enumm: None,
},
Field {
name: "cc2_ce",
description: Some("CC2_CE value."),
bit_offset: BitOffset::Regular(RegularBitOffset { offset: 5 }),
bit_size: 3,
array: None,
enumm: None,
},
],
},
FieldSet {
name: "Status",
extends: None,
description: Some("PD interrupt flag register."),
bit_size: 8,
fields: &[
Field {
name: "bmc_aux",
description: Some("BMC_AUX value."),
bit_offset: BitOffset::Regular(RegularBitOffset { offset: 0 }),
bit_size: 2,
array: None,
enumm: None,
},
Field {
name: "buf_err",
description: Some("BUF_ERR value."),
bit_offset: BitOffset::Regular(RegularBitOffset { offset: 2 }),
bit_size: 1,
array: None,
enumm: None,
},
Field {
name: "if_rx_bit",
description: Some("IF_RX_BIT value."),
bit_offset: BitOffset::Regular(RegularBitOffset { offset: 3 }),
bit_size: 1,
array: None,
enumm: None,
},
Field {
name: "if_rx_byte",
description: Some("IF_RX_BYTE value."),
bit_offset: BitOffset::Regular(RegularBitOffset { offset: 4 }),
bit_size: 1,
array: None,
enumm: None,
},
Field {
name: "if_rx_act",
description: Some("IF_RX_ACT value."),
bit_offset: BitOffset::Regular(RegularBitOffset { offset: 5 }),
bit_size: 1,
array: None,
enumm: None,
},
Field {
name: "if_rx_reset",
description: Some("IF_RX_RESET value."),
bit_offset: BitOffset::Regular(RegularBitOffset { offset: 6 }),
bit_size: 1,
array: None,
enumm: None,
},
Field {
name: "if_tx_end",
description: Some("IF_TX_END value."),
bit_offset: BitOffset::Regular(RegularBitOffset { offset: 7 }),
bit_size: 1,
array: None,
enumm: None,
},
],
},
FieldSet {
name: "TxSel",
extends: None,
description: Some("SOP port selection register."),
bit_size: 8,
fields: &[
Field {
name: "tx_sel1",
description: Some("TX_SEL1 value."),
bit_offset: BitOffset::Regular(RegularBitOffset { offset: 0 }),
bit_size: 1,
array: None,
enumm: None,
},
Field {
name: "tx_sel2",
description: Some("TX_SEL2 value."),
bit_offset: BitOffset::Regular(RegularBitOffset { offset: 2 }),
bit_size: 2,
array: None,
enumm: None,
},
Field {
name: "tx_sel3",
description: Some("TX_SEL3 value."),
bit_offset: BitOffset::Regular(RegularBitOffset { offset: 4 }),
bit_size: 2,
array: None,
enumm: None,
},
Field {
name: "tx_sel4",
description: Some("TX_SEL4 value."),
bit_offset: BitOffset::Regular(RegularBitOffset { offset: 6 }),
bit_size: 2,
array: None,
enumm: None,
},
],
},
],
enums: &[],
};