ch32-metapac 0.1.0 

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153

use crate::metadata::ir::*;
pub(crate) static REGISTERS: IR = IR {
    blocks: &[Block {
        name: "Afio",
        extends: None,
        description: Some("Alternate function I/O."),
        items: &[
            BlockItem {
                name: "pcfr1",
                description: Some("AF remap and debug I/O configuration register (AFIO_PCFR)."),
                array: None,
                byte_offset: 0x4,
                inner: BlockItemInner::Register(Register {
                    access: Access::ReadWrite,
                    bit_size: 32,
                    fieldset: Some("Pcfr1"),
                }),
            },
            BlockItem {
                name: "exticr",
                description: Some("External interrupt configuration register (AFIO_EXTICR)."),
                array: None,
                byte_offset: 0x8,
                inner: BlockItemInner::Register(Register {
                    access: Access::ReadWrite,
                    bit_size: 32,
                    fieldset: Some("Exticr"),
                }),
            },
        ],
    }],
    fieldsets: &[
        FieldSet {
            name: "Exticr",
            extends: None,
            description: Some("External interrupt configuration register (AFIO_EXTICR)."),
            bit_size: 32,
            fields: &[Field {
                name: "exti",
                description: Some("EXTI0 configuration."),
                bit_offset: BitOffset::Regular(RegularBitOffset { offset: 0 }),
                bit_size: 2,
                array: Some(Array::Regular(RegularArray { len: 8, stride: 2 })),
                enumm: None,
            }],
        },
        FieldSet {
            name: "Pcfr1",
            extends: None,
            description: Some("AF remap and debug I/O configuration register (AFIO_PCFR)."),
            bit_size: 32,
            fields: &[
                Field {
                    name: "spi1_rm",
                    description: Some("SPI1 remapping."),
                    bit_offset: BitOffset::Regular(RegularBitOffset { offset: 0 }),
                    bit_size: 1,
                    array: None,
                    enumm: None,
                },
                Field {
                    name: "i2c1_rm",
                    description: Some("I2C1 remapping."),
                    bit_offset: BitOffset::Regular(RegularBitOffset { offset: 1 }),
                    bit_size: 1,
                    array: None,
                    enumm: None,
                },
                Field {
                    name: "usart1_rm",
                    description: Some("USART1 remapping."),
                    bit_offset: BitOffset::Regular(RegularBitOffset { offset: 2 }),
                    bit_size: 1,
                    array: None,
                    enumm: None,
                },
                Field {
                    name: "tim1_rm",
                    description: Some("TIM1 remapping."),
                    bit_offset: BitOffset::Regular(RegularBitOffset { offset: 6 }),
                    bit_size: 2,
                    array: None,
                    enumm: None,
                },
                Field {
                    name: "tim2_rm",
                    description: Some("TIM2 remapping."),
                    bit_offset: BitOffset::Regular(RegularBitOffset { offset: 8 }),
                    bit_size: 2,
                    array: None,
                    enumm: None,
                },
                Field {
                    name: "pa12_rm",
                    description: Some("Port A1/Port A2 mapping on OSCIN/OSCOUT."),
                    bit_offset: BitOffset::Regular(RegularBitOffset { offset: 15 }),
                    bit_size: 1,
                    array: None,
                    enumm: None,
                },
                Field {
                    name: "adc1_etrginj__rm",
                    description: Some("ADC 1 External trigger injected conversion remapping."),
                    bit_offset: BitOffset::Regular(RegularBitOffset { offset: 17 }),
                    bit_size: 1,
                    array: None,
                    enumm: None,
                },
                Field {
                    name: "adc1_etrgreg__rm",
                    description: Some("ADC 1 external trigger regular conversion remapping."),
                    bit_offset: BitOffset::Regular(RegularBitOffset { offset: 18 }),
                    bit_size: 1,
                    array: None,
                    enumm: None,
                },
                Field {
                    name: "usart1_rm1",
                    description: Some("USART1 remapping."),
                    bit_offset: BitOffset::Regular(RegularBitOffset { offset: 21 }),
                    bit_size: 1,
                    array: None,
                    enumm: None,
                },
                Field {
                    name: "i2c1_rm1",
                    description: Some("I2C1 remapping."),
                    bit_offset: BitOffset::Regular(RegularBitOffset { offset: 22 }),
                    bit_size: 1,
                    array: None,
                    enumm: None,
                },
                Field {
                    name: "tim1_ch1_rm",
                    description: Some("TIM1_CH1 channel selection."),
                    bit_offset: BitOffset::Regular(RegularBitOffset { offset: 23 }),
                    bit_size: 1,
                    array: None,
                    enumm: None,
                },
                Field {
                    name: "swcfg",
                    description: Some("Serial wire JTAG configuration."),
                    bit_offset: BitOffset::Regular(RegularBitOffset { offset: 24 }),
                    bit_size: 3,
                    array: None,
                    enumm: None,
                },
            ],
        },
    ],
    enums: &[],
};