use crate::metadata::ir::*;
pub(crate) static REGISTERS: IR = IR {
blocks: &[Block {
name: "Afio",
extends: None,
description: Some("Alternate function I/O."),
items: &[
BlockItem {
name: "pcfr1",
description: Some("AF remap and debug I/O configuration register (AFIO_PCFR1)."),
array: None,
byte_offset: 0x4,
inner: BlockItemInner::Register(Register {
access: Access::ReadWrite,
bit_size: 32,
fieldset: Some("Pcfr1"),
}),
},
BlockItem {
name: "exticr",
description: Some("External interrupt configuration register (AFIO_EXTICRx)."),
array: Some(Array::Regular(RegularArray { len: 2, stride: 4 })),
byte_offset: 0x8,
inner: BlockItemInner::Register(Register {
access: Access::ReadWrite,
bit_size: 32,
fieldset: Some("Exticr"),
}),
},
BlockItem {
name: "ctlr",
description: Some("CTLR."),
array: None,
byte_offset: 0x18,
inner: BlockItemInner::Register(Register {
access: Access::ReadWrite,
bit_size: 32,
fieldset: Some("Ctlr"),
}),
},
],
}],
fieldsets: &[
FieldSet {
name: "Ctlr",
extends: None,
description: Some("CTLR."),
bit_size: 32,
fields: &[
Field {
name: "udm_pue",
description: Some("UDM_PUE configuration."),
bit_offset: BitOffset::Regular(RegularBitOffset { offset: 0 }),
bit_size: 2,
array: None,
enumm: None,
},
Field {
name: "udp_pue",
description: Some("UDP_PUE configuration."),
bit_offset: BitOffset::Regular(RegularBitOffset { offset: 2 }),
bit_size: 2,
array: None,
enumm: None,
},
Field {
name: "usb_phy_v33",
description: Some("USB_PHY_V33 configuration."),
bit_offset: BitOffset::Regular(RegularBitOffset { offset: 6 }),
bit_size: 1,
array: None,
enumm: None,
},
Field {
name: "usb_ioen",
description: Some("USB_IOEN configuration."),
bit_offset: BitOffset::Regular(RegularBitOffset { offset: 7 }),
bit_size: 1,
array: None,
enumm: None,
},
Field {
name: "usbpd_phy_v33",
description: Some("USBPD_PHY_V33 configuration."),
bit_offset: BitOffset::Regular(RegularBitOffset { offset: 8 }),
bit_size: 1,
array: None,
enumm: None,
},
Field {
name: "usbpd_in_hvt",
description: Some("USBPD_IN_HVT configuration."),
bit_offset: BitOffset::Regular(RegularBitOffset { offset: 9 }),
bit_size: 1,
array: None,
enumm: None,
},
Field {
name: "udp_bc_vsrc",
description: Some("UDP_BC_VSRC configuration."),
bit_offset: BitOffset::Regular(RegularBitOffset { offset: 16 }),
bit_size: 1,
array: None,
enumm: None,
},
Field {
name: "udm_bc_vsrc",
description: Some("UDM_BC_VSRC configuration."),
bit_offset: BitOffset::Regular(RegularBitOffset { offset: 17 }),
bit_size: 1,
array: None,
enumm: None,
},
Field {
name: "udp_bc_cmpo",
description: Some("UDP_BC_CMPO configuration."),
bit_offset: BitOffset::Regular(RegularBitOffset { offset: 18 }),
bit_size: 1,
array: None,
enumm: None,
},
Field {
name: "udm_bc_cmpo",
description: Some("UDM_BC_CMPO configuration."),
bit_offset: BitOffset::Regular(RegularBitOffset { offset: 19 }),
bit_size: 1,
array: None,
enumm: None,
},
Field {
name: "pa3_filt_en",
description: Some("PA3_FILT_EN configuration."),
bit_offset: BitOffset::Regular(RegularBitOffset { offset: 24 }),
bit_size: 1,
array: None,
enumm: None,
},
Field {
name: "pa4_filt_en",
description: Some("PA4_FILT_EN configuration."),
bit_offset: BitOffset::Regular(RegularBitOffset { offset: 25 }),
bit_size: 1,
array: None,
enumm: None,
},
Field {
name: "pb5_filt_en",
description: Some("PB5_FILT_EN configuration."),
bit_offset: BitOffset::Regular(RegularBitOffset { offset: 26 }),
bit_size: 1,
array: None,
enumm: None,
},
Field {
name: "pb6_filt_en",
description: Some("PB6_FILT_EN configuration."),
bit_offset: BitOffset::Regular(RegularBitOffset { offset: 27 }),
bit_size: 1,
array: None,
enumm: None,
},
],
},
FieldSet {
name: "Exticr",
extends: None,
description: Some("External interrupt configuration register (AFIO_EXTICRx)."),
bit_size: 32,
fields: &[Field {
name: "exti",
description: Some("EXTI configuration."),
bit_offset: BitOffset::Regular(RegularBitOffset { offset: 0 }),
bit_size: 2,
array: Some(Array::Regular(RegularArray { len: 16, stride: 2 })),
enumm: None,
}],
},
FieldSet {
name: "Pcfr1",
extends: None,
description: Some("AF remap and debug I/O configuration register (AFIO_PCFR1)."),
bit_size: 32,
fields: &[
Field {
name: "spi1_rm",
description: Some("SPI1 remapping."),
bit_offset: BitOffset::Regular(RegularBitOffset { offset: 0 }),
bit_size: 2,
array: None,
enumm: None,
},
Field {
name: "i2c1_rm",
description: Some("I2C1 remapping."),
bit_offset: BitOffset::Regular(RegularBitOffset { offset: 2 }),
bit_size: 3,
array: None,
enumm: None,
},
Field {
name: "usart1_rm",
description: Some("USART1 remapping."),
bit_offset: BitOffset::Regular(RegularBitOffset { offset: 5 }),
bit_size: 2,
array: None,
enumm: None,
},
Field {
name: "usart2_rm",
description: Some("USART2 remapping."),
bit_offset: BitOffset::Regular(RegularBitOffset { offset: 7 }),
bit_size: 3,
array: None,
enumm: None,
},
Field {
name: "usart3_rm",
description: Some("USART3 remapping."),
bit_offset: BitOffset::Regular(RegularBitOffset { offset: 10 }),
bit_size: 2,
array: None,
enumm: None,
},
Field {
name: "usart4_rm",
description: Some("USART4 remapping."),
bit_offset: BitOffset::Regular(RegularBitOffset { offset: 12 }),
bit_size: 3,
array: None,
enumm: None,
},
Field {
name: "tim1_rm",
description: Some("TIM1 remapping."),
bit_offset: BitOffset::Regular(RegularBitOffset { offset: 15 }),
bit_size: 3,
array: None,
enumm: None,
},
Field {
name: "tim2_rm",
description: Some("TIM2 remapping."),
bit_offset: BitOffset::Regular(RegularBitOffset { offset: 18 }),
bit_size: 3,
array: None,
enumm: None,
},
Field {
name: "tim3_rm",
description: Some("TIM3 remapping."),
bit_offset: BitOffset::Regular(RegularBitOffset { offset: 21 }),
bit_size: 2,
array: None,
enumm: None,
},
Field {
name: "pioc_rm",
description: Some("IO2W__RM remapping."),
bit_offset: BitOffset::Regular(RegularBitOffset { offset: 23 }),
bit_size: 1,
array: None,
enumm: None,
},
Field {
name: "sw_cfg",
description: Some("SW_CFG Configuration."),
bit_offset: BitOffset::Regular(RegularBitOffset { offset: 24 }),
bit_size: 3,
array: None,
enumm: None,
},
],
},
],
enums: &[],
};