Crate cc2650

Source
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Peripheral access API for CC2650F128 microcontrollers (generated using svd2rust v0.14.0)

You can find an overview of the API here.

Modules§

  • Always On (AON) Battery And Temperature MONitor (BATMON) residing in the AON domain Note: This module only supports 32 bit Read/Write access from MCU.
  • This module configures the event fabric located in the AON domain. Note: This module is only supporting 32 bit ReadWrite access from MCU
  • Always On (AON) IO Controller - controls IO operation when the MCU IO Controller (IOC) is powered off and resides in the AON domain. Note: This module only supports 32 bit Read/Write access from MCU.
  • This component control the Real Time Clock residing in AON Note: This module is only supporting 32 bit ReadWrite access.
  • This component controls AON_SYSCTL, which is the device’s system controller. Note: This module is only supporting 32 bit ReadWrite access from MCU
  • This component control the Wakeup controller residing in the AON domain. Note: This module is only supporting 32 bit ReadWrite access from MCU
  • Configuration registers controlling analog peripherals of AUX. Registers Fields should be considered static unless otherwise noted (as dynamic)
  • AUX Analog/Digital Input Output Controller
  • AUX Analog Peripheral Control Module
  • This is the DDI for the digital block that controls all the analog clock oscillators (OSC_DIG) and performs qualification of the clocks generated.
  • AUX Event Controller
  • AUX Sensor Control Engine Control Module
  • AUX Semaphore Controller
  • AUX Time To Digital Converter
  • AUX Timer
  • AUX Wake-up controller
  • Customer configuration area (CCFG)
  • Cortex-M’s Data watchpoint and Trace (DWT)
  • Cortex-M’s Flash Patch and Breakpoint (FPB)
  • Cortex-M’s Instrumentation Trace Macrocell (ITM)
  • Cortex-M’s System Control Space (SCS)
  • Cortex-M’s TI proprietary registers
  • Cortex-M3’s Trace Port Interface Unit (TPIU)
  • Crypto core with DMA capability and local key storage
  • Event Fabric Component Definition
  • Factory configuration area (FCFG1)
  • Flash sub-system registers, includes the Flash Memory Controller (FMC), flash read path, and an integrated Efuse controller and EFUSEROM.
  • MCU GPIO - I/F for controlling and reading IO status and IO event status
  • General Purpose Timer.
  • I2CMaster/Slave Serial Controler
  • I2S Audio DMA module supporting formats I2S, LJF, RJF and DSP
  • IO Controller (IOC) - configures all the DIOs and resides in the MCU domain.
  • Power, Reset and Clock Management
  • RF Core Doorbell
  • RF Core Power Management
  • RF Core Radio Timer
  • MCU Semaphore Module This module provides 32 binary semaphores. The state of a binary semaphore is either taken or available. A semaphore does not implement any ownership attribute. Still, a semaphore can be used to handle mutual exclusion scenarios.
  • Synchronous Serial Interface with master and slave capabilities
  • True Random Number Generator
  • Universal Asynchronous Receiver/Transmitter (UART) interface
  • ARM Micro Direct Memory Access Controller
  • Versatile Instruction Memory System Controls memory access to the Flash and encapsulates the following instruction memories: - Boot ROM - Cache / GPRAM
  • Watchdog Timer

Structs§

  • Always On (AON) Battery And Temperature MONitor (BATMON) residing in the AON domain Note: This module only supports 32 bit Read/Write access from MCU.
  • This module configures the event fabric located in the AON domain. Note: This module is only supporting 32 bit ReadWrite access from MCU
  • Always On (AON) IO Controller - controls IO operation when the MCU IO Controller (IOC) is powered off and resides in the AON domain. Note: This module only supports 32 bit Read/Write access from MCU.
  • This component control the Real Time Clock residing in AON Note: This module is only supporting 32 bit ReadWrite access.
  • This component controls AON_SYSCTL, which is the device’s system controller. Note: This module is only supporting 32 bit ReadWrite access from MCU
  • This component control the Wakeup controller residing in the AON domain. Note: This module is only supporting 32 bit ReadWrite access from MCU
  • Configuration registers controlling analog peripherals of AUX. Registers Fields should be considered static unless otherwise noted (as dynamic)
  • AUX Analog/Digital Input Output Controller
  • AUX_AIODIO1
  • AUX Analog Peripheral Control Module
  • This is the DDI for the digital block that controls all the analog clock oscillators (OSC_DIG) and performs qualification of the clocks generated.
  • AUX Event Controller
  • AUX Sensor Control Engine Control Module
  • AUX Semaphore Controller
  • AUX Time To Digital Converter
  • AUX Timer
  • AUX Wake-up controller
  • Cache and branch predictor maintenance operations
  • Customer configuration area (CCFG)
  • CPUID
  • Cortex-M’s Data watchpoint and Trace (DWT)
  • Cortex-M’s Flash Patch and Breakpoint (FPB)
  • Cortex-M’s Instrumentation Trace Macrocell (ITM)
  • Cortex-M’s System Control Space (SCS)
  • Cortex-M’s TI proprietary registers
  • Cortex-M3’s Trace Port Interface Unit (TPIU)
  • Crypto core with DMA capability and local key storage
  • Core peripherals
  • Debug Control Block
  • Data Watchpoint and Trace unit
  • Event Fabric Component Definition
  • Factory configuration area (FCFG1)
  • Flash sub-system registers, includes the Flash Memory Controller (FMC), flash read path, and an integrated Efuse controller and EFUSEROM.
  • Flash Patch and Breakpoint unit
  • Floating Point Unit
  • MCU GPIO - I/F for controlling and reading IO status and IO event status
  • General Purpose Timer.
  • GPT1
  • GPT2
  • GPT3
  • I2CMaster/Slave Serial Controler
  • I2S Audio DMA module supporting formats I2S, LJF, RJF and DSP
  • IO Controller (IOC) - configures all the DIOs and resides in the MCU domain.
  • Instrumentation Trace Macrocell
  • Memory Protection Unit
  • Nested Vector Interrupt Controller
  • Power, Reset and Clock Management
  • All the peripherals
  • RF Core Doorbell
  • RF Core Power Management
  • RF Core Radio Timer
  • System Control Block
  • MCU Semaphore Module This module provides 32 binary semaphores. The state of a binary semaphore is either taken or available. A semaphore does not implement any ownership attribute. Still, a semaphore can be used to handle mutual exclusion scenarios.
  • Synchronous Serial Interface with master and slave capabilities
  • SSI1
  • SysTick: System Timer
  • Trace Port Interface Unit
  • True Random Number Generator
  • Universal Asynchronous Receiver/Transmitter (UART) interface
  • ARM Micro Direct Memory Access Controller
  • Versatile Instruction Memory System Controls memory access to the Flash and encapsulates the following instruction memories: - Boot ROM - Cache / GPRAM
  • Watchdog Timer

Enums§