[−][src]Module cc2650::cpu_fpb
Cortex-M's Flash Patch and Breakpoint (FPB)
Modules
comp0 | Comparator 0 |
comp1 | Comparator 1 |
comp2 | Comparator 2 |
comp3 | Comparator 3 |
comp4 | Comparator 4 |
comp5 | Comparator 5 |
comp6 | Comparator 6 |
comp7 | Comparator 7 |
ctrl | Control This register is used to enable the flash patch block. |
remap | Remap This register provides the remap base address location where a matched addresses are remapped. The three most significant bits and the five least significant bits of the remap base address are hard-coded to 3'b001 and 5'b00000 respectively. The remap base address must be in system space and is it required to be 8-word aligned, with one word allocated to each of the eight FPB comparators. |
Structs
COMP0 | Comparator 0 |
COMP1 | Comparator 1 |
COMP2 | Comparator 2 |
COMP3 | Comparator 3 |
COMP4 | Comparator 4 |
COMP5 | Comparator 5 |
COMP6 | Comparator 6 |
COMP7 | Comparator 7 |
CTRL | Control This register is used to enable the flash patch block. |
REMAP | Remap This register provides the remap base address location where a matched addresses are remapped. The three most significant bits and the five least significant bits of the remap base address are hard-coded to 3'b001 and 5'b00000 respectively. The remap base address must be in system space and is it required to be 8-word aligned, with one word allocated to each of the eight FPB comparators. |
RegisterBlock | Register block |