Struct riscy::RiscV

pub struct RiscV { /* fields omitted */ }

A struct to hold the state of a RiscV core.

Implementations

impl RiscV

pub fn new() -> Self

Create a new RiscV core with all of its registers zeroed out.

pub fn step<M: Memory>(&mut self, memory: &mut M) -> StepResult

Fetch, execute, and retire a single instruction. When the core attempts to interact with memory, whether to fetch an instruction, to perform a load or store operation, etc, it makes use of the supplied memory.

pub fn step_with_retired<M: Memory>(
    &mut self,
    memory: &mut M
) -> (StepResult, Option<Instruction>)

Same as step, but returns the decoded instruction.

pub fn set_reg<R: Into<Reg>>(&mut self, reg: R, reg_val: RegVal)

Sets the given register to the given value.

// sets the the stack pointer, `sp`, (also known as `x2`) to the value `0x2000_0000`.
riscv.set_reg(2, 0x2000_0000.into());

pub fn reg<R: Into<Reg>>(&self, reg: R) -> RegVal

Gets the value of the given register.

// gets the value of the return address register, `ra`, (also known as `x1`).
riscv.reg(1);

pub fn set_pc(&mut self, addr: Addr)

Sets the value of the program counter to the given address.

This is useful for specifying the entry point to the program when first initializing the machine.

pub fn pc(&self) -> Addr

Gets the value of the program counter.

Trait Implementations

impl Display for RiscV

pub fn fmt(&self, f: &mut Formatter<'_>) -> Result

Formats the value using the given formatter.