Trait probe_rs::architecture::arm::sequences::ArmDebugSequence

source · 
pub trait ArmDebugSequence: Send + Sync {

Show 13 methods    fn reset_hardware_assert(
        &self,
        interface: &mut dyn DapProbe
    ) -> Result<(), ArmError> { ... }
    fn reset_hardware_deassert(
        &self,
        memory: &mut dyn ArmProbe
    ) -> Result<(), ArmError> { ... }
    fn debug_port_setup(
        &self,
        interface: &mut dyn DapProbe
    ) -> Result<(), ArmError> { ... }
    fn debug_port_start(
        &self,
        interface: &mut ArmCommunicationInterface<Initialized>,
        dp: DpAddress
    ) -> Result<(), ArmError> { ... }
    fn debug_core_start(
        &self,
        core: &mut dyn ArmProbe,
        core_type: CoreType,
        debug_base: Option<u64>,
        cti_base: Option<u64>
    ) -> Result<(), ArmError> { ... }
    fn reset_catch_set(
        &self,
        core: &mut dyn ArmProbe,
        core_type: CoreType,
        debug_base: Option<u64>
    ) -> Result<(), ArmError> { ... }
    fn reset_catch_clear(
        &self,
        core: &mut dyn ArmProbe,
        core_type: CoreType,
        debug_base: Option<u64>
    ) -> Result<(), ArmError> { ... }
    fn trace_start(
        &self,
        interface: &mut dyn ArmProbeInterface,
        components: &[CoresightComponent],
        _sink: &TraceSink
    ) -> Result<(), ArmError> { ... }
    fn reset_system(
        &self,
        interface: &mut dyn ArmProbe,
        core_type: CoreType,
        debug_base: Option<u64>
    ) -> Result<(), ArmError> { ... }
    fn debug_device_unlock(
        &self,
        _interface: &mut dyn ArmProbeInterface,
        _default_ap: MemoryAp,
        _permissions: &Permissions
    ) -> Result<(), ArmError> { ... }
    fn recover_support_start(
        &self,
        _interface: &mut dyn ArmProbe
    ) -> Result<(), ArmError> { ... }
    fn debug_core_stop(
        &self,
        _interface: &mut dyn ArmProbeInterface
    ) -> Result<(), ArmError> { ... }
    fn debug_erase_sequence(&self) -> Option<Arc<dyn DebugEraseSequence>> { ... }

}
Expand description

A interface to operate debug sequences for ARM targets.

Should be implemented on a custom handle for chips that require special sequence code.

Provided Methods§

Assert a system-wide reset line nRST. This is based on the ResetHardwareAssert function from the ARM SVD Debug Description.

De-Assert a system-wide reset line nRST. This is based on the ResetHardwareDeassert function from the ARM SVD Debug Description.

Prepare the target debug port for connection. This is based on the DebugPortSetup function from the ARM SVD Debug Description.

Connect to the target debug port and power it up. This is based on the DebugPortStart function from the ARM SVD Debug Description.

Initialize core debug system. This is based on the DebugCoreStart function from the ARM SVD Debug Description.

Configure the target to stop code execution after a reset. After this, the core will halt when it comes out of reset. This is based on the ResetCatchSet function from the ARM SVD Debug Description.

Free hardware resources allocated by ResetCatchSet. This is based on the ResetCatchSet function from the ARM SVD Debug Description.

Enable target trace capture.

Note

This function is responsible for configuring any of the CoreSight link components, such as trace funnels, to route trace data to the specified trace sink.

This is based on the TraceStart function from the [ARM SVD Debug Description]. [ARM SVD Debug Description]: http://www.keil.com/pack/doc/cmsis/Pack/html/debug_description.html#resetCatchClear

Executes a system-wide reset without debug domain (or warm-reset that preserves debug connection) via software mechanisms, for example AIRCR.SYSRESETREQ. This is based on the ResetSystem function from the ARM SVD Debug Description.

Check if the device is in a locked state and unlock it. Use query command elements for user confirmation. Executed after having powered up the debug port. This is based on the DebugDeviceUnlock function from the ARM SVD Debug Description.

Executed before step or run command to support recovery from a lost target connection, e.g. after a low power mode. This is based on the RecoverSupportStart function from the ARM SVD Debug Description.

Executed when the debugger session is disconnected from the core.

This is based on the DebugCoreStop function from the ARM SVD Debug Description.

Return the Debug Erase Sequence implementation if it exists

Implementors§