Struct probe_rs::architecture::arm::sequences::atsame5x::AtSAME5x

pub struct AtSAME5x {}

Marker struct indicating initialization sequencing for ATSAM D5x/E5x family parts.

Implementations

impl AtSAME5x

pub fn create() -> Arc<Self>

Create the sequencer for the ATSAM D5x/E5x family of parts.

pub fn erase_all(
    &self,
    memory: &mut dyn ArmProbe,
    permissions: &Permissions
) -> Result<(), ArmError>

Perform a Chip-Erase operation

Issue a Chip-Erase command to the device provided that permission grants erase-all.

Errors

This operation can fail due to insufficient permissions, or if Chip-Erase Lock is enabled (this lock can only be released from within the device firmare). After a successful Chip-Erase a DebugProbeError::ReAttachRequired is returned to signal that a re-connect is needed for the DSU to start operating in unlocked mode.

pub fn reset_hardware_with_extension(
    &self,
    interface: &mut dyn SwdSequence
) -> Result<(), ArmError>

Perform a hardware reset in a way that puts the core into CPU Reset Extension

CPU Reset Extension is a vendor specific feature that allows the CPU core to remain in reset while the rest of the debugging subsystem can run and initialize itself.

For more details see: 12.6.2 CPU Reset Extension in the SAM D5/E5 Family Data Sheet

Errors

Subject to probe communication errors

pub fn release_reset_extension(
    &self,
    memory: &mut dyn ArmProbe
) -> Result<(), ArmError>

Release the CPU core from Reset Extension

Clear the DSU Reset Extension bit, which releases the core from reset extension.

Errors

Subject to probe communication errors

pub fn reset_hardware(
    &self,
    interface: &mut dyn SwdSequence
) -> Result<(), ArmError>

Perform a normal hardware reset without triggering a Reset extension

Errors

Subject to probe communication errors

Trait Implementations

impl ArmDebugSequence for AtSAME5x

fn reset_hardware_assert(
    &self,
    interface: &mut dyn DapProbe
) -> Result<(), ArmError>

reset_hardware_assert for ATSAM D5x/E5x devices

Instead of keeping nReset asserted, the device is instead put into CPU Reset Extension which will keep the CPU Core in reset until manually released by the debugger probe.

fn reset_hardware_deassert(
    &self,
    memory: &mut dyn ArmProbe
) -> Result<(), ArmError>

reset_hardware_deassert for ATSAM D5x/E5x devices

Instead of de-asserting nReset here (this was already done during the CPU Reset Extension process), the device is released from Reset Extension.

fn debug_device_unlock(
    &self,
    interface: &mut dyn ArmProbeInterface,
    default_ap: MemoryAp,
    permissions: &Permissions
) -> Result<(), ArmError>

debug_device_unlock for ATSAM D5x/E5x devices

First check the device lock status by querying its Device Service Unit (DSU). If the device is already unlocked then return Ok directly. If the device is locked the following happens:

• If the erase_all permission is missing return the appropriate error
• If the Chip-Erase command is also locked then return an error since Chip-Erase Unlock can only be done from within the device firmware.
• Perform a Chip-Erase to unlock the device and if successful return a DebugProbeError::ReAttachRequired to signal that a probe re-attach is required before the new unlocked status takes effect.

fn debug_erase_sequence(&self) -> Option<Arc<dyn DebugEraseSequence>>

Return the Debug Erase Sequence implementation if it exists

fn debug_port_setup(&self, interface: &mut dyn DapProbe) -> Result<(), ArmError>

Prepare the target debug port for connection. This is based on the DebugPortSetup function from the ARM SVD Debug Description.

fn debug_port_start(
    &self,
    interface: &mut ArmCommunicationInterface<Initialized>,
    dp: DpAddress
) -> Result<(), ArmError>

Connect to the target debug port and power it up. This is based on the DebugPortStart function from the ARM SVD Debug Description.

fn debug_core_start(
    &self,
    core: &mut dyn ArmProbe,
    core_type: CoreType,
    debug_base: Option<u64>,
    cti_base: Option<u64>
) -> Result<(), ArmError>

Initialize core debug system. This is based on the DebugCoreStart function from the ARM SVD Debug Description.

fn reset_catch_set(
    &self,
    core: &mut dyn ArmProbe,
    core_type: CoreType,
    debug_base: Option<u64>
) -> Result<(), ArmError>

Configure the target to stop code execution after a reset. After this, the core will halt when it comes out of reset. This is based on the ResetCatchSet function from the ARM SVD Debug Description.

fn reset_catch_clear(
    &self,
    core: &mut dyn ArmProbe,
    core_type: CoreType,
    debug_base: Option<u64>
) -> Result<(), ArmError>

Free hardware resources allocated by ResetCatchSet. This is based on the ResetCatchSet function from the ARM SVD Debug Description.

fn trace_start(
    &self,
    interface: &mut dyn ArmProbeInterface,
    components: &[CoresightComponent],
    _sink: &TraceSink
) -> Result<(), ArmError>

Enable target trace capture.

fn reset_system(
    &self,
    interface: &mut dyn ArmProbe,
    core_type: CoreType,
    debug_base: Option<u64>
) -> Result<(), ArmError>

Executes a system-wide reset without debug domain (or warm-reset that preserves debug connection) via software mechanisms, for example AIRCR.SYSRESETREQ. This is based on the ResetSystem function from the ARM SVD Debug Description.

fn recover_support_start(
    &self,
    _interface: &mut dyn ArmProbe
) -> Result<(), ArmError>

Executed before step or run command to support recovery from a lost target connection, e.g. after a low power mode. This is based on the RecoverSupportStart function from the ARM SVD Debug Description.

fn debug_core_stop(
    &self,
    _interface: &mut dyn ArmProbeInterface
) -> Result<(), ArmError>

Executed when the debugger session is disconnected from the core.

impl DebugEraseSequence for AtSAME5x

fn erase_all(
    &self,
    interface: &mut dyn ArmProbeInterface
) -> Result<(), ArmError>

Perform Chip-Erase by vendor specific means.