Struct PIOBuilder 

pub struct PIOBuilder<P> { /* private fields */ }

Builder to deploy a fully configured PIO program on one of the state machines.

Implementations

impl<P> PIOBuilder<P>

where P: PIOExt,

pub fn from_installed_program(p: InstalledProgram<P>) -> PIOBuilder<P>

Set config settings based on information from the given InstalledProgram. Additional configuration may be needed in addition to this.

Note: This was formerly called from_program. The new function has a different default shift direction, ShiftDirection::Right, matching the hardware reset value.

pub fn from_program(p: InstalledProgram<P>) -> PIOBuilder<P>

👎Deprecated: please use from_installed_program instead and update shift direction if necessary

Set config settings based on information from the given InstalledProgram. Additional configuration may be needed in addition to this.

Note: The shift direction for both input and output shift registers defaults to ShiftDirection::Left, which is different from the rp235x reset value. The alternative Self::from_installed_program, fixes this.

pub fn set_mov_status_config(self, mov_status: MovStatusConfig) -> PIOBuilder<P>

Set the config for when the status register is set to true.

See MovStatusConfig for more info.

pub fn set_pins(self, base: u8, count: u8) -> PIOBuilder<P>

Set the pins asserted by SET instruction.

The least-significant bit of SET instruction asserts the state of the pin indicated by base, the next bit asserts the state of the next pin, and so on up to count pins. The pin numbers are considered modulo 32.

pub fn out_pins(self, base: u8, count: u8) -> PIOBuilder<P>

Set the pins asserted by OUT instruction.

The least-significant bit of OUT instruction asserts the state of the pin indicated by base, the next bit asserts the state of the next pin, and so on up to count pins. The pin numbers are considered modulo 32.

pub fn in_pin_base(self, base: u8) -> PIOBuilder<P>

Set the pins used by IN instruction.

The IN instruction reads the least significant bit from the pin indicated by base, the next bit from the next pin, and so on. The pin numbers are considered modulo 32.

pub fn jmp_pin(self, pin: u8) -> PIOBuilder<P>

Set the pin used by JMP PIN instruction.

When the pin set by this function is high, the jump is taken, otherwise not.

pub fn side_set_pin_base(self, base: u8) -> PIOBuilder<P>

Set the pins used by side-set instructions.

The least-significant side-set bit asserts the state of the pin indicated by base, the next bit asserts the state of the next pin, and so on up to pio::SideSet::bits() bits as configured in pio::Program.

pub fn buffers(self, buffers: Buffers) -> PIOBuilder<P>

Set buffer sharing.

See Buffers for more information.

pub fn clock_divisor(self, divisor: f32) -> PIOBuilder<P>

👎Deprecated since 0.7.0: Pulls in floating points. Use the fixed point alternative: clock_divisor_fixed_point

Set the clock divisor.

The is based on the sys_clk. Set 1 for full speed. A clock divisor of n will cause the state machine to run 1 cycle every n clock cycles. For small values of n, a fractional divisor may introduce unacceptable jitter.

pub fn clock_divisor_fixed_point(self, int: u16, frac: u8) -> PIOBuilder<P>

The clock is based on the sys_clk and will execute an instruction every int + (frac/256) ticks.

A clock divisor of n will cause the state machine to run 1 cycle every n clock cycles. If the integer part is 0 then the fractional part must be 0. This is interpreted by the device as the integer 65536.

For small values of int, a fractional divisor may introduce unacceptable jitter.

pub fn out_sticky(self, out_sticky: bool) -> PIOBuilder<P>

Set the output sticky state.

When the output is set to be sticky, the PIO hardware continuously asserts the most recent OUT/SET to the pins.

pub fn inline_out(self, inline_out: Option<u8>) -> PIOBuilder<P>

Set the inline OUT enable bit.

When set to value, the given bit of OUT instruction’s data is used as an auxiliary write enable. When used with Self::out_sticky, writes with enable 0 will deassert the latest pin write.

pub fn autopush(self, autopush: bool) -> PIOBuilder<P>

Set the autopush state.

When autopush is enabled, the IN instruction automatically pushes the data once the number of bits reaches threshold set by Self::push_threshold.

pub fn in_count(self, count: u8) -> PIOBuilder<P>

Set the number of pins which are not masked to 0 when read by an IN PINS, WAIT PIN or MOV x, PINS instruction.

For example, an IN_COUNT of 5 means that the 5 LSBs of the IN pin group are visible (bits 4:0), but the remaining 27 MSBs are masked to 0. A count of 32 is encoded with a field value of 0, so the default behaviour is to not perform any masking.

pub fn push_threshold(self, threshold: u8) -> PIOBuilder<P>

Set the number of bits pushed into ISR before autopush or conditional push will take place.

pub fn autopull(self, autopull: bool) -> PIOBuilder<P>

Set the autopull state.

When autopull is enabled, the OUT instruction automatically pulls the data once the number of bits reaches threshold set by Self::pull_threshold.

pub fn pull_threshold(self, threshold: u8) -> PIOBuilder<P>

Set the number of bits pulled from out of OSR before autopull or conditional pull will take place.

pub fn in_shift_direction(self, direction: ShiftDirection) -> PIOBuilder<P>

Set the ISR shift direction for IN instruction.

For example ShiftDirection::Right means that ISR is shifted to right, i.e. data enters from left.

pub fn out_shift_direction(self, direction: ShiftDirection) -> PIOBuilder<P>

Set the OSR shift direction for OUT instruction.

For example ShiftDirection::Right means that OSR is shifted to right, i.e. data is taken from the right side.

pub fn build<SM>( self, sm: UninitStateMachine<(P, SM)>, ) -> (StateMachine<(P, SM), Stopped>, Rx<(P, SM)>, Tx<(P, SM)>)

where SM: StateMachineIndex,

Build the config and deploy it to a StateMachine.

Trait Implementations

impl<P> Debug for PIOBuilder<P>

where P: Debug,

fn fmt(&self, f: &mut Formatter<'_>) -> Result<(), Error>

Formats the value using the given formatter.