[−][src]Type Definition lpc55_pac::usart0::ctl::W
type W = W<u32, CTL>;
Writer for register CTL
Implementations
impl W
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pub fn txbrken(&mut self) -> TXBRKEN_W<'_>
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Bit 1 - Break Enable.
pub fn addrdet(&mut self) -> ADDRDET_W<'_>
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Bit 2 - Enable address detect mode.
pub fn txdis(&mut self) -> TXDIS_W<'_>
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Bit 6 - Transmit Disable.
pub fn cc(&mut self) -> CC_W<'_>
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Bit 8 - Continuous Clock generation. By default, SCLK is only output while data is being transmitted in synchronous mode.
pub fn clrcconrx(&mut self) -> CLRCCONRX_W<'_>
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Bit 9 - Clear Continuous Clock.
pub fn autobaud(&mut self) -> AUTOBAUD_W<'_>
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Bit 16 - Autobaud enable.