#[doc = "Reader of register SYSCLKCR"]
pub type R = crate::R<u32, super::SYSCLKCR>;
#[doc = "Writer for register SYSCLKCR"]
pub type W = crate::W<u32, super::SYSCLKCR>;
#[doc = "Register SYSCLKCR `reset()`'s with value 0"]
impl crate::ResetValue for super::SYSCLKCR {
type Type = u32;
#[inline(always)]
fn reset_value() -> Self::Type {
0
}
}
#[doc = "Reader of field `SYSDIV`"]
pub type SYSDIV_R = crate::R<u8, u8>;
#[doc = "Write proxy for field `SYSDIV`"]
pub struct SYSDIV_W<'a> {
w: &'a mut W,
}
impl<'a> SYSDIV_W<'a> {
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub unsafe fn bits(self, value: u8) -> &'a mut W {
self.w.bits = (self.w.bits & !0xff) | ((value as u32) & 0xff);
self.w
}
}
#[doc = "System Clock Selection Value\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum SYSSEL_A {
#[doc = "0: fOFI clock"]
VALUE1 = 0,
#[doc = "1: fPLL clock"]
VALUE2 = 1,
}
impl From<SYSSEL_A> for bool {
#[inline(always)]
fn from(variant: SYSSEL_A) -> Self {
variant as u8 != 0
}
}
#[doc = "Reader of field `SYSSEL`"]
pub type SYSSEL_R = crate::R<bool, SYSSEL_A>;
impl SYSSEL_R {
#[doc = r"Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> SYSSEL_A {
match self.bits {
false => SYSSEL_A::VALUE1,
true => SYSSEL_A::VALUE2,
}
}
#[doc = "Checks if the value of the field is `VALUE1`"]
#[inline(always)]
pub fn is_value1(&self) -> bool {
*self == SYSSEL_A::VALUE1
}
#[doc = "Checks if the value of the field is `VALUE2`"]
#[inline(always)]
pub fn is_value2(&self) -> bool {
*self == SYSSEL_A::VALUE2
}
}
#[doc = "Write proxy for field `SYSSEL`"]
pub struct SYSSEL_W<'a> {
w: &'a mut W,
}
impl<'a> SYSSEL_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: SYSSEL_A) -> &'a mut W {
{
self.bit(variant.into())
}
}
#[doc = "fOFI clock"]
#[inline(always)]
pub fn value1(self) -> &'a mut W {
self.variant(SYSSEL_A::VALUE1)
}
#[doc = "fPLL clock"]
#[inline(always)]
pub fn value2(self) -> &'a mut W {
self.variant(SYSSEL_A::VALUE2)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 16)) | (((value as u32) & 0x01) << 16);
self.w
}
}
impl R {
#[doc = "Bits 0:7 - System Clock Division Value"]
#[inline(always)]
pub fn sysdiv(&self) -> SYSDIV_R {
SYSDIV_R::new((self.bits & 0xff) as u8)
}
#[doc = "Bit 16 - System Clock Selection Value"]
#[inline(always)]
pub fn syssel(&self) -> SYSSEL_R {
SYSSEL_R::new(((self.bits >> 16) & 0x01) != 0)
}
}
impl W {
#[doc = "Bits 0:7 - System Clock Division Value"]
#[inline(always)]
pub fn sysdiv(&mut self) -> SYSDIV_W {
SYSDIV_W { w: self }
}
#[doc = "Bit 16 - System Clock Selection Value"]
#[inline(always)]
pub fn syssel(&mut self) -> SYSSEL_W {
SYSSEL_W { w: self }
}
}