#[doc = "Writer for register CLKCLR"]
pub type W = crate::W<u32, super::CLKCLR>;
#[doc = "Register CLKCLR `reset()`'s with value 0"]
impl crate::ResetValue for super::CLKCLR {
type Type = u32;
#[inline(always)]
fn reset_value() -> Self::Type {
0
}
}
#[doc = "USB Clock Disable\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum USBCDI_AW {
#[doc = "0: No effect"]
VALUE1 = 0,
#[doc = "1: Disable clock"]
VALUE2 = 1,
}
impl From<USBCDI_AW> for bool {
#[inline(always)]
fn from(variant: USBCDI_AW) -> Self {
variant as u8 != 0
}
}
#[doc = "Write proxy for field `USBCDI`"]
pub struct USBCDI_W<'a> {
w: &'a mut W,
}
impl<'a> USBCDI_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: USBCDI_AW) -> &'a mut W {
{
self.bit(variant.into())
}
}
#[doc = "No effect"]
#[inline(always)]
pub fn value1(self) -> &'a mut W {
self.variant(USBCDI_AW::VALUE1)
}
#[doc = "Disable clock"]
#[inline(always)]
pub fn value2(self) -> &'a mut W {
self.variant(USBCDI_AW::VALUE2)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !0x01) | ((value as u32) & 0x01);
self.w
}
}
#[doc = "MMC Clock Disable\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum MMCCDI_AW {
#[doc = "0: No effect"]
VALUE1 = 0,
#[doc = "1: Disable clock"]
VALUE2 = 1,
}
impl From<MMCCDI_AW> for bool {
#[inline(always)]
fn from(variant: MMCCDI_AW) -> Self {
variant as u8 != 0
}
}
#[doc = "Write proxy for field `MMCCDI`"]
pub struct MMCCDI_W<'a> {
w: &'a mut W,
}
impl<'a> MMCCDI_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: MMCCDI_AW) -> &'a mut W {
{
self.bit(variant.into())
}
}
#[doc = "No effect"]
#[inline(always)]
pub fn value1(self) -> &'a mut W {
self.variant(MMCCDI_AW::VALUE1)
}
#[doc = "Disable clock"]
#[inline(always)]
pub fn value2(self) -> &'a mut W {
self.variant(MMCCDI_AW::VALUE2)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 1)) | (((value as u32) & 0x01) << 1);
self.w
}
}
#[doc = "Ethernet Clock Disable\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum ETH0CDI_AW {
#[doc = "0: No effect"]
VALUE1 = 0,
#[doc = "1: Disable clock"]
VALUE2 = 1,
}
impl From<ETH0CDI_AW> for bool {
#[inline(always)]
fn from(variant: ETH0CDI_AW) -> Self {
variant as u8 != 0
}
}
#[doc = "Write proxy for field `ETH0CDI`"]
pub struct ETH0CDI_W<'a> {
w: &'a mut W,
}
impl<'a> ETH0CDI_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: ETH0CDI_AW) -> &'a mut W {
{
self.bit(variant.into())
}
}
#[doc = "No effect"]
#[inline(always)]
pub fn value1(self) -> &'a mut W {
self.variant(ETH0CDI_AW::VALUE1)
}
#[doc = "Disable clock"]
#[inline(always)]
pub fn value2(self) -> &'a mut W {
self.variant(ETH0CDI_AW::VALUE2)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 2)) | (((value as u32) & 0x01) << 2);
self.w
}
}
#[doc = "EBU Clock Disable\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum EBUCDI_AW {
#[doc = "0: No effect"]
VALUE1 = 0,
#[doc = "1: Disable clock"]
VALUE2 = 1,
}
impl From<EBUCDI_AW> for bool {
#[inline(always)]
fn from(variant: EBUCDI_AW) -> Self {
variant as u8 != 0
}
}
#[doc = "Write proxy for field `EBUCDI`"]
pub struct EBUCDI_W<'a> {
w: &'a mut W,
}
impl<'a> EBUCDI_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: EBUCDI_AW) -> &'a mut W {
{
self.bit(variant.into())
}
}
#[doc = "No effect"]
#[inline(always)]
pub fn value1(self) -> &'a mut W {
self.variant(EBUCDI_AW::VALUE1)
}
#[doc = "Disable clock"]
#[inline(always)]
pub fn value2(self) -> &'a mut W {
self.variant(EBUCDI_AW::VALUE2)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 3)) | (((value as u32) & 0x01) << 3);
self.w
}
}
#[doc = "CCU Clock Disable\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum CCUCDI_AW {
#[doc = "0: No effect"]
VALUE1 = 0,
#[doc = "1: Disable clock"]
VALUE2 = 1,
}
impl From<CCUCDI_AW> for bool {
#[inline(always)]
fn from(variant: CCUCDI_AW) -> Self {
variant as u8 != 0
}
}
#[doc = "Write proxy for field `CCUCDI`"]
pub struct CCUCDI_W<'a> {
w: &'a mut W,
}
impl<'a> CCUCDI_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: CCUCDI_AW) -> &'a mut W {
{
self.bit(variant.into())
}
}
#[doc = "No effect"]
#[inline(always)]
pub fn value1(self) -> &'a mut W {
self.variant(CCUCDI_AW::VALUE1)
}
#[doc = "Disable clock"]
#[inline(always)]
pub fn value2(self) -> &'a mut W {
self.variant(CCUCDI_AW::VALUE2)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 4)) | (((value as u32) & 0x01) << 4);
self.w
}
}
#[doc = "WDT Clock Disable\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum WDTCDI_AW {
#[doc = "0: No effect"]
VALUE1 = 0,
#[doc = "1: Disable clock"]
VALUE2 = 1,
}
impl From<WDTCDI_AW> for bool {
#[inline(always)]
fn from(variant: WDTCDI_AW) -> Self {
variant as u8 != 0
}
}
#[doc = "Write proxy for field `WDTCDI`"]
pub struct WDTCDI_W<'a> {
w: &'a mut W,
}
impl<'a> WDTCDI_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: WDTCDI_AW) -> &'a mut W {
{
self.bit(variant.into())
}
}
#[doc = "No effect"]
#[inline(always)]
pub fn value1(self) -> &'a mut W {
self.variant(WDTCDI_AW::VALUE1)
}
#[doc = "Disable clock"]
#[inline(always)]
pub fn value2(self) -> &'a mut W {
self.variant(WDTCDI_AW::VALUE2)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 5)) | (((value as u32) & 0x01) << 5);
self.w
}
}
impl W {
#[doc = "Bit 0 - USB Clock Disable"]
#[inline(always)]
pub fn usbcdi(&mut self) -> USBCDI_W {
USBCDI_W { w: self }
}
#[doc = "Bit 1 - MMC Clock Disable"]
#[inline(always)]
pub fn mmccdi(&mut self) -> MMCCDI_W {
MMCCDI_W { w: self }
}
#[doc = "Bit 2 - Ethernet Clock Disable"]
#[inline(always)]
pub fn eth0cdi(&mut self) -> ETH0CDI_W {
ETH0CDI_W { w: self }
}
#[doc = "Bit 3 - EBU Clock Disable"]
#[inline(always)]
pub fn ebucdi(&mut self) -> EBUCDI_W {
EBUCDI_W { w: self }
}
#[doc = "Bit 4 - CCU Clock Disable"]
#[inline(always)]
pub fn ccucdi(&mut self) -> CCUCDI_W {
CCUCDI_W { w: self }
}
#[doc = "Bit 5 - WDT Clock Disable"]
#[inline(always)]
pub fn wdtcdi(&mut self) -> WDTCDI_W {
WDTCDI_W { w: self }
}
}