vyre 0.4.0

GPU compute intermediate representation with a standard operation library
Documentation 
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use crate::ir::{Expr, Program};
use crate::ops::primitive;
use crate::ops::{AlgebraicLaw, OpSpec, F32_F32_INPUTS, F32_OUTPUTS};

// Element-wise addition of two f32 buffers.

// IEEE-754 f32 addition is NOT bitwise-associative under rounding
// (e.g. `(16_777_216 + 1) + 1 = 16_777_216`, `16_777_216 + (1 + 1) =
// 16_777_218`). The `Identity { element: 0 }` claim also fails
// bit-exactly on signed zero (`-0.0 + 0.0 = 0.0` does not preserve the
// `-0.0` bit pattern). Per audit `primitive-laws-kimi-AUDIT`, F32Add
// only satisfies commutativity at the IEEE-754 bit level.
pub const LAWS: &[AlgebraicLaw] = &[AlgebraicLaw::Commutative];

/// f32 element-wise addition operation.
#[derive(Debug, Clone, Copy, Default)]
pub struct F32Add;

impl F32Add {
    /// Declarative operation specification.
    pub const SPEC: OpSpec = OpSpec::composition_inlinable(
        "primitive.float.f32_add",
        F32_F32_INPUTS,
        F32_OUTPUTS,
        LAWS,
        Self::program,
    );

    /// Build the canonical IR program.
    ///
    /// # Examples
    ///
    /// ```
    /// use vyre::ir::Expr;
    /// use vyre::ops::primitive::float::f32_add::F32Add;
    ///
    /// let program = F32Add::program();
    /// assert!(!program.entry().is_empty());
    /// ```
    #[must_use]
    pub fn program() -> Program {
        primitive::binary_f32_program(Expr::add)
    }
}

#[cfg(test)]
mod tests {
    use super::*;
    use crate::ir::{self, DataType};

    #[test]
    pub(crate) fn program_is_non_empty() {
        let program = F32Add::program();
        assert!(!program.entry().is_empty());
    }

    #[test]
    pub(crate) fn program_validates() {
        let program = F32Add::program();
        let errors = ir::validate(&program);
        assert!(errors.is_empty(), "validation failed: {errors:?}");
    }

    #[test]
    pub(crate) fn program_lowers_to_wgsl_with_add() {
        let program = F32Add::program();
        let wgsl =
            crate::lower::wgsl::lower_anonymous(&program).expect("F32Add must lower to WGSL");
        assert!(wgsl.contains(" + "), "F32Add WGSL must contain '+'");
    }

    #[test]
    pub(crate) fn spec_id_is_correct() {
        assert_eq!(F32Add::SPEC.id(), "primitive.float.f32_add");
    }

    #[test]
    pub(crate) fn spec_signature_is_f32_f32_to_f32() {
        assert_eq!(F32Add::SPEC.inputs(), &[DataType::F32, DataType::F32]);
        assert_eq!(F32Add::SPEC.outputs(), &[DataType::F32]);
    }
}

// WGSL lowering marker for `primitive.float.f32_add`.
//
// Not a stub: this is a zero-overhead Category A marker. `F32Add::program`
// builds concrete IR through `core/src/ops/primitive/binary_f32_program.rs`;
// `core/src/lower/wgsl/expr.rs::emit_binop` emits WGSL.
// `core/tests/conformance.rs::conformance_all_primitives` verifies
// lowered GPU bytes are bit-exact against the conform CPU reference.
//
// ```wgsl
// _vyre_store_out(idx, (_vyre_load_a(idx) + _vyre_load_b(idx)));
// ```