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#![allow(non_snake_case, non_upper_case_globals)]
#![allow(non_camel_case_types)]
//! Independent watchdog
use crate::{RORegister, RWRegister, WORegister};
#[cfg(not(feature = "nosync"))]
use core::marker::PhantomData;
/// Key register
pub mod KR {
/// Key value
pub mod KEY {
/// Offset (0 bits)
pub const offset: u32 = 0;
/// Mask (16 bits: 0xffff << 0)
pub const mask: u32 = 0xffff << offset;
/// Read-only values (empty)
pub mod R {}
/// Write-only values (empty)
pub mod W {}
/// Read-write values
pub mod RW {
/// 0b0101010101010101: Enable access to PR, RLR and WINR registers (0x5555)
pub const Enable: u32 = 0b0101010101010101;
/// 0b1010101010101010: Reset the watchdog value (0xAAAA)
pub const Reset: u32 = 0b1010101010101010;
/// 0b1100110011001100: Start the watchdog (0xCCCC)
pub const Start: u32 = 0b1100110011001100;
}
}
}
/// Prescaler register
pub mod PR {
/// Prescaler divider
pub mod PR {
/// Offset (0 bits)
pub const offset: u32 = 0;
/// Mask (3 bits: 0b111 << 0)
pub const mask: u32 = 0b111 << offset;
/// Read-only values (empty)
pub mod R {}
/// Write-only values (empty)
pub mod W {}
/// Read-write values
pub mod RW {
/// 0b000: Divider /4
pub const DivideBy4: u32 = 0b000;
/// 0b001: Divider /8
pub const DivideBy8: u32 = 0b001;
/// 0b010: Divider /16
pub const DivideBy16: u32 = 0b010;
/// 0b011: Divider /32
pub const DivideBy32: u32 = 0b011;
/// 0b100: Divider /64
pub const DivideBy64: u32 = 0b100;
/// 0b101: Divider /128
pub const DivideBy128: u32 = 0b101;
/// 0b110: Divider /256
pub const DivideBy256: u32 = 0b110;
/// 0b111: Divider /256
pub const DivideBy256bis: u32 = 0b111;
}
}
}
/// Reload register
pub mod RLR {
/// Watchdog counter reload value
pub mod RL {
/// Offset (0 bits)
pub const offset: u32 = 0;
/// Mask (12 bits: 0xfff << 0)
pub const mask: u32 = 0xfff << offset;
/// Read-only values (empty)
pub mod R {}
/// Write-only values (empty)
pub mod W {}
/// Read-write values (empty)
pub mod RW {}
}
}
/// Status register
pub mod SR {
/// Watchdog prescaler value update
pub mod PVU {
/// Offset (0 bits)
pub const offset: u32 = 0;
/// Mask (1 bit: 1 << 0)
pub const mask: u32 = 1 << offset;
/// Read-only values (empty)
pub mod R {}
/// Write-only values (empty)
pub mod W {}
/// Read-write values (empty)
pub mod RW {}
}
/// Watchdog counter reload value update
pub mod RVU {
/// Offset (1 bits)
pub const offset: u32 = 1;
/// Mask (1 bit: 1 << 1)
pub const mask: u32 = 1 << offset;
/// Read-only values (empty)
pub mod R {}
/// Write-only values (empty)
pub mod W {}
/// Read-write values (empty)
pub mod RW {}
}
/// Watchdog counter window value update
pub mod WVU {
/// Offset (2 bits)
pub const offset: u32 = 2;
/// Mask (1 bit: 1 << 2)
pub const mask: u32 = 1 << offset;
/// Read-only values (empty)
pub mod R {}
/// Write-only values (empty)
pub mod W {}
/// Read-write values (empty)
pub mod RW {}
}
}
/// Window register
pub mod WINR {
/// Watchdog counter window value
pub mod WIN {
/// Offset (0 bits)
pub const offset: u32 = 0;
/// Mask (12 bits: 0xfff << 0)
pub const mask: u32 = 0xfff << offset;
/// Read-only values (empty)
pub mod R {}
/// Write-only values (empty)
pub mod W {}
/// Read-write values (empty)
pub mod RW {}
}
}
#[repr(C)]
pub struct RegisterBlock {
/// Key register
pub KR: WORegister<u32>,
/// Prescaler register
pub PR: RWRegister<u32>,
/// Reload register
pub RLR: RWRegister<u32>,
/// Status register
pub SR: RORegister<u32>,
/// Window register
pub WINR: RWRegister<u32>,
}
pub struct ResetValues {
pub KR: u32,
pub PR: u32,
pub RLR: u32,
pub SR: u32,
pub WINR: u32,
}
#[cfg(not(feature = "nosync"))]
pub struct Instance {
pub(crate) addr: u32,
pub(crate) _marker: PhantomData<*const RegisterBlock>,
}
#[cfg(not(feature = "nosync"))]
impl ::core::ops::Deref for Instance {
type Target = RegisterBlock;
#[inline(always)]
fn deref(&self) -> &RegisterBlock {
unsafe { &*(self.addr as *const _) }
}
}
#[cfg(feature = "rtic")]
unsafe impl Send for Instance {}
/// Access functions for the IWDG peripheral instance
pub mod IWDG {
use super::ResetValues;
#[cfg(not(feature = "nosync"))]
use super::Instance;
#[cfg(not(feature = "nosync"))]
const INSTANCE: Instance = Instance {
addr: 0x40003000,
_marker: ::core::marker::PhantomData,
};
/// Reset values for each field in IWDG
pub const reset: ResetValues = ResetValues {
KR: 0x00000000,
PR: 0x00000000,
RLR: 0x00000FFF,
SR: 0x00000000,
WINR: 0x00000FFF,
};
#[cfg(not(feature = "nosync"))]
#[allow(renamed_and_removed_lints)]
#[allow(private_no_mangle_statics)]
#[no_mangle]
static mut IWDG_TAKEN: bool = false;
/// Safe access to IWDG
///
/// This function returns `Some(Instance)` if this instance is not
/// currently taken, and `None` if it is. This ensures that if you
/// do get `Some(Instance)`, you are ensured unique access to
/// the peripheral and there cannot be data races (unless other
/// code uses `unsafe`, of course). You can then pass the
/// `Instance` around to other functions as required. When you're
/// done with it, you can call `release(instance)` to return it.
///
/// `Instance` itself dereferences to a `RegisterBlock`, which
/// provides access to the peripheral's registers.
#[cfg(not(feature = "nosync"))]
#[inline]
pub fn take() -> Option<Instance> {
external_cortex_m::interrupt::free(|_| unsafe {
if IWDG_TAKEN {
None
} else {
IWDG_TAKEN = true;
Some(INSTANCE)
}
})
}
/// Release exclusive access to IWDG
///
/// This function allows you to return an `Instance` so that it
/// is available to `take()` again. This function will panic if
/// you return a different `Instance` or if this instance is not
/// already taken.
#[cfg(not(feature = "nosync"))]
#[inline]
pub fn release(inst: Instance) {
external_cortex_m::interrupt::free(|_| unsafe {
if IWDG_TAKEN && inst.addr == INSTANCE.addr {
IWDG_TAKEN = false;
} else {
panic!("Released a peripheral which was not taken");
}
});
}
/// Unsafely steal IWDG
///
/// This function is similar to take() but forcibly takes the
/// Instance, marking it as taken irregardless of its previous
/// state.
#[cfg(not(feature = "nosync"))]
#[inline]
pub unsafe fn steal() -> Instance {
IWDG_TAKEN = true;
INSTANCE
}
}
/// Raw pointer to IWDG
///
/// Dereferencing this is unsafe because you are not ensured unique
/// access to the peripheral, so you may encounter data races with
/// other users of this peripheral. It is up to you to ensure you
/// will not cause data races.
///
/// This constant is provided for ease of use in unsafe code: you can
/// simply call for example `write_reg!(gpio, GPIOA, ODR, 1);`.
pub const IWDG: *const RegisterBlock = 0x40003000 as *const _;