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///Register block
/**CR1 (rw) register accessor: SPI/I2S control register 1
You can [`read`](crate::Reg::read) this register and get [`cr1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cr1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
See register [structure](https://stm32-rs.github.io/stm32-rs/STM32H563.html#SPI1:CR1)
For information about available fields see [`mod@cr1`] module*/
pub type CR1 = crate Reg;
///SPI/I2S control register 1
/**CR2 (rw) register accessor: SPI/I2S control register 2
You can [`read`](crate::Reg::read) this register and get [`cr2::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cr2::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
See register [structure](https://stm32-rs.github.io/stm32-rs/STM32H563.html#SPI1:CR2)
For information about available fields see [`mod@cr2`] module*/
pub type CR2 = crate Reg;
///SPI/I2S control register 2
/**CFG1 (rw) register accessor: SPI/I2S configuration register 1
You can [`read`](crate::Reg::read) this register and get [`cfg1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cfg1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
See register [structure](https://stm32-rs.github.io/stm32-rs/STM32H563.html#SPI1:CFG1)
For information about available fields see [`mod@cfg1`] module*/
pub type CFG1 = crate Reg;
///SPI/I2S configuration register 1
/**CFG2 (rw) register accessor: SPI/I2S configuration register 2
You can [`read`](crate::Reg::read) this register and get [`cfg2::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cfg2::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
See register [structure](https://stm32-rs.github.io/stm32-rs/STM32H563.html#SPI1:CFG2)
For information about available fields see [`mod@cfg2`] module*/
pub type CFG2 = crate Reg;
///SPI/I2S configuration register 2
/**IER (rw) register accessor: SPI/I2S interrupt enable register
You can [`read`](crate::Reg::read) this register and get [`ier::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ier::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
See register [structure](https://stm32-rs.github.io/stm32-rs/STM32H563.html#SPI1:IER)
For information about available fields see [`mod@ier`] module*/
pub type IER = crate Reg;
///SPI/I2S interrupt enable register
/**SR (r) register accessor: SPI/I2S status register
You can [`read`](crate::Reg::read) this register and get [`sr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
See register [structure](https://stm32-rs.github.io/stm32-rs/STM32H563.html#SPI1:SR)
For information about available fields see [`mod@sr`] module*/
pub type SR = crate Reg;
///SPI/I2S status register
/**IFCR (w) register accessor: SPI/I2S interrupt/status flags clear register
You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ifcr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
See register [structure](https://stm32-rs.github.io/stm32-rs/STM32H563.html#SPI1:IFCR)
For information about available fields see [`mod@ifcr`] module*/
pub type IFCR = crate Reg;
///SPI/I2S interrupt/status flags clear register
/**TXDR (w) register accessor: SPI/I2S transmit data register
You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`txdr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
See register [structure](https://stm32-rs.github.io/stm32-rs/STM32H563.html#SPI1:TXDR)
For information about available fields see [`mod@txdr`] module*/
pub type TXDR = crate Reg;
///SPI/I2S transmit data register
/**TXDR16 (w) register accessor: Direct 16-bit access to transmit data register
You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`txdr16::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
See register [structure](https://stm32-rs.github.io/stm32-rs/STM32H563.html#SPI1:TXDR16)
For information about available fields see [`mod@txdr16`] module*/
pub type TXDR16 = crate Reg;
///Direct 16-bit access to transmit data register
/**TXDR8 (w) register accessor: Direct 8-bit access to transmit data register
You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`txdr8::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
See register [structure](https://stm32-rs.github.io/stm32-rs/STM32H563.html#SPI1:TXDR8)
For information about available fields see [`mod@txdr8`] module*/
pub type TXDR8 = crate Reg;
///Direct 8-bit access to transmit data register
/**RXDR (r) register accessor: SPI/I2S receive data register
You can [`read`](crate::Reg::read) this register and get [`rxdr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
See register [structure](https://stm32-rs.github.io/stm32-rs/STM32H563.html#SPI1:RXDR)
For information about available fields see [`mod@rxdr`] module*/
pub type RXDR = crate Reg;
///SPI/I2S receive data register
/**RXDR16 (r) register accessor: Direct 16-bit access to receive data register
You can [`read`](crate::Reg::read) this register and get [`rxdr16::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
See register [structure](https://stm32-rs.github.io/stm32-rs/STM32H563.html#SPI1:RXDR16)
For information about available fields see [`mod@rxdr16`] module*/
pub type RXDR16 = crate Reg;
///Direct 16-bit access to receive data register
/**RXDR8 (r) register accessor: Direct 8-bit access to receive data register
You can [`read`](crate::Reg::read) this register and get [`rxdr8::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
See register [structure](https://stm32-rs.github.io/stm32-rs/STM32H563.html#SPI1:RXDR8)
For information about available fields see [`mod@rxdr8`] module*/
pub type RXDR8 = crate Reg;
///Direct 8-bit access to receive data register
/**CRCPOLY (rw) register accessor: SPI/I2S polynomial register
You can [`read`](crate::Reg::read) this register and get [`crcpoly::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`crcpoly::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
See register [structure](https://stm32-rs.github.io/stm32-rs/STM32H563.html#SPI1:CRCPOLY)
For information about available fields see [`mod@crcpoly`] module*/
pub type CRCPOLY = crate Reg;
///SPI/I2S polynomial register
/**TXCRC (r) register accessor: SPI/I2S transmitter CRC register
You can [`read`](crate::Reg::read) this register and get [`txcrc::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
See register [structure](https://stm32-rs.github.io/stm32-rs/STM32H563.html#SPI1:TXCRC)
For information about available fields see [`mod@txcrc`] module*/
pub type TXCRC = crate Reg;
///SPI/I2S transmitter CRC register
/**RXCRC (r) register accessor: SPI/I2S receiver CRC register
You can [`read`](crate::Reg::read) this register and get [`rxcrc::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
See register [structure](https://stm32-rs.github.io/stm32-rs/STM32H563.html#SPI1:RXCRC)
For information about available fields see [`mod@rxcrc`] module*/
pub type RXCRC = crate Reg;
///SPI/I2S receiver CRC register
/**UDRDR (rw) register accessor: SPI/I2S underrun data register
You can [`read`](crate::Reg::read) this register and get [`udrdr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`udrdr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
See register [structure](https://stm32-rs.github.io/stm32-rs/STM32H563.html#SPI1:UDRDR)
For information about available fields see [`mod@udrdr`] module*/
pub type UDRDR = crate Reg;
///SPI/I2S underrun data register
/**I2SCFGR (rw) register accessor: SPI/I2S configuration register
You can [`read`](crate::Reg::read) this register and get [`i2scfgr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`i2scfgr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
See register [structure](https://stm32-rs.github.io/stm32-rs/STM32H563.html#SPI1:I2SCFGR)
For information about available fields see [`mod@i2scfgr`] module*/
pub type I2SCFGR = crate Reg;
///SPI/I2S configuration register