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#[repr(C)]
#[derive(Debug)]
///Register block
pub struct RegisterBlock {
cr: CR,
cfgr: CFGR,
isr: ISR,
icr: ICR,
}
impl RegisterBlock {
///0x00 - CRS control register
#[inline(always)]
pub const fn cr(&self) -> &CR {
&self.cr
}
///0x04 - CRS configuration register
#[inline(always)]
pub const fn cfgr(&self) -> &CFGR {
&self.cfgr
}
///0x08 - CRS interrupt and status register
#[inline(always)]
pub const fn isr(&self) -> &ISR {
&self.isr
}
///0x0c - CRS interrupt flag clear register
#[inline(always)]
pub const fn icr(&self) -> &ICR {
&self.icr
}
}
/**CR (rw) register accessor: CRS control register
You can [`read`](crate::Reg::read) this register and get [`cr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
See register [structure](https://stm32-rs.github.io/stm32-rs/STM32H563.html#CRS:CR)
For information about available fields see [`mod@cr`] module*/
pub type CR = crate::Reg<cr::CRrs>;
///CRS control register
pub mod cr;
/**CFGR (rw) register accessor: CRS configuration register
You can [`read`](crate::Reg::read) this register and get [`cfgr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cfgr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
See register [structure](https://stm32-rs.github.io/stm32-rs/STM32H563.html#CRS:CFGR)
For information about available fields see [`mod@cfgr`] module*/
pub type CFGR = crate::Reg<cfgr::CFGRrs>;
///CRS configuration register
pub mod cfgr;
/**ISR (r) register accessor: CRS interrupt and status register
You can [`read`](crate::Reg::read) this register and get [`isr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
See register [structure](https://stm32-rs.github.io/stm32-rs/STM32H563.html#CRS:ISR)
For information about available fields see [`mod@isr`] module*/
pub type ISR = crate::Reg<isr::ISRrs>;
///CRS interrupt and status register
pub mod isr;
/**ICR (rw) register accessor: CRS interrupt flag clear register
You can [`read`](crate::Reg::read) this register and get [`icr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`icr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
See register [structure](https://stm32-rs.github.io/stm32-rs/STM32H563.html#CRS:ICR)
For information about available fields see [`mod@icr`] module*/
pub type ICR = crate::Reg<icr::ICRrs>;
///CRS interrupt flag clear register
pub mod icr;