#![allow(clippy::identity_op)]
#![allow(clippy::module_inception)]
#![allow(clippy::derivable_impls)]
#[allow(unused_imports)]
use crate::common::sealed;
#[allow(unused_imports)]
use crate::common::*;
#[doc = r"Renesas Memory Protection Unit"]
unsafe impl ::core::marker::Send for super::Rmpu {}
unsafe impl ::core::marker::Sync for super::Rmpu {}
impl super::Rmpu {
#[allow(unused)]
#[inline(always)]
pub(crate) const fn _svd2pac_as_ptr(&self) -> *mut u8 {
self.ptr
}
#[doc = "MMPU Operation After Detection Register"]
#[inline(always)]
pub const fn mmpuoad(
&self,
) -> &'static crate::common::Reg<self::Mmpuoad_SPEC, crate::common::RW> {
unsafe {
crate::common::Reg::<self::Mmpuoad_SPEC, crate::common::RW>::from_ptr(
self._svd2pac_as_ptr().add(0usize),
)
}
}
#[doc = "MMPU Operation After Detection Protect Register"]
#[inline(always)]
pub const fn mmpuoadpt(
&self,
) -> &'static crate::common::Reg<self::Mmpuoadpt_SPEC, crate::common::RW> {
unsafe {
crate::common::Reg::<self::Mmpuoadpt_SPEC, crate::common::RW>::from_ptr(
self._svd2pac_as_ptr().add(4usize),
)
}
}
#[doc = "MMPU Enable Register for DMAC"]
#[inline(always)]
pub const fn mmpuendmac(
&self,
) -> &'static crate::common::Reg<self::Mmpuendmac_SPEC, crate::common::RW> {
unsafe {
crate::common::Reg::<self::Mmpuendmac_SPEC, crate::common::RW>::from_ptr(
self._svd2pac_as_ptr().add(256usize),
)
}
}
#[doc = "MMPU Enable Protect Register for DMAC"]
#[inline(always)]
pub const fn mmpuenptdmac(
&self,
) -> &'static crate::common::Reg<self::Mmpuenptdmac_SPEC, crate::common::RW> {
unsafe {
crate::common::Reg::<self::Mmpuenptdmac_SPEC, crate::common::RW>::from_ptr(
self._svd2pac_as_ptr().add(260usize),
)
}
}
#[doc = "MMPU Regions Protect Register for DMAC"]
#[inline(always)]
pub const fn mmpurptdmac(
&self,
) -> &'static crate::common::Reg<self::Mmpurptdmac_SPEC, crate::common::RW> {
unsafe {
crate::common::Reg::<self::Mmpurptdmac_SPEC, crate::common::RW>::from_ptr(
self._svd2pac_as_ptr().add(264usize),
)
}
}
#[doc = "MMPU Regions Protect register for DMAC Secure"]
#[inline(always)]
pub const fn mmpurptdmac_sec(
&self,
) -> &'static crate::common::Reg<self::MmpurptdmacSec_SPEC, crate::common::RW> {
unsafe {
crate::common::Reg::<self::MmpurptdmacSec_SPEC, crate::common::RW>::from_ptr(
self._svd2pac_as_ptr().add(268usize),
)
}
}
#[doc = "MMPU Access Control Register for DMAC"]
#[inline(always)]
pub const fn mmpuacdmac(
&self,
) -> &'static crate::common::ClusterRegisterArray<
crate::common::Reg<self::Mmpuacdmac_SPEC, crate::common::RW>,
8,
0x10,
> {
unsafe {
crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0x200usize))
}
}
#[inline(always)]
pub const fn mmpuacdmac0(
&self,
) -> &'static crate::common::Reg<self::Mmpuacdmac_SPEC, crate::common::RW> {
unsafe {
crate::common::Reg::<self::Mmpuacdmac_SPEC, crate::common::RW>::from_ptr(
self._svd2pac_as_ptr().add(0x200usize),
)
}
}
#[inline(always)]
pub const fn mmpuacdmac1(
&self,
) -> &'static crate::common::Reg<self::Mmpuacdmac_SPEC, crate::common::RW> {
unsafe {
crate::common::Reg::<self::Mmpuacdmac_SPEC, crate::common::RW>::from_ptr(
self._svd2pac_as_ptr().add(0x210usize),
)
}
}
#[inline(always)]
pub const fn mmpuacdmac2(
&self,
) -> &'static crate::common::Reg<self::Mmpuacdmac_SPEC, crate::common::RW> {
unsafe {
crate::common::Reg::<self::Mmpuacdmac_SPEC, crate::common::RW>::from_ptr(
self._svd2pac_as_ptr().add(0x220usize),
)
}
}
#[inline(always)]
pub const fn mmpuacdmac3(
&self,
) -> &'static crate::common::Reg<self::Mmpuacdmac_SPEC, crate::common::RW> {
unsafe {
crate::common::Reg::<self::Mmpuacdmac_SPEC, crate::common::RW>::from_ptr(
self._svd2pac_as_ptr().add(0x230usize),
)
}
}
#[inline(always)]
pub const fn mmpuacdmac4(
&self,
) -> &'static crate::common::Reg<self::Mmpuacdmac_SPEC, crate::common::RW> {
unsafe {
crate::common::Reg::<self::Mmpuacdmac_SPEC, crate::common::RW>::from_ptr(
self._svd2pac_as_ptr().add(0x240usize),
)
}
}
#[inline(always)]
pub const fn mmpuacdmac5(
&self,
) -> &'static crate::common::Reg<self::Mmpuacdmac_SPEC, crate::common::RW> {
unsafe {
crate::common::Reg::<self::Mmpuacdmac_SPEC, crate::common::RW>::from_ptr(
self._svd2pac_as_ptr().add(0x250usize),
)
}
}
#[inline(always)]
pub const fn mmpuacdmac6(
&self,
) -> &'static crate::common::Reg<self::Mmpuacdmac_SPEC, crate::common::RW> {
unsafe {
crate::common::Reg::<self::Mmpuacdmac_SPEC, crate::common::RW>::from_ptr(
self._svd2pac_as_ptr().add(0x260usize),
)
}
}
#[inline(always)]
pub const fn mmpuacdmac7(
&self,
) -> &'static crate::common::Reg<self::Mmpuacdmac_SPEC, crate::common::RW> {
unsafe {
crate::common::Reg::<self::Mmpuacdmac_SPEC, crate::common::RW>::from_ptr(
self._svd2pac_as_ptr().add(0x270usize),
)
}
}
#[doc = "MMPU Start Address Register for DMAC"]
#[inline(always)]
pub const fn mmpusdmac(
&self,
) -> &'static crate::common::ClusterRegisterArray<
crate::common::Reg<self::Mmpusdmac_SPEC, crate::common::RW>,
8,
0x10,
> {
unsafe {
crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0x204usize))
}
}
#[inline(always)]
pub const fn mmpusdmac0(
&self,
) -> &'static crate::common::Reg<self::Mmpusdmac_SPEC, crate::common::RW> {
unsafe {
crate::common::Reg::<self::Mmpusdmac_SPEC, crate::common::RW>::from_ptr(
self._svd2pac_as_ptr().add(0x204usize),
)
}
}
#[inline(always)]
pub const fn mmpusdmac1(
&self,
) -> &'static crate::common::Reg<self::Mmpusdmac_SPEC, crate::common::RW> {
unsafe {
crate::common::Reg::<self::Mmpusdmac_SPEC, crate::common::RW>::from_ptr(
self._svd2pac_as_ptr().add(0x214usize),
)
}
}
#[inline(always)]
pub const fn mmpusdmac2(
&self,
) -> &'static crate::common::Reg<self::Mmpusdmac_SPEC, crate::common::RW> {
unsafe {
crate::common::Reg::<self::Mmpusdmac_SPEC, crate::common::RW>::from_ptr(
self._svd2pac_as_ptr().add(0x224usize),
)
}
}
#[inline(always)]
pub const fn mmpusdmac3(
&self,
) -> &'static crate::common::Reg<self::Mmpusdmac_SPEC, crate::common::RW> {
unsafe {
crate::common::Reg::<self::Mmpusdmac_SPEC, crate::common::RW>::from_ptr(
self._svd2pac_as_ptr().add(0x234usize),
)
}
}
#[inline(always)]
pub const fn mmpusdmac4(
&self,
) -> &'static crate::common::Reg<self::Mmpusdmac_SPEC, crate::common::RW> {
unsafe {
crate::common::Reg::<self::Mmpusdmac_SPEC, crate::common::RW>::from_ptr(
self._svd2pac_as_ptr().add(0x244usize),
)
}
}
#[inline(always)]
pub const fn mmpusdmac5(
&self,
) -> &'static crate::common::Reg<self::Mmpusdmac_SPEC, crate::common::RW> {
unsafe {
crate::common::Reg::<self::Mmpusdmac_SPEC, crate::common::RW>::from_ptr(
self._svd2pac_as_ptr().add(0x254usize),
)
}
}
#[inline(always)]
pub const fn mmpusdmac6(
&self,
) -> &'static crate::common::Reg<self::Mmpusdmac_SPEC, crate::common::RW> {
unsafe {
crate::common::Reg::<self::Mmpusdmac_SPEC, crate::common::RW>::from_ptr(
self._svd2pac_as_ptr().add(0x264usize),
)
}
}
#[inline(always)]
pub const fn mmpusdmac7(
&self,
) -> &'static crate::common::Reg<self::Mmpusdmac_SPEC, crate::common::RW> {
unsafe {
crate::common::Reg::<self::Mmpusdmac_SPEC, crate::common::RW>::from_ptr(
self._svd2pac_as_ptr().add(0x274usize),
)
}
}
#[doc = "MMPU End Address Register for DMAC"]
#[inline(always)]
pub const fn mmpuedmac(
&self,
) -> &'static crate::common::ClusterRegisterArray<
crate::common::Reg<self::Mmpuedmac_SPEC, crate::common::RW>,
8,
0x10,
> {
unsafe {
crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0x208usize))
}
}
#[inline(always)]
pub const fn mmpuedmac0(
&self,
) -> &'static crate::common::Reg<self::Mmpuedmac_SPEC, crate::common::RW> {
unsafe {
crate::common::Reg::<self::Mmpuedmac_SPEC, crate::common::RW>::from_ptr(
self._svd2pac_as_ptr().add(0x208usize),
)
}
}
#[inline(always)]
pub const fn mmpuedmac1(
&self,
) -> &'static crate::common::Reg<self::Mmpuedmac_SPEC, crate::common::RW> {
unsafe {
crate::common::Reg::<self::Mmpuedmac_SPEC, crate::common::RW>::from_ptr(
self._svd2pac_as_ptr().add(0x218usize),
)
}
}
#[inline(always)]
pub const fn mmpuedmac2(
&self,
) -> &'static crate::common::Reg<self::Mmpuedmac_SPEC, crate::common::RW> {
unsafe {
crate::common::Reg::<self::Mmpuedmac_SPEC, crate::common::RW>::from_ptr(
self._svd2pac_as_ptr().add(0x228usize),
)
}
}
#[inline(always)]
pub const fn mmpuedmac3(
&self,
) -> &'static crate::common::Reg<self::Mmpuedmac_SPEC, crate::common::RW> {
unsafe {
crate::common::Reg::<self::Mmpuedmac_SPEC, crate::common::RW>::from_ptr(
self._svd2pac_as_ptr().add(0x238usize),
)
}
}
#[inline(always)]
pub const fn mmpuedmac4(
&self,
) -> &'static crate::common::Reg<self::Mmpuedmac_SPEC, crate::common::RW> {
unsafe {
crate::common::Reg::<self::Mmpuedmac_SPEC, crate::common::RW>::from_ptr(
self._svd2pac_as_ptr().add(0x248usize),
)
}
}
#[inline(always)]
pub const fn mmpuedmac5(
&self,
) -> &'static crate::common::Reg<self::Mmpuedmac_SPEC, crate::common::RW> {
unsafe {
crate::common::Reg::<self::Mmpuedmac_SPEC, crate::common::RW>::from_ptr(
self._svd2pac_as_ptr().add(0x258usize),
)
}
}
#[inline(always)]
pub const fn mmpuedmac6(
&self,
) -> &'static crate::common::Reg<self::Mmpuedmac_SPEC, crate::common::RW> {
unsafe {
crate::common::Reg::<self::Mmpuedmac_SPEC, crate::common::RW>::from_ptr(
self._svd2pac_as_ptr().add(0x268usize),
)
}
}
#[inline(always)]
pub const fn mmpuedmac7(
&self,
) -> &'static crate::common::Reg<self::Mmpuedmac_SPEC, crate::common::RW> {
unsafe {
crate::common::Reg::<self::Mmpuedmac_SPEC, crate::common::RW>::from_ptr(
self._svd2pac_as_ptr().add(0x278usize),
)
}
}
}
#[doc(hidden)]
#[derive(Copy, Clone, Eq, PartialEq)]
pub struct Mmpuoad_SPEC;
impl crate::sealed::RegSpec for Mmpuoad_SPEC {
type DataType = u16;
}
#[doc = "MMPU Operation After Detection Register"]
pub type Mmpuoad = crate::RegValueT<Mmpuoad_SPEC>;
impl Mmpuoad {
#[doc = "Operation after detection"]
#[inline(always)]
pub fn oad(
self,
) -> crate::common::RegisterField<
0,
0x1,
1,
0,
mmpuoad::Oad,
mmpuoad::Oad,
Mmpuoad_SPEC,
crate::common::RW,
> {
crate::common::RegisterField::<
0,
0x1,
1,
0,
mmpuoad::Oad,
mmpuoad::Oad,
Mmpuoad_SPEC,
crate::common::RW,
>::from_register(self, 0)
}
#[doc = "This bit enables or disables writes to the OAD bit."]
#[inline(always)]
pub fn key(
self,
) -> crate::common::RegisterField<8, 0xff, 1, 0, u8, u8, Mmpuoad_SPEC, crate::common::W> {
crate::common::RegisterField::<8,0xff,1,0,u8,u8,Mmpuoad_SPEC,crate::common::W>::from_register(self,0)
}
}
impl ::core::default::Default for Mmpuoad {
#[inline(always)]
fn default() -> Mmpuoad {
<crate::RegValueT<Mmpuoad_SPEC> as RegisterValue<_>>::new(0)
}
}
pub mod mmpuoad {
#[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
pub struct Oad_SPEC;
pub type Oad = crate::EnumBitfieldStruct<u8, Oad_SPEC>;
impl Oad {
#[doc = "Non-maskable interrupt"]
pub const _0: Self = Self::new(0);
#[doc = "Reset"]
pub const _1: Self = Self::new(1);
}
}
#[doc(hidden)]
#[derive(Copy, Clone, Eq, PartialEq)]
pub struct Mmpuoadpt_SPEC;
impl crate::sealed::RegSpec for Mmpuoadpt_SPEC {
type DataType = u16;
}
#[doc = "MMPU Operation After Detection Protect Register"]
pub type Mmpuoadpt = crate::RegValueT<Mmpuoadpt_SPEC>;
impl Mmpuoadpt {
#[doc = "Protection of register"]
#[inline(always)]
pub fn protect(
self,
) -> crate::common::RegisterField<
0,
0x1,
1,
0,
mmpuoadpt::Protect,
mmpuoadpt::Protect,
Mmpuoadpt_SPEC,
crate::common::RW,
> {
crate::common::RegisterField::<
0,
0x1,
1,
0,
mmpuoadpt::Protect,
mmpuoadpt::Protect,
Mmpuoadpt_SPEC,
crate::common::RW,
>::from_register(self, 0)
}
#[doc = "Key code"]
#[inline(always)]
pub fn key(
self,
) -> crate::common::RegisterField<8, 0xff, 1, 0, u8, u8, Mmpuoadpt_SPEC, crate::common::W> {
crate::common::RegisterField::<8,0xff,1,0,u8,u8,Mmpuoadpt_SPEC,crate::common::W>::from_register(self,0)
}
}
impl ::core::default::Default for Mmpuoadpt {
#[inline(always)]
fn default() -> Mmpuoadpt {
<crate::RegValueT<Mmpuoadpt_SPEC> as RegisterValue<_>>::new(0)
}
}
pub mod mmpuoadpt {
#[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
pub struct Protect_SPEC;
pub type Protect = crate::EnumBitfieldStruct<u8, Protect_SPEC>;
impl Protect {
#[doc = "MMPUOAD register writes are possible."]
pub const _0: Self = Self::new(0);
#[doc = "MMPUOAD register writes are protected. Read is possible."]
pub const _1: Self = Self::new(1);
}
}
#[doc(hidden)]
#[derive(Copy, Clone, Eq, PartialEq)]
pub struct Mmpuendmac_SPEC;
impl crate::sealed::RegSpec for Mmpuendmac_SPEC {
type DataType = u16;
}
#[doc = "MMPU Enable Register for DMAC"]
pub type Mmpuendmac = crate::RegValueT<Mmpuendmac_SPEC>;
impl Mmpuendmac {
#[doc = "Bus Master MPU of DMAC enable"]
#[inline(always)]
pub fn enable(
self,
) -> crate::common::RegisterField<
0,
0x1,
1,
0,
mmpuendmac::Enable,
mmpuendmac::Enable,
Mmpuendmac_SPEC,
crate::common::RW,
> {
crate::common::RegisterField::<
0,
0x1,
1,
0,
mmpuendmac::Enable,
mmpuendmac::Enable,
Mmpuendmac_SPEC,
crate::common::RW,
>::from_register(self, 0)
}
#[doc = "These bits enable or disable writes to the ENABLE bit."]
#[inline(always)]
pub fn key(
self,
) -> crate::common::RegisterField<8, 0xff, 1, 0, u8, u8, Mmpuendmac_SPEC, crate::common::W>
{
crate::common::RegisterField::<8,0xff,1,0,u8,u8,Mmpuendmac_SPEC,crate::common::W>::from_register(self,0)
}
}
impl ::core::default::Default for Mmpuendmac {
#[inline(always)]
fn default() -> Mmpuendmac {
<crate::RegValueT<Mmpuendmac_SPEC> as RegisterValue<_>>::new(0)
}
}
pub mod mmpuendmac {
#[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
pub struct Enable_SPEC;
pub type Enable = crate::EnumBitfieldStruct<u8, Enable_SPEC>;
impl Enable {
#[doc = "Bus Master MPU of DMAC is disabled."]
pub const _0: Self = Self::new(0);
#[doc = "Bus Master MPU of DMAC is enabled."]
pub const _1: Self = Self::new(1);
}
}
#[doc(hidden)]
#[derive(Copy, Clone, Eq, PartialEq)]
pub struct Mmpuenptdmac_SPEC;
impl crate::sealed::RegSpec for Mmpuenptdmac_SPEC {
type DataType = u16;
}
#[doc = "MMPU Enable Protect Register for DMAC"]
pub type Mmpuenptdmac = crate::RegValueT<Mmpuenptdmac_SPEC>;
impl Mmpuenptdmac {
#[doc = "Protection of register"]
#[inline(always)]
pub fn protect(
self,
) -> crate::common::RegisterField<
0,
0x1,
1,
0,
mmpuenptdmac::Protect,
mmpuenptdmac::Protect,
Mmpuenptdmac_SPEC,
crate::common::RW,
> {
crate::common::RegisterField::<
0,
0x1,
1,
0,
mmpuenptdmac::Protect,
mmpuenptdmac::Protect,
Mmpuenptdmac_SPEC,
crate::common::RW,
>::from_register(self, 0)
}
#[doc = "These bits enable or disable writes to the PROTECT bit."]
#[inline(always)]
pub fn key(
self,
) -> crate::common::RegisterField<8, 0xff, 1, 0, u8, u8, Mmpuenptdmac_SPEC, crate::common::W>
{
crate::common::RegisterField::<8,0xff,1,0,u8,u8,Mmpuenptdmac_SPEC,crate::common::W>::from_register(self,0)
}
}
impl ::core::default::Default for Mmpuenptdmac {
#[inline(always)]
fn default() -> Mmpuenptdmac {
<crate::RegValueT<Mmpuenptdmac_SPEC> as RegisterValue<_>>::new(0)
}
}
pub mod mmpuenptdmac {
#[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
pub struct Protect_SPEC;
pub type Protect = crate::EnumBitfieldStruct<u8, Protect_SPEC>;
impl Protect {
#[doc = "MMPUENDMAC register writes are possible."]
pub const _0: Self = Self::new(0);
#[doc = "MMPUENDMAC register writes are protected. Read is possible."]
pub const _1: Self = Self::new(1);
}
}
#[doc(hidden)]
#[derive(Copy, Clone, Eq, PartialEq)]
pub struct Mmpurptdmac_SPEC;
impl crate::sealed::RegSpec for Mmpurptdmac_SPEC {
type DataType = u16;
}
#[doc = "MMPU Regions Protect Register for DMAC"]
pub type Mmpurptdmac = crate::RegValueT<Mmpurptdmac_SPEC>;
impl Mmpurptdmac {
#[doc = "Protection of register"]
#[inline(always)]
pub fn protect(
self,
) -> crate::common::RegisterField<
0,
0x1,
1,
0,
mmpurptdmac::Protect,
mmpurptdmac::Protect,
Mmpurptdmac_SPEC,
crate::common::RW,
> {
crate::common::RegisterField::<
0,
0x1,
1,
0,
mmpurptdmac::Protect,
mmpurptdmac::Protect,
Mmpurptdmac_SPEC,
crate::common::RW,
>::from_register(self, 0)
}
#[doc = "These bits enable or disable writes to the PROTECT bit."]
#[inline(always)]
pub fn key(
self,
) -> crate::common::RegisterField<8, 0xff, 1, 0, u8, u8, Mmpurptdmac_SPEC, crate::common::W>
{
crate::common::RegisterField::<8,0xff,1,0,u8,u8,Mmpurptdmac_SPEC,crate::common::W>::from_register(self,0)
}
}
impl ::core::default::Default for Mmpurptdmac {
#[inline(always)]
fn default() -> Mmpurptdmac {
<crate::RegValueT<Mmpurptdmac_SPEC> as RegisterValue<_>>::new(0)
}
}
pub mod mmpurptdmac {
#[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
pub struct Protect_SPEC;
pub type Protect = crate::EnumBitfieldStruct<u8, Protect_SPEC>;
impl Protect {
#[doc = "Bus Master MPU register for DMAC writing is possible."]
pub const _0: Self = Self::new(0);
#[doc = "Bus Master MPU register for DMAC writing is protected. Read is possible."]
pub const _1: Self = Self::new(1);
}
}
#[doc(hidden)]
#[derive(Copy, Clone, Eq, PartialEq)]
pub struct MmpurptdmacSec_SPEC;
impl crate::sealed::RegSpec for MmpurptdmacSec_SPEC {
type DataType = u16;
}
#[doc = "MMPU Regions Protect register for DMAC Secure"]
pub type MmpurptdmacSec = crate::RegValueT<MmpurptdmacSec_SPEC>;
impl MmpurptdmacSec {
#[doc = "Protection of register"]
#[inline(always)]
pub fn protect(
self,
) -> crate::common::RegisterField<
0,
0x1,
1,
0,
mmpurptdmac_sec::Protect,
mmpurptdmac_sec::Protect,
MmpurptdmacSec_SPEC,
crate::common::RW,
> {
crate::common::RegisterField::<
0,
0x1,
1,
0,
mmpurptdmac_sec::Protect,
mmpurptdmac_sec::Protect,
MmpurptdmacSec_SPEC,
crate::common::RW,
>::from_register(self, 0)
}
#[doc = "These bits enable or disable writes to the PROTECT bit."]
#[inline(always)]
pub fn key(
self,
) -> crate::common::RegisterField<8, 0xff, 1, 0, u8, u8, MmpurptdmacSec_SPEC, crate::common::W>
{
crate::common::RegisterField::<8,0xff,1,0,u8,u8,MmpurptdmacSec_SPEC,crate::common::W>::from_register(self,0)
}
}
impl ::core::default::Default for MmpurptdmacSec {
#[inline(always)]
fn default() -> MmpurptdmacSec {
<crate::RegValueT<MmpurptdmacSec_SPEC> as RegisterValue<_>>::new(0)
}
}
pub mod mmpurptdmac_sec {
#[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
pub struct Protect_SPEC;
pub type Protect = crate::EnumBitfieldStruct<u8, Protect_SPEC>;
impl Protect {
#[doc = "Bus master MPU register for DMAC secure writes are possible."]
pub const _0: Self = Self::new(0);
#[doc = "Bus master MPU register for DMAC secure writes are protected. Read is possible."]
pub const _1: Self = Self::new(1);
}
}
#[doc(hidden)]
#[derive(Copy, Clone, Eq, PartialEq)]
pub struct Mmpuacdmac_SPEC;
impl crate::sealed::RegSpec for Mmpuacdmac_SPEC {
type DataType = u16;
}
#[doc = "MMPU Access Control Register for DMAC"]
pub type Mmpuacdmac = crate::RegValueT<Mmpuacdmac_SPEC>;
impl Mmpuacdmac {
#[doc = "Region enable"]
#[inline(always)]
pub fn enable(
self,
) -> crate::common::RegisterField<
0,
0x1,
1,
0,
mmpuacdmac::Enable,
mmpuacdmac::Enable,
Mmpuacdmac_SPEC,
crate::common::RW,
> {
crate::common::RegisterField::<
0,
0x1,
1,
0,
mmpuacdmac::Enable,
mmpuacdmac::Enable,
Mmpuacdmac_SPEC,
crate::common::RW,
>::from_register(self, 0)
}
#[doc = "Read protection"]
#[inline(always)]
pub fn rp(
self,
) -> crate::common::RegisterField<
1,
0x1,
1,
0,
mmpuacdmac::Rp,
mmpuacdmac::Rp,
Mmpuacdmac_SPEC,
crate::common::RW,
> {
crate::common::RegisterField::<
1,
0x1,
1,
0,
mmpuacdmac::Rp,
mmpuacdmac::Rp,
Mmpuacdmac_SPEC,
crate::common::RW,
>::from_register(self, 0)
}
#[doc = "Write protection"]
#[inline(always)]
pub fn wp(
self,
) -> crate::common::RegisterField<
2,
0x1,
1,
0,
mmpuacdmac::Wp,
mmpuacdmac::Wp,
Mmpuacdmac_SPEC,
crate::common::RW,
> {
crate::common::RegisterField::<
2,
0x1,
1,
0,
mmpuacdmac::Wp,
mmpuacdmac::Wp,
Mmpuacdmac_SPEC,
crate::common::RW,
>::from_register(self, 0)
}
}
impl ::core::default::Default for Mmpuacdmac {
#[inline(always)]
fn default() -> Mmpuacdmac {
<crate::RegValueT<Mmpuacdmac_SPEC> as RegisterValue<_>>::new(0)
}
}
pub mod mmpuacdmac {
#[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
pub struct Enable_SPEC;
pub type Enable = crate::EnumBitfieldStruct<u8, Enable_SPEC>;
impl Enable {
#[doc = "DMAC Region n unit is disabled"]
pub const _0: Self = Self::new(0);
#[doc = "DMAC Region n unit is enabled"]
pub const _1: Self = Self::new(1);
}
#[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
pub struct Rp_SPEC;
pub type Rp = crate::EnumBitfieldStruct<u8, Rp_SPEC>;
impl Rp {
#[doc = "Read permission"]
pub const _0: Self = Self::new(0);
#[doc = "Read protection"]
pub const _1: Self = Self::new(1);
}
#[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
pub struct Wp_SPEC;
pub type Wp = crate::EnumBitfieldStruct<u8, Wp_SPEC>;
impl Wp {
#[doc = "Write permission"]
pub const _0: Self = Self::new(0);
#[doc = "Write protection"]
pub const _1: Self = Self::new(1);
}
}
#[doc(hidden)]
#[derive(Copy, Clone, Eq, PartialEq)]
pub struct Mmpusdmac_SPEC;
impl crate::sealed::RegSpec for Mmpusdmac_SPEC {
type DataType = u32;
}
#[doc = "MMPU Start Address Register for DMAC"]
pub type Mmpusdmac = crate::RegValueT<Mmpusdmac_SPEC>;
impl Mmpusdmac {
#[doc = "Region start address register"]
#[inline(always)]
pub fn mmpus(
self,
) -> crate::common::RegisterField<5, 0x7ffffff, 1, 0, u32, u32, Mmpusdmac_SPEC, crate::common::RW>
{
crate::common::RegisterField::<
5,
0x7ffffff,
1,
0,
u32,
u32,
Mmpusdmac_SPEC,
crate::common::RW,
>::from_register(self, 0)
}
}
impl ::core::default::Default for Mmpusdmac {
#[inline(always)]
fn default() -> Mmpusdmac {
<crate::RegValueT<Mmpusdmac_SPEC> as RegisterValue<_>>::new(0)
}
}
#[doc(hidden)]
#[derive(Copy, Clone, Eq, PartialEq)]
pub struct Mmpuedmac_SPEC;
impl crate::sealed::RegSpec for Mmpuedmac_SPEC {
type DataType = u32;
}
#[doc = "MMPU End Address Register for DMAC"]
pub type Mmpuedmac = crate::RegValueT<Mmpuedmac_SPEC>;
impl Mmpuedmac {
#[doc = "Region end address register"]
#[inline(always)]
pub fn mmpue(
self,
) -> crate::common::RegisterField<5, 0x7ffffff, 1, 0, u32, u32, Mmpuedmac_SPEC, crate::common::RW>
{
crate::common::RegisterField::<
5,
0x7ffffff,
1,
0,
u32,
u32,
Mmpuedmac_SPEC,
crate::common::RW,
>::from_register(self, 0)
}
}
impl ::core::default::Default for Mmpuedmac {
#[inline(always)]
fn default() -> Mmpuedmac {
<crate::RegValueT<Mmpuedmac_SPEC> as RegisterValue<_>>::new(31)
}
}