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/*
DISCLAIMER
This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products.
No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all
applicable laws, including copyright laws.
THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED
OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY
LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT,
INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR
ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability
of this software. By using this software, you agree to the additional terms and conditions found by accessing the
following link:
http://www.renesas.com/disclaimer
*/
// Generated from SVD 1.40.00, with svd2pac 0.6.0 on Thu, 24 Jul 2025 04:52:39 +0000
#![allow(clippy::identity_op)]
#![allow(clippy::module_inception)]
#![allow(clippy::derivable_impls)]
#[allow(unused_imports)]
use crate::common::sealed;
#[allow(unused_imports)]
use crate::common::*;
#[doc = r"GTCLK"]
unsafe impl ::core::marker::Send for super::GptGtclk {}
unsafe impl ::core::marker::Sync for super::GptGtclk {}
impl super::GptGtclk {
#[allow(unused)]
#[inline(always)]
pub(crate) const fn _svd2pac_as_ptr(&self) -> *mut u8 {
self.ptr
}
#[doc = "General PWM Timer Clock Control Register"]
#[inline(always)]
pub const fn gtclkcr(
&self,
) -> &'static crate::common::Reg<self::Gtclkcr_SPEC, crate::common::RW> {
unsafe {
crate::common::Reg::<self::Gtclkcr_SPEC, crate::common::RW>::from_ptr(
self._svd2pac_as_ptr().add(0usize),
)
}
}
}
#[doc(hidden)]
#[derive(Copy, Clone, Eq, PartialEq)]
pub struct Gtclkcr_SPEC;
impl crate::sealed::RegSpec for Gtclkcr_SPEC {
type DataType = u32;
}
#[doc = "General PWM Timer Clock Control Register"]
pub type Gtclkcr = crate::RegValueT<Gtclkcr_SPEC>;
impl Gtclkcr {
#[doc = "Synchronization Circuit Bypass Enable"]
#[inline(always)]
pub fn bpen(
self,
) -> crate::common::RegisterField<
0,
0x1,
1,
0,
gtclkcr::Bpen,
gtclkcr::Bpen,
Gtclkcr_SPEC,
crate::common::RW,
> {
crate::common::RegisterField::<
0,
0x1,
1,
0,
gtclkcr::Bpen,
gtclkcr::Bpen,
Gtclkcr_SPEC,
crate::common::RW,
>::from_register(self, 0)
}
}
impl ::core::default::Default for Gtclkcr {
#[inline(always)]
fn default() -> Gtclkcr {
<crate::RegValueT<Gtclkcr_SPEC> as RegisterValue<_>>::new(0)
}
}
pub mod gtclkcr {
#[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
pub struct Bpen_SPEC;
pub type Bpen = crate::EnumBitfieldStruct<u8, Bpen_SPEC>;
impl Bpen {
#[doc = "In case of using Bus Clock and GPT Core Clock asynchronously"]
pub const _0: Self = Self::new(0);
#[doc = "In case of using Bus Clock and GPT Core Clock synchronously"]
pub const _1: Self = Self::new(1);
}
}