#[doc = "Reader of register AHBCLKDIV"]
pub type R = crate::R<u32, super::AHBCLKDIV>;
#[doc = "Writer for register AHBCLKDIV"]
pub type W = crate::W<u32, super::AHBCLKDIV>;
#[doc = "Register AHBCLKDIV `reset()`'s with value 0"]
impl crate::ResetValue for super::AHBCLKDIV {
type Type = u32;
#[inline(always)]
fn reset_value() -> Self::Type {
0
}
}
#[doc = "Reader of field `DIV`"]
pub type DIV_R = crate::R<u8, u8>;
#[doc = "Write proxy for field `DIV`"]
pub struct DIV_W<'a> {
w: &'a mut W,
}
impl<'a> DIV_W<'a> {
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub unsafe fn bits(self, value: u8) -> &'a mut W {
self.w.bits = (self.w.bits & !0xff) | ((value as u32) & 0xff);
self.w
}
}
#[doc = "Reader of field `REQFLAG`"]
pub type REQFLAG_R = crate::R<bool, bool>;
#[doc = "Write proxy for field `REQFLAG`"]
pub struct REQFLAG_W<'a> {
w: &'a mut W,
}
impl<'a> REQFLAG_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 31)) | (((value as u32) & 0x01) << 31);
self.w
}
}
impl R {
#[doc = "Bits 0:7 - Clock divider value. 0: Divide by 1 up to 255: Divide by 256."]
#[inline(always)]
pub fn div(&self) -> DIV_R {
DIV_R::new((self.bits & 0xff) as u8)
}
#[doc = "Bit 31 - Divider status flag."]
#[inline(always)]
pub fn reqflag(&self) -> REQFLAG_R {
REQFLAG_R::new(((self.bits >> 31) & 0x01) != 0)
}
}
impl W {
#[doc = "Bits 0:7 - Clock divider value. 0: Divide by 1 up to 255: Divide by 256."]
#[inline(always)]
pub fn div(&mut self) -> DIV_W {
DIV_W { w: self }
}
#[doc = "Bit 31 - Divider status flag."]
#[inline(always)]
pub fn reqflag(&mut self) -> REQFLAG_W {
REQFLAG_W { w: self }
}
}