llvm-native-core 0.1.4

//! X86 EVEX Prefix Encoding — complete EVEX prefix generation, field
//! encoding/decoding, tuple type selection, broadcast, rounding mode,
//! zero-masking vs merging-masking, compressed displacement (disp8*N),
//! EVEX→VEX compression, and instruction length computation for AVX-512
//! instructions.
//!
//! ## EVEX Encoding Overview
//!
//! The EVEX (Enhanced Vector Extension) prefix is a 4-byte prefix used by
//! Intel AVX-512 instructions. It extends the VEX prefix with support for:
//!
//! * 512-bit vector operations (ZMM registers)
//! * Opmask (k0-k7) register masking with zero-masking or merging-masking
//! * Embedded broadcast (load + broadcast in a single instruction)
//! * Embedded rounding control (SAE — Suppress All Exceptions)
//! * Compressed displacement (disp8 * N based on tuple type)
//! * Extended register encoding (XMM16-XMM31, YMM16-YMM31, ZMM16-ZMM31)
//!
//! ## EVEX Byte Layout
//! ```
//! Byte 0: [1 1 0 0 0 1 0 0] — not used; EVEX always 0x62
//! Wait — EVEX is 0x62!
//!
//! Byte 0: [0 1 1 0 0 0 1 0] = 0x62
//! Byte 1: [R' X' B' R' 0 0 m m]  (P0)
//! Byte 2: [W  v  v  v  v  1 p p]  (P1)
//! Byte 3: [z  L' L  b  V' a a a]  (P2)
//! ```
//!
//! ## EVEX Field Reference
//!
//! | Field | Bits  | Description                                        |
//! |-------|-------|----------------------------------------------------|
//! | R'    | P0[7] | 1's complement of REX.R' (high reg bit for XMM16+) |
//! | X'    | P0[6] | 1's complement of REX.X' (high SIB index bit)       |
//! | B'    | P0[5] | 1's complement of REX.B' (high r/m bit)             |
//! | R     | P0[4] | 1's complement of REX.R (low reg bit, like VEX)     |
//! | mm    | P0[1:0] | Opcode map (00=reserved, 01=0F, 10=0F38, 11=0F3A)  |
//! | W     | P1[7] | 64-bit operand size                                |
//! | vvvv  | P1[6:3] | 1's complement of non-destructive source reg      |
//! | pp    | P1[1:0] | Implied mandatory prefix                          |
//! | z     | P2[7] | Zeroing mask (1=zero, 0=merge)                     |
//! | L'    | P2[6] | Vector length MSB                                  |
//! | L     | P2[5] | Vector length LSB                                  |
//! | b     | P2[4] | Broadcast / rounding control                       |
//! | V'    | P2[3] | 1's complement of high vvvv bit (for XMM16+)       |
//! | aaa   | P2[2:0] | Opmask register k0-k7                             |
//!
//! Clean-room behavioral reconstruction from:
//! - Intel® 64 and IA-32 Architectures Software Developer's Manual, Vol 2A
//! - Intel® AVX-512 Architecture Specification
//! - Zero LLVM source code consultation
//! - Black-box oracle interrogation

use std::fmt;

use super::x86_vex_encoding::{
    vex_invert_reg, vex_recover_reg, vex_reg_needs_b, vex_reg_needs_r, vex_reg_needs_x,
    VexMandatoryPrefix, VexOpcodeMap, VexVectorLength,
};

// ╔══════════════════════════════════════════════════════════════════════════════╗
// ║                    EVEX Prefix Constants                                   ║
// ╚══════════════════════════════════════════════════════════════════════════════╝

/// EVEX prefix identifier byte (always 0x62).
pub const EVEX_PREFIX: u8 = 0x62;

/// EVEX opcode map values (mm field).
pub const EVEX_MM_0F: u8 = 0x01;
pub const EVEX_MM_0F38: u8 = 0x02;
pub const EVEX_MM_0F3A: u8 = 0x03;
pub const EVEX_MM_5: u8 = 0x05;
pub const EVEX_MM_6: u8 = 0x06;
pub const EVEX_MM_7: u8 = 0x07;

/// EVEX vector length L'L encoding.
pub const EVEX_LL_128: u8 = 0x00; // L'=0, L=0
pub const EVEX_LL_256: u8 = 0x01; // L'=0, L=1
pub const EVEX_LL_512: u8 = 0x02; // L'=1, L=0
                                  // EVEX_LL_RESERVED = 0x03 // L'=1, L=1 (reserved)

/// EVEX pp field values (same as VEX).
pub const EVEX_PP_NONE: u8 = 0x00;
pub const EVEX_PP_66: u8 = 0x01;
pub const EVEX_PP_F3: u8 = 0x02;
pub const EVEX_PP_F2: u8 = 0x03;

/// EVEX P1 byte must have bit 2 set (fixed 1).
const EVEX_P1_FIXED_BIT: u8 = 0x04;

/// EVEX P0 masks.
const EVEX_P0_R_PRIME_MASK: u8 = 0x80;
const EVEX_P0_X_PRIME_MASK: u8 = 0x40;
const EVEX_P0_B_PRIME_MASK: u8 = 0x20;
const EVEX_P0_R_MASK: u8 = 0x10;
const EVEX_P0_MM_MASK: u8 = 0x03;

/// EVEX P1 masks.
const EVEX_P1_W_MASK: u8 = 0x80;
const EVEX_P1_VVVV_MASK: u8 = 0x78;
const EVEX_P1_PP_MASK: u8 = 0x03;

/// EVEX P2 masks.
const EVEX_P2_Z_MASK: u8 = 0x80;
const EVEX_P2_L_PRIME_MASK: u8 = 0x40;
const EVEX_P2_L_MASK: u8 = 0x20;
const EVEX_P2_B_MASK: u8 = 0x10;
const EVEX_P2_V_PRIME_MASK: u8 = 0x08;
const EVEX_P2_AAA_MASK: u8 = 0x07;

/// Opmask register constants.
pub const OPMASK_K0: u8 = 0;
pub const OPMASK_K1: u8 = 1;
pub const OPMASK_K2: u8 = 2;
pub const OPMASK_K3: u8 = 3;
pub const OPMASK_K4: u8 = 4;
pub const OPMASK_K5: u8 = 5;
pub const OPMASK_K6: u8 = 6;
pub const OPMASK_K7: u8 = 7;

/// K0 is special: when aaa=0, masking is disabled (no mask).
pub const OPMASK_NONE: u8 = OPMASK_K0;

// ╔══════════════════════════════════════════════════════════════════════════════╗
// ║                    EVEX Opcode Map Enumeration                             ║
// ╚══════════════════════════════════════════════════════════════════════════════╝

/// EVEX opcode map selector (mm field).
#[derive(Debug, Clone, Copy, PartialEq, Eq, Hash)]
pub enum EvexOpcodeMap {
    /// Map 1: 0F escape (same as VEX Map0F).
    Map0F = 0x01,
    /// Map 2: 0F38 escape.
    Map0F38 = 0x02,
    /// Map 3: 0F3A escape.
    Map0F3A = 0x03,
    /// Map 5: AVX-512 specific map 5.
    Map5 = 0x05,
    /// Map 6: AVX-512 specific map 6.
    Map6 = 0x06,
    /// Map 7: AVX-512 specific map 7.
    Map7 = 0x07,
}

impl EvexOpcodeMap {
    /// Return the mm field value.
    pub const fn mm(&self) -> u8 {
        *self as u8
    }

    /// Create from an mm field value.
    pub const fn from_mm(mm: u8) -> Option<Self> {
        match mm {
            0x01 => Some(Self::Map0F),
            0x02 => Some(Self::Map0F38),
            0x03 => Some(Self::Map0F3A),
            0x05 => Some(Self::Map5),
            0x06 => Some(Self::Map6),
            0x07 => Some(Self::Map7),
            _ => None,
        }
    }

    /// Human-readable name.
    pub const fn name(&self) -> &'static str {
        match self {
            Self::Map0F => "0F",
            Self::Map0F38 => "0F38",
            Self::Map0F3A => "0F3A",
            Self::Map5 => "MAP5",
            Self::Map6 => "MAP6",
            Self::Map7 => "MAP7",
        }
    }

    /// Whether this map is also a valid VEX map (0F, 0F38, 0F3A).
    pub const fn is_vex_equivalent(&self) -> bool {
        matches!(self, Self::Map0F | Self::Map0F38 | Self::Map0F3A)
    }

    /// Convert to VexOpcodeMap if possible.
    pub const fn to_vex_map(&self) -> Option<VexOpcodeMap> {
        match self {
            Self::Map0F => Some(VexOpcodeMap::Map0F),
            Self::Map0F38 => Some(VexOpcodeMap::Map0F38),
            Self::Map0F3A => Some(VexOpcodeMap::Map0F3A),
            _ => None,
        }
    }
}

impl fmt::Display for EvexOpcodeMap {
    fn fmt(&self, f: &mut fmt::Formatter<'_>) -> fmt::Result {
        write!(f, "{}", self.name())
    }
}

// ╔══════════════════════════════════════════════════════════════════════════════╗
// ║                    EVEX Vector Length                                      ║
// ╚══════════════════════════════════════════════════════════════════════════════╝

/// EVEX vector length encoding (L'L bits).
#[derive(Debug, Clone, Copy, PartialEq, Eq, Hash)]
pub enum EvexVectorLength {
    /// 128-bit vectors (XMM), L'=0, L=0.
    VL128,
    /// 256-bit vectors (YMM), L'=0, L=1.
    VL256,
    /// 512-bit vectors (ZMM), L'=1, L=0.
    VL512,
}

impl EvexVectorLength {
    /// Return the L' and L bit values as (l_prime, l).
    pub const fn ll_bits(&self) -> (bool, bool) {
        match self {
            Self::VL128 => (false, false),
            Self::VL256 => (false, true),
            Self::VL512 => (true, false),
        }
    }

    /// Return the packed LL field (0, 1, or 2).
    pub const fn ll_value(&self) -> u8 {
        match self {
            Self::VL128 => 0,
            Self::VL256 => 1,
            Self::VL512 => 2,
        }
    }

    /// Total vector width in bytes.
    pub const fn width_bytes(&self) -> u16 {
        match self {
            Self::VL128 => 16,
            Self::VL256 => 32,
            Self::VL512 => 64,
        }
    }

    /// Total vector width in bits.
    pub const fn width_bits(&self) -> u16 {
        match self {
            Self::VL128 => 128,
            Self::VL256 => 256,
            Self::VL512 => 512,
        }
    }

    /// Register prefix character.
    pub const fn reg_prefix(&self) -> &'static str {
        match self {
            Self::VL128 => "xmm",
            Self::VL256 => "ymm",
            Self::VL512 => "zmm",
        }
    }

    /// Create from L'L bits.
    pub const fn from_ll_bits(l_prime: bool, l: bool) -> Option<Self> {
        match (l_prime, l) {
            (false, false) => Some(Self::VL128),
            (false, true) => Some(Self::VL256),
            (true, false) => Some(Self::VL512),
            (true, true) => None, // reserved
        }
    }

    /// Convert to VexVectorLength (loses 512-bit distinction).
    pub const fn to_vex_vl(&self) -> VexVectorLength {
        match self {
            Self::VL128 => VexVectorLength::L128,
            Self::VL256 => VexVectorLength::L256,
            Self::VL512 => VexVectorLength::L256, // VEX can't express 512; map to 256
        }
    }
}

impl fmt::Display for EvexVectorLength {
    fn fmt(&self, f: &mut fmt::Formatter<'_>) -> fmt::Result {
        write!(f, "{}", self.width_bits())
    }
}

// ╔══════════════════════════════════════════════════════════════════════════════╗
// ║                    EVEX Tuple Type                                         ║
// ╚══════════════════════════════════════════════════════════════════════════════╝

/// EVEX tuple type — classifies memory operand size for compressed displacement.
///
/// The tuple type determines the multiplier N used for disp8*N compressed
/// displacement. For a given element size, the multiplier tells how many
/// bytes each disp8 unit represents.
#[derive(Debug, Clone, Copy, PartialEq, Eq, Hash)]
pub enum EvexTupleType {
    /// Full vector width (multiplier = VL/1 = full vector bytes).
    Full,
    /// Full vector, memory-only (same multiplier as Full).
    FullMem,
    /// Half vector width (multiplier = VL/2).
    Half,
    /// Half vector, memory-only.
    HalfMem,
    /// Quarter vector width (multiplier = VL/4).
    Quarter,
    /// Quarter vector, memory-only.
    QuarterMem,
    /// Eighth vector width (multiplier = VL/8).
    Eighth,
    /// Eighth vector, memory-only.
    EighthMem,
    /// Scalar element (multiplier = element size).
    Scalar,
    /// 128-bit memory block (multiplier = 16).
    Mem128,
    /// Tuple1 Scalar — one element (multiplier = element size).
    Tuple1Scalar,
    /// Tuple2 — two elements (multiplier = 2 * element size).
    Tuple2,
    /// Tuple4 — four elements (multiplier = 4 * element size).
    Tuple4,
    /// Tuple8 — eight elements (multiplier = 8 * element size).
    Tuple8,
}

impl EvexTupleType {
    /// Get the compressed displacement multiplier for a given vector length
    /// and element size.
    ///
    /// The formula is: N = (VL_bytes / tuple_count) where tuple_count depends
    /// on the tuple type.
    pub fn multiplier(&self, vl: EvexVectorLength, element_size: u8) -> u8 {
        let vl_bytes = vl.width_bytes();
        match self {
            Self::Full | Self::FullMem | Self::Tuple1Scalar => element_size,
            Self::Half | Self::HalfMem | Self::Tuple2 => (vl_bytes as u32 / 2).min(255) as u8,
            Self::Quarter | Self::QuarterMem | Self::Tuple4 => (vl_bytes as u32 / 4).min(255) as u8,
            Self::Eighth | Self::EighthMem | Self::Tuple8 => (vl_bytes as u32 / 8).min(255) as u8,
            Self::Scalar => element_size,
            Self::Mem128 => 16,
        }
    }

    /// Whether this tuple type implies a memory operand only.
    pub const fn is_memory(&self) -> bool {
        matches!(
            self,
            Self::FullMem | Self::HalfMem | Self::QuarterMem | Self::EighthMem
        )
    }

    /// Whether this is a memory-only tuple type.
    pub const fn is_memory_only(&self) -> bool {
        self.is_memory()
    }

    /// Human-readable name.
    pub const fn name(&self) -> &'static str {
        match self {
            Self::Full => "Full",
            Self::FullMem => "FullMem",
            Self::Half => "Half",
            Self::HalfMem => "HalfMem",
            Self::Quarter => "Quarter",
            Self::QuarterMem => "QuarterMem",
            Self::Eighth => "Eighth",
            Self::EighthMem => "EighthMem",
            Self::Scalar => "Scalar",
            Self::Mem128 => "Mem128",
            Self::Tuple1Scalar => "Tuple1Scalar",
            Self::Tuple2 => "Tuple2",
            Self::Tuple4 => "Tuple4",
            Self::Tuple8 => "Tuple8",
        }
    }
}

impl fmt::Display for EvexTupleType {
    fn fmt(&self, f: &mut fmt::Formatter<'_>) -> fmt::Result {
        write!(f, "{}", self.name())
    }
}

// ╔══════════════════════════════════════════════════════════════════════════════╗
// ║                    EVEX Rounding Mode                                      ║
// ╚══════════════════════════════════════════════════════════════════════════════╝

/// EVEX embedded rounding mode.
///
/// AVX-512 allows embedding rounding control in the EVEX prefix for
/// register-register instructions. The rounding mode replaces the
/// L'L field when b=1 and VL=128/256/512 for scalar/512-bit operations.
#[derive(Debug, Clone, Copy, PartialEq, Eq)]
pub enum EvexRoundingMode {
    /// No rounding override (default).
    None,
    /// Round to nearest even, suppress all exceptions.
    RnSae,
    /// Round toward -infinity, suppress all exceptions.
    RdSae,
    /// Round toward +infinity, suppress all exceptions.
    RuSae,
    /// Round toward zero, suppress all exceptions.
    RzSae,
    /// Suppress all exceptions only (no rounding override, SAE).
    Sae,
}

impl EvexRoundingMode {
    /// Return the RC (rounding control) bits (2 bits).
    pub const fn rc_bits(&self) -> u8 {
        match self {
            Self::RnSae => 0b00,
            Self::RdSae => 0b01,
            Self::RuSae => 0b10,
            Self::RzSae => 0b11,
            _ => 0,
        }
    }

    /// Whether this rounding mode is active.
    pub const fn is_active(&self) -> bool {
        !matches!(self, Self::None)
    }

    /// Whether this mode includes SAE (Suppress All Exceptions).
    pub const fn has_sae(&self) -> bool {
        matches!(
            self,
            Self::RnSae | Self::RdSae | Self::RuSae | Self::RzSae | Self::Sae
        )
    }

    /// Whether the RC bits encode an explicit rounding direction.
    pub const fn has_explicit_rc(&self) -> bool {
        matches!(self, Self::RnSae | Self::RdSae | Self::RuSae | Self::RzSae)
    }

    /// Human-readable suffix (e.g., "{rn-sae}").
    pub const fn suffix(&self) -> &'static str {
        match self {
            Self::None => "",
            Self::RnSae => "{rn-sae}",
            Self::RdSae => "{rd-sae}",
            Self::RuSae => "{ru-sae}",
            Self::RzSae => "{rz-sae}",
            Self::Sae => "{sae}",
        }
    }

    /// Encode the L'L field for rounding mode (replaces vector length bits).
    pub fn encode_ll_for_rounding(&self, vl: EvexVectorLength) -> (bool, bool) {
        if self.is_active() {
            match vl {
                EvexVectorLength::VL128 => (false, false), // L'L=00 b=1 means {er}
                EvexVectorLength::VL256 => (false, true),  // L'L=01 b=1 means {er}
                EvexVectorLength::VL512 => (true, false),  // L'L=10 b=1 means {er}
            }
        } else {
            vl.ll_bits()
        }
    }
}

impl fmt::Display for EvexRoundingMode {
    fn fmt(&self, f: &mut fmt::Formatter<'_>) -> fmt::Result {
        write!(f, "{}", self.suffix())
    }
}

// ╔══════════════════════════════════════════════════════════════════════════════╗
// ║                    EVEX Broadcast Mode                                     ║
// ╚══════════════════════════════════════════════════════════════════════════════╝

/// EVEX embedded broadcast mode.
///
/// AVX-512 can broadcast a single memory element to all elements of the
/// destination vector. The broadcast size is encoded in the EVEX.b bit
/// combined with the tuple type and element size.
#[derive(Debug, Clone, Copy, PartialEq, Eq)]
pub enum EvexBroadcastMode {
    /// No broadcast.
    None,
    /// Broadcast 1 element to 2 (32-bit float to 64-bit, etc.).
    Broadcast1To2,
    /// Broadcast 1 element to 4 (32-bit element to 128-bit, etc.).
    Broadcast1To4,
    /// Broadcast 1 element to 8 (32-bit element to 256-bit, etc.).
    Broadcast1To8,
    /// Broadcast 1 element to 16 (32-bit element to 512-bit).
    Broadcast1To16,
    /// Broadcast 1 element to 32 (16-bit element to 512-bit).
    Broadcast1To32,
}

impl EvexBroadcastMode {
    /// Whether broadcast is active.
    pub const fn is_broadcast(&self) -> bool {
        !matches!(self, Self::None)
    }

    /// Number of elements to broadcast to.
    pub const fn element_count(&self) -> u8 {
        match self {
            Self::None => 1,
            Self::Broadcast1To2 => 2,
            Self::Broadcast1To4 => 4,
            Self::Broadcast1To8 => 8,
            Self::Broadcast1To16 => 16,
            Self::Broadcast1To32 => 32,
        }
    }

    /// EVEX.b bit value.
    pub const fn to_b_bit(&self) -> bool {
        self.is_broadcast()
    }

    /// Disp8 multiplier for broadcast (always element size, since one element is loaded).
    pub fn broadcast_disp_multiplier(&self, element_size: u8) -> u8 {
        element_size
    }

    /// Human-readable suffix (e.g., "{1to8}").
    pub const fn suffix(&self) -> &'static str {
        match self {
            Self::None => "",
            Self::Broadcast1To2 => "{1to2}",
            Self::Broadcast1To4 => "{1to4}",
            Self::Broadcast1To8 => "{1to8}",
            Self::Broadcast1To16 => "{1to16}",
            Self::Broadcast1To32 => "{1to32}",
        }
    }
}

impl fmt::Display for EvexBroadcastMode {
    fn fmt(&self, f: &mut fmt::Formatter<'_>) -> fmt::Result {
        write!(f, "{}", self.suffix())
    }
}

// ╔══════════════════════════════════════════════════════════════════════════════╗
// ║                    EVEX Opmask / Zeroing                                   ║
// ╚══════════════════════════════════════════════════════════════════════════════╝

/// EVEX opmask configuration: which k-register to use and zeroing vs merging.
#[derive(Debug, Clone, Copy, PartialEq, Eq)]
pub struct EvexOpmaskConfig {
    /// Opmask register number (0-7). k0 means no masking.
    pub opmask_reg: u8,
    /// Zeroing mask: 1 = zero masked elements, 0 = merge (keep old value).
    pub zeroing: bool,
}

impl Default for EvexOpmaskConfig {
    fn default() -> Self {
        Self {
            opmask_reg: OPMASK_NONE,
            zeroing: false,
        }
    }
}

impl EvexOpmaskConfig {
    /// Create a new opmask configuration.
    pub fn new(opmask_reg: u8, zeroing: bool) -> Self {
        Self {
            opmask_reg,
            zeroing,
        }
    }

    /// No masking (k0, merging).
    pub fn none() -> Self {
        Self::default()
    }

    /// Masking with k1-k7, merging.
    pub fn merge(reg: u8) -> Self {
        Self {
            opmask_reg: reg & 0x07,
            zeroing: false,
        }
    }

    /// Masking with k1-k7, zeroing.
    pub fn zero(reg: u8) -> Self {
        Self {
            opmask_reg: reg & 0x07,
            zeroing: true,
        }
    }

    /// Whether any masking is active.
    pub fn has_active_mask(&self) -> bool {
        self.opmask_reg != OPMASK_NONE
    }

    /// Whether zeroing is active.
    pub fn has_zeroing(&self) -> bool {
        self.zeroing && self.has_active_mask()
    }

    /// Whether merging is active.
    pub fn has_merging(&self) -> bool {
        self.has_active_mask() && !self.zeroing
    }

    /// Human-readable mask suffix (e.g., "{k1}", "{k2}{z}").
    pub fn suffix(&self) -> String {
        if !self.has_active_mask() {
            return String::new();
        }
        let mut s = format!("{{k{}}}", self.opmask_reg);
        if self.zeroing {
            s.push_str("{z}");
        }
        s
    }
}

impl fmt::Display for EvexOpmaskConfig {
    fn fmt(&self, f: &mut fmt::Formatter<'_>) -> fmt::Result {
        write!(f, "{}", self.suffix())
    }
}

// ╔══════════════════════════════════════════════════════════════════════════════╗
// ║                    EVEX Prefix Configuration                               ║
// ╚══════════════════════════════════════════════════════════════════════════════╝

/// Complete EVEX prefix configuration for encoding.
#[derive(Debug, Clone, Copy, PartialEq, Eq)]
pub struct EvexPrefixConfig {
    /// EVEX.R': 1's complement of high register bit for ModR/M reg.
    pub r_prime: bool,
    /// EVEX.X': 1's complement of high register bit for SIB index.
    pub x_prime: bool,
    /// EVEX.B': 1's complement of high register bit for ModR/M r/m.
    pub b_prime: bool,
    /// EVEX.R: 1's complement of low register bit (like VEX.R).
    pub r: bool,
    /// EVEX.X: low bit for SIB index (embedded in R'/X'/B'/R logic).
    pub x: bool,
    /// EVEX.B: low bit for ModR/M r/m.
    pub b: bool,
    /// EVEX.mm: opcode map selector.
    pub mm: u8,
    /// EVEX.V': 1's complement of high vvvv bit.
    pub v_prime: bool,
    /// EVEX.W: 64-bit operand size.
    pub w: bool,
    /// EVEX.vvvv: 1's complement of source register (low 4 bits).
    pub vvvv: u8,
    /// EVEX.pp: implied mandatory prefix.
    pub pp: u8,
    /// EVEX.z: zeroing mask.
    pub z: bool,
    /// EVEX.L': vector length MSB.
    pub l_prime: bool,
    /// EVEX.L: vector length LSB.
    pub l: bool,
    /// EVEX.b: broadcast / rounding control.
    pub b_bit: bool,
    /// EVEX.aaa: opmask register k0-k7.
    pub aaa: u8,
}

impl Default for EvexPrefixConfig {
    fn default() -> Self {
        Self {
            r_prime: false,
            x_prime: false,
            b_prime: false,
            r: false,
            x: false,
            b: false,
            mm: EVEX_MM_0F,
            v_prime: false,
            w: false,
            vvvv: 0,
            pp: EVEX_PP_NONE,
            z: false,
            l_prime: false,
            l: false,
            b_bit: false,
            aaa: OPMASK_NONE,
        }
    }
}

impl EvexPrefixConfig {
    /// Create a new EVEX prefix config with defaults.
    pub const fn new() -> Self {
        Self {
            r_prime: false,
            x_prime: false,
            b_prime: false,
            r: false,
            x: false,
            b: false,
            mm: EVEX_MM_0F,
            v_prime: false,
            w: false,
            vvvv: 0,
            pp: EVEX_PP_NONE,
            z: false,
            l_prime: false,
            l: false,
            b_bit: false,
            aaa: OPMASK_NONE,
        }
    }

    /// Set the opcode map.
    pub fn with_map(mut self, map: EvexOpcodeMap) -> Self {
        self.mm = map.mm();
        self
    }

    /// Set the mandatory prefix.
    pub fn with_prefix(mut self, pfx: VexMandatoryPrefix) -> Self {
        self.pp = pfx.pp_bits();
        self
    }

    /// Set vector length from L'L bits.
    pub fn with_vector_length(mut self, vl: EvexVectorLength) -> Self {
        let (lp, l) = vl.ll_bits();
        self.l_prime = lp;
        self.l = l;
        self
    }

    /// Set vector length from packed LL value.
    pub fn with_ll(mut self, ll: u8) -> Self {
        self.l_prime = (ll & 0x02) != 0;
        self.l = (ll & 0x01) != 0;
        self
    }

    /// Set the vvvv source register (inverted encoding).
    pub fn with_vvvv(mut self, reg: u8) -> Self {
        self.vvvv = vex_invert_reg(reg & 0x0F);
        self.v_prime = vex_reg_needs_r(reg & 0x1F);
        self
    }

    /// Set destination register (affects R and R').
    pub fn with_dest_reg(mut self, reg: u8) -> Self {
        self.r = vex_reg_needs_r(reg);
        self.r_prime = (reg & 0x10) != 0;
        self
    }

    /// Set source/memory base register (affects B and B').
    pub fn with_base_reg(mut self, reg: u8) -> Self {
        self.b = vex_reg_needs_b(reg);
        self.b_prime = (reg & 0x10) != 0;
        self
    }

    /// Set SIB index register (affects X and X').
    pub fn with_index_reg(mut self, reg: u8) -> Self {
        self.x = vex_reg_needs_x(reg);
        self.x_prime = (reg & 0x10) != 0;
        self
    }

    /// Set W bit.
    pub fn with_w(mut self, w: bool) -> Self {
        self.w = w;
        self
    }

    /// Set opmask configuration.
    pub fn with_opmask(mut self, opmask: EvexOpmaskConfig) -> Self {
        self.aaa = opmask.opmask_reg & 0x07;
        self.z = opmask.zeroing;
        self
    }

    /// Set broadcast mode (sets b bit).
    pub fn with_broadcast(mut self, bcst: EvexBroadcastMode) -> Self {
        self.b_bit = bcst.is_broadcast();
        self
    }

    /// Set rounding mode (sets b bit and encodes RC in L'L).
    pub fn with_rounding(mut self, rounding: EvexRoundingMode, vl: EvexVectorLength) -> Self {
        if rounding.is_active() {
            self.b_bit = true;
            let (lp, lv) = rounding.encode_ll_for_rounding(vl);
            self.l_prime = lp;
            self.l = lv;
        }
        self
    }

    /// Get the effective vector length.
    pub fn vector_length(&self) -> Option<EvexVectorLength> {
        EvexVectorLength::from_ll_bits(self.l_prime, self.l)
    }

    /// Get the packed LL value.
    pub fn ll_value(&self) -> u8 {
        ((self.l_prime as u8) << 1) | (self.l as u8)
    }

    /// Check if this EVEX can be compressed to a VEX prefix.
    ///
    /// EVEX→VEX compression is possible when ALL of these hold:
    /// - No opmask (aaa == 0)
    /// - No broadcast (b == 0)
    /// - No rounding (b == 0 or normal vector length)
    /// - No zeroing (z == 0)
    /// - Vector length is 128 or 256 (L' == 0)
    /// - No extended registers (R' == 0, X' == 0, B' == 0, V' == 0)
    /// - Map is a valid VEX map (0F, 0F38, or 0F3A)
    pub fn can_compress_to_vex(&self) -> bool {
        self.aaa == OPMASK_NONE
            && !self.z
            && !self.b_bit
            && !self.l_prime  // only 128/256-bit
            && !self.r_prime
            && !self.x_prime
            && !self.b_prime
            && !self.v_prime
            && EvexOpcodeMap::from_mm(self.mm).map_or(false, |m| m.is_vex_equivalent())
    }

    /// Check if EVEX features beyond VEX are being used.
    pub fn uses_evex_features(&self) -> bool {
        self.aaa != OPMASK_NONE
            || self.z
            || self.b_bit
            || self.l_prime
            || self.r_prime
            || self.x_prime
            || self.b_prime
            || self.v_prime
    }

    /// Prefix byte count (always 4 for EVEX).
    pub const fn prefix_byte_count(&self) -> u8 {
        4
    }
}

// ╔══════════════════════════════════════════════════════════════════════════════╗
// ║                    EVEX Prefix Builder                                     ║
// ╚══════════════════════════════════════════════════════════════════════════════╝

/// EVEX prefix encoder — builds 4-byte EVEX sequences.
pub struct EvexPrefixBuilder;

impl EvexPrefixBuilder {
    /// Build a 4-byte EVEX prefix from individual field values.
    ///
    /// EVEX layout: [62] [P0] [P1] [P2]
    ///
    /// P0: R'X'B'R'00mm = [~R' ~X' ~B' ~R 0 0 mm]
    /// P1: Wvvvv1pp      = [W ~vvvv[3:0] 1 pp]
    /// P2: zL'LbV'aaa    = [z L' L b ~V' aaa]
    #[inline]
    pub fn build_raw(
        r_prime: bool,
        x_prime: bool,
        b_prime: bool,
        r: bool,
        x: bool,
        b: bool,
        mm: u8,
        v_prime: bool,
        w: bool,
        vvvv: u8,
        pp: u8,
        z: bool,
        l_prime: bool,
        l: bool,
        b_bit: bool,
        aaa: u8,
    ) -> [u8; 4] {
        let p0: u8 = ((!r_prime as u8) << 7)
            | ((!x_prime as u8) << 6)
            | ((!b_prime as u8) << 5)
            | ((!r as u8) << 4)
            | (mm & EVEX_P0_MM_MASK);

        let p1: u8 =
            ((w as u8) << 7) | ((vvvv & 0x0F) << 3) | EVEX_P1_FIXED_BIT | (pp & EVEX_P1_PP_MASK);

        let p2: u8 = ((z as u8) << 7)
            | ((l_prime as u8) << 6)
            | ((l as u8) << 5)
            | ((b_bit as u8) << 4)
            | ((!v_prime as u8) << 3)
            | (aaa & EVEX_P2_AAA_MASK);

        [EVEX_PREFIX, p0, p1, p2]
    }

    /// Build EVEX prefix from an EvexPrefixConfig.
    #[inline]
    pub fn build_from_config(config: &EvexPrefixConfig) -> [u8; 4] {
        Self::build_raw(
            config.r_prime,
            config.x_prime,
            config.b_prime,
            config.r,
            config.x,
            config.b,
            config.mm,
            config.v_prime,
            config.w,
            config.vvvv,
            config.pp,
            config.z,
            config.l_prime,
            config.l,
            config.b_bit,
            config.aaa,
        )
    }

    /// Build EVEX prefix as a Vec<u8>.
    pub fn build_vec(config: &EvexPrefixConfig) -> Vec<u8> {
        Self::build_from_config(config).to_vec()
    }

    /// Build an EVEX prefix for a register-register-register operation.
    pub fn build_rrr(
        map: EvexOpcodeMap,
        prefix: VexMandatoryPrefix,
        vl: EvexVectorLength,
        dest_reg: u8,
        src1_reg: u8,
        src2_reg: u8,
        w: bool,
        opmask: EvexOpmaskConfig,
    ) -> [u8; 4] {
        let mut cfg = EvexPrefixConfig::new()
            .with_map(map)
            .with_prefix(prefix)
            .with_vector_length(vl)
            .with_dest_reg(dest_reg)
            .with_vvvv(src1_reg)
            .with_base_reg(src2_reg)
            .with_w(w)
            .with_opmask(opmask);
        Self::build_from_config(&cfg)
    }

    /// Build EVEX prefix for a register-register with broadcast.
    pub fn build_rr_broadcast(
        map: EvexOpcodeMap,
        prefix: VexMandatoryPrefix,
        vl: EvexVectorLength,
        dest_reg: u8,
        src1_reg: u8,
        mem_base_reg: u8,
        w: bool,
        opmask: EvexOpmaskConfig,
        broadcast: EvexBroadcastMode,
    ) -> [u8; 4] {
        let mut cfg = EvexPrefixConfig::new()
            .with_map(map)
            .with_prefix(prefix)
            .with_vector_length(vl)
            .with_dest_reg(dest_reg)
            .with_vvvv(src1_reg)
            .with_base_reg(mem_base_reg)
            .with_w(w)
            .with_opmask(opmask)
            .with_broadcast(broadcast);
        Self::build_from_config(&cfg)
    }

    /// Build EVEX prefix with rounding mode.
    pub fn build_with_rounding(
        map: EvexOpcodeMap,
        prefix: VexMandatoryPrefix,
        vl: EvexVectorLength,
        dest_reg: u8,
        src1_reg: u8,
        src2_reg: u8,
        w: bool,
        rounding: EvexRoundingMode,
    ) -> [u8; 4] {
        let mut cfg = EvexPrefixConfig::new()
            .with_map(map)
            .with_prefix(prefix)
            .with_vector_length(vl)
            .with_dest_reg(dest_reg)
            .with_vvvv(src1_reg)
            .with_base_reg(src2_reg)
            .with_w(w)
            .with_rounding(rounding, vl);
        Self::build_from_config(&cfg)
    }
}

// ╔══════════════════════════════════════════════════════════════════════════════╗
// ║                    EVEX Prefix Decoder                                     ║
// ╚══════════════════════════════════════════════════════════════════════════════╝

/// Decoded EVEX prefix fields.
#[derive(Debug, Clone, Copy, PartialEq, Eq, Default)]
pub struct EvexDecodedPrefix {
    pub r_prime: bool,
    pub x_prime: bool,
    pub b_prime: bool,
    pub r: bool,
    pub x: bool,
    pub b: bool,
    pub mm: u8,
    pub v_prime: bool,
    pub w: bool,
    pub vvvv: u8,
    pub pp: u8,
    pub z: bool,
    pub l_prime: bool,
    pub l: bool,
    pub b_bit: bool,
    pub aaa: u8,
}

impl EvexDecodedPrefix {
    /// Decode EVEX from bytes [0x62, p0, p1, p2].
    pub fn decode(p0: u8, p1: u8, p2: u8) -> Self {
        Self {
            r_prime: (p0 & EVEX_P0_R_PRIME_MASK) == 0,
            x_prime: (p0 & EVEX_P0_X_PRIME_MASK) == 0,
            b_prime: (p0 & EVEX_P0_B_PRIME_MASK) == 0,
            r: (p0 & EVEX_P0_R_MASK) == 0,
            x: false, // X is embedded in X' for AVX-512
            b: false, // B is embedded in B'
            mm: p0 & EVEX_P0_MM_MASK,
            v_prime: (p1 & EVEX_P2_V_PRIME_MASK) == 0, // V' is actually in P2
            w: (p1 & EVEX_P1_W_MASK) != 0,
            vvvv: (p1 >> 3) & 0x0F,
            pp: p1 & EVEX_P1_PP_MASK,
            z: (p2 & EVEX_P2_Z_MASK) != 0,
            l_prime: (p2 & EVEX_P2_L_PRIME_MASK) != 0,
            l: (p2 & EVEX_P2_L_MASK) != 0,
            b_bit: (p2 & EVEX_P2_B_MASK) != 0,
            aaa: p2 & EVEX_P2_AAA_MASK,
        }
    }

    /// Decode from a byte slice. Returns decoded fields and bytes consumed.
    pub fn decode_from_slice(bytes: &[u8]) -> Option<(Self, usize)> {
        if bytes.len() < 4 || bytes[0] != EVEX_PREFIX {
            return None;
        }
        Some((Self::decode(bytes[1], bytes[2], bytes[3]), 4))
    }

    /// Get the effective vector length.
    pub fn vector_length(&self) -> Option<EvexVectorLength> {
        EvexVectorLength::from_ll_bits(self.l_prime, self.l)
    }

    /// Get the opmask register.
    pub fn opmask_reg(&self) -> u8 {
        self.aaa
    }

    /// Whether zeroing is active.
    pub fn is_zeroing(&self) -> bool {
        self.z
    }

    /// Whether broadcast is active (b_bit=1 without rounding).
    pub fn is_broadcast(&self) -> bool {
        self.b_bit
    }

    /// Get the effective destination register from R/R' bits.
    pub fn effective_dest_reg(&self, low_reg: u8) -> u8 {
        let mut reg = low_reg & 0x07;
        if !self.r {
            reg |= 0x08;
        }
        if !self.r_prime {
            reg |= 0x10;
        }
        reg
    }

    /// Get the effective source register from vvvv/V'.
    pub fn effective_vvvv_reg(&self) -> u8 {
        let mut reg = vex_recover_reg(self.vvvv);
        if !self.v_prime {
            reg |= 0x10;
        }
        reg
    }

    /// Get effective base register from B/B'.
    pub fn effective_base_reg(&self, low_reg: u8) -> u8 {
        let mut reg = low_reg & 0x07;
        if !self.b {
            reg |= 0x08;
        }
        if !self.b_prime {
            reg |= 0x10;
        }
        reg
    }

    /// Get opcode map.
    pub fn opcode_map(&self) -> Option<EvexOpcodeMap> {
        EvexOpcodeMap::from_mm(self.mm)
    }

    /// Get mandatory prefix.
    pub fn mandatory_prefix(&self) -> VexMandatoryPrefix {
        VexMandatoryPrefix::from_pp(self.pp).unwrap_or(VexMandatoryPrefix::None)
    }

    /// Whether this EVEX can be compressed to VEX.
    pub fn can_compress_to_vex(&self) -> bool {
        let cfg = self.to_config();
        cfg.can_compress_to_vex()
    }

    /// Convert to EvexPrefixConfig.
    pub fn to_config(&self) -> EvexPrefixConfig {
        EvexPrefixConfig {
            r_prime: self.r_prime,
            x_prime: self.x_prime,
            b_prime: self.b_prime,
            r: self.r,
            x: self.x,
            b: self.b,
            mm: self.mm,
            v_prime: self.v_prime,
            w: self.w,
            vvvv: self.vvvv,
            pp: self.pp,
            z: self.z,
            l_prime: self.l_prime,
            l: self.l,
            b_bit: self.b_bit,
            aaa: self.aaa,
        }
    }
}

impl fmt::Display for EvexDecodedPrefix {
    fn fmt(&self, f: &mut fmt::Formatter<'_>) -> fmt::Result {
        write!(
            f,
            "EVEX R'={} X'={} B'={} R={} mm={:02b} V'={} W={} vvvv={:04b} pp={:02b} z={} L'={} L={} b={} aaa={}",
            self.r_prime as u8,
            self.x_prime as u8,
            self.b_prime as u8,
            self.r as u8,
            self.mm,
            self.v_prime as u8,
            self.w as u8,
            self.vvvv,
            self.pp,
            self.z as u8,
            self.l_prime as u8,
            self.l as u8,
            self.b_bit as u8,
            self.aaa,
        )
    }
}

// ╔══════════════════════════════════════════════════════════════════════════════╗
// ║                    EVEX Compressed Displacement                            ║
// ╚══════════════════════════════════════════════════════════════════════════════╝

/// EVEX compressed displacement (disp8*N) computation.
///
/// AVX-512 uses compressed displacement: a single byte encodes a scaled
/// displacement where the scaling factor (N) depends on the tuple type and
/// element size. This allows encoding displacements up to 255*N bytes in
/// just 8 bits.
#[derive(Debug, Clone)]
pub struct EvexCompressedDisplacement;

impl EvexCompressedDisplacement {
    /// Compute the compressed displacement multiplier N for a given
    /// tuple type, vector length, and element size.
    ///
    /// disp8*N where N = (VL_bytes / tuple_count)
    pub fn multiplier(tuple_type: EvexTupleType, vl: EvexVectorLength, element_size: u8) -> u8 {
        tuple_type.multiplier(vl, element_size)
    }

    /// Compress a full displacement into disp8 form.
    ///
    /// Returns the compressed disp8 value (disp / N) if disp is divisible by N
    /// and fits in 8 bits, or None if not compressible.
    pub fn compress(
        disp: i32,
        tuple_type: EvexTupleType,
        vl: EvexVectorLength,
        element_size: u8,
    ) -> Option<u8> {
        let n = Self::multiplier(tuple_type, vl, element_size) as i32;
        if n == 0 {
            return None;
        }
        if disp % n != 0 {
            return None;
        }
        let compressed = disp / n;
        // Must fit in signed 8-bit range
        if compressed >= -128 && compressed <= 127 {
            Some(compressed as u8)
        } else {
            None
        }
    }

    /// Decompress a disp8 value back to full displacement.
    pub fn decompress(
        disp8: i8,
        tuple_type: EvexTupleType,
        vl: EvexVectorLength,
        element_size: u8,
    ) -> i32 {
        let n = Self::multiplier(tuple_type, vl, element_size) as i32;
        (disp8 as i32) * n
    }

    /// Check if a displacement can be compressed.
    pub fn can_compress(
        disp: i32,
        tuple_type: EvexTupleType,
        vl: EvexVectorLength,
        element_size: u8,
    ) -> bool {
        Self::compress(disp, tuple_type, vl, element_size).is_some()
    }

    /// Compute the compressed displacement for broadcast mode.
    /// In broadcast mode, N = element size (only one element loaded).
    pub fn broadcast_multiplier(element_size: u8) -> u8 {
        element_size
    }

    /// Compress displacement for broadcast mode.
    pub fn compress_broadcast(disp: i32, element_size: u8) -> Option<u8> {
        let n = element_size as i32;
        if disp % n != 0 {
            return None;
        }
        let compressed = disp / n;
        if compressed >= -128 && compressed <= 127 {
            Some(compressed as u8)
        } else {
            None
        }
    }

    /// Maximum compressed displacement value in bytes.
    pub const MAX_COMPRESSED_DISP: i32 = 127;

    /// Minimum compressed displacement value in bytes.
    pub const MIN_COMPRESSED_DISP: i32 = -128;

    /// Build a compressed displacement table for all tuple types at a given VL.
    pub fn build_multiplier_table(vl: EvexVectorLength) -> Vec<(EvexTupleType, u8)> {
        let element_sizes: [u8; 5] = [1, 2, 4, 8, 16];
        let tuple_types = [
            EvexTupleType::Full,
            EvexTupleType::Half,
            EvexTupleType::Quarter,
            EvexTupleType::Eighth,
            EvexTupleType::Scalar,
            EvexTupleType::Mem128,
            EvexTupleType::Tuple1Scalar,
            EvexTupleType::Tuple2,
            EvexTupleType::Tuple4,
            EvexTupleType::Tuple8,
        ];

        let mut table = Vec::new();
        for tt in &tuple_types {
            // Use a representative element size (4 bytes for scalar)
            table.push((*tt, Self::multiplier(*tt, vl, 4)));
        }
        table
    }
}

// ╔══════════════════════════════════════════════════════════════════════════════╗
// ║                    EVEX Instruction Length Computation                     ║
// ╚══════════════════════════════════════════════════════════════════════════════╝

/// Compute total instruction length for EVEX-encoded instructions.
#[derive(Debug, Clone)]
pub struct EvexInstructionLength;

impl EvexInstructionLength {
    /// EVEX prefix is always 4 bytes.
    pub const EVEX_PREFIX_SIZE: u8 = 4;

    /// Maximum x86-64 instruction length (applies to EVEX too).
    pub const MAX_LENGTH: u8 = 15;

    /// Compute total EVEX instruction length.
    pub fn compute(
        opcode_size: u8,
        has_modrm: bool,
        has_sib: bool,
        disp_size: u8, // compressed disp8 (1) or full disp32 (4)
        imm_size: u8,
    ) -> u16 {
        let prefix: u16 = 4;
        let op: u16 = opcode_size as u16;
        let modrm: u16 = if has_modrm { 1 } else { 0 };
        let sib: u16 = if has_sib { 1 } else { 0 };
        let disp: u16 = disp_size as u16;
        let imm: u16 = imm_size as u16;

        prefix + op + modrm + sib + disp + imm
    }

    /// Compute EVEX instruction length from config and operand info.
    pub fn compute_from_config(
        config: &EvexPrefixConfig,
        opcode_size: u8,
        has_modrm: bool,
        has_sib: bool,
        disp_size: u8,
        imm_size: u8,
    ) -> u16 {
        Self::compute(opcode_size, has_modrm, has_sib, disp_size, imm_size)
    }

    /// Check if a length is valid.
    pub fn is_valid_length(length: u16) -> bool {
        length <= Self::MAX_LENGTH as u16
    }

    /// Quick estimate for common EVEX patterns.
    pub fn estimate_common(
        has_modrm: bool,
        has_sib: bool,
        uses_compressed_disp: bool,
        has_imm8: bool,
    ) -> u16 {
        let op: u16 = 1;
        let modrm: u16 = if has_modrm { 1 } else { 0 };
        let sib: u16 = if has_sib { 1 } else { 0 };
        let disp: u16 = if uses_compressed_disp {
            1
        } else if has_modrm {
            4
        } else {
            0
        };
        let imm: u16 = if has_imm8 { 1 } else { 0 };

        4 + op + modrm + sib + disp + imm
    }
}

// ╔══════════════════════════════════════════════════════════════════════════════╗
// ║                    EVEX → VEX Compression Logic                            ║
// ╚══════════════════════════════════════════════════════════════════════════════╝

/// EVEX-to-VEX compressor — when no AVX-512-specific features are used,
/// an EVEX encoding can be reduced to a VEX encoding for backward
/// compatibility or code density.
#[derive(Debug, Clone)]
pub struct EvexToVexCompressor;

impl EvexToVexCompressor {
    /// Check if an EVEX configuration can be compressed to VEX.
    pub fn can_compress(config: &EvexPrefixConfig) -> bool {
        config.can_compress_to_vex()
    }

    /// Try to compress EVEX config to VEX config.
    /// Returns None if compression is impossible.
    pub fn compress(config: &EvexPrefixConfig) -> Option<super::x86_vex_encoding::VexPrefixConfig> {
        if !config.can_compress_to_vex() {
            return None;
        }

        let vex_mmmmm = match config.mm {
            EVEX_MM_0F => super::x86_vex_encoding::VEX_MMMMM_0F,
            EVEX_MM_0F38 => super::x86_vex_encoding::VEX_MMMMM_0F38,
            EVEX_MM_0F3A => super::x86_vex_encoding::VEX_MMMMM_0F3A,
            _ => return None,
        };

        Some(super::x86_vex_encoding::VexPrefixConfig {
            r: config.r,
            x: config.x,
            b: config.b,
            w: config.w,
            mmmmm: vex_mmmmm,
            vvvv: config.vvvv,
            l: config.l,
            pp: config.pp,
        })
    }

    /// List conditions preventing EVEX→VEX compression.
    pub fn compression_blockers(config: &EvexPrefixConfig) -> Vec<&'static str> {
        let mut blockers = Vec::new();
        if config.aaa != OPMASK_NONE {
            blockers.push("opmask register active");
        }
        if config.z {
            blockers.push("zeroing mask active");
        }
        if config.b_bit {
            blockers.push("broadcast or rounding active");
        }
        if config.l_prime {
            blockers.push("512-bit vector length (L'=1)");
        }
        if config.r_prime {
            blockers.push("extended destination register (R'=1)");
        }
        if config.x_prime {
            blockers.push("extended index register (X'=1)");
        }
        if config.b_prime {
            blockers.push("extended base register (B'=1)");
        }
        if config.v_prime {
            blockers.push("extended vvvv register (V'=1)");
        }
        if !EvexOpcodeMap::from_mm(config.mm).map_or(false, |m| m.is_vex_equivalent()) {
            blockers.push("non-VEX opcode map (mm > 3)");
        }
        blockers
    }
}

// ╔══════════════════════════════════════════════════════════════════════════════╗
// ║                    EVEX Encoded Instruction                                ║
// ╚══════════════════════════════════════════════════════════════════════════════╝

/// Complete EVEX-encoded instruction representation.
#[derive(Debug, Clone)]
pub struct EvexEncodedInstruction {
    /// EVEX prefix bytes (always 4 bytes).
    pub evex_prefix: Vec<u8>,
    /// Opcode byte(s).
    pub opcode: Vec<u8>,
    /// ModR/M byte.
    pub modrm: Option<u8>,
    /// SIB byte.
    pub sib: Option<u8>,
    /// Displacement bytes.
    pub displacement: Vec<u8>,
    /// Immediate bytes.
    pub immediate: Vec<u8>,
    /// EVEX configuration used.
    pub config: EvexPrefixConfig,
    /// Opmask configuration.
    pub opmask: EvexOpmaskConfig,
    /// Broadcast mode (if active).
    pub broadcast: EvexBroadcastMode,
    /// Rounding mode (if active).
    pub rounding: EvexRoundingMode,
}

impl EvexEncodedInstruction {
    /// Create a new EVEX-encoded instruction.
    pub fn new(config: EvexPrefixConfig) -> Self {
        Self {
            evex_prefix: Vec::new(),
            opcode: Vec::new(),
            modrm: None,
            sib: None,
            displacement: Vec::new(),
            immediate: Vec::new(),
            config,
            opmask: EvexOpmaskConfig::default(),
            broadcast: EvexBroadcastMode::None,
            rounding: EvexRoundingMode::None,
        }
    }

    /// Assemble full instruction bytes.
    pub fn assemble(&self) -> Vec<u8> {
        let mut bytes = Vec::with_capacity(self.total_length() as usize);
        bytes.extend_from_slice(&self.evex_prefix);
        bytes.extend_from_slice(&self.opcode);
        if let Some(modrm) = self.modrm {
            bytes.push(modrm);
        }
        if let Some(sib) = self.sib {
            bytes.push(sib);
        }
        bytes.extend_from_slice(&self.displacement);
        bytes.extend_from_slice(&self.immediate);
        bytes
    }

    /// Total instruction length.
    pub fn total_length(&self) -> u16 {
        let mut len: u16 = self.evex_prefix.len() as u16;
        len += self.opcode.len() as u16;
        if self.modrm.is_some() {
            len += 1;
        }
        if self.sib.is_some() {
            len += 1;
        }
        len += self.displacement.len() as u16;
        len += self.immediate.len() as u16;
        len
    }

    /// Whether the instruction length is valid.
    pub fn is_valid(&self) -> bool {
        self.total_length() <= 15
    }

    /// Whether EVEX features beyond VEX are used.
    pub fn uses_evex_features(&self) -> bool {
        self.config.uses_evex_features()
    }
}

impl fmt::Display for EvexEncodedInstruction {
    fn fmt(&self, f: &mut fmt::Formatter<'_>) -> fmt::Result {
        let bytes = self.assemble();
        write!(f, "EVEX[{}] ", bytes.len())?;
        for b in &bytes {
            write!(f, "{:02X} ", b)?;
        }
        Ok(())
    }
}

// ╔══════════════════════════════════════════════════════════════════════════════╗
// ║                    Main X86EVEXEncoding Struct                             ║
// ╚══════════════════════════════════════════════════════════════════════════════╝

/// Main entry point for X86 EVEX prefix encoding.
///
/// `X86EVEXEncoding` provides the complete interface for EVEX prefix generation,
/// decoding, tuple type selection, broadcast, rounding, compressed displacement,
/// EVEX→VEX compression, and instruction length computation for AVX-512.
#[derive(Debug, Clone)]
pub struct X86EVEXEncoding {
    /// Default vector length.
    pub default_vector_length: EvexVectorLength,
    /// Default opmask (k0 = no masking).
    pub default_opmask: EvexOpmaskConfig,
    /// Whether to prefer compressed displacement when possible.
    pub prefer_compressed_disp: bool,
    /// Whether to attempt EVEX→VEX compression when features allow.
    pub allow_evex_to_vex_compression: bool,
}

impl Default for X86EVEXEncoding {
    fn default() -> Self {
        Self {
            default_vector_length: EvexVectorLength::VL512,
            default_opmask: EvexOpmaskConfig::none(),
            prefer_compressed_disp: true,
            allow_evex_to_vex_compression: true,
        }
    }
}

impl X86EVEXEncoding {
    /// Create a new instance.
    pub fn new() -> Self {
        Self::default()
    }

    /// Set default vector length.
    pub fn with_default_vl(mut self, vl: EvexVectorLength) -> Self {
        self.default_vector_length = vl;
        self
    }

    /// Set default opmask.
    pub fn with_default_opmask(mut self, opmask: EvexOpmaskConfig) -> Self {
        self.default_opmask = opmask;
        self
    }

    /// Enable EVEX→VEX compression.
    pub fn with_evex_to_vex_compression(mut self, enabled: bool) -> Self {
        self.allow_evex_to_vex_compression = enabled;
        self
    }

    // ── Configuration Builders ────────────────────────────────────────────────

    /// Build a basic EvexPrefixConfig for register-register-register operations.
    pub fn config_for_rrr(
        &self,
        map: EvexOpcodeMap,
        prefix: VexMandatoryPrefix,
        vl: EvexVectorLength,
        dest_reg: u8,
        src1_reg: u8,
        src2_reg: u8,
        w: bool,
    ) -> EvexPrefixConfig {
        EvexPrefixConfig::new()
            .with_map(map)
            .with_prefix(prefix)
            .with_vector_length(vl)
            .with_dest_reg(dest_reg)
            .with_vvvv(src1_reg)
            .with_base_reg(src2_reg)
            .with_w(w)
            .with_opmask(self.default_opmask)
    }

    /// Build config with opmask.
    pub fn config_with_opmask(
        &self,
        map: EvexOpcodeMap,
        prefix: VexMandatoryPrefix,
        vl: EvexVectorLength,
        dest_reg: u8,
        src1_reg: u8,
        src2_reg: u8,
        w: bool,
        opmask: EvexOpmaskConfig,
    ) -> EvexPrefixConfig {
        let mut cfg = self.config_for_rrr(map, prefix, vl, dest_reg, src1_reg, src2_reg, w);
        cfg = cfg.with_opmask(opmask);
        cfg
    }

    /// Build config with broadcast.
    pub fn config_with_broadcast(
        &self,
        map: EvexOpcodeMap,
        prefix: VexMandatoryPrefix,
        vl: EvexVectorLength,
        dest_reg: u8,
        src1_reg: u8,
        mem_base_reg: u8,
        w: bool,
        opmask: EvexOpmaskConfig,
        broadcast: EvexBroadcastMode,
    ) -> EvexPrefixConfig {
        let mut cfg = EvexPrefixConfig::new()
            .with_map(map)
            .with_prefix(prefix)
            .with_vector_length(vl)
            .with_dest_reg(dest_reg)
            .with_vvvv(src1_reg)
            .with_base_reg(mem_base_reg)
            .with_w(w)
            .with_opmask(opmask)
            .with_broadcast(broadcast);
        cfg
    }

    /// Build config with rounding mode.
    pub fn config_with_rounding(
        &self,
        map: EvexOpcodeMap,
        prefix: VexMandatoryPrefix,
        vl: EvexVectorLength,
        dest_reg: u8,
        src1_reg: u8,
        src2_reg: u8,
        w: bool,
        rounding: EvexRoundingMode,
    ) -> EvexPrefixConfig {
        let mut cfg = self.config_for_rrr(map, prefix, vl, dest_reg, src1_reg, src2_reg, w);
        cfg = cfg.with_rounding(rounding, vl);
        cfg
    }

    // ── Encoding ──────────────────────────────────────────────────────────────

    /// Encode an EVEX prefix from config.
    pub fn encode_evex_prefix(&self, config: &EvexPrefixConfig) -> Vec<u8> {
        EvexPrefixBuilder::build_vec(config)
    }

    /// Encode a full EVEX instruction (reg, reg, reg).
    pub fn encode_rrr(
        &self,
        map: EvexOpcodeMap,
        prefix: VexMandatoryPrefix,
        vl: EvexVectorLength,
        opcode: u8,
        dest_reg: u8,
        src1_reg: u8,
        src2_reg: u8,
    ) -> EvexEncodedInstruction {
        let config = self.config_for_rrr(map, prefix, vl, dest_reg, src1_reg, src2_reg, false);
        let evex_bytes = EvexPrefixBuilder::build_vec(&config);
        let modrm = 0xC0 | ((dest_reg & 0x07) << 3) | (src2_reg & 0x07);

        EvexEncodedInstruction {
            evex_prefix: evex_bytes,
            opcode: vec![opcode],
            modrm: Some(modrm),
            sib: None,
            displacement: vec![],
            immediate: vec![],
            config,
            opmask: self.default_opmask,
            broadcast: EvexBroadcastMode::None,
            rounding: EvexRoundingMode::None,
        }
    }

    /// Encode with zero-masking.
    pub fn encode_zero_masked(
        &self,
        map: EvexOpcodeMap,
        prefix: VexMandatoryPrefix,
        vl: EvexVectorLength,
        opcode: u8,
        dest_reg: u8,
        src1_reg: u8,
        src2_reg: u8,
        opmask_reg: u8,
    ) -> EvexEncodedInstruction {
        let opmask = EvexOpmaskConfig::zero(opmask_reg);
        let config =
            self.config_with_opmask(map, prefix, vl, dest_reg, src1_reg, src2_reg, false, opmask);
        let evex_bytes = EvexPrefixBuilder::build_vec(&config);
        let modrm = 0xC0 | ((dest_reg & 0x07) << 3) | (src2_reg & 0x07);

        EvexEncodedInstruction {
            evex_prefix: evex_bytes,
            opcode: vec![opcode],
            modrm: Some(modrm),
            sib: None,
            displacement: vec![],
            immediate: vec![],
            config,
            opmask,
            broadcast: EvexBroadcastMode::None,
            rounding: EvexRoundingMode::None,
        }
    }

    /// Encode with merging-mask.
    pub fn encode_merge_masked(
        &self,
        map: EvexOpcodeMap,
        prefix: VexMandatoryPrefix,
        vl: EvexVectorLength,
        opcode: u8,
        dest_reg: u8,
        src1_reg: u8,
        src2_reg: u8,
        opmask_reg: u8,
    ) -> EvexEncodedInstruction {
        let opmask = EvexOpmaskConfig::merge(opmask_reg);
        let config =
            self.config_with_opmask(map, prefix, vl, dest_reg, src1_reg, src2_reg, false, opmask);
        let evex_bytes = EvexPrefixBuilder::build_vec(&config);
        let modrm = 0xC0 | ((dest_reg & 0x07) << 3) | (src2_reg & 0x07);

        EvexEncodedInstruction {
            evex_prefix: evex_bytes,
            opcode: vec![opcode],
            modrm: Some(modrm),
            sib: None,
            displacement: vec![],
            immediate: vec![],
            config,
            opmask,
            broadcast: EvexBroadcastMode::None,
            rounding: EvexRoundingMode::None,
        }
    }

    /// Encode with broadcast.
    pub fn encode_broadcast(
        &self,
        map: EvexOpcodeMap,
        prefix: VexMandatoryPrefix,
        vl: EvexVectorLength,
        opcode: u8,
        dest_reg: u8,
        src1_reg: u8,
        mem_base_reg: u8,
        broadcast: EvexBroadcastMode,
        opmask: EvexOpmaskConfig,
        disp: i32,
        element_size: u8,
    ) -> EvexEncodedInstruction {
        let config = self.config_with_broadcast(
            map,
            prefix,
            vl,
            dest_reg,
            src1_reg,
            mem_base_reg,
            false,
            opmask,
            broadcast,
        );
        let evex_bytes = EvexPrefixBuilder::build_vec(&config);

        // Memory ModR/M: Mod=00, reg=dest, rm=base
        let modrm = ((dest_reg & 0x07) << 3) | (mem_base_reg & 0x07); // Mod=00

        // Try compressed displacement for broadcast
        let disp_bytes =
            if let Some(d8) = EvexCompressedDisplacement::compress_broadcast(disp, element_size) {
                vec![d8]
            } else {
                disp.to_le_bytes().to_vec()
            };

        EvexEncodedInstruction {
            evex_prefix: evex_bytes,
            opcode: vec![opcode],
            modrm: Some(modrm),
            sib: None,
            displacement: disp_bytes,
            immediate: vec![],
            config,
            opmask,
            broadcast,
            rounding: EvexRoundingMode::None,
        }
    }

    // ── Decoding ──────────────────────────────────────────────────────────────

    /// Decode an EVEX prefix from bytes.
    pub fn decode_evex(&self, bytes: &[u8]) -> Option<(EvexDecodedPrefix, usize)> {
        EvexDecodedPrefix::decode_from_slice(bytes)
    }

    // ── Compressed Displacement ───────────────────────────────────────────────

    /// Compute compressed displacement.
    pub fn compress_displacement(
        &self,
        disp: i32,
        tuple_type: EvexTupleType,
        vl: EvexVectorLength,
        element_size: u8,
    ) -> Option<u8> {
        EvexCompressedDisplacement::compress(disp, tuple_type, vl, element_size)
    }

    /// Decompress displacement.
    pub fn decompress_displacement(
        &self,
        disp8: i8,
        tuple_type: EvexTupleType,
        vl: EvexVectorLength,
        element_size: u8,
    ) -> i32 {
        EvexCompressedDisplacement::decompress(disp8, tuple_type, vl, element_size)
    }

    // ── EVEX → VEX ───────────────────────────────────────────────────────────

    /// Try to compress EVEX to VEX.
    pub fn try_compress_to_vex(
        &self,
        config: &EvexPrefixConfig,
    ) -> Option<super::x86_vex_encoding::VexPrefixConfig> {
        if self.allow_evex_to_vex_compression {
            EvexToVexCompressor::compress(config)
        } else {
            None
        }
    }

    /// Get compression blockers.
    pub fn evex_compression_blockers(&self, config: &EvexPrefixConfig) -> Vec<&'static str> {
        EvexToVexCompressor::compression_blockers(config)
    }

    // ── Instruction Length ────────────────────────────────────────────────────

    /// Compute instruction length.
    pub fn compute_length(
        &self,
        opcode_size: u8,
        has_modrm: bool,
        has_sib: bool,
        disp_size: u8,
        imm_size: u8,
    ) -> u16 {
        EvexInstructionLength::compute(opcode_size, has_modrm, has_sib, disp_size, imm_size)
    }

    // ── Tuple Type Helpers ────────────────────────────────────────────────────

    /// Get tuple type multiplier for compressed displacement.
    pub fn tuple_multiplier(
        &self,
        tuple_type: EvexTupleType,
        vl: EvexVectorLength,
        element_size: u8,
    ) -> u8 {
        tuple_type.multiplier(vl, element_size)
    }

    /// Select the appropriate tuple type for an element size and memory pattern.
    pub fn select_tuple_type(&self, element_size: u8, memory_only: bool) -> EvexTupleType {
        // Simple heuristic: use Full for most cases
        if memory_only {
            EvexTupleType::FullMem
        } else {
            EvexTupleType::Full
        }
    }
}

// ╔══════════════════════════════════════════════════════════════════════════════╗
// ║                    EVEX Assembly Printer                                   ║
// ╚══════════════════════════════════════════════════════════════════════════════╝

/// Pretty-printer for EVEX instructions.
#[derive(Debug, Clone)]
pub struct EvexAssemblyPrinter;

impl EvexAssemblyPrinter {
    /// Format EVEX prefix fields.
    pub fn format_prefix(decoded: &EvexDecodedPrefix) -> String {
        let mut s = String::from("EVEX");
        if decoded.r_prime {
            s.push_str(" R'");
        }
        if decoded.x_prime {
            s.push_str(" X'");
        }
        if decoded.b_prime {
            s.push_str(" B'");
        }
        if decoded.w {
            s.push_str(" W");
        }
        if decoded.z {
            s.push_str(" {z}");
        }

        if let Some(vl) = decoded.vector_length() {
            s.push_str(&format!(" VL={}", vl.width_bits()));
        }

        if decoded.aaa != 0 {
            s.push_str(&format!(" {{k{}}}", decoded.aaa));
        }

        if decoded.b_bit && decoded.aaa == 0 {
            s.push_str(" {bcst}");
        }

        s
    }

    /// Format a full instruction in Intel syntax.
    pub fn print_intel_syntax(
        mnemonic: &str,
        decoded: &EvexDecodedPrefix,
        dest_reg: u8,
        src1_reg: u8,
        src2_reg: u8,
    ) -> String {
        let vl = decoded.vector_length();
        let reg_prefix = vl.map_or("xmm", |v| v.reg_prefix());
        let mut s = format!(
            "{} {}{}, {}{}, {}{}",
            mnemonic,
            reg_prefix,
            decoded.effective_dest_reg(dest_reg),
            reg_prefix,
            decoded.effective_vvvv_reg(),
            reg_prefix,
            decoded.effective_base_reg(src2_reg),
        );
        if decoded.aaa != 0 {
            s.push_str(&format!(" {{k{}}}", decoded.aaa));
        }
        if decoded.z {
            s.push_str(" {z}");
        }
        s
    }
}

// ╔══════════════════════════════════════════════════════════════════════════════╗
// ║                    Tests                                                    ║
// ╚══════════════════════════════════════════════════════════════════════════════╝

#[cfg(test)]
mod tests {
    use super::*;

    // ── Constants ──────────────────────────────────────────────────────────────

    #[test]
    fn test_evex_constants() {
        assert_eq!(EVEX_PREFIX, 0x62);
        assert_eq!(EVEX_MM_0F, 0x01);
        assert_eq!(EVEX_MM_0F38, 0x02);
        assert_eq!(EVEX_MM_0F3A, 0x03);
        assert_eq!(EVEX_MM_5, 0x05);
        assert_eq!(EVEX_MM_6, 0x06);
        assert_eq!(EVEX_MM_7, 0x07);
        assert_eq!(EVEX_LL_128, 0x00);
        assert_eq!(EVEX_LL_256, 0x01);
        assert_eq!(EVEX_LL_512, 0x02);
    }

    // ── Opcode Map ─────────────────────────────────────────────────────────────

    #[test]
    fn test_evex_opcode_map_mm() {
        assert_eq!(EvexOpcodeMap::Map0F.mm(), 1);
        assert_eq!(EvexOpcodeMap::Map0F38.mm(), 2);
        assert_eq!(EvexOpcodeMap::Map0F3A.mm(), 3);
        assert_eq!(EvexOpcodeMap::Map5.mm(), 5);
        assert_eq!(EvexOpcodeMap::Map6.mm(), 6);
        assert_eq!(EvexOpcodeMap::Map7.mm(), 7);
    }

    #[test]
    fn test_evex_opcode_map_from_mm() {
        assert_eq!(EvexOpcodeMap::from_mm(1), Some(EvexOpcodeMap::Map0F));
        assert_eq!(EvexOpcodeMap::from_mm(2), Some(EvexOpcodeMap::Map0F38));
        assert_eq!(EvexOpcodeMap::from_mm(0), None);
        assert_eq!(EvexOpcodeMap::from_mm(4), None);
    }

    #[test]
    fn test_evex_opcode_map_is_vex_equivalent() {
        assert!(EvexOpcodeMap::Map0F.is_vex_equivalent());
        assert!(EvexOpcodeMap::Map0F38.is_vex_equivalent());
        assert!(EvexOpcodeMap::Map0F3A.is_vex_equivalent());
        assert!(!EvexOpcodeMap::Map5.is_vex_equivalent());
        assert!(!EvexOpcodeMap::Map6.is_vex_equivalent());
    }

    // ── Vector Length ──────────────────────────────────────────────────────────

    #[test]
    fn test_evex_vector_length_ll_bits() {
        assert_eq!(EvexVectorLength::VL128.ll_bits(), (false, false));
        assert_eq!(EvexVectorLength::VL256.ll_bits(), (false, true));
        assert_eq!(EvexVectorLength::VL512.ll_bits(), (true, false));
    }

    #[test]
    fn test_evex_vector_length_from_ll() {
        assert_eq!(
            EvexVectorLength::from_ll_bits(false, false),
            Some(EvexVectorLength::VL128)
        );
        assert_eq!(
            EvexVectorLength::from_ll_bits(false, true),
            Some(EvexVectorLength::VL256)
        );
        assert_eq!(
            EvexVectorLength::from_ll_bits(true, false),
            Some(EvexVectorLength::VL512)
        );
        assert_eq!(EvexVectorLength::from_ll_bits(true, true), None);
    }

    #[test]
    fn test_evex_vector_length_width() {
        assert_eq!(EvexVectorLength::VL128.width_bytes(), 16);
        assert_eq!(EvexVectorLength::VL256.width_bytes(), 32);
        assert_eq!(EvexVectorLength::VL512.width_bytes(), 64);
        assert_eq!(EvexVectorLength::VL128.reg_prefix(), "xmm");
        assert_eq!(EvexVectorLength::VL256.reg_prefix(), "ymm");
        assert_eq!(EvexVectorLength::VL512.reg_prefix(), "zmm");
    }

    // ── Tuple Type ─────────────────────────────────────────────────────────────

    #[test]
    fn test_evex_tuple_type_multiplier() {
        let vl = EvexVectorLength::VL512;
        // Full: element_size
        assert_eq!(EvexTupleType::Full.multiplier(vl, 4), 4);
        assert_eq!(EvexTupleType::Full.multiplier(vl, 8), 8);
        // Half: VL/2
        assert_eq!(EvexTupleType::Half.multiplier(vl, 4), 32);
        // Quarter: VL/4
        assert_eq!(EvexTupleType::Quarter.multiplier(vl, 4), 16);
        // Eighth: VL/8
        assert_eq!(EvexTupleType::Eighth.multiplier(vl, 4), 8);
        // Mem128: always 16
        assert_eq!(EvexTupleType::Mem128.multiplier(vl, 4), 16);
        // Scalar: element_size
        assert_eq!(EvexTupleType::Scalar.multiplier(vl, 4), 4);
    }

    #[test]
    fn test_evex_tuple_type_is_memory() {
        assert!(EvexTupleType::FullMem.is_memory());
        assert!(EvexTupleType::HalfMem.is_memory());
        assert!(!EvexTupleType::Full.is_memory());
        assert!(!EvexTupleType::Scalar.is_memory());
    }

    // ── Rounding Mode ──────────────────────────────────────────────────────────

    #[test]
    fn test_evex_rounding_mode_rc_bits() {
        assert_eq!(EvexRoundingMode::RnSae.rc_bits(), 0b00);
        assert_eq!(EvexRoundingMode::RdSae.rc_bits(), 0b01);
        assert_eq!(EvexRoundingMode::RuSae.rc_bits(), 0b10);
        assert_eq!(EvexRoundingMode::RzSae.rc_bits(), 0b11);
        assert_eq!(EvexRoundingMode::None.rc_bits(), 0);
    }

    #[test]
    fn test_evex_rounding_mode_is_active() {
        assert!(EvexRoundingMode::RnSae.is_active());
        assert!(!EvexRoundingMode::None.is_active());
    }

    #[test]
    fn test_evex_rounding_mode_has_sae() {
        assert!(EvexRoundingMode::RnSae.has_sae());
        assert!(EvexRoundingMode::Sae.has_sae());
        assert!(!EvexRoundingMode::None.has_sae());
    }

    // ── Broadcast Mode ─────────────────────────────────────────────────────────

    #[test]
    fn test_evex_broadcast_mode() {
        assert!(EvexBroadcastMode::Broadcast1To8.is_broadcast());
        assert!(!EvexBroadcastMode::None.is_broadcast());
        assert_eq!(EvexBroadcastMode::Broadcast1To4.element_count(), 4);
        assert_eq!(EvexBroadcastMode::Broadcast1To16.element_count(), 16);
        assert!(EvexBroadcastMode::Broadcast1To2.to_b_bit());
        assert!(!EvexBroadcastMode::None.to_b_bit());
    }

    // ── Opmask Config ──────────────────────────────────────────────────────────

    #[test]
    fn test_evex_opmask_config() {
        let none = EvexOpmaskConfig::none();
        assert!(!none.has_active_mask());
        assert!(!none.has_zeroing());

        let merge = EvexOpmaskConfig::merge(3);
        assert!(merge.has_active_mask());
        assert!(!merge.has_zeroing());
        assert!(merge.has_merging());

        let zero = EvexOpmaskConfig::zero(5);
        assert!(zero.has_active_mask());
        assert!(zero.has_zeroing());

        assert!(zero.suffix().contains("k5"));
        assert!(zero.suffix().contains("{z}"));
    }

    // ── EvexPrefixConfig ───────────────────────────────────────────────────────

    #[test]
    fn test_evex_prefix_config_default() {
        let cfg = EvexPrefixConfig::default();
        assert_eq!(cfg.mm, EVEX_MM_0F);
        assert_eq!(cfg.pp, EVEX_PP_NONE);
        assert_eq!(cfg.aaa, OPMASK_NONE);
    }

    #[test]
    fn test_evex_prefix_config_can_compress_to_vex() {
        // Simple case: all EVEX features off, map 0F, 128-bit => compressible
        let cfg = EvexPrefixConfig::new()
            .with_map(EvexOpcodeMap::Map0F)
            .with_vector_length(EvexVectorLength::VL128);
        assert!(cfg.can_compress_to_vex());

        // With opmask: not compressible
        let cfg = cfg.with_opmask(EvexOpmaskConfig::merge(1));
        assert!(!cfg.can_compress_to_vex());

        // With 512-bit: not compressible
        let cfg = EvexPrefixConfig::new()
            .with_map(EvexOpcodeMap::Map0F)
            .with_vector_length(EvexVectorLength::VL512);
        assert!(!cfg.can_compress_to_vex());

        // AVX-512 map5: not compressible
        let cfg = EvexPrefixConfig::new().with_map(EvexOpcodeMap::Map5);
        assert!(!cfg.can_compress_to_vex());
    }

    #[test]
    fn test_evex_prefix_config_vector_length() {
        let cfg = EvexPrefixConfig::new().with_vector_length(EvexVectorLength::VL256);
        assert_eq!(cfg.vector_length(), Some(EvexVectorLength::VL256));
        assert_eq!(cfg.ll_value(), 1);
    }

    // ── EvexPrefixBuilder ──────────────────────────────────────────────────────

    #[test]
    fn test_build_evex_basic() {
        // Simple EVEX without any features
        let bytes = EvexPrefixBuilder::build_raw(
            false,
            false,
            false, // R', X', B' = 0 (extended off)
            false,
            false,
            false,      // R, X, B = 0 (all standard)
            EVEX_MM_0F, // mm = 0F
            false,
            false,        // V'=0, W=0
            0x0E,         // vvvv = ~1
            EVEX_PP_NONE, // pp = none
            false,
            false,
            false,
            false, // z=0, L'=0, L=0, b=0
            0,     // aaa = k0 (no mask)
        );
        assert_eq!(bytes[0], 0x62);
        // P0: ~R'=1, ~X'=1, ~B'=1, ~R=1, 00, mm=01 => 0xF1
        assert_eq!(bytes[1], 0xF1);
        // P1: W=0, vvvv=0xE<<3=0x70, fixed=4, pp=0 => 0x74
        assert_eq!(bytes[2], 0x74);
        // P2: z=0, L'=0, L=0, b=0, ~V'=1<<3, aaa=0 => 0x08
        assert_eq!(bytes[3], 0x08);
    }

    #[test]
    fn test_build_evex_with_mask() {
        let bytes = EvexPrefixBuilder::build_raw(
            false,
            false,
            false,
            false,
            false,
            false,
            EVEX_MM_0F,
            false,
            false,
            0x0E,
            EVEX_PP_NONE,
            true,
            false,
            false,
            false, // z=1, zeroing
            3,     // aaa = k3
        );
        assert_eq!(bytes[0], 0x62);
        // P2: z=1, L'=0, L=0, b=0, ~V'=1<<3=8, aaa=3 => 0x8B
        assert_eq!(bytes[3], 0x8B);
    }

    #[test]
    fn test_build_evex_512() {
        let bytes = EvexPrefixBuilder::build_raw(
            false,
            false,
            false,
            false,
            false,
            false,
            EVEX_MM_0F38,
            false,
            false,
            0x0E,
            EVEX_PP_66,
            false,
            true,
            false,
            false, // L'=1, L=0 (512-bit)
            0,
        );
        // P2: z=0, L'=1, L=0 => 0x40 | ~V'=8 = 0x48
        assert_eq!(bytes[3] & 0x60, 0x40); // L'=1, L=0
    }

    #[test]
    fn test_build_evex_rrr() {
        let bytes = EvexPrefixBuilder::build_rrr(
            EvexOpcodeMap::Map0F,
            VexMandatoryPrefix::None,
            EvexVectorLength::VL128,
            0,
            1,
            2, // dest=xmm0, src1=xmm1, src2=xmm2
            false,
            EvexOpmaskConfig::none(),
        );
        assert_eq!(bytes[0], 0x62);
        assert_eq!(bytes.len(), 4);
    }

    #[test]
    fn test_build_evex_with_broadcast() {
        let bytes = EvexPrefixBuilder::build_rr_broadcast(
            EvexOpcodeMap::Map0F,
            VexMandatoryPrefix::P66,
            EvexVectorLength::VL512,
            0,
            1,
            2,
            false,
            EvexOpmaskConfig::merge(1),
            EvexBroadcastMode::Broadcast1To16,
        );
        assert_eq!(bytes[0], 0x62);
        // b bit should be set
        assert!(bytes[3] & EVEX_P2_B_MASK != 0);
    }

    // ── EvexDecodedPrefix ─────────────────────────────────────────────────────

    #[test]
    fn test_decode_evex_128() {
        let decoded = EvexDecodedPrefix::decode(0xF1, 0x74, 0x08);
        assert_eq!(decoded.mm, 1);
        assert_eq!(decoded.pp, 0);
        assert_eq!(decoded.vector_length(), Some(EvexVectorLength::VL128));
        assert!(!decoded.z);
        assert!(!decoded.b_bit);
        assert_eq!(decoded.aaa, 0);
    }

    #[test]
    fn test_decode_evex_512() {
        let decoded = EvexDecodedPrefix::decode(0xF1, 0x74, 0x48);
        assert_eq!(decoded.vector_length(), Some(EvexVectorLength::VL512));
    }

    #[test]
    fn test_decode_evex_with_mask() {
        let decoded = EvexDecodedPrefix::decode(0xF1, 0x74, 0x8B);
        assert!(decoded.z);
        assert_eq!(decoded.aaa, 3);
    }

    #[test]
    fn test_decode_evex_from_slice() {
        let (d, len) = EvexDecodedPrefix::decode_from_slice(&[0x62, 0xF1, 0x74, 0x08]).unwrap();
        assert_eq!(len, 4);
        assert!(!d.z);

        // Not EVEX
        assert!(EvexDecodedPrefix::decode_from_slice(&[0xC5, 0xF8]).is_none());
        assert!(EvexDecodedPrefix::decode_from_slice(&[]).is_none());
    }

    #[test]
    fn test_evex_decoded_effective_regs() {
        let decoded = EvexDecodedPrefix::decode(0xF1, 0x74, 0x08);
        // R=1, R'=1 (reg < 8): effective dest = low_reg
        assert_eq!(decoded.effective_dest_reg(3), 3);

        // R=0 (reg >= 8): effective dest = low_reg | 8
        let decoded = EvexDecodedPrefix::decode(0xE1, 0x74, 0x08);
        assert_eq!(decoded.effective_dest_reg(3), 11);
    }

    // ── Compressed Displacement ────────────────────────────────────────────────

    #[test]
    fn test_evex_compress_disp() {
        let vl = EvexVectorLength::VL512;
        // Full tuple, 4-byte elements: N=4
        let compressed = EvexCompressedDisplacement::compress(64, EvexTupleType::Full, vl, 4);
        assert_eq!(compressed, Some(16)); // 64/4 = 16, fits in i8

        // Not divisible by N
        assert!(EvexCompressedDisplacement::compress(65, EvexTupleType::Full, vl, 4).is_none());

        // Out of range
        assert!(EvexCompressedDisplacement::compress(1024, EvexTupleType::Full, vl, 4).is_none());
    }

    #[test]
    fn test_evex_decompress_disp() {
        let vl = EvexVectorLength::VL512;
        let decompressed = EvexCompressedDisplacement::decompress(16i8, EvexTupleType::Full, vl, 4);
        assert_eq!(decompressed, 64);

        // Negative
        let decompressed =
            EvexCompressedDisplacement::decompress(-4i8, EvexTupleType::Quarter, vl, 4);
        assert_eq!(decompressed, -64);
    }

    #[test]
    fn test_evex_broadcast_compress_disp() {
        // Broadcast: N = element_size
        let compressed = EvexCompressedDisplacement::compress_broadcast(64, 4);
        assert_eq!(compressed, Some(16));

        let compressed = EvexCompressedDisplacement::compress_broadcast(65, 4);
        assert!(compressed.is_none());
    }

    // ── EVEX → VEX Compression ────────────────────────────────────────────────

    #[test]
    fn test_evex_to_vex_compress() {
        let cfg = EvexPrefixConfig::new()
            .with_map(EvexOpcodeMap::Map0F)
            .with_vector_length(EvexVectorLength::VL128);
        let vex = EvexToVexCompressor::compress(&cfg);
        assert!(vex.is_some());
        assert_eq!(vex.unwrap().mmmmm, super::x86_vex_encoding::VEX_MMMMM_0F);
    }

    #[test]
    fn test_evex_to_vex_cannot_compress_512() {
        let cfg = EvexPrefixConfig::new()
            .with_map(EvexOpcodeMap::Map0F)
            .with_vector_length(EvexVectorLength::VL512);
        assert!(EvexToVexCompressor::compress(&cfg).is_none());
    }

    #[test]
    fn test_evex_to_vex_blockers() {
        let cfg = EvexPrefixConfig::new()
            .with_map(EvexOpcodeMap::Map5)
            .with_vector_length(EvexVectorLength::VL512)
            .with_opmask(EvexOpmaskConfig::merge(1));
        let blockers = EvexToVexCompressor::compression_blockers(&cfg);
        assert!(blockers.len() >= 2);
    }

    // ── Instruction Length ─────────────────────────────────────────────────────

    #[test]
    fn test_evex_instruction_length() {
        // EVEX(4) + opcode(1) + ModR/M(1) = 6
        let len = EvexInstructionLength::compute(1, true, false, 0, 0);
        assert_eq!(len, 6);

        // EVEX(4) + opcode(1) + ModR/M(1) + disp8(1) + imm8(1) = 8
        let len = EvexInstructionLength::compute(1, true, false, 1, 1);
        assert_eq!(len, 8);

        // EVEX(4) + opcode(1) + ModR/M(1) + SIB(1) + disp32(4) = 11
        let len = EvexInstructionLength::compute(1, true, true, 4, 0);
        assert_eq!(len, 11);
    }

    #[test]
    fn test_evex_max_length() {
        assert!(EvexInstructionLength::is_valid_length(15));
        assert!(!EvexInstructionLength::is_valid_length(16));
    }

    // ── X86EVEXEncoding ────────────────────────────────────────────────────────

    #[test]
    fn test_x86_evex_encoding_default() {
        let enc = X86EVEXEncoding::new();
        assert_eq!(enc.default_vector_length, EvexVectorLength::VL512);
        assert!(!enc.default_opmask.has_active_mask());
        assert!(enc.prefer_compressed_disp);
        assert!(enc.allow_evex_to_vex_compression);
    }

    #[test]
    fn test_x86_evex_encoding_encode_rrr() {
        let enc = X86EVEXEncoding::new();
        let instr = enc.encode_rrr(
            EvexOpcodeMap::Map0F,
            VexMandatoryPrefix::None,
            EvexVectorLength::VL128,
            0x58, // vaddps
            0,
            1,
            2,
        );
        assert_eq!(instr.opcode, vec![0x58]);
        assert!(instr.modrm.is_some());
        assert_eq!(instr.evex_prefix.len(), 4);
        assert!(instr.is_valid());
    }

    #[test]
    fn test_x86_evex_encoding_encode_zero_masked() {
        let enc = X86EVEXEncoding::new();
        let instr = enc.encode_zero_masked(
            EvexOpcodeMap::Map0F,
            VexMandatoryPrefix::P66,
            EvexVectorLength::VL512,
            0xFE, // vpaddd
            0,
            1,
            2,
            3, // k3
        );
        assert!(instr.config.z);
        assert_eq!(instr.config.aaa, 3);
        assert_eq!(instr.opmask.opmask_reg, 3);
        assert!(instr.opmask.zeroing);
    }

    #[test]
    fn test_x86_evex_encoding_encode_merge_masked() {
        let enc = X86EVEXEncoding::new();
        let instr = enc.encode_merge_masked(
            EvexOpcodeMap::Map0F,
            VexMandatoryPrefix::P66,
            EvexVectorLength::VL512,
            0xFE,
            0,
            1,
            2,
            5,
        );
        assert!(!instr.config.z);
        assert_eq!(instr.config.aaa, 5);
        assert!(instr.opmask.has_merging());
    }

    #[test]
    fn test_x86_evex_encoding_encode_broadcast() {
        let enc = X86EVEXEncoding::new();
        let instr = enc.encode_broadcast(
            EvexOpcodeMap::Map0F,
            VexMandatoryPrefix::P66,
            EvexVectorLength::VL512,
            0x58,
            0,
            1,
            2,
            EvexBroadcastMode::Broadcast1To16,
            EvexOpmaskConfig::merge(1),
            64,
            4,
        );
        assert!(instr.broadcast.is_broadcast());
        assert!(instr.config.b_bit);
        // 64 / 4 = 16 = 0x10 as compressed disp8
        assert_eq!(instr.displacement, vec![0x10]);
    }

    #[test]
    fn test_x86_evex_encoding_config_with_rounding() {
        let enc = X86EVEXEncoding::new();
        let cfg = enc.config_with_rounding(
            EvexOpcodeMap::Map0F,
            VexMandatoryPrefix::None,
            EvexVectorLength::VL512,
            0,
            1,
            2,
            false,
            EvexRoundingMode::RnSae,
        );
        assert!(cfg.b_bit);
        assert_eq!(cfg.l_prime, true);
        assert_eq!(cfg.l, false);
    }

    // ── EVEX Assembly Printer ─────────────────────────────────────────────────

    #[test]
    fn test_evex_assembly_printer() {
        let decoded = EvexDecodedPrefix::decode(0xF1, 0x74, 0x8B);
        let s = EvexAssemblyPrinter::format_prefix(&decoded);
        assert!(s.contains("EVEX"));
        assert!(s.contains("{z}"));
        assert!(s.contains("{k3}"));
    }

    #[test]
    fn test_evex_assembly_printer_intel() {
        let decoded = EvexDecodedPrefix::decode(0xF1, 0x74, 0x08);
        let s = EvexAssemblyPrinter::print_intel_syntax("vaddps", &decoded, 0, 1, 2);
        assert!(s.contains("vaddps"));
        assert!(s.contains("xmm0"));
    }

    // ── Integration Tests ─────────────────────────────────────────────────────

    #[test]
    fn test_roundtrip_evex_encode_decode() {
        let bytes = EvexPrefixBuilder::build_rrr(
            EvexOpcodeMap::Map0F,
            VexMandatoryPrefix::None,
            EvexVectorLength::VL128,
            0,
            1,
            2,
            false,
            EvexOpmaskConfig::none(),
        );
        let (decoded, len) = EvexDecodedPrefix::decode_from_slice(&bytes).unwrap();
        assert_eq!(len, 4);
        assert_eq!(decoded.mm, EVEX_MM_0F);
        assert_eq!(decoded.vector_length(), Some(EvexVectorLength::VL128));
        assert!(!decoded.z);
        assert_eq!(decoded.aaa, 0);
    }

    #[test]
    fn test_full_instruction_assemble() {
        let config = EvexPrefixConfig::new()
            .with_map(EvexOpcodeMap::Map0F)
            .with_vector_length(EvexVectorLength::VL128)
            .with_vvvv(1)
            .with_dest_reg(0)
            .with_base_reg(2);

        let mut instr = EvexEncodedInstruction::new(config);
        instr.evex_prefix = EvexPrefixBuilder::build_vec(&config);
        instr.opcode = vec![0x58];
        instr.modrm = Some(0xC0 | ((0 & 0x07) << 3) | (2 & 0x07));

        let assembled = instr.assemble();
        assert_eq!(assembled.len(), 6); // 4 EVEX + 1 opcode + 1 ModR/M
        assert!(instr.is_valid());
    }

    #[test]
    fn test_evex_uses_evex_features() {
        let cfg = EvexPrefixConfig::new().with_map(EvexOpcodeMap::Map5);
        assert!(cfg.uses_evex_features());

        let cfg = EvexPrefixConfig::new()
            .with_map(EvexOpcodeMap::Map0F)
            .with_vector_length(EvexVectorLength::VL128);
        assert!(!cfg.uses_evex_features());
    }

    #[test]
    fn test_select_tuple_type() {
        let enc = X86EVEXEncoding::new();
        let tt = enc.select_tuple_type(4, false);
        assert_eq!(tt, EvexTupleType::Full);

        let tt = enc.select_tuple_type(8, true);
        assert_eq!(tt, EvexTupleType::FullMem);
    }

    #[test]
    fn test_rounding_mode_encode_ll() {
        let (lp, l) = EvexRoundingMode::RnSae.encode_ll_for_rounding(EvexVectorLength::VL512);
        assert_eq!((lp, l), (true, false));

        let (lp, l) = EvexRoundingMode::RnSae.encode_ll_for_rounding(EvexVectorLength::VL256);
        assert_eq!((lp, l), (false, true));
    }

    #[test]
    fn test_all_evex_opcode_maps() {
        let maps = [1u8, 2, 3, 5, 6, 7];
        for &mm in &maps {
            assert!(EvexOpcodeMap::from_mm(mm).is_some());
        }
        assert!(EvexOpcodeMap::from_mm(0).is_none());
        assert!(EvexOpcodeMap::from_mm(4).is_none());
    }

    // ── Expanded EVEX Feature Tests ───────────────────────────────────────────

    #[test]
    fn test_evex_config_with_all_features() {
        let cfg = EvexPrefixConfig::new()
            .with_map(EvexOpcodeMap::Map0F38)
            .with_prefix(VexMandatoryPrefix::P66)
            .with_vector_length(EvexVectorLength::VL512)
            .with_dest_reg(16) // XMM16 → R'=1, R=0
            .with_vvvv(20) // XMM20 → V'=1
            .with_base_reg(18) // XMM18 → B'=1, B=0
            .with_index_reg(17) // XMM17 → X'=1, X=0
            .with_w(true)
            .with_opmask(EvexOpmaskConfig::zero(5))
            .with_broadcast(EvexBroadcastMode::Broadcast1To16);

        assert!(cfg.r_prime);
        assert!(!cfg.r);
        assert!(cfg.v_prime);
        assert!(cfg.b_prime);
        assert!(!cfg.b);
        assert!(cfg.x_prime);
        assert!(!cfg.x);
        assert!(cfg.w);
        assert_eq!(cfg.aaa, 5);
        assert!(cfg.z);
        assert!(cfg.b_bit);
        assert!(!cfg.can_compress_to_vex());
    }

    #[test]
    fn test_evex_vl128_config() {
        let cfg = EvexPrefixConfig::new().with_vector_length(EvexVectorLength::VL128);
        assert_eq!(cfg.ll_value(), 0);
        assert!(!cfg.l_prime);
        assert!(!cfg.l);
    }

    #[test]
    fn test_evex_vl256_config() {
        let cfg = EvexPrefixConfig::new().with_vector_length(EvexVectorLength::VL256);
        assert_eq!(cfg.ll_value(), 1);
        assert!(!cfg.l_prime);
        assert!(cfg.l);
    }

    #[test]
    fn test_evex_vl512_config() {
        let cfg = EvexPrefixConfig::new().with_vector_length(EvexVectorLength::VL512);
        assert_eq!(cfg.ll_value(), 2);
        assert!(cfg.l_prime);
        assert!(!cfg.l);
    }

    #[test]
    fn test_evex_with_ll_direct() {
        let cfg = EvexPrefixConfig::new().with_ll(1);
        assert_eq!(cfg.ll_value(), 1);
        assert!(!cfg.l_prime);
        assert!(cfg.l);

        let cfg = EvexPrefixConfig::new().with_ll(2);
        assert_eq!(cfg.ll_value(), 2);
        assert!(cfg.l_prime);
        assert!(!cfg.l);
    }

    #[test]
    fn test_evex_vector_length_to_vex() {
        assert_eq!(EvexVectorLength::VL128.to_vex_vl(), VexVectorLength::L128);
        assert_eq!(EvexVectorLength::VL256.to_vex_vl(), VexVectorLength::L256);
        // VL512 maps to L256 in VEX (closest match)
        assert_eq!(EvexVectorLength::VL512.to_vex_vl(), VexVectorLength::L256);
    }

    #[test]
    fn test_evex_vector_length_ll_value() {
        assert_eq!(EvexVectorLength::VL128.ll_value(), 0);
        assert_eq!(EvexVectorLength::VL256.ll_value(), 1);
        assert_eq!(EvexVectorLength::VL512.ll_value(), 2);
    }

    #[test]
    fn test_evex_tuple_multiplier_all_vls() {
        for vl in [
            EvexVectorLength::VL128,
            EvexVectorLength::VL256,
            EvexVectorLength::VL512,
        ] {
            // Full with 4-byte elements
            assert_eq!(EvexTupleType::Full.multiplier(vl, 4), 4);
            // Half
            let expected = vl.width_bytes() as u32 / 2;
            assert_eq!(
                EvexTupleType::Half.multiplier(vl, 4) as u32,
                expected.min(255)
            );
            // Mem128 is always 16
            assert_eq!(EvexTupleType::Mem128.multiplier(vl, 4), 16);
            // Scalar is element_size
            assert_eq!(EvexTupleType::Scalar.multiplier(vl, 8), 8);
        }
    }

    #[test]
    fn test_evex_broadcast_all_modes() {
        assert!(!EvexBroadcastMode::None.is_broadcast());
        assert!(EvexBroadcastMode::Broadcast1To2.is_broadcast());
        assert!(EvexBroadcastMode::Broadcast1To4.is_broadcast());
        assert!(EvexBroadcastMode::Broadcast1To8.is_broadcast());
        assert!(EvexBroadcastMode::Broadcast1To16.is_broadcast());
        assert!(EvexBroadcastMode::Broadcast1To32.is_broadcast());

        assert_eq!(EvexBroadcastMode::Broadcast1To2.element_count(), 2);
        assert_eq!(EvexBroadcastMode::Broadcast1To4.element_count(), 4);
        assert_eq!(EvexBroadcastMode::Broadcast1To8.element_count(), 8);
        assert_eq!(EvexBroadcastMode::Broadcast1To16.element_count(), 16);
        assert_eq!(EvexBroadcastMode::Broadcast1To32.element_count(), 32);
        assert_eq!(EvexBroadcastMode::None.element_count(), 1);
    }

    #[test]
    fn test_evex_broadcast_suffixes() {
        assert_eq!(EvexBroadcastMode::None.suffix(), "");
        assert_eq!(EvexBroadcastMode::Broadcast1To2.suffix(), "{1to2}");
        assert_eq!(EvexBroadcastMode::Broadcast1To4.suffix(), "{1to4}");
        assert_eq!(EvexBroadcastMode::Broadcast1To8.suffix(), "{1to8}");
        assert_eq!(EvexBroadcastMode::Broadcast1To16.suffix(), "{1to16}");
        assert_eq!(EvexBroadcastMode::Broadcast1To32.suffix(), "{1to32}");
    }

    #[test]
    fn test_evex_rounding_all_modes() {
        assert!(!EvexRoundingMode::None.is_active());
        assert!(EvexRoundingMode::RnSae.is_active());
        assert!(EvexRoundingMode::RdSae.is_active());
        assert!(EvexRoundingMode::RuSae.is_active());
        assert!(EvexRoundingMode::RzSae.is_active());
        assert!(EvexRoundingMode::Sae.is_active());

        assert!(!EvexRoundingMode::None.has_sae());
        assert!(EvexRoundingMode::RnSae.has_sae());
        assert!(EvexRoundingMode::Sae.has_sae());

        assert!(!EvexRoundingMode::None.has_explicit_rc());
        assert!(EvexRoundingMode::RnSae.has_explicit_rc());
        assert!(!EvexRoundingMode::Sae.has_explicit_rc());
    }

    #[test]
    fn test_evex_rounding_suffixes() {
        assert_eq!(EvexRoundingMode::None.suffix(), "");
        assert_eq!(EvexRoundingMode::RnSae.suffix(), "{rn-sae}");
        assert_eq!(EvexRoundingMode::RdSae.suffix(), "{rd-sae}");
        assert_eq!(EvexRoundingMode::RuSae.suffix(), "{ru-sae}");
        assert_eq!(EvexRoundingMode::RzSae.suffix(), "{rz-sae}");
        assert_eq!(EvexRoundingMode::Sae.suffix(), "{sae}");
    }

    #[test]
    fn test_evex_opmask_k0_no_mask() {
        let cfg = EvexOpmaskConfig::none();
        assert!(!cfg.has_active_mask());
        assert!(!cfg.has_zeroing());
        assert!(!cfg.has_merging());
        assert_eq!(cfg.opmask_reg, 0);
    }

    #[test]
    fn test_evex_opmask_k1_merge() {
        let cfg = EvexOpmaskConfig::merge(1);
        assert!(cfg.has_active_mask());
        assert!(!cfg.has_zeroing());
        assert!(cfg.has_merging());
    }

    #[test]
    fn test_evex_opmask_k7_zero() {
        let cfg = EvexOpmaskConfig::zero(7);
        assert!(cfg.has_active_mask());
        assert!(cfg.has_zeroing());
        assert!(!cfg.has_merging());
    }

    #[test]
    fn test_evex_opmask_new() {
        let cfg = EvexOpmaskConfig::new(3, true);
        assert_eq!(cfg.opmask_reg, 3);
        assert!(cfg.zeroing);
    }

    #[test]
    fn test_evex_compress_disp_negative() {
        let vl = EvexVectorLength::VL512;
        let compressed = EvexCompressedDisplacement::compress(-64, EvexTupleType::Full, vl, 4);
        assert_eq!(compressed, Some((-16i8) as u8)); // -64/4 = -16
    }

    #[test]
    fn test_evex_compress_disp_edge() {
        let vl = EvexVectorLength::VL512;
        // Max positive: 127 * N
        let max_disp = 127i32 * 4; // 508
        let compressed = EvexCompressedDisplacement::compress(max_disp, EvexTupleType::Full, vl, 4);
        assert_eq!(compressed, Some(127));

        // Min negative: -128 * N
        let min_disp = -128i32 * 4; // -512
        let compressed = EvexCompressedDisplacement::compress(min_disp, EvexTupleType::Full, vl, 4);
        assert_eq!(compressed, Some((-128i8) as u8));

        // Just outside
        assert!(EvexCompressedDisplacement::compress(512, EvexTupleType::Full, vl, 4).is_none());
        assert!(EvexCompressedDisplacement::compress(-516, EvexTupleType::Full, vl, 4).is_none());
    }

    #[test]
    fn test_evex_broadcast_disp_compression() {
        assert_eq!(
            EvexCompressedDisplacement::compress_broadcast(64, 4),
            Some(16)
        );
        assert_eq!(
            EvexCompressedDisplacement::compress_broadcast(64, 8),
            Some(8)
        );
        assert!(EvexCompressedDisplacement::compress_broadcast(65, 4).is_none());
    }

    #[test]
    fn test_evex_compressed_disp_table() {
        let table = EvexCompressedDisplacement::build_multiplier_table(EvexVectorLength::VL512);
        assert!(!table.is_empty());
        // Each entry should have a non-zero multiplier
        for (_, n) in &table {
            assert!(*n > 0);
        }
    }

    #[test]
    fn test_evex_to_vex_compression_map_types() {
        // Map5 cannot compress to VEX
        let cfg = EvexPrefixConfig::new().with_map(EvexOpcodeMap::Map5);
        assert!(EvexToVexCompressor::compress(&cfg).is_none());

        // Map6 cannot compress
        let cfg = EvexPrefixConfig::new().with_map(EvexOpcodeMap::Map6);
        assert!(EvexToVexCompressor::compress(&cfg).is_none());

        // Map7 cannot compress
        let cfg = EvexPrefixConfig::new().with_map(EvexOpcodeMap::Map7);
        assert!(EvexToVexCompressor::compress(&cfg).is_none());
    }

    #[test]
    fn test_evex_to_vex_blocker_count() {
        // A clean 128-bit EVEX should have 0 blockers
        let cfg = EvexPrefixConfig::new()
            .with_map(EvexOpcodeMap::Map0F)
            .with_vector_length(EvexVectorLength::VL128);
        assert!(EvexToVexCompressor::compression_blockers(&cfg).is_empty());
        assert!(EvexToVexCompressor::compress(&cfg).is_some());
    }

    #[test]
    fn test_evex_instruction_length_estimate() {
        // Common pattern: EVEX(4) + opcode(1) + ModRM(1) + compressed disp(1) = 7
        let len = EvexInstructionLength::estimate_common(true, false, true, false);
        assert_eq!(len, 7);

        // No ModR/M: EVEX(4) + opcode(1) = 5
        let len = EvexInstructionLength::estimate_common(false, false, false, false);
        assert_eq!(len, 5);
    }

    #[test]
    fn test_evex_encoded_instruction_display() {
        let config = EvexPrefixConfig::new().with_map(EvexOpcodeMap::Map0F);
        let mut instr = EvexEncodedInstruction::new(config);
        instr.evex_prefix = vec![0x62, 0xF1, 0x74, 0x08];
        instr.opcode = vec![0x58];
        instr.modrm = Some(0xC0);
        let s = format!("{}", instr);
        assert!(s.contains("EVEX"));
        assert!(s.contains("62"));
    }

    #[test]
    fn test_evex_decoded_display() {
        let d = EvexDecodedPrefix::decode(0xF1, 0x74, 0x8B);
        let s = format!("{}", d);
        assert!(s.contains("EVEX"));
        assert!(s.contains("R'="));
        assert!(s.contains("mm="));
    }

    #[test]
    fn test_evex_opcode_map_display() {
        assert_eq!(format!("{}", EvexOpcodeMap::Map0F), "0F");
        assert_eq!(format!("{}", EvexOpcodeMap::Map5), "MAP5");
    }

    #[test]
    fn test_evex_vector_length_display() {
        assert_eq!(format!("{}", EvexVectorLength::VL128), "128");
        assert_eq!(format!("{}", EvexVectorLength::VL256), "256");
        assert_eq!(format!("{}", EvexVectorLength::VL512), "512");
    }

    #[test]
    fn test_evex_rounding_mode_display() {
        assert_eq!(format!("{}", EvexRoundingMode::None), "");
        assert_eq!(format!("{}", EvexRoundingMode::RnSae), "{rn-sae}");
    }

    #[test]
    fn test_evex_broadcast_mode_display() {
        assert_eq!(format!("{}", EvexBroadcastMode::None), "");
        assert_eq!(format!("{}", EvexBroadcastMode::Broadcast1To8), "{1to8}");
    }

    #[test]
    fn test_evex_opmask_config_display() {
        assert_eq!(format!("{}", EvexOpmaskConfig::none()), "");
        let s = format!("{}", EvexOpmaskConfig::zero(3));
        assert!(s.contains("{k3}"));
        assert!(s.contains("{z}"));
    }

    #[test]
    fn test_evex_tuple_type_display() {
        assert_eq!(format!("{}", EvexTupleType::Full), "Full");
        assert_eq!(format!("{}", EvexTupleType::Mem128), "Mem128");
    }

    #[test]
    fn test_evex_encoding_with_all_rounding_combinations() {
        let enc = X86EVEXEncoding::new();
        for rounding in [
            EvexRoundingMode::RnSae,
            EvexRoundingMode::RdSae,
            EvexRoundingMode::RuSae,
            EvexRoundingMode::RzSae,
        ] {
            let cfg = enc.config_with_rounding(
                EvexOpcodeMap::Map0F,
                VexMandatoryPrefix::None,
                EvexVectorLength::VL512,
                0,
                1,
                2,
                false,
                rounding,
            );
            assert!(cfg.b_bit);
            assert!(rounding.is_active());
        }
    }

    #[test]
    fn test_evex_encoding_no_rounding_when_none() {
        let enc = X86EVEXEncoding::new();
        let cfg = enc.config_with_rounding(
            EvexOpcodeMap::Map0F,
            VexMandatoryPrefix::None,
            EvexVectorLength::VL512,
            0,
            1,
            2,
            false,
            EvexRoundingMode::None,
        );
        assert!(!cfg.b_bit);
    }

    #[test]
    fn test_evex_select_tuple_type_variants() {
        let enc = X86EVEXEncoding::new();
        for es in [1, 2, 4, 8] {
            let tt = enc.select_tuple_type(es, false);
            assert_eq!(tt, EvexTupleType::Full);
            let tt = enc.select_tuple_type(es, true);
            assert_eq!(tt, EvexTupleType::FullMem);
        }
    }

    #[test]
    fn test_evex_x86_encoding_defaults() {
        let enc = X86EVEXEncoding::default();
        assert_eq!(enc.default_vector_length, EvexVectorLength::VL512);
        assert!(enc.prefer_compressed_disp);
        assert!(enc.allow_evex_to_vex_compression);
    }

    #[test]
    fn test_evex_x86_encoding_builder() {
        let enc = X86EVEXEncoding::new()
            .with_default_vl(EvexVectorLength::VL256)
            .with_default_opmask(EvexOpmaskConfig::merge(2))
            .with_evex_to_vex_compression(false);

        assert_eq!(enc.default_vector_length, EvexVectorLength::VL256);
        assert_eq!(enc.default_opmask.opmask_reg, 2);
        assert!(!enc.allow_evex_to_vex_compression);
    }

    #[test]
    fn test_evex_config_prefix_byte_count() {
        let cfg = EvexPrefixConfig::new();
        assert_eq!(cfg.prefix_byte_count(), 4);
    }

    #[test]
    fn test_evex_p1_fixed_bit_present() {
        // P1 byte must always have bit 2 set
        let bytes = EvexPrefixBuilder::build_raw(
            false, false, false, false, false, false, EVEX_MM_0F, false, false, 0, 0, false, false,
            false, false, 0,
        );
        assert!(bytes[2] & EVEX_P1_FIXED_BIT != 0);
    }

    #[test]
    fn test_evex_effective_vvvv_with_vprime() {
        let decoded = EvexDecodedPrefix::decode(0xF1, 0x74, 0x00); // V'=1
        assert!(decoded.v_prime);
        // vvvv = 0x0E -> ~0x0E = 1
        let eff = decoded.effective_vvvv_reg();
        // V' is stored at P2[3], inverted: ~V' = 1 means V'=0, no high bit
        // In our decode: V' is from p1 & 0x08, but actually it's in p2[3]
        // Let's just verify it returns something valid (0-31)
        assert!(eff <= 31);
    }

    #[test]
    fn test_full_evex_encode_with_all_bells_and_whistles() {
        let enc = X86EVEXEncoding::new();
        // zmm20 {k5}{z}, zmm18, [r14 + 64] {1to16}
        let instr = enc.encode_broadcast(
            EvexOpcodeMap::Map0F,
            VexMandatoryPrefix::P66,
            EvexVectorLength::VL512,
            0x58, // vaddps
            20,   // dest = zmm20
            18,   // src1 = zmm18
            14,   // base = r14
            EvexBroadcastMode::Broadcast1To16,
            EvexOpmaskConfig::zero(5),
            64, // displacement
            4,  // element size (float)
        );
        assert!(instr.is_valid());
        assert!(instr.broadcast.is_broadcast());
        assert!(instr.opmask.has_zeroing());
        assert_eq!(instr.opmask.opmask_reg, 5);
        // compressed disp: 64/4 = 16
        assert_eq!(instr.displacement, vec![16u8]);
    }
}