The structural diagram shows the CPU internals and connections to memory and devices.
Displayed elements:
- Registers (A, F, B, C, D, E, H, L, SP, PC) with live hex values. Hover + click for inline editing.
- Multiplexer - shows which register drives the address bus (PC, SP, HL, BC, DE, WZ)
- Instruction decoder - current opcode and mnemonic
- ALU - operands (BR1, BR2) and result
- Address Buffer and Data Buffer - current bus values
- Cycle/tact counter - step and tact within instruction
- Micro-operation indicators - current tact actions
Bottom panels: Quick Access (Monitor Ctrl+M, Floppy Ctrl+F, other device buttons) and Speed (execution tempo).