kr580 1.0.0

Desktop KR580VM80 / Intel 8080 emulator.
Documentation
1
2
3
4
5
6
7
8
9
10
11
12
The KR580VM80A CPU architecture includes:

- Register block: eight 8-bit GPRs (B, C, D, E, H, L) paired as BC, DE, HL; plus W, Z temp registers
- ALU: 8-bit operations - add, subtract, AND/OR/XOR, compare, shift
- Accumulator (A): primary 8-bit register for all ALU operations
- Flags Register (F): S (sign), Z (zero), AC (aux carry), P (parity), CY (carry)
- Stack Pointer (SP): 16-bit, stack grows downward
- Program Counter (PC): 16-bit, auto-increments after each byte fetch
- Instruction Register (IR) and Decoder: decode the current opcode
- Address Buffer (16-bit) and Data Buffer (8-bit): external bus interface
- Multiplexer: routes address sources (PC, SP, HL, BC, DE, WZ)
- Increment/Decrement circuit: modifies 16-bit values (PC, SP, pairs)