#[doc = "Register `CTL0` reader"]
pub struct R(crate::R<CTL0_SPEC>);
impl core::ops::Deref for R {
type Target = crate::R<CTL0_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl core::convert::From<crate::R<CTL0_SPEC>> for R {
fn from(reader: crate::R<CTL0_SPEC>) -> Self {
R(reader)
}
}
#[doc = "Register `CTL0` writer"]
pub struct W(crate::W<CTL0_SPEC>);
impl core::ops::Deref for W {
type Target = crate::W<CTL0_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl core::ops::DerefMut for W {
#[inline(always)]
fn deref_mut(&mut self) -> &mut Self::Target {
&mut self.0
}
}
impl core::convert::From<crate::W<CTL0_SPEC>> for W {
fn from(writer: crate::W<CTL0_SPEC>) -> Self {
W(writer)
}
}
#[doc = "Clock division"]
pub type CKDIV_A = crate::gd32f190::timer0::ctl0::CKDIV_A;
#[doc = "Field `CKDIV` reader - Clock division"]
pub type CKDIV_R = crate::gd32f190::timer0::ctl0::CKDIV_R;
#[doc = "Field `CKDIV` writer - Clock division"]
pub struct CKDIV_W<'a> {
w: &'a mut W,
}
impl<'a> CKDIV_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: CKDIV_A) -> &'a mut W {
unsafe { self.bits(variant.into()) }
}
#[doc = "t_DTS = t_CK_INT"]
#[inline(always)]
pub fn div1(self) -> &'a mut W {
self.variant(CKDIV_A::DIV1)
}
#[doc = "t_DTS = 2 × t_CK_INT"]
#[inline(always)]
pub fn div2(self) -> &'a mut W {
self.variant(CKDIV_A::DIV2)
}
#[doc = "t_DTS = 4 × t_CK_INT"]
#[inline(always)]
pub fn div4(self) -> &'a mut W {
self.variant(CKDIV_A::DIV4)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub unsafe fn bits(self, value: u8) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x03 << 8)) | ((value as u16 & 0x03) << 8);
self.w
}
}
#[doc = "Auto-reload shadow enable"]
pub type ARSE_A = crate::gd32f190::timer0::ctl0::ARSE_A;
#[doc = "Field `ARSE` reader - Auto-reload shadow enable"]
pub type ARSE_R = crate::gd32f190::timer0::ctl0::ARSE_R;
#[doc = "Field `ARSE` writer - Auto-reload shadow enable"]
pub struct ARSE_W<'a> {
w: &'a mut W,
}
impl<'a> ARSE_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: ARSE_A) -> &'a mut W {
self.bit(variant.into())
}
#[doc = "The shadow register for CAR is disabled"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(ARSE_A::DISABLED)
}
#[doc = "The shadow register for CAR is enabled"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(ARSE_A::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u16 & 0x01) << 7);
self.w
}
}
#[doc = "Single pulse mode\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum SPM_A {
#[doc = "0: Counter is not stopped at update event"]
DISABLED = 0,
#[doc = "1: Counter stops counting at the next update event (clearing the CEN bit)"]
ENABLED = 1,
}
impl From<SPM_A> for bool {
#[inline(always)]
fn from(variant: SPM_A) -> Self {
variant as u8 != 0
}
}
#[doc = "Field `SPM` reader - Single pulse mode"]
pub struct SPM_R(crate::FieldReader<bool, SPM_A>);
impl SPM_R {
pub(crate) fn new(bits: bool) -> Self {
SPM_R(crate::FieldReader::new(bits))
}
#[doc = r"Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> SPM_A {
match self.bits {
false => SPM_A::DISABLED,
true => SPM_A::ENABLED,
}
}
#[doc = "Checks if the value of the field is `DISABLED`"]
#[inline(always)]
pub fn is_disabled(&self) -> bool {
**self == SPM_A::DISABLED
}
#[doc = "Checks if the value of the field is `ENABLED`"]
#[inline(always)]
pub fn is_enabled(&self) -> bool {
**self == SPM_A::ENABLED
}
}
impl core::ops::Deref for SPM_R {
type Target = crate::FieldReader<bool, SPM_A>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
#[doc = "Field `SPM` writer - Single pulse mode"]
pub struct SPM_W<'a> {
w: &'a mut W,
}
impl<'a> SPM_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: SPM_A) -> &'a mut W {
self.bit(variant.into())
}
#[doc = "Counter is not stopped at update event"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(SPM_A::DISABLED)
}
#[doc = "Counter stops counting at the next update event (clearing the CEN bit)"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(SPM_A::ENABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u16 & 0x01) << 3);
self.w
}
}
#[doc = "Update source"]
pub type UPS_A = crate::gd32f190::timer0::ctl0::UPS_A;
#[doc = "Field `UPS` reader - Update source"]
pub type UPS_R = crate::gd32f190::timer0::ctl0::UPS_R;
#[doc = "Field `UPS` writer - Update source"]
pub struct UPS_W<'a> {
w: &'a mut W,
}
impl<'a> UPS_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: UPS_A) -> &'a mut W {
self.bit(variant.into())
}
#[doc = "Any of counter overflow/underflow, setting UPG, or update through slave mode, generates an update interrupt or DMA request"]
#[inline(always)]
pub fn any_event(self) -> &'a mut W {
self.variant(UPS_A::ANYEVENT)
}
#[doc = "Only counter overflow/underflow generates an update interrupt or DMA request"]
#[inline(always)]
pub fn counter_only(self) -> &'a mut W {
self.variant(UPS_A::COUNTERONLY)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u16 & 0x01) << 2);
self.w
}
}
#[doc = "Update disable"]
pub type UPDIS_A = crate::gd32f190::timer0::ctl0::UPDIS_A;
#[doc = "Field `UPDIS` reader - Update disable"]
pub type UPDIS_R = crate::gd32f190::timer0::ctl0::UPDIS_R;
#[doc = "Field `UPDIS` writer - Update disable"]
pub struct UPDIS_W<'a> {
w: &'a mut W,
}
impl<'a> UPDIS_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: UPDIS_A) -> &'a mut W {
self.bit(variant.into())
}
#[doc = "Update event enabled"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(UPDIS_A::ENABLED)
}
#[doc = "Update event disabled"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(UPDIS_A::DISABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u16 & 0x01) << 1);
self.w
}
}
#[doc = "Counter enable"]
pub type CEN_A = crate::gd32f190::timer0::ctl0::UPDIS_A;
#[doc = "Field `CEN` reader - Counter enable"]
pub type CEN_R = crate::gd32f190::timer0::ctl0::UPDIS_R;
#[doc = "Field `CEN` writer - Counter enable"]
pub struct CEN_W<'a> {
w: &'a mut W,
}
impl<'a> CEN_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: CEN_A) -> &'a mut W {
self.bit(variant.into())
}
#[doc = "Update event enabled"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(CEN_A::ENABLED)
}
#[doc = "Update event disabled"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(CEN_A::DISABLED)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !0x01) | (value as u16 & 0x01);
self.w
}
}
impl R {
#[doc = "Bits 8:9 - Clock division"]
#[inline(always)]
pub fn ckdiv(&self) -> CKDIV_R {
CKDIV_R::new(((self.bits >> 8) & 0x03) as u8)
}
#[doc = "Bit 7 - Auto-reload shadow enable"]
#[inline(always)]
pub fn arse(&self) -> ARSE_R {
ARSE_R::new(((self.bits >> 7) & 0x01) != 0)
}
#[doc = "Bit 3 - Single pulse mode"]
#[inline(always)]
pub fn spm(&self) -> SPM_R {
SPM_R::new(((self.bits >> 3) & 0x01) != 0)
}
#[doc = "Bit 2 - Update source"]
#[inline(always)]
pub fn ups(&self) -> UPS_R {
UPS_R::new(((self.bits >> 2) & 0x01) != 0)
}
#[doc = "Bit 1 - Update disable"]
#[inline(always)]
pub fn updis(&self) -> UPDIS_R {
UPDIS_R::new(((self.bits >> 1) & 0x01) != 0)
}
#[doc = "Bit 0 - Counter enable"]
#[inline(always)]
pub fn cen(&self) -> CEN_R {
CEN_R::new((self.bits & 0x01) != 0)
}
}
impl W {
#[doc = "Bits 8:9 - Clock division"]
#[inline(always)]
pub fn ckdiv(&mut self) -> CKDIV_W {
CKDIV_W { w: self }
}
#[doc = "Bit 7 - Auto-reload shadow enable"]
#[inline(always)]
pub fn arse(&mut self) -> ARSE_W {
ARSE_W { w: self }
}
#[doc = "Bit 3 - Single pulse mode"]
#[inline(always)]
pub fn spm(&mut self) -> SPM_W {
SPM_W { w: self }
}
#[doc = "Bit 2 - Update source"]
#[inline(always)]
pub fn ups(&mut self) -> UPS_W {
UPS_W { w: self }
}
#[doc = "Bit 1 - Update disable"]
#[inline(always)]
pub fn updis(&mut self) -> UPDIS_W {
UPDIS_W { w: self }
}
#[doc = "Bit 0 - Counter enable"]
#[inline(always)]
pub fn cen(&mut self) -> CEN_W {
CEN_W { w: self }
}
#[doc = "Writes raw bits to the register."]
pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
self.0.bits(bits);
self
}
}
#[doc = "control register 0\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctl0](index.html) module"]
pub struct CTL0_SPEC;
impl crate::RegisterSpec for CTL0_SPEC {
type Ux = u16;
}
#[doc = "`read()` method returns [ctl0::R](R) reader structure"]
impl crate::Readable for CTL0_SPEC {
type Reader = R;
}
#[doc = "`write(|w| ..)` method takes [ctl0::W](W) writer structure"]
impl crate::Writable for CTL0_SPEC {
type Writer = W;
}
#[doc = "`reset()` method sets CTL0 to value 0"]
impl crate::Resettable for CTL0_SPEC {
#[inline(always)]
fn reset_value() -> Self::Ux {
0
}
}