#![doc = "Peripheral access API for ESP32-S2 microcontrollers (generated using svd2rust v0.28.0 ( ))\n\nYou can find an overview of the generated API [here].\n\nAPI features to be included in the [next] svd2rust release can be generated by cloning the svd2rust [repository], checking out the above commit, and running `cargo doc --open`.\n\n[here]: https://docs.rs/svd2rust/0.28.0/svd2rust/#peripheral-api\n[next]: https://github.com/rust-embedded/svd2rust/blob/master/CHANGELOG.md#unreleased\n[repository]: https://github.com/rust-embedded/svd2rust"]
#![deny(dead_code)]
#![deny(improper_ctypes)]
#![deny(missing_docs)]
#![deny(no_mangle_generic_items)]
#![deny(non_shorthand_field_patterns)]
#![deny(overflowing_literals)]
#![deny(path_statements)]
#![deny(patterns_in_fns_without_body)]
#![deny(private_in_public)]
#![deny(unconditional_recursion)]
#![deny(unused_allocation)]
#![deny(unused_comparisons)]
#![deny(unused_parens)]
#![deny(while_true)]
#![allow(non_camel_case_types)]
#![allow(non_snake_case)]
#![no_std]
use core::marker::PhantomData;
use core::ops::Deref;
#[doc = r"Number available in the NVIC for configuring priority"]
pub const NVIC_PRIO_BITS: u8 = 3;
#[allow(unused_imports)]
use generic::*;
#[doc = r"Common register and bit access and modify traits"]
pub mod generic;
#[cfg(feature = "rt")]
extern "C" {
fn WIFI_MAC();
fn WIFI_NMI();
fn WIFI_PWR();
fn WIFI_BB();
fn BT_MAC();
fn BT_BB();
fn BT_BB_NMI();
fn RWBT();
fn RWBLE();
fn RWBT_NMI();
fn RWBLE_NMI();
fn UHCI0();
fn UHCI1();
fn TG0_T0_LEVEL();
fn TG0_T1_LEVEL();
fn TG0_WDT_LEVEL();
fn TG0_LACT_LEVEL();
fn TG1_T0_LEVEL();
fn TG1_T1_LEVEL();
fn TG1_WDT_LEVEL();
fn TG1_LACT_LEVEL();
fn GPIO();
fn GPIO_NMI();
fn GPIO_INTR_2();
fn GPIO_NMI_2();
fn DEDICATED_GPIO();
fn FROM_CPU_INTR0();
fn FROM_CPU_INTR1();
fn FROM_CPU_INTR2();
fn FROM_CPU_INTR3();
fn SPI1();
fn SPI2();
fn SPI3();
fn UART0();
fn UART1();
fn UART2();
fn LEDC();
fn EFUSE();
fn TWAI();
fn USB();
fn RTC_CORE();
fn RMT();
fn PCNT();
fn I2C_EXT0();
fn I2C_EXT1();
fn RSA();
fn SHA();
fn AES();
fn SPI2_DMA();
fn SPI3_DMA();
fn TIMER1();
fn TIMER2();
fn TG0_T0_EDGE();
fn TG0_T1_EDGE();
fn TG0_WDT_EDGE();
fn TG0_LACT_EDGE();
fn TG1_T0_EDGE();
fn TG1_T1_EDGE();
fn TG1_WDT_EDGE();
fn TG1_LACT_EDGE();
fn CACHE_IA();
fn SYSTIMER_TARGET0();
fn SYSTIMER_TARGET1();
fn SYSTIMER_TARGET2();
fn PMS_PRO_IRAM0_ILG();
fn PMS_PRO_DRAM0_ILG();
fn PMS_PRO_DPORT_ILG();
fn PMS_PRO_AHB_ILG();
fn PMS_PRO_CACHE_ILG();
fn PMS_DMA_APB_I_ILG();
fn PMS_DMA_RX_I_ILG();
fn PMS_DMA_TX_I_ILG();
fn SPI0_REJECT_CACHE();
fn SPI4_DMA();
fn SPI4();
fn ICACHE_PRELOAD();
fn DCACHE_PRELOAD();
fn APB_ADC();
fn CPU_PERI_ERR();
fn APB_PERI_ERR();
fn DCACHE_SYNC();
fn ICACHE_SYNC();
}
#[doc(hidden)]
pub union Vector {
pub _handler: unsafe extern "C" fn(),
_reserved: u32,
}
#[cfg(feature = "rt")]
#[doc(hidden)]
pub static __INTERRUPTS: [Vector; 95] = [
Vector { _handler: WIFI_MAC },
Vector { _handler: WIFI_NMI },
Vector { _handler: WIFI_PWR },
Vector { _handler: WIFI_BB },
Vector { _handler: BT_MAC },
Vector { _handler: BT_BB },
Vector {
_handler: BT_BB_NMI,
},
Vector { _handler: RWBT },
Vector { _handler: RWBLE },
Vector { _handler: RWBT_NMI },
Vector {
_handler: RWBLE_NMI,
},
Vector { _reserved: 0 },
Vector { _reserved: 0 },
Vector { _handler: UHCI0 },
Vector { _handler: UHCI1 },
Vector {
_handler: TG0_T0_LEVEL,
},
Vector {
_handler: TG0_T1_LEVEL,
},
Vector {
_handler: TG0_WDT_LEVEL,
},
Vector {
_handler: TG0_LACT_LEVEL,
},
Vector {
_handler: TG1_T0_LEVEL,
},
Vector {
_handler: TG1_T1_LEVEL,
},
Vector {
_handler: TG1_WDT_LEVEL,
},
Vector {
_handler: TG1_LACT_LEVEL,
},
Vector { _handler: GPIO },
Vector { _handler: GPIO_NMI },
Vector {
_handler: GPIO_INTR_2,
},
Vector {
_handler: GPIO_NMI_2,
},
Vector {
_handler: DEDICATED_GPIO,
},
Vector {
_handler: FROM_CPU_INTR0,
},
Vector {
_handler: FROM_CPU_INTR1,
},
Vector {
_handler: FROM_CPU_INTR2,
},
Vector {
_handler: FROM_CPU_INTR3,
},
Vector { _handler: SPI1 },
Vector { _handler: SPI2 },
Vector { _handler: SPI3 },
Vector { _reserved: 0 },
Vector { _reserved: 0 },
Vector { _handler: UART0 },
Vector { _handler: UART1 },
Vector { _handler: UART2 },
Vector { _reserved: 0 },
Vector { _reserved: 0 },
Vector { _reserved: 0 },
Vector { _reserved: 0 },
Vector { _reserved: 0 },
Vector { _handler: LEDC },
Vector { _handler: EFUSE },
Vector { _handler: TWAI },
Vector { _handler: USB },
Vector { _handler: RTC_CORE },
Vector { _handler: RMT },
Vector { _handler: PCNT },
Vector { _handler: I2C_EXT0 },
Vector { _handler: I2C_EXT1 },
Vector { _handler: RSA },
Vector { _handler: SHA },
Vector { _handler: AES },
Vector { _handler: SPI2_DMA },
Vector { _handler: SPI3_DMA },
Vector { _reserved: 0 },
Vector { _handler: TIMER1 },
Vector { _handler: TIMER2 },
Vector {
_handler: TG0_T0_EDGE,
},
Vector {
_handler: TG0_T1_EDGE,
},
Vector {
_handler: TG0_WDT_EDGE,
},
Vector {
_handler: TG0_LACT_EDGE,
},
Vector {
_handler: TG1_T0_EDGE,
},
Vector {
_handler: TG1_T1_EDGE,
},
Vector {
_handler: TG1_WDT_EDGE,
},
Vector {
_handler: TG1_LACT_EDGE,
},
Vector { _handler: CACHE_IA },
Vector {
_handler: SYSTIMER_TARGET0,
},
Vector {
_handler: SYSTIMER_TARGET1,
},
Vector {
_handler: SYSTIMER_TARGET2,
},
Vector { _reserved: 0 },
Vector {
_handler: PMS_PRO_IRAM0_ILG,
},
Vector {
_handler: PMS_PRO_DRAM0_ILG,
},
Vector {
_handler: PMS_PRO_DPORT_ILG,
},
Vector {
_handler: PMS_PRO_AHB_ILG,
},
Vector {
_handler: PMS_PRO_CACHE_ILG,
},
Vector {
_handler: PMS_DMA_APB_I_ILG,
},
Vector {
_handler: PMS_DMA_RX_I_ILG,
},
Vector {
_handler: PMS_DMA_TX_I_ILG,
},
Vector {
_handler: SPI0_REJECT_CACHE,
},
Vector { _reserved: 0 },
Vector { _handler: SPI4_DMA },
Vector { _handler: SPI4 },
Vector {
_handler: ICACHE_PRELOAD,
},
Vector {
_handler: DCACHE_PRELOAD,
},
Vector { _handler: APB_ADC },
Vector { _reserved: 0 },
Vector {
_handler: CPU_PERI_ERR,
},
Vector {
_handler: APB_PERI_ERR,
},
Vector {
_handler: DCACHE_SYNC,
},
Vector {
_handler: ICACHE_SYNC,
},
];
#[doc = r"Enumeration of all the interrupts."]
#[derive(Copy, Clone, Debug, PartialEq, Eq)]
#[repr(u16)]
pub enum Interrupt {
#[doc = "0 - WIFI_MAC"]
WIFI_MAC = 0,
#[doc = "1 - WIFI_NMI"]
WIFI_NMI = 1,
#[doc = "2 - WIFI_PWR"]
WIFI_PWR = 2,
#[doc = "3 - WIFI_BB"]
WIFI_BB = 3,
#[doc = "4 - BT_MAC"]
BT_MAC = 4,
#[doc = "5 - BT_BB"]
BT_BB = 5,
#[doc = "6 - BT_BB_NMI"]
BT_BB_NMI = 6,
#[doc = "7 - RWBT"]
RWBT = 7,
#[doc = "8 - RWBLE"]
RWBLE = 8,
#[doc = "9 - RWBT_NMI"]
RWBT_NMI = 9,
#[doc = "10 - RWBLE_NMI"]
RWBLE_NMI = 10,
#[doc = "13 - UHCI0"]
UHCI0 = 13,
#[doc = "14 - UHCI1"]
UHCI1 = 14,
#[doc = "15 - TG0_T0_LEVEL"]
TG0_T0_LEVEL = 15,
#[doc = "16 - TG0_T1_LEVEL"]
TG0_T1_LEVEL = 16,
#[doc = "17 - TG0_WDT_LEVEL"]
TG0_WDT_LEVEL = 17,
#[doc = "18 - TG0_LACT_LEVEL"]
TG0_LACT_LEVEL = 18,
#[doc = "19 - TG1_T0_LEVEL"]
TG1_T0_LEVEL = 19,
#[doc = "20 - TG1_T1_LEVEL"]
TG1_T1_LEVEL = 20,
#[doc = "21 - TG1_WDT_LEVEL"]
TG1_WDT_LEVEL = 21,
#[doc = "22 - TG1_LACT_LEVEL"]
TG1_LACT_LEVEL = 22,
#[doc = "23 - GPIO"]
GPIO = 23,
#[doc = "24 - GPIO_NMI"]
GPIO_NMI = 24,
#[doc = "25 - GPIO_INTR_2"]
GPIO_INTR_2 = 25,
#[doc = "26 - GPIO_NMI_2"]
GPIO_NMI_2 = 26,
#[doc = "27 - DEDICATED_GPIO"]
DEDICATED_GPIO = 27,
#[doc = "28 - FROM_CPU_INTR0"]
FROM_CPU_INTR0 = 28,
#[doc = "29 - FROM_CPU_INTR1"]
FROM_CPU_INTR1 = 29,
#[doc = "30 - FROM_CPU_INTR2"]
FROM_CPU_INTR2 = 30,
#[doc = "31 - FROM_CPU_INTR3"]
FROM_CPU_INTR3 = 31,
#[doc = "32 - SPI1"]
SPI1 = 32,
#[doc = "33 - SPI2"]
SPI2 = 33,
#[doc = "34 - SPI3"]
SPI3 = 34,
#[doc = "37 - UART0"]
UART0 = 37,
#[doc = "38 - UART1"]
UART1 = 38,
#[doc = "39 - UART2"]
UART2 = 39,
#[doc = "45 - LEDC"]
LEDC = 45,
#[doc = "46 - EFUSE"]
EFUSE = 46,
#[doc = "47 - TWAI"]
TWAI = 47,
#[doc = "48 - USB"]
USB = 48,
#[doc = "49 - RTC_CORE"]
RTC_CORE = 49,
#[doc = "50 - RMT"]
RMT = 50,
#[doc = "51 - PCNT"]
PCNT = 51,
#[doc = "52 - I2C_EXT0"]
I2C_EXT0 = 52,
#[doc = "53 - I2C_EXT1"]
I2C_EXT1 = 53,
#[doc = "54 - RSA"]
RSA = 54,
#[doc = "55 - SHA"]
SHA = 55,
#[doc = "56 - AES"]
AES = 56,
#[doc = "57 - SPI2_DMA"]
SPI2_DMA = 57,
#[doc = "58 - SPI3_DMA"]
SPI3_DMA = 58,
#[doc = "60 - TIMER1"]
TIMER1 = 60,
#[doc = "61 - TIMER2"]
TIMER2 = 61,
#[doc = "62 - TG0_T0_EDGE"]
TG0_T0_EDGE = 62,
#[doc = "63 - TG0_T1_EDGE"]
TG0_T1_EDGE = 63,
#[doc = "64 - TG0_WDT_EDGE"]
TG0_WDT_EDGE = 64,
#[doc = "65 - TG0_LACT_EDGE"]
TG0_LACT_EDGE = 65,
#[doc = "66 - TG1_T0_EDGE"]
TG1_T0_EDGE = 66,
#[doc = "67 - TG1_T1_EDGE"]
TG1_T1_EDGE = 67,
#[doc = "68 - TG1_WDT_EDGE"]
TG1_WDT_EDGE = 68,
#[doc = "69 - TG1_LACT_EDGE"]
TG1_LACT_EDGE = 69,
#[doc = "70 - CACHE_IA"]
CACHE_IA = 70,
#[doc = "71 - SYSTIMER_TARGET0"]
SYSTIMER_TARGET0 = 71,
#[doc = "72 - SYSTIMER_TARGET1"]
SYSTIMER_TARGET1 = 72,
#[doc = "73 - SYSTIMER_TARGET2"]
SYSTIMER_TARGET2 = 73,
#[doc = "75 - PMS_PRO_IRAM0_ILG"]
PMS_PRO_IRAM0_ILG = 75,
#[doc = "76 - PMS_PRO_DRAM0_ILG"]
PMS_PRO_DRAM0_ILG = 76,
#[doc = "77 - PMS_PRO_DPORT_ILG"]
PMS_PRO_DPORT_ILG = 77,
#[doc = "78 - PMS_PRO_AHB_ILG"]
PMS_PRO_AHB_ILG = 78,
#[doc = "79 - PMS_PRO_CACHE_ILG"]
PMS_PRO_CACHE_ILG = 79,
#[doc = "80 - PMS_DMA_APB_I_ILG"]
PMS_DMA_APB_I_ILG = 80,
#[doc = "81 - PMS_DMA_RX_I_ILG"]
PMS_DMA_RX_I_ILG = 81,
#[doc = "82 - PMS_DMA_TX_I_ILG"]
PMS_DMA_TX_I_ILG = 82,
#[doc = "83 - SPI0_REJECT_CACHE"]
SPI0_REJECT_CACHE = 83,
#[doc = "85 - SPI4_DMA"]
SPI4_DMA = 85,
#[doc = "86 - SPI4"]
SPI4 = 86,
#[doc = "87 - ICACHE_PRELOAD"]
ICACHE_PRELOAD = 87,
#[doc = "88 - DCACHE_PRELOAD"]
DCACHE_PRELOAD = 88,
#[doc = "89 - APB_ADC"]
APB_ADC = 89,
#[doc = "91 - CPU_PERI_ERR"]
CPU_PERI_ERR = 91,
#[doc = "92 - APB_PERI_ERR"]
APB_PERI_ERR = 92,
#[doc = "93 - DCACHE_SYNC"]
DCACHE_SYNC = 93,
#[doc = "94 - ICACHE_SYNC"]
ICACHE_SYNC = 94,
}
unsafe impl xtensa_lx::interrupt::InterruptNumber for Interrupt {
#[inline(always)]
fn number(self) -> u16 {
self as u16
}
}
#[doc = r" TryFromInterruptError"]
#[derive(Debug, Copy, Clone)]
pub struct TryFromInterruptError(());
impl Interrupt {
#[doc = r" Attempt to convert a given value into an `Interrupt`"]
#[inline]
pub fn try_from(value: u16) -> Result<Self, TryFromInterruptError> {
match value {
0 => Ok(Interrupt::WIFI_MAC),
1 => Ok(Interrupt::WIFI_NMI),
2 => Ok(Interrupt::WIFI_PWR),
3 => Ok(Interrupt::WIFI_BB),
4 => Ok(Interrupt::BT_MAC),
5 => Ok(Interrupt::BT_BB),
6 => Ok(Interrupt::BT_BB_NMI),
7 => Ok(Interrupt::RWBT),
8 => Ok(Interrupt::RWBLE),
9 => Ok(Interrupt::RWBT_NMI),
10 => Ok(Interrupt::RWBLE_NMI),
13 => Ok(Interrupt::UHCI0),
14 => Ok(Interrupt::UHCI1),
15 => Ok(Interrupt::TG0_T0_LEVEL),
16 => Ok(Interrupt::TG0_T1_LEVEL),
17 => Ok(Interrupt::TG0_WDT_LEVEL),
18 => Ok(Interrupt::TG0_LACT_LEVEL),
19 => Ok(Interrupt::TG1_T0_LEVEL),
20 => Ok(Interrupt::TG1_T1_LEVEL),
21 => Ok(Interrupt::TG1_WDT_LEVEL),
22 => Ok(Interrupt::TG1_LACT_LEVEL),
23 => Ok(Interrupt::GPIO),
24 => Ok(Interrupt::GPIO_NMI),
25 => Ok(Interrupt::GPIO_INTR_2),
26 => Ok(Interrupt::GPIO_NMI_2),
27 => Ok(Interrupt::DEDICATED_GPIO),
28 => Ok(Interrupt::FROM_CPU_INTR0),
29 => Ok(Interrupt::FROM_CPU_INTR1),
30 => Ok(Interrupt::FROM_CPU_INTR2),
31 => Ok(Interrupt::FROM_CPU_INTR3),
32 => Ok(Interrupt::SPI1),
33 => Ok(Interrupt::SPI2),
34 => Ok(Interrupt::SPI3),
37 => Ok(Interrupt::UART0),
38 => Ok(Interrupt::UART1),
39 => Ok(Interrupt::UART2),
45 => Ok(Interrupt::LEDC),
46 => Ok(Interrupt::EFUSE),
47 => Ok(Interrupt::TWAI),
48 => Ok(Interrupt::USB),
49 => Ok(Interrupt::RTC_CORE),
50 => Ok(Interrupt::RMT),
51 => Ok(Interrupt::PCNT),
52 => Ok(Interrupt::I2C_EXT0),
53 => Ok(Interrupt::I2C_EXT1),
54 => Ok(Interrupt::RSA),
55 => Ok(Interrupt::SHA),
56 => Ok(Interrupt::AES),
57 => Ok(Interrupt::SPI2_DMA),
58 => Ok(Interrupt::SPI3_DMA),
60 => Ok(Interrupt::TIMER1),
61 => Ok(Interrupt::TIMER2),
62 => Ok(Interrupt::TG0_T0_EDGE),
63 => Ok(Interrupt::TG0_T1_EDGE),
64 => Ok(Interrupt::TG0_WDT_EDGE),
65 => Ok(Interrupt::TG0_LACT_EDGE),
66 => Ok(Interrupt::TG1_T0_EDGE),
67 => Ok(Interrupt::TG1_T1_EDGE),
68 => Ok(Interrupt::TG1_WDT_EDGE),
69 => Ok(Interrupt::TG1_LACT_EDGE),
70 => Ok(Interrupt::CACHE_IA),
71 => Ok(Interrupt::SYSTIMER_TARGET0),
72 => Ok(Interrupt::SYSTIMER_TARGET1),
73 => Ok(Interrupt::SYSTIMER_TARGET2),
75 => Ok(Interrupt::PMS_PRO_IRAM0_ILG),
76 => Ok(Interrupt::PMS_PRO_DRAM0_ILG),
77 => Ok(Interrupt::PMS_PRO_DPORT_ILG),
78 => Ok(Interrupt::PMS_PRO_AHB_ILG),
79 => Ok(Interrupt::PMS_PRO_CACHE_ILG),
80 => Ok(Interrupt::PMS_DMA_APB_I_ILG),
81 => Ok(Interrupt::PMS_DMA_RX_I_ILG),
82 => Ok(Interrupt::PMS_DMA_TX_I_ILG),
83 => Ok(Interrupt::SPI0_REJECT_CACHE),
85 => Ok(Interrupt::SPI4_DMA),
86 => Ok(Interrupt::SPI4),
87 => Ok(Interrupt::ICACHE_PRELOAD),
88 => Ok(Interrupt::DCACHE_PRELOAD),
89 => Ok(Interrupt::APB_ADC),
91 => Ok(Interrupt::CPU_PERI_ERR),
92 => Ok(Interrupt::APB_PERI_ERR),
93 => Ok(Interrupt::DCACHE_SYNC),
94 => Ok(Interrupt::ICACHE_SYNC),
_ => Err(TryFromInterruptError(())),
}
}
}
#[doc = "AES (Advanced Encryption Standard) Accelerator"]
pub struct AES {
_marker: PhantomData<*const ()>,
}
unsafe impl Send for AES {}
impl AES {
#[doc = r"Pointer to the register block"]
pub const PTR: *const aes::RegisterBlock = 0x6003_a000 as *const _;
#[doc = r"Return the pointer to the register block"]
#[inline(always)]
pub const fn ptr() -> *const aes::RegisterBlock {
Self::PTR
}
}
impl Deref for AES {
type Target = aes::RegisterBlock;
#[inline(always)]
fn deref(&self) -> &Self::Target {
unsafe { &*Self::PTR }
}
}
impl core::fmt::Debug for AES {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("AES").finish()
}
}
#[doc = "AES (Advanced Encryption Standard) Accelerator"]
pub mod aes;
#[doc = "Successive Approximation Register Analog to Digital Converter"]
pub struct APB_SARADC {
_marker: PhantomData<*const ()>,
}
unsafe impl Send for APB_SARADC {}
impl APB_SARADC {
#[doc = r"Pointer to the register block"]
pub const PTR: *const apb_saradc::RegisterBlock = 0x3f44_0000 as *const _;
#[doc = r"Return the pointer to the register block"]
#[inline(always)]
pub const fn ptr() -> *const apb_saradc::RegisterBlock {
Self::PTR
}
}
impl Deref for APB_SARADC {
type Target = apb_saradc::RegisterBlock;
#[inline(always)]
fn deref(&self) -> &Self::Target {
unsafe { &*Self::PTR }
}
}
impl core::fmt::Debug for APB_SARADC {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("APB_SARADC").finish()
}
}
#[doc = "Successive Approximation Register Analog to Digital Converter"]
pub mod apb_saradc;
#[doc = "Dedicated GPIO"]
pub struct DEDICATED_GPIO {
_marker: PhantomData<*const ()>,
}
unsafe impl Send for DEDICATED_GPIO {}
impl DEDICATED_GPIO {
#[doc = r"Pointer to the register block"]
pub const PTR: *const dedicated_gpio::RegisterBlock = 0x3f4c_f000 as *const _;
#[doc = r"Return the pointer to the register block"]
#[inline(always)]
pub const fn ptr() -> *const dedicated_gpio::RegisterBlock {
Self::PTR
}
}
impl Deref for DEDICATED_GPIO {
type Target = dedicated_gpio::RegisterBlock;
#[inline(always)]
fn deref(&self) -> &Self::Target {
unsafe { &*Self::PTR }
}
}
impl core::fmt::Debug for DEDICATED_GPIO {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("DEDICATED_GPIO").finish()
}
}
#[doc = "Dedicated GPIO"]
pub mod dedicated_gpio;
#[doc = "Digital Signature"]
pub struct DS {
_marker: PhantomData<*const ()>,
}
unsafe impl Send for DS {}
impl DS {
#[doc = r"Pointer to the register block"]
pub const PTR: *const ds::RegisterBlock = 0x6003_d000 as *const _;
#[doc = r"Return the pointer to the register block"]
#[inline(always)]
pub const fn ptr() -> *const ds::RegisterBlock {
Self::PTR
}
}
impl Deref for DS {
type Target = ds::RegisterBlock;
#[inline(always)]
fn deref(&self) -> &Self::Target {
unsafe { &*Self::PTR }
}
}
impl core::fmt::Debug for DS {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("DS").finish()
}
}
#[doc = "Digital Signature"]
pub mod ds;
#[doc = "eFuse Controller"]
pub struct EFUSE {
_marker: PhantomData<*const ()>,
}
unsafe impl Send for EFUSE {}
impl EFUSE {
#[doc = r"Pointer to the register block"]
pub const PTR: *const efuse::RegisterBlock = 0x3f41_a000 as *const _;
#[doc = r"Return the pointer to the register block"]
#[inline(always)]
pub const fn ptr() -> *const efuse::RegisterBlock {
Self::PTR
}
}
impl Deref for EFUSE {
type Target = efuse::RegisterBlock;
#[inline(always)]
fn deref(&self) -> &Self::Target {
unsafe { &*Self::PTR }
}
}
impl core::fmt::Debug for EFUSE {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("EFUSE").finish()
}
}
#[doc = "eFuse Controller"]
pub mod efuse;
#[doc = "External Memory"]
pub struct EXTMEM {
_marker: PhantomData<*const ()>,
}
unsafe impl Send for EXTMEM {}
impl EXTMEM {
#[doc = r"Pointer to the register block"]
pub const PTR: *const extmem::RegisterBlock = 0x6180_0000 as *const _;
#[doc = r"Return the pointer to the register block"]
#[inline(always)]
pub const fn ptr() -> *const extmem::RegisterBlock {
Self::PTR
}
}
impl Deref for EXTMEM {
type Target = extmem::RegisterBlock;
#[inline(always)]
fn deref(&self) -> &Self::Target {
unsafe { &*Self::PTR }
}
}
impl core::fmt::Debug for EXTMEM {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("EXTMEM").finish()
}
}
#[doc = "External Memory"]
pub mod extmem;
#[doc = "General Purpose Input/Output"]
pub struct GPIO {
_marker: PhantomData<*const ()>,
}
unsafe impl Send for GPIO {}
impl GPIO {
#[doc = r"Pointer to the register block"]
pub const PTR: *const gpio::RegisterBlock = 0x3f40_4000 as *const _;
#[doc = r"Return the pointer to the register block"]
#[inline(always)]
pub const fn ptr() -> *const gpio::RegisterBlock {
Self::PTR
}
}
impl Deref for GPIO {
type Target = gpio::RegisterBlock;
#[inline(always)]
fn deref(&self) -> &Self::Target {
unsafe { &*Self::PTR }
}
}
impl core::fmt::Debug for GPIO {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("GPIO").finish()
}
}
#[doc = "General Purpose Input/Output"]
pub mod gpio;
#[doc = "Sigma-Delta Modulation"]
pub struct GPIO_SD {
_marker: PhantomData<*const ()>,
}
unsafe impl Send for GPIO_SD {}
impl GPIO_SD {
#[doc = r"Pointer to the register block"]
pub const PTR: *const gpio_sd::RegisterBlock = 0x3f40_4f00 as *const _;
#[doc = r"Return the pointer to the register block"]
#[inline(always)]
pub const fn ptr() -> *const gpio_sd::RegisterBlock {
Self::PTR
}
}
impl Deref for GPIO_SD {
type Target = gpio_sd::RegisterBlock;
#[inline(always)]
fn deref(&self) -> &Self::Target {
unsafe { &*Self::PTR }
}
}
impl core::fmt::Debug for GPIO_SD {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("GPIO_SD").finish()
}
}
#[doc = "Sigma-Delta Modulation"]
pub mod gpio_sd;
#[doc = "HMAC (Hash-based Message Authentication Code) Accelerator"]
pub struct HMAC {
_marker: PhantomData<*const ()>,
}
unsafe impl Send for HMAC {}
impl HMAC {
#[doc = r"Pointer to the register block"]
pub const PTR: *const hmac::RegisterBlock = 0x6003_e000 as *const _;
#[doc = r"Return the pointer to the register block"]
#[inline(always)]
pub const fn ptr() -> *const hmac::RegisterBlock {
Self::PTR
}
}
impl Deref for HMAC {
type Target = hmac::RegisterBlock;
#[inline(always)]
fn deref(&self) -> &Self::Target {
unsafe { &*Self::PTR }
}
}
impl core::fmt::Debug for HMAC {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("HMAC").finish()
}
}
#[doc = "HMAC (Hash-based Message Authentication Code) Accelerator"]
pub mod hmac;
#[doc = "I2C (Inter-Integrated Circuit) Controller"]
pub struct I2C0 {
_marker: PhantomData<*const ()>,
}
unsafe impl Send for I2C0 {}
impl I2C0 {
#[doc = r"Pointer to the register block"]
pub const PTR: *const i2c0::RegisterBlock = 0x3f41_3000 as *const _;
#[doc = r"Return the pointer to the register block"]
#[inline(always)]
pub const fn ptr() -> *const i2c0::RegisterBlock {
Self::PTR
}
}
impl Deref for I2C0 {
type Target = i2c0::RegisterBlock;
#[inline(always)]
fn deref(&self) -> &Self::Target {
unsafe { &*Self::PTR }
}
}
impl core::fmt::Debug for I2C0 {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("I2C0").finish()
}
}
#[doc = "I2C (Inter-Integrated Circuit) Controller"]
pub mod i2c0;
#[doc = "I2C (Inter-Integrated Circuit) Controller"]
pub struct I2C1 {
_marker: PhantomData<*const ()>,
}
unsafe impl Send for I2C1 {}
impl I2C1 {
#[doc = r"Pointer to the register block"]
pub const PTR: *const i2c0::RegisterBlock = 0x3f42_7000 as *const _;
#[doc = r"Return the pointer to the register block"]
#[inline(always)]
pub const fn ptr() -> *const i2c0::RegisterBlock {
Self::PTR
}
}
impl Deref for I2C1 {
type Target = i2c0::RegisterBlock;
#[inline(always)]
fn deref(&self) -> &Self::Target {
unsafe { &*Self::PTR }
}
}
impl core::fmt::Debug for I2C1 {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("I2C1").finish()
}
}
#[doc = "I2C (Inter-Integrated Circuit) Controller"]
pub use self::i2c0 as i2c1;
#[doc = "I2S (Inter-IC Sound) Controller"]
pub struct I2S {
_marker: PhantomData<*const ()>,
}
unsafe impl Send for I2S {}
impl I2S {
#[doc = r"Pointer to the register block"]
pub const PTR: *const i2s::RegisterBlock = 0x3f40_f000 as *const _;
#[doc = r"Return the pointer to the register block"]
#[inline(always)]
pub const fn ptr() -> *const i2s::RegisterBlock {
Self::PTR
}
}
impl Deref for I2S {
type Target = i2s::RegisterBlock;
#[inline(always)]
fn deref(&self) -> &Self::Target {
unsafe { &*Self::PTR }
}
}
impl core::fmt::Debug for I2S {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("I2S").finish()
}
}
#[doc = "I2S (Inter-IC Sound) Controller"]
pub mod i2s;
#[doc = "Interrupt"]
pub struct INTERRUPT_CORE0 {
_marker: PhantomData<*const ()>,
}
unsafe impl Send for INTERRUPT_CORE0 {}
impl INTERRUPT_CORE0 {
#[doc = r"Pointer to the register block"]
pub const PTR: *const interrupt_core0::RegisterBlock = 0x3f4c_2000 as *const _;
#[doc = r"Return the pointer to the register block"]
#[inline(always)]
pub const fn ptr() -> *const interrupt_core0::RegisterBlock {
Self::PTR
}
}
impl Deref for INTERRUPT_CORE0 {
type Target = interrupt_core0::RegisterBlock;
#[inline(always)]
fn deref(&self) -> &Self::Target {
unsafe { &*Self::PTR }
}
}
impl core::fmt::Debug for INTERRUPT_CORE0 {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("INTERRUPT_CORE0").finish()
}
}
#[doc = "Interrupt"]
pub mod interrupt_core0;
#[doc = "Input/Output Multiplexer"]
pub struct IO_MUX {
_marker: PhantomData<*const ()>,
}
unsafe impl Send for IO_MUX {}
impl IO_MUX {
#[doc = r"Pointer to the register block"]
pub const PTR: *const io_mux::RegisterBlock = 0x3f40_9000 as *const _;
#[doc = r"Return the pointer to the register block"]
#[inline(always)]
pub const fn ptr() -> *const io_mux::RegisterBlock {
Self::PTR
}
}
impl Deref for IO_MUX {
type Target = io_mux::RegisterBlock;
#[inline(always)]
fn deref(&self) -> &Self::Target {
unsafe { &*Self::PTR }
}
}
impl core::fmt::Debug for IO_MUX {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("IO_MUX").finish()
}
}
#[doc = "Input/Output Multiplexer"]
pub mod io_mux;
#[doc = "LED PWM (Pulse Width Modulation) Controller"]
pub struct LEDC {
_marker: PhantomData<*const ()>,
}
unsafe impl Send for LEDC {}
impl LEDC {
#[doc = r"Pointer to the register block"]
pub const PTR: *const ledc::RegisterBlock = 0x3f41_9000 as *const _;
#[doc = r"Return the pointer to the register block"]
#[inline(always)]
pub const fn ptr() -> *const ledc::RegisterBlock {
Self::PTR
}
}
impl Deref for LEDC {
type Target = ledc::RegisterBlock;
#[inline(always)]
fn deref(&self) -> &Self::Target {
unsafe { &*Self::PTR }
}
}
impl core::fmt::Debug for LEDC {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("LEDC").finish()
}
}
#[doc = "LED PWM (Pulse Width Modulation) Controller"]
pub mod ledc;
#[doc = "Pulse Count Controller"]
pub struct PCNT {
_marker: PhantomData<*const ()>,
}
unsafe impl Send for PCNT {}
impl PCNT {
#[doc = r"Pointer to the register block"]
pub const PTR: *const pcnt::RegisterBlock = 0x3f41_7000 as *const _;
#[doc = r"Return the pointer to the register block"]
#[inline(always)]
pub const fn ptr() -> *const pcnt::RegisterBlock {
Self::PTR
}
}
impl Deref for PCNT {
type Target = pcnt::RegisterBlock;
#[inline(always)]
fn deref(&self) -> &Self::Target {
unsafe { &*Self::PTR }
}
}
impl core::fmt::Debug for PCNT {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("PCNT").finish()
}
}
#[doc = "Pulse Count Controller"]
pub mod pcnt;
#[doc = "Permissions Controller"]
pub struct PMS {
_marker: PhantomData<*const ()>,
}
unsafe impl Send for PMS {}
impl PMS {
#[doc = r"Pointer to the register block"]
pub const PTR: *const pms::RegisterBlock = 0x3f4c_1000 as *const _;
#[doc = r"Return the pointer to the register block"]
#[inline(always)]
pub const fn ptr() -> *const pms::RegisterBlock {
Self::PTR
}
}
impl Deref for PMS {
type Target = pms::RegisterBlock;
#[inline(always)]
fn deref(&self) -> &Self::Target {
unsafe { &*Self::PTR }
}
}
impl core::fmt::Debug for PMS {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("PMS").finish()
}
}
#[doc = "Permissions Controller"]
pub mod pms;
#[doc = "Remote Control Peripheral"]
pub struct RMT {
_marker: PhantomData<*const ()>,
}
unsafe impl Send for RMT {}
impl RMT {
#[doc = r"Pointer to the register block"]
pub const PTR: *const rmt::RegisterBlock = 0x3f41_6000 as *const _;
#[doc = r"Return the pointer to the register block"]
#[inline(always)]
pub const fn ptr() -> *const rmt::RegisterBlock {
Self::PTR
}
}
impl Deref for RMT {
type Target = rmt::RegisterBlock;
#[inline(always)]
fn deref(&self) -> &Self::Target {
unsafe { &*Self::PTR }
}
}
impl core::fmt::Debug for RMT {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("RMT").finish()
}
}
#[doc = "Remote Control Peripheral"]
pub mod rmt;
#[doc = "Hardware random number generator"]
pub struct RNG {
_marker: PhantomData<*const ()>,
}
unsafe impl Send for RNG {}
impl RNG {
#[doc = r"Pointer to the register block"]
pub const PTR: *const rng::RegisterBlock = 0x6003_5000 as *const _;
#[doc = r"Return the pointer to the register block"]
#[inline(always)]
pub const fn ptr() -> *const rng::RegisterBlock {
Self::PTR
}
}
impl Deref for RNG {
type Target = rng::RegisterBlock;
#[inline(always)]
fn deref(&self) -> &Self::Target {
unsafe { &*Self::PTR }
}
}
impl core::fmt::Debug for RNG {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("RNG").finish()
}
}
#[doc = "Hardware random number generator"]
pub mod rng;
#[doc = "RSA (Rivest Shamir Adleman) Accelerator"]
pub struct RSA {
_marker: PhantomData<*const ()>,
}
unsafe impl Send for RSA {}
impl RSA {
#[doc = r"Pointer to the register block"]
pub const PTR: *const rsa::RegisterBlock = 0x6003_c000 as *const _;
#[doc = r"Return the pointer to the register block"]
#[inline(always)]
pub const fn ptr() -> *const rsa::RegisterBlock {
Self::PTR
}
}
impl Deref for RSA {
type Target = rsa::RegisterBlock;
#[inline(always)]
fn deref(&self) -> &Self::Target {
unsafe { &*Self::PTR }
}
}
impl core::fmt::Debug for RSA {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("RSA").finish()
}
}
#[doc = "RSA (Rivest Shamir Adleman) Accelerator"]
pub mod rsa;
#[doc = "Peripheral RTCIO"]
pub struct RTCIO {
_marker: PhantomData<*const ()>,
}
unsafe impl Send for RTCIO {}
impl RTCIO {
#[doc = r"Pointer to the register block"]
pub const PTR: *const rtcio::RegisterBlock = 0x3f40_8400 as *const _;
#[doc = r"Return the pointer to the register block"]
#[inline(always)]
pub const fn ptr() -> *const rtcio::RegisterBlock {
Self::PTR
}
}
impl Deref for RTCIO {
type Target = rtcio::RegisterBlock;
#[inline(always)]
fn deref(&self) -> &Self::Target {
unsafe { &*Self::PTR }
}
}
impl core::fmt::Debug for RTCIO {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("RTCIO").finish()
}
}
#[doc = "Peripheral RTCIO"]
pub mod rtcio;
#[doc = "Real Time Controller"]
pub struct RTC_CNTL {
_marker: PhantomData<*const ()>,
}
unsafe impl Send for RTC_CNTL {}
impl RTC_CNTL {
#[doc = r"Pointer to the register block"]
pub const PTR: *const rtc_cntl::RegisterBlock = 0x3f40_8000 as *const _;
#[doc = r"Return the pointer to the register block"]
#[inline(always)]
pub const fn ptr() -> *const rtc_cntl::RegisterBlock {
Self::PTR
}
}
impl Deref for RTC_CNTL {
type Target = rtc_cntl::RegisterBlock;
#[inline(always)]
fn deref(&self) -> &Self::Target {
unsafe { &*Self::PTR }
}
}
impl core::fmt::Debug for RTC_CNTL {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("RTC_CNTL").finish()
}
}
#[doc = "Real Time Controller"]
pub mod rtc_cntl;
#[doc = "Peripheral RTC_I2C"]
pub struct RTC_I2C {
_marker: PhantomData<*const ()>,
}
unsafe impl Send for RTC_I2C {}
impl RTC_I2C {
#[doc = r"Pointer to the register block"]
pub const PTR: *const rtc_i2c::RegisterBlock = 0x3f40_8c00 as *const _;
#[doc = r"Return the pointer to the register block"]
#[inline(always)]
pub const fn ptr() -> *const rtc_i2c::RegisterBlock {
Self::PTR
}
}
impl Deref for RTC_I2C {
type Target = rtc_i2c::RegisterBlock;
#[inline(always)]
fn deref(&self) -> &Self::Target {
unsafe { &*Self::PTR }
}
}
impl core::fmt::Debug for RTC_I2C {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("RTC_I2C").finish()
}
}
#[doc = "Peripheral RTC_I2C"]
pub mod rtc_i2c;
#[doc = "Peripheral SENS"]
pub struct SENS {
_marker: PhantomData<*const ()>,
}
unsafe impl Send for SENS {}
impl SENS {
#[doc = r"Pointer to the register block"]
pub const PTR: *const sens::RegisterBlock = 0x3f40_8800 as *const _;
#[doc = r"Return the pointer to the register block"]
#[inline(always)]
pub const fn ptr() -> *const sens::RegisterBlock {
Self::PTR
}
}
impl Deref for SENS {
type Target = sens::RegisterBlock;
#[inline(always)]
fn deref(&self) -> &Self::Target {
unsafe { &*Self::PTR }
}
}
impl core::fmt::Debug for SENS {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("SENS").finish()
}
}
#[doc = "Peripheral SENS"]
pub mod sens;
#[doc = "SHA (Secure Hash Algorithm) Accelerator"]
pub struct SHA {
_marker: PhantomData<*const ()>,
}
unsafe impl Send for SHA {}
impl SHA {
#[doc = r"Pointer to the register block"]
pub const PTR: *const sha::RegisterBlock = 0x6003_b000 as *const _;
#[doc = r"Return the pointer to the register block"]
#[inline(always)]
pub const fn ptr() -> *const sha::RegisterBlock {
Self::PTR
}
}
impl Deref for SHA {
type Target = sha::RegisterBlock;
#[inline(always)]
fn deref(&self) -> &Self::Target {
unsafe { &*Self::PTR }
}
}
impl core::fmt::Debug for SHA {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("SHA").finish()
}
}
#[doc = "SHA (Secure Hash Algorithm) Accelerator"]
pub mod sha;
#[doc = "SPI (Serial Peripheral Interface) Controller"]
pub struct SPI0 {
_marker: PhantomData<*const ()>,
}
unsafe impl Send for SPI0 {}
impl SPI0 {
#[doc = r"Pointer to the register block"]
pub const PTR: *const spi0::RegisterBlock = 0x3f40_3000 as *const _;
#[doc = r"Return the pointer to the register block"]
#[inline(always)]
pub const fn ptr() -> *const spi0::RegisterBlock {
Self::PTR
}
}
impl Deref for SPI0 {
type Target = spi0::RegisterBlock;
#[inline(always)]
fn deref(&self) -> &Self::Target {
unsafe { &*Self::PTR }
}
}
impl core::fmt::Debug for SPI0 {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("SPI0").finish()
}
}
#[doc = "SPI (Serial Peripheral Interface) Controller"]
pub mod spi0;
#[doc = "SPI (Serial Peripheral Interface) Controller"]
pub struct SPI1 {
_marker: PhantomData<*const ()>,
}
unsafe impl Send for SPI1 {}
impl SPI1 {
#[doc = r"Pointer to the register block"]
pub const PTR: *const spi0::RegisterBlock = 0x3f40_2000 as *const _;
#[doc = r"Return the pointer to the register block"]
#[inline(always)]
pub const fn ptr() -> *const spi0::RegisterBlock {
Self::PTR
}
}
impl Deref for SPI1 {
type Target = spi0::RegisterBlock;
#[inline(always)]
fn deref(&self) -> &Self::Target {
unsafe { &*Self::PTR }
}
}
impl core::fmt::Debug for SPI1 {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("SPI1").finish()
}
}
#[doc = "SPI (Serial Peripheral Interface) Controller"]
pub use self::spi0 as spi1;
#[doc = "SPI (Serial Peripheral Interface) Controller"]
pub struct SPI2 {
_marker: PhantomData<*const ()>,
}
unsafe impl Send for SPI2 {}
impl SPI2 {
#[doc = r"Pointer to the register block"]
pub const PTR: *const spi0::RegisterBlock = 0x3f42_4000 as *const _;
#[doc = r"Return the pointer to the register block"]
#[inline(always)]
pub const fn ptr() -> *const spi0::RegisterBlock {
Self::PTR
}
}
impl Deref for SPI2 {
type Target = spi0::RegisterBlock;
#[inline(always)]
fn deref(&self) -> &Self::Target {
unsafe { &*Self::PTR }
}
}
impl core::fmt::Debug for SPI2 {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("SPI2").finish()
}
}
#[doc = "SPI (Serial Peripheral Interface) Controller"]
pub use self::spi0 as spi2;
#[doc = "SPI (Serial Peripheral Interface) Controller"]
pub struct SPI3 {
_marker: PhantomData<*const ()>,
}
unsafe impl Send for SPI3 {}
impl SPI3 {
#[doc = r"Pointer to the register block"]
pub const PTR: *const spi0::RegisterBlock = 0x3f42_5000 as *const _;
#[doc = r"Return the pointer to the register block"]
#[inline(always)]
pub const fn ptr() -> *const spi0::RegisterBlock {
Self::PTR
}
}
impl Deref for SPI3 {
type Target = spi0::RegisterBlock;
#[inline(always)]
fn deref(&self) -> &Self::Target {
unsafe { &*Self::PTR }
}
}
impl core::fmt::Debug for SPI3 {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("SPI3").finish()
}
}
#[doc = "SPI (Serial Peripheral Interface) Controller"]
pub use self::spi0 as spi3;
#[doc = "SPI (Serial Peripheral Interface) Controller"]
pub struct SPI4 {
_marker: PhantomData<*const ()>,
}
unsafe impl Send for SPI4 {}
impl SPI4 {
#[doc = r"Pointer to the register block"]
pub const PTR: *const spi0::RegisterBlock = 0x3f43_7000 as *const _;
#[doc = r"Return the pointer to the register block"]
#[inline(always)]
pub const fn ptr() -> *const spi0::RegisterBlock {
Self::PTR
}
}
impl Deref for SPI4 {
type Target = spi0::RegisterBlock;
#[inline(always)]
fn deref(&self) -> &Self::Target {
unsafe { &*Self::PTR }
}
}
impl core::fmt::Debug for SPI4 {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("SPI4").finish()
}
}
#[doc = "SPI (Serial Peripheral Interface) Controller"]
pub use self::spi0 as spi4;
#[doc = "System"]
pub struct SYSTEM {
_marker: PhantomData<*const ()>,
}
unsafe impl Send for SYSTEM {}
impl SYSTEM {
#[doc = r"Pointer to the register block"]
pub const PTR: *const system::RegisterBlock = 0x3f4c_0000 as *const _;
#[doc = r"Return the pointer to the register block"]
#[inline(always)]
pub const fn ptr() -> *const system::RegisterBlock {
Self::PTR
}
}
impl Deref for SYSTEM {
type Target = system::RegisterBlock;
#[inline(always)]
fn deref(&self) -> &Self::Target {
unsafe { &*Self::PTR }
}
}
impl core::fmt::Debug for SYSTEM {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("SYSTEM").finish()
}
}
#[doc = "System"]
pub mod system;
#[doc = "System Timer"]
pub struct SYSTIMER {
_marker: PhantomData<*const ()>,
}
unsafe impl Send for SYSTIMER {}
impl SYSTIMER {
#[doc = r"Pointer to the register block"]
pub const PTR: *const systimer::RegisterBlock = 0x3f42_3000 as *const _;
#[doc = r"Return the pointer to the register block"]
#[inline(always)]
pub const fn ptr() -> *const systimer::RegisterBlock {
Self::PTR
}
}
impl Deref for SYSTIMER {
type Target = systimer::RegisterBlock;
#[inline(always)]
fn deref(&self) -> &Self::Target {
unsafe { &*Self::PTR }
}
}
impl core::fmt::Debug for SYSTIMER {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("SYSTIMER").finish()
}
}
#[doc = "System Timer"]
pub mod systimer;
#[doc = "Timer Group"]
pub struct TIMG0 {
_marker: PhantomData<*const ()>,
}
unsafe impl Send for TIMG0 {}
impl TIMG0 {
#[doc = r"Pointer to the register block"]
pub const PTR: *const timg0::RegisterBlock = 0x3f41_f000 as *const _;
#[doc = r"Return the pointer to the register block"]
#[inline(always)]
pub const fn ptr() -> *const timg0::RegisterBlock {
Self::PTR
}
}
impl Deref for TIMG0 {
type Target = timg0::RegisterBlock;
#[inline(always)]
fn deref(&self) -> &Self::Target {
unsafe { &*Self::PTR }
}
}
impl core::fmt::Debug for TIMG0 {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("TIMG0").finish()
}
}
#[doc = "Timer Group"]
pub mod timg0;
#[doc = "Timer Group"]
pub struct TIMG1 {
_marker: PhantomData<*const ()>,
}
unsafe impl Send for TIMG1 {}
impl TIMG1 {
#[doc = r"Pointer to the register block"]
pub const PTR: *const timg0::RegisterBlock = 0x3f42_0000 as *const _;
#[doc = r"Return the pointer to the register block"]
#[inline(always)]
pub const fn ptr() -> *const timg0::RegisterBlock {
Self::PTR
}
}
impl Deref for TIMG1 {
type Target = timg0::RegisterBlock;
#[inline(always)]
fn deref(&self) -> &Self::Target {
unsafe { &*Self::PTR }
}
}
impl core::fmt::Debug for TIMG1 {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("TIMG1").finish()
}
}
#[doc = "Timer Group"]
pub use self::timg0 as timg1;
#[doc = "Two-Wire Automotive Interface"]
pub struct TWAI {
_marker: PhantomData<*const ()>,
}
unsafe impl Send for TWAI {}
impl TWAI {
#[doc = r"Pointer to the register block"]
pub const PTR: *const twai::RegisterBlock = 0x3f42_b000 as *const _;
#[doc = r"Return the pointer to the register block"]
#[inline(always)]
pub const fn ptr() -> *const twai::RegisterBlock {
Self::PTR
}
}
impl Deref for TWAI {
type Target = twai::RegisterBlock;
#[inline(always)]
fn deref(&self) -> &Self::Target {
unsafe { &*Self::PTR }
}
}
impl core::fmt::Debug for TWAI {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("TWAI").finish()
}
}
#[doc = "Two-Wire Automotive Interface"]
pub mod twai;
#[doc = "UART (Universal Asynchronous Receiver-Transmitter) Controller"]
pub struct UART0 {
_marker: PhantomData<*const ()>,
}
unsafe impl Send for UART0 {}
impl UART0 {
#[doc = r"Pointer to the register block"]
pub const PTR: *const uart0::RegisterBlock = 0x3f40_0000 as *const _;
#[doc = r"Return the pointer to the register block"]
#[inline(always)]
pub const fn ptr() -> *const uart0::RegisterBlock {
Self::PTR
}
}
impl Deref for UART0 {
type Target = uart0::RegisterBlock;
#[inline(always)]
fn deref(&self) -> &Self::Target {
unsafe { &*Self::PTR }
}
}
impl core::fmt::Debug for UART0 {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("UART0").finish()
}
}
#[doc = "UART (Universal Asynchronous Receiver-Transmitter) Controller"]
pub mod uart0;
#[doc = "UART (Universal Asynchronous Receiver-Transmitter) Controller"]
pub struct UART1 {
_marker: PhantomData<*const ()>,
}
unsafe impl Send for UART1 {}
impl UART1 {
#[doc = r"Pointer to the register block"]
pub const PTR: *const uart0::RegisterBlock = 0x3f41_0000 as *const _;
#[doc = r"Return the pointer to the register block"]
#[inline(always)]
pub const fn ptr() -> *const uart0::RegisterBlock {
Self::PTR
}
}
impl Deref for UART1 {
type Target = uart0::RegisterBlock;
#[inline(always)]
fn deref(&self) -> &Self::Target {
unsafe { &*Self::PTR }
}
}
impl core::fmt::Debug for UART1 {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("UART1").finish()
}
}
#[doc = "UART (Universal Asynchronous Receiver-Transmitter) Controller"]
pub use self::uart0 as uart1;
#[doc = "Universal Host Controller Interface"]
pub struct UHCI0 {
_marker: PhantomData<*const ()>,
}
unsafe impl Send for UHCI0 {}
impl UHCI0 {
#[doc = r"Pointer to the register block"]
pub const PTR: *const uhci0::RegisterBlock = 0x3f41_4000 as *const _;
#[doc = r"Return the pointer to the register block"]
#[inline(always)]
pub const fn ptr() -> *const uhci0::RegisterBlock {
Self::PTR
}
}
impl Deref for UHCI0 {
type Target = uhci0::RegisterBlock;
#[inline(always)]
fn deref(&self) -> &Self::Target {
unsafe { &*Self::PTR }
}
}
impl core::fmt::Debug for UHCI0 {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("UHCI0").finish()
}
}
#[doc = "Universal Host Controller Interface"]
pub mod uhci0;
#[doc = "USB OTG (On-The-Go)"]
pub struct USB0 {
_marker: PhantomData<*const ()>,
}
unsafe impl Send for USB0 {}
impl USB0 {
#[doc = r"Pointer to the register block"]
pub const PTR: *const usb0::RegisterBlock = 0x6008_0000 as *const _;
#[doc = r"Return the pointer to the register block"]
#[inline(always)]
pub const fn ptr() -> *const usb0::RegisterBlock {
Self::PTR
}
}
impl Deref for USB0 {
type Target = usb0::RegisterBlock;
#[inline(always)]
fn deref(&self) -> &Self::Target {
unsafe { &*Self::PTR }
}
}
impl core::fmt::Debug for USB0 {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("USB0").finish()
}
}
#[doc = "USB OTG (On-The-Go)"]
pub mod usb0;
#[doc = "Peripheral USB_WRAP"]
pub struct USB_WRAP {
_marker: PhantomData<*const ()>,
}
unsafe impl Send for USB_WRAP {}
impl USB_WRAP {
#[doc = r"Pointer to the register block"]
pub const PTR: *const usb_wrap::RegisterBlock = 0x3f43_9000 as *const _;
#[doc = r"Return the pointer to the register block"]
#[inline(always)]
pub const fn ptr() -> *const usb_wrap::RegisterBlock {
Self::PTR
}
}
impl Deref for USB_WRAP {
type Target = usb_wrap::RegisterBlock;
#[inline(always)]
fn deref(&self) -> &Self::Target {
unsafe { &*Self::PTR }
}
}
impl core::fmt::Debug for USB_WRAP {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("USB_WRAP").finish()
}
}
#[doc = "Peripheral USB_WRAP"]
pub mod usb_wrap;
#[doc = "XTS-AES-128 Flash Encryption"]
pub struct XTS_AES {
_marker: PhantomData<*const ()>,
}
unsafe impl Send for XTS_AES {}
impl XTS_AES {
#[doc = r"Pointer to the register block"]
pub const PTR: *const xts_aes::RegisterBlock = 0x6003_a100 as *const _;
#[doc = r"Return the pointer to the register block"]
#[inline(always)]
pub const fn ptr() -> *const xts_aes::RegisterBlock {
Self::PTR
}
}
impl Deref for XTS_AES {
type Target = xts_aes::RegisterBlock;
#[inline(always)]
fn deref(&self) -> &Self::Target {
unsafe { &*Self::PTR }
}
}
impl core::fmt::Debug for XTS_AES {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("XTS_AES").finish()
}
}
#[doc = "XTS-AES-128 Flash Encryption"]
pub mod xts_aes;
#[no_mangle]
static mut DEVICE_PERIPHERALS: bool = false;
#[doc = r" All the peripherals."]
#[allow(non_snake_case)]
pub struct Peripherals {
#[doc = "AES"]
pub AES: AES,
#[doc = "APB_SARADC"]
pub APB_SARADC: APB_SARADC,
#[doc = "DEDICATED_GPIO"]
pub DEDICATED_GPIO: DEDICATED_GPIO,
#[doc = "DS"]
pub DS: DS,
#[doc = "EFUSE"]
pub EFUSE: EFUSE,
#[doc = "EXTMEM"]
pub EXTMEM: EXTMEM,
#[doc = "GPIO"]
pub GPIO: GPIO,
#[doc = "GPIO_SD"]
pub GPIO_SD: GPIO_SD,
#[doc = "HMAC"]
pub HMAC: HMAC,
#[doc = "I2C0"]
pub I2C0: I2C0,
#[doc = "I2C1"]
pub I2C1: I2C1,
#[doc = "I2S"]
pub I2S: I2S,
#[doc = "INTERRUPT_CORE0"]
pub INTERRUPT_CORE0: INTERRUPT_CORE0,
#[doc = "IO_MUX"]
pub IO_MUX: IO_MUX,
#[doc = "LEDC"]
pub LEDC: LEDC,
#[doc = "PCNT"]
pub PCNT: PCNT,
#[doc = "PMS"]
pub PMS: PMS,
#[doc = "RMT"]
pub RMT: RMT,
#[doc = "RNG"]
pub RNG: RNG,
#[doc = "RSA"]
pub RSA: RSA,
#[doc = "RTCIO"]
pub RTCIO: RTCIO,
#[doc = "RTC_CNTL"]
pub RTC_CNTL: RTC_CNTL,
#[doc = "RTC_I2C"]
pub RTC_I2C: RTC_I2C,
#[doc = "SENS"]
pub SENS: SENS,
#[doc = "SHA"]
pub SHA: SHA,
#[doc = "SPI0"]
pub SPI0: SPI0,
#[doc = "SPI1"]
pub SPI1: SPI1,
#[doc = "SPI2"]
pub SPI2: SPI2,
#[doc = "SPI3"]
pub SPI3: SPI3,
#[doc = "SPI4"]
pub SPI4: SPI4,
#[doc = "SYSTEM"]
pub SYSTEM: SYSTEM,
#[doc = "SYSTIMER"]
pub SYSTIMER: SYSTIMER,
#[doc = "TIMG0"]
pub TIMG0: TIMG0,
#[doc = "TIMG1"]
pub TIMG1: TIMG1,
#[doc = "TWAI"]
pub TWAI: TWAI,
#[doc = "UART0"]
pub UART0: UART0,
#[doc = "UART1"]
pub UART1: UART1,
#[doc = "UHCI0"]
pub UHCI0: UHCI0,
#[doc = "USB0"]
pub USB0: USB0,
#[doc = "USB_WRAP"]
pub USB_WRAP: USB_WRAP,
#[doc = "XTS_AES"]
pub XTS_AES: XTS_AES,
}
impl Peripherals {
#[doc = r" Returns all the peripherals *once*."]
#[cfg(feature = "critical-section")]
#[inline]
pub fn take() -> Option<Self> {
critical_section::with(|_| {
if unsafe { DEVICE_PERIPHERALS } {
return None;
}
Some(unsafe { Peripherals::steal() })
})
}
#[doc = r" Unchecked version of `Peripherals::take`."]
#[doc = r""]
#[doc = r" # Safety"]
#[doc = r""]
#[doc = r" Each of the returned peripherals must be used at most once."]
#[inline]
pub unsafe fn steal() -> Self {
DEVICE_PERIPHERALS = true;
Peripherals {
AES: AES {
_marker: PhantomData,
},
APB_SARADC: APB_SARADC {
_marker: PhantomData,
},
DEDICATED_GPIO: DEDICATED_GPIO {
_marker: PhantomData,
},
DS: DS {
_marker: PhantomData,
},
EFUSE: EFUSE {
_marker: PhantomData,
},
EXTMEM: EXTMEM {
_marker: PhantomData,
},
GPIO: GPIO {
_marker: PhantomData,
},
GPIO_SD: GPIO_SD {
_marker: PhantomData,
},
HMAC: HMAC {
_marker: PhantomData,
},
I2C0: I2C0 {
_marker: PhantomData,
},
I2C1: I2C1 {
_marker: PhantomData,
},
I2S: I2S {
_marker: PhantomData,
},
INTERRUPT_CORE0: INTERRUPT_CORE0 {
_marker: PhantomData,
},
IO_MUX: IO_MUX {
_marker: PhantomData,
},
LEDC: LEDC {
_marker: PhantomData,
},
PCNT: PCNT {
_marker: PhantomData,
},
PMS: PMS {
_marker: PhantomData,
},
RMT: RMT {
_marker: PhantomData,
},
RNG: RNG {
_marker: PhantomData,
},
RSA: RSA {
_marker: PhantomData,
},
RTCIO: RTCIO {
_marker: PhantomData,
},
RTC_CNTL: RTC_CNTL {
_marker: PhantomData,
},
RTC_I2C: RTC_I2C {
_marker: PhantomData,
},
SENS: SENS {
_marker: PhantomData,
},
SHA: SHA {
_marker: PhantomData,
},
SPI0: SPI0 {
_marker: PhantomData,
},
SPI1: SPI1 {
_marker: PhantomData,
},
SPI2: SPI2 {
_marker: PhantomData,
},
SPI3: SPI3 {
_marker: PhantomData,
},
SPI4: SPI4 {
_marker: PhantomData,
},
SYSTEM: SYSTEM {
_marker: PhantomData,
},
SYSTIMER: SYSTIMER {
_marker: PhantomData,
},
TIMG0: TIMG0 {
_marker: PhantomData,
},
TIMG1: TIMG1 {
_marker: PhantomData,
},
TWAI: TWAI {
_marker: PhantomData,
},
UART0: UART0 {
_marker: PhantomData,
},
UART1: UART1 {
_marker: PhantomData,
},
UHCI0: UHCI0 {
_marker: PhantomData,
},
USB0: USB0 {
_marker: PhantomData,
},
USB_WRAP: USB_WRAP {
_marker: PhantomData,
},
XTS_AES: XTS_AES {
_marker: PhantomData,
},
}
}
}