esp32c5 0.2.2

Peripheral access crate for the ESP32-C5
Documentation 
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#[doc = "Register `EVT_ST0_CLR` writer"]
pub type W = crate::W<EVT_ST0_CLR_SPEC>;
#[doc = "Field `GPIO_EVT_CH0_RISE_EDGE_ST_CLR` writer - Configures whether or not to clear GPIO_evt_ch0_rise_edge trigger status.\\\\0: Invalid, No effect\\\\1: Clear"]
pub type GPIO_EVT_CH0_RISE_EDGE_ST_CLR_W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `GPIO_EVT_CH1_RISE_EDGE_ST_CLR` writer - Configures whether or not to clear GPIO_evt_ch1_rise_edge trigger status.\\\\0: Invalid, No effect\\\\1: Clear"]
pub type GPIO_EVT_CH1_RISE_EDGE_ST_CLR_W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `GPIO_EVT_CH2_RISE_EDGE_ST_CLR` writer - Configures whether or not to clear GPIO_evt_ch2_rise_edge trigger status.\\\\0: Invalid, No effect\\\\1: Clear"]
pub type GPIO_EVT_CH2_RISE_EDGE_ST_CLR_W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `GPIO_EVT_CH3_RISE_EDGE_ST_CLR` writer - Configures whether or not to clear GPIO_evt_ch3_rise_edge trigger status.\\\\0: Invalid, No effect\\\\1: Clear"]
pub type GPIO_EVT_CH3_RISE_EDGE_ST_CLR_W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `GPIO_EVT_CH4_RISE_EDGE_ST_CLR` writer - Configures whether or not to clear GPIO_evt_ch4_rise_edge trigger status.\\\\0: Invalid, No effect\\\\1: Clear"]
pub type GPIO_EVT_CH4_RISE_EDGE_ST_CLR_W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `GPIO_EVT_CH5_RISE_EDGE_ST_CLR` writer - Configures whether or not to clear GPIO_evt_ch5_rise_edge trigger status.\\\\0: Invalid, No effect\\\\1: Clear"]
pub type GPIO_EVT_CH5_RISE_EDGE_ST_CLR_W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `GPIO_EVT_CH6_RISE_EDGE_ST_CLR` writer - Configures whether or not to clear GPIO_evt_ch6_rise_edge trigger status.\\\\0: Invalid, No effect\\\\1: Clear"]
pub type GPIO_EVT_CH6_RISE_EDGE_ST_CLR_W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `GPIO_EVT_CH7_RISE_EDGE_ST_CLR` writer - Configures whether or not to clear GPIO_evt_ch7_rise_edge trigger status.\\\\0: Invalid, No effect\\\\1: Clear"]
pub type GPIO_EVT_CH7_RISE_EDGE_ST_CLR_W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `GPIO_EVT_CH0_FALL_EDGE_ST_CLR` writer - Configures whether or not to clear GPIO_evt_ch0_fall_edge trigger status.\\\\0: Invalid, No effect\\\\1: Clear"]
pub type GPIO_EVT_CH0_FALL_EDGE_ST_CLR_W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `GPIO_EVT_CH1_FALL_EDGE_ST_CLR` writer - Configures whether or not to clear GPIO_evt_ch1_fall_edge trigger status.\\\\0: Invalid, No effect\\\\1: Clear"]
pub type GPIO_EVT_CH1_FALL_EDGE_ST_CLR_W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `GPIO_EVT_CH2_FALL_EDGE_ST_CLR` writer - Configures whether or not to clear GPIO_evt_ch2_fall_edge trigger status.\\\\0: Invalid, No effect\\\\1: Clear"]
pub type GPIO_EVT_CH2_FALL_EDGE_ST_CLR_W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `GPIO_EVT_CH3_FALL_EDGE_ST_CLR` writer - Configures whether or not to clear GPIO_evt_ch3_fall_edge trigger status.\\\\0: Invalid, No effect\\\\1: Clear"]
pub type GPIO_EVT_CH3_FALL_EDGE_ST_CLR_W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `GPIO_EVT_CH4_FALL_EDGE_ST_CLR` writer - Configures whether or not to clear GPIO_evt_ch4_fall_edge trigger status.\\\\0: Invalid, No effect\\\\1: Clear"]
pub type GPIO_EVT_CH4_FALL_EDGE_ST_CLR_W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `GPIO_EVT_CH5_FALL_EDGE_ST_CLR` writer - Configures whether or not to clear GPIO_evt_ch5_fall_edge trigger status.\\\\0: Invalid, No effect\\\\1: Clear"]
pub type GPIO_EVT_CH5_FALL_EDGE_ST_CLR_W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `GPIO_EVT_CH6_FALL_EDGE_ST_CLR` writer - Configures whether or not to clear GPIO_evt_ch6_fall_edge trigger status.\\\\0: Invalid, No effect\\\\1: Clear"]
pub type GPIO_EVT_CH6_FALL_EDGE_ST_CLR_W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `GPIO_EVT_CH7_FALL_EDGE_ST_CLR` writer - Configures whether or not to clear GPIO_evt_ch7_fall_edge trigger status.\\\\0: Invalid, No effect\\\\1: Clear"]
pub type GPIO_EVT_CH7_FALL_EDGE_ST_CLR_W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `GPIO_EVT_CH0_ANY_EDGE_ST_CLR` writer - Configures whether or not to clear GPIO_evt_ch0_any_edge trigger status.\\\\0: Invalid, No effect\\\\1: Clear"]
pub type GPIO_EVT_CH0_ANY_EDGE_ST_CLR_W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `GPIO_EVT_CH1_ANY_EDGE_ST_CLR` writer - Configures whether or not to clear GPIO_evt_ch1_any_edge trigger status.\\\\0: Invalid, No effect\\\\1: Clear"]
pub type GPIO_EVT_CH1_ANY_EDGE_ST_CLR_W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `GPIO_EVT_CH2_ANY_EDGE_ST_CLR` writer - Configures whether or not to clear GPIO_evt_ch2_any_edge trigger status.\\\\0: Invalid, No effect\\\\1: Clear"]
pub type GPIO_EVT_CH2_ANY_EDGE_ST_CLR_W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `GPIO_EVT_CH3_ANY_EDGE_ST_CLR` writer - Configures whether or not to clear GPIO_evt_ch3_any_edge trigger status.\\\\0: Invalid, No effect\\\\1: Clear"]
pub type GPIO_EVT_CH3_ANY_EDGE_ST_CLR_W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `GPIO_EVT_CH4_ANY_EDGE_ST_CLR` writer - Configures whether or not to clear GPIO_evt_ch4_any_edge trigger status.\\\\0: Invalid, No effect\\\\1: Clear"]
pub type GPIO_EVT_CH4_ANY_EDGE_ST_CLR_W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `GPIO_EVT_CH5_ANY_EDGE_ST_CLR` writer - Configures whether or not to clear GPIO_evt_ch5_any_edge trigger status.\\\\0: Invalid, No effect\\\\1: Clear"]
pub type GPIO_EVT_CH5_ANY_EDGE_ST_CLR_W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `GPIO_EVT_CH6_ANY_EDGE_ST_CLR` writer - Configures whether or not to clear GPIO_evt_ch6_any_edge trigger status.\\\\0: Invalid, No effect\\\\1: Clear"]
pub type GPIO_EVT_CH6_ANY_EDGE_ST_CLR_W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `GPIO_EVT_CH7_ANY_EDGE_ST_CLR` writer - Configures whether or not to clear GPIO_evt_ch7_any_edge trigger status.\\\\0: Invalid, No effect\\\\1: Clear"]
pub type GPIO_EVT_CH7_ANY_EDGE_ST_CLR_W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `GPIO_EVT_ZERO_DET_POS0_ST_CLR` writer - Configures whether or not to clear GPIO_evt_zero_det_pos0 trigger status.\\\\0: Invalid, No effect\\\\1: Clear"]
pub type GPIO_EVT_ZERO_DET_POS0_ST_CLR_W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `GPIO_EVT_ZERO_DET_NEG0_ST_CLR` writer - Configures whether or not to clear GPIO_evt_zero_det_neg0 trigger status.\\\\0: Invalid, No effect\\\\1: Clear"]
pub type GPIO_EVT_ZERO_DET_NEG0_ST_CLR_W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `LEDC_EVT_DUTY_CHNG_END_CH0_ST_CLR` writer - Configures whether or not to clear LEDC_evt_duty_chng_end_ch0 trigger status.\\\\0: Invalid, No effect\\\\1: Clear"]
pub type LEDC_EVT_DUTY_CHNG_END_CH0_ST_CLR_W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `LEDC_EVT_DUTY_CHNG_END_CH1_ST_CLR` writer - Configures whether or not to clear LEDC_evt_duty_chng_end_ch1 trigger status.\\\\0: Invalid, No effect\\\\1: Clear"]
pub type LEDC_EVT_DUTY_CHNG_END_CH1_ST_CLR_W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `LEDC_EVT_DUTY_CHNG_END_CH2_ST_CLR` writer - Configures whether or not to clear LEDC_evt_duty_chng_end_ch2 trigger status.\\\\0: Invalid, No effect\\\\1: Clear"]
pub type LEDC_EVT_DUTY_CHNG_END_CH2_ST_CLR_W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `LEDC_EVT_DUTY_CHNG_END_CH3_ST_CLR` writer - Configures whether or not to clear LEDC_evt_duty_chng_end_ch3 trigger status.\\\\0: Invalid, No effect\\\\1: Clear"]
pub type LEDC_EVT_DUTY_CHNG_END_CH3_ST_CLR_W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `LEDC_EVT_DUTY_CHNG_END_CH4_ST_CLR` writer - Configures whether or not to clear LEDC_evt_duty_chng_end_ch4 trigger status.\\\\0: Invalid, No effect\\\\1: Clear"]
pub type LEDC_EVT_DUTY_CHNG_END_CH4_ST_CLR_W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `LEDC_EVT_DUTY_CHNG_END_CH5_ST_CLR` writer - Configures whether or not to clear LEDC_evt_duty_chng_end_ch5 trigger status.\\\\0: Invalid, No effect\\\\1: Clear"]
pub type LEDC_EVT_DUTY_CHNG_END_CH5_ST_CLR_W<'a, REG> = crate::BitWriter<'a, REG>;
#[cfg(feature = "impl-register-debug")]
impl core::fmt::Debug for crate::generic::Reg<EVT_ST0_CLR_SPEC> {
    fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
        write!(f, "(not readable)")
    }
}
impl W {
    #[doc = "Bit 0 - Configures whether or not to clear GPIO_evt_ch0_rise_edge trigger status.\\\\0: Invalid, No effect\\\\1: Clear"]
    #[inline(always)]
    pub fn gpio_evt_ch0_rise_edge_st_clr(
        &mut self,
    ) -> GPIO_EVT_CH0_RISE_EDGE_ST_CLR_W<'_, EVT_ST0_CLR_SPEC> {
        GPIO_EVT_CH0_RISE_EDGE_ST_CLR_W::new(self, 0)
    }
    #[doc = "Bit 1 - Configures whether or not to clear GPIO_evt_ch1_rise_edge trigger status.\\\\0: Invalid, No effect\\\\1: Clear"]
    #[inline(always)]
    pub fn gpio_evt_ch1_rise_edge_st_clr(
        &mut self,
    ) -> GPIO_EVT_CH1_RISE_EDGE_ST_CLR_W<'_, EVT_ST0_CLR_SPEC> {
        GPIO_EVT_CH1_RISE_EDGE_ST_CLR_W::new(self, 1)
    }
    #[doc = "Bit 2 - Configures whether or not to clear GPIO_evt_ch2_rise_edge trigger status.\\\\0: Invalid, No effect\\\\1: Clear"]
    #[inline(always)]
    pub fn gpio_evt_ch2_rise_edge_st_clr(
        &mut self,
    ) -> GPIO_EVT_CH2_RISE_EDGE_ST_CLR_W<'_, EVT_ST0_CLR_SPEC> {
        GPIO_EVT_CH2_RISE_EDGE_ST_CLR_W::new(self, 2)
    }
    #[doc = "Bit 3 - Configures whether or not to clear GPIO_evt_ch3_rise_edge trigger status.\\\\0: Invalid, No effect\\\\1: Clear"]
    #[inline(always)]
    pub fn gpio_evt_ch3_rise_edge_st_clr(
        &mut self,
    ) -> GPIO_EVT_CH3_RISE_EDGE_ST_CLR_W<'_, EVT_ST0_CLR_SPEC> {
        GPIO_EVT_CH3_RISE_EDGE_ST_CLR_W::new(self, 3)
    }
    #[doc = "Bit 4 - Configures whether or not to clear GPIO_evt_ch4_rise_edge trigger status.\\\\0: Invalid, No effect\\\\1: Clear"]
    #[inline(always)]
    pub fn gpio_evt_ch4_rise_edge_st_clr(
        &mut self,
    ) -> GPIO_EVT_CH4_RISE_EDGE_ST_CLR_W<'_, EVT_ST0_CLR_SPEC> {
        GPIO_EVT_CH4_RISE_EDGE_ST_CLR_W::new(self, 4)
    }
    #[doc = "Bit 5 - Configures whether or not to clear GPIO_evt_ch5_rise_edge trigger status.\\\\0: Invalid, No effect\\\\1: Clear"]
    #[inline(always)]
    pub fn gpio_evt_ch5_rise_edge_st_clr(
        &mut self,
    ) -> GPIO_EVT_CH5_RISE_EDGE_ST_CLR_W<'_, EVT_ST0_CLR_SPEC> {
        GPIO_EVT_CH5_RISE_EDGE_ST_CLR_W::new(self, 5)
    }
    #[doc = "Bit 6 - Configures whether or not to clear GPIO_evt_ch6_rise_edge trigger status.\\\\0: Invalid, No effect\\\\1: Clear"]
    #[inline(always)]
    pub fn gpio_evt_ch6_rise_edge_st_clr(
        &mut self,
    ) -> GPIO_EVT_CH6_RISE_EDGE_ST_CLR_W<'_, EVT_ST0_CLR_SPEC> {
        GPIO_EVT_CH6_RISE_EDGE_ST_CLR_W::new(self, 6)
    }
    #[doc = "Bit 7 - Configures whether or not to clear GPIO_evt_ch7_rise_edge trigger status.\\\\0: Invalid, No effect\\\\1: Clear"]
    #[inline(always)]
    pub fn gpio_evt_ch7_rise_edge_st_clr(
        &mut self,
    ) -> GPIO_EVT_CH7_RISE_EDGE_ST_CLR_W<'_, EVT_ST0_CLR_SPEC> {
        GPIO_EVT_CH7_RISE_EDGE_ST_CLR_W::new(self, 7)
    }
    #[doc = "Bit 8 - Configures whether or not to clear GPIO_evt_ch0_fall_edge trigger status.\\\\0: Invalid, No effect\\\\1: Clear"]
    #[inline(always)]
    pub fn gpio_evt_ch0_fall_edge_st_clr(
        &mut self,
    ) -> GPIO_EVT_CH0_FALL_EDGE_ST_CLR_W<'_, EVT_ST0_CLR_SPEC> {
        GPIO_EVT_CH0_FALL_EDGE_ST_CLR_W::new(self, 8)
    }
    #[doc = "Bit 9 - Configures whether or not to clear GPIO_evt_ch1_fall_edge trigger status.\\\\0: Invalid, No effect\\\\1: Clear"]
    #[inline(always)]
    pub fn gpio_evt_ch1_fall_edge_st_clr(
        &mut self,
    ) -> GPIO_EVT_CH1_FALL_EDGE_ST_CLR_W<'_, EVT_ST0_CLR_SPEC> {
        GPIO_EVT_CH1_FALL_EDGE_ST_CLR_W::new(self, 9)
    }
    #[doc = "Bit 10 - Configures whether or not to clear GPIO_evt_ch2_fall_edge trigger status.\\\\0: Invalid, No effect\\\\1: Clear"]
    #[inline(always)]
    pub fn gpio_evt_ch2_fall_edge_st_clr(
        &mut self,
    ) -> GPIO_EVT_CH2_FALL_EDGE_ST_CLR_W<'_, EVT_ST0_CLR_SPEC> {
        GPIO_EVT_CH2_FALL_EDGE_ST_CLR_W::new(self, 10)
    }
    #[doc = "Bit 11 - Configures whether or not to clear GPIO_evt_ch3_fall_edge trigger status.\\\\0: Invalid, No effect\\\\1: Clear"]
    #[inline(always)]
    pub fn gpio_evt_ch3_fall_edge_st_clr(
        &mut self,
    ) -> GPIO_EVT_CH3_FALL_EDGE_ST_CLR_W<'_, EVT_ST0_CLR_SPEC> {
        GPIO_EVT_CH3_FALL_EDGE_ST_CLR_W::new(self, 11)
    }
    #[doc = "Bit 12 - Configures whether or not to clear GPIO_evt_ch4_fall_edge trigger status.\\\\0: Invalid, No effect\\\\1: Clear"]
    #[inline(always)]
    pub fn gpio_evt_ch4_fall_edge_st_clr(
        &mut self,
    ) -> GPIO_EVT_CH4_FALL_EDGE_ST_CLR_W<'_, EVT_ST0_CLR_SPEC> {
        GPIO_EVT_CH4_FALL_EDGE_ST_CLR_W::new(self, 12)
    }
    #[doc = "Bit 13 - Configures whether or not to clear GPIO_evt_ch5_fall_edge trigger status.\\\\0: Invalid, No effect\\\\1: Clear"]
    #[inline(always)]
    pub fn gpio_evt_ch5_fall_edge_st_clr(
        &mut self,
    ) -> GPIO_EVT_CH5_FALL_EDGE_ST_CLR_W<'_, EVT_ST0_CLR_SPEC> {
        GPIO_EVT_CH5_FALL_EDGE_ST_CLR_W::new(self, 13)
    }
    #[doc = "Bit 14 - Configures whether or not to clear GPIO_evt_ch6_fall_edge trigger status.\\\\0: Invalid, No effect\\\\1: Clear"]
    #[inline(always)]
    pub fn gpio_evt_ch6_fall_edge_st_clr(
        &mut self,
    ) -> GPIO_EVT_CH6_FALL_EDGE_ST_CLR_W<'_, EVT_ST0_CLR_SPEC> {
        GPIO_EVT_CH6_FALL_EDGE_ST_CLR_W::new(self, 14)
    }
    #[doc = "Bit 15 - Configures whether or not to clear GPIO_evt_ch7_fall_edge trigger status.\\\\0: Invalid, No effect\\\\1: Clear"]
    #[inline(always)]
    pub fn gpio_evt_ch7_fall_edge_st_clr(
        &mut self,
    ) -> GPIO_EVT_CH7_FALL_EDGE_ST_CLR_W<'_, EVT_ST0_CLR_SPEC> {
        GPIO_EVT_CH7_FALL_EDGE_ST_CLR_W::new(self, 15)
    }
    #[doc = "Bit 16 - Configures whether or not to clear GPIO_evt_ch0_any_edge trigger status.\\\\0: Invalid, No effect\\\\1: Clear"]
    #[inline(always)]
    pub fn gpio_evt_ch0_any_edge_st_clr(
        &mut self,
    ) -> GPIO_EVT_CH0_ANY_EDGE_ST_CLR_W<'_, EVT_ST0_CLR_SPEC> {
        GPIO_EVT_CH0_ANY_EDGE_ST_CLR_W::new(self, 16)
    }
    #[doc = "Bit 17 - Configures whether or not to clear GPIO_evt_ch1_any_edge trigger status.\\\\0: Invalid, No effect\\\\1: Clear"]
    #[inline(always)]
    pub fn gpio_evt_ch1_any_edge_st_clr(
        &mut self,
    ) -> GPIO_EVT_CH1_ANY_EDGE_ST_CLR_W<'_, EVT_ST0_CLR_SPEC> {
        GPIO_EVT_CH1_ANY_EDGE_ST_CLR_W::new(self, 17)
    }
    #[doc = "Bit 18 - Configures whether or not to clear GPIO_evt_ch2_any_edge trigger status.\\\\0: Invalid, No effect\\\\1: Clear"]
    #[inline(always)]
    pub fn gpio_evt_ch2_any_edge_st_clr(
        &mut self,
    ) -> GPIO_EVT_CH2_ANY_EDGE_ST_CLR_W<'_, EVT_ST0_CLR_SPEC> {
        GPIO_EVT_CH2_ANY_EDGE_ST_CLR_W::new(self, 18)
    }
    #[doc = "Bit 19 - Configures whether or not to clear GPIO_evt_ch3_any_edge trigger status.\\\\0: Invalid, No effect\\\\1: Clear"]
    #[inline(always)]
    pub fn gpio_evt_ch3_any_edge_st_clr(
        &mut self,
    ) -> GPIO_EVT_CH3_ANY_EDGE_ST_CLR_W<'_, EVT_ST0_CLR_SPEC> {
        GPIO_EVT_CH3_ANY_EDGE_ST_CLR_W::new(self, 19)
    }
    #[doc = "Bit 20 - Configures whether or not to clear GPIO_evt_ch4_any_edge trigger status.\\\\0: Invalid, No effect\\\\1: Clear"]
    #[inline(always)]
    pub fn gpio_evt_ch4_any_edge_st_clr(
        &mut self,
    ) -> GPIO_EVT_CH4_ANY_EDGE_ST_CLR_W<'_, EVT_ST0_CLR_SPEC> {
        GPIO_EVT_CH4_ANY_EDGE_ST_CLR_W::new(self, 20)
    }
    #[doc = "Bit 21 - Configures whether or not to clear GPIO_evt_ch5_any_edge trigger status.\\\\0: Invalid, No effect\\\\1: Clear"]
    #[inline(always)]
    pub fn gpio_evt_ch5_any_edge_st_clr(
        &mut self,
    ) -> GPIO_EVT_CH5_ANY_EDGE_ST_CLR_W<'_, EVT_ST0_CLR_SPEC> {
        GPIO_EVT_CH5_ANY_EDGE_ST_CLR_W::new(self, 21)
    }
    #[doc = "Bit 22 - Configures whether or not to clear GPIO_evt_ch6_any_edge trigger status.\\\\0: Invalid, No effect\\\\1: Clear"]
    #[inline(always)]
    pub fn gpio_evt_ch6_any_edge_st_clr(
        &mut self,
    ) -> GPIO_EVT_CH6_ANY_EDGE_ST_CLR_W<'_, EVT_ST0_CLR_SPEC> {
        GPIO_EVT_CH6_ANY_EDGE_ST_CLR_W::new(self, 22)
    }
    #[doc = "Bit 23 - Configures whether or not to clear GPIO_evt_ch7_any_edge trigger status.\\\\0: Invalid, No effect\\\\1: Clear"]
    #[inline(always)]
    pub fn gpio_evt_ch7_any_edge_st_clr(
        &mut self,
    ) -> GPIO_EVT_CH7_ANY_EDGE_ST_CLR_W<'_, EVT_ST0_CLR_SPEC> {
        GPIO_EVT_CH7_ANY_EDGE_ST_CLR_W::new(self, 23)
    }
    #[doc = "Bit 24 - Configures whether or not to clear GPIO_evt_zero_det_pos0 trigger status.\\\\0: Invalid, No effect\\\\1: Clear"]
    #[inline(always)]
    pub fn gpio_evt_zero_det_pos0_st_clr(
        &mut self,
    ) -> GPIO_EVT_ZERO_DET_POS0_ST_CLR_W<'_, EVT_ST0_CLR_SPEC> {
        GPIO_EVT_ZERO_DET_POS0_ST_CLR_W::new(self, 24)
    }
    #[doc = "Bit 25 - Configures whether or not to clear GPIO_evt_zero_det_neg0 trigger status.\\\\0: Invalid, No effect\\\\1: Clear"]
    #[inline(always)]
    pub fn gpio_evt_zero_det_neg0_st_clr(
        &mut self,
    ) -> GPIO_EVT_ZERO_DET_NEG0_ST_CLR_W<'_, EVT_ST0_CLR_SPEC> {
        GPIO_EVT_ZERO_DET_NEG0_ST_CLR_W::new(self, 25)
    }
    #[doc = "Bit 26 - Configures whether or not to clear LEDC_evt_duty_chng_end_ch0 trigger status.\\\\0: Invalid, No effect\\\\1: Clear"]
    #[inline(always)]
    pub fn ledc_evt_duty_chng_end_ch0_st_clr(
        &mut self,
    ) -> LEDC_EVT_DUTY_CHNG_END_CH0_ST_CLR_W<'_, EVT_ST0_CLR_SPEC> {
        LEDC_EVT_DUTY_CHNG_END_CH0_ST_CLR_W::new(self, 26)
    }
    #[doc = "Bit 27 - Configures whether or not to clear LEDC_evt_duty_chng_end_ch1 trigger status.\\\\0: Invalid, No effect\\\\1: Clear"]
    #[inline(always)]
    pub fn ledc_evt_duty_chng_end_ch1_st_clr(
        &mut self,
    ) -> LEDC_EVT_DUTY_CHNG_END_CH1_ST_CLR_W<'_, EVT_ST0_CLR_SPEC> {
        LEDC_EVT_DUTY_CHNG_END_CH1_ST_CLR_W::new(self, 27)
    }
    #[doc = "Bit 28 - Configures whether or not to clear LEDC_evt_duty_chng_end_ch2 trigger status.\\\\0: Invalid, No effect\\\\1: Clear"]
    #[inline(always)]
    pub fn ledc_evt_duty_chng_end_ch2_st_clr(
        &mut self,
    ) -> LEDC_EVT_DUTY_CHNG_END_CH2_ST_CLR_W<'_, EVT_ST0_CLR_SPEC> {
        LEDC_EVT_DUTY_CHNG_END_CH2_ST_CLR_W::new(self, 28)
    }
    #[doc = "Bit 29 - Configures whether or not to clear LEDC_evt_duty_chng_end_ch3 trigger status.\\\\0: Invalid, No effect\\\\1: Clear"]
    #[inline(always)]
    pub fn ledc_evt_duty_chng_end_ch3_st_clr(
        &mut self,
    ) -> LEDC_EVT_DUTY_CHNG_END_CH3_ST_CLR_W<'_, EVT_ST0_CLR_SPEC> {
        LEDC_EVT_DUTY_CHNG_END_CH3_ST_CLR_W::new(self, 29)
    }
    #[doc = "Bit 30 - Configures whether or not to clear LEDC_evt_duty_chng_end_ch4 trigger status.\\\\0: Invalid, No effect\\\\1: Clear"]
    #[inline(always)]
    pub fn ledc_evt_duty_chng_end_ch4_st_clr(
        &mut self,
    ) -> LEDC_EVT_DUTY_CHNG_END_CH4_ST_CLR_W<'_, EVT_ST0_CLR_SPEC> {
        LEDC_EVT_DUTY_CHNG_END_CH4_ST_CLR_W::new(self, 30)
    }
    #[doc = "Bit 31 - Configures whether or not to clear LEDC_evt_duty_chng_end_ch5 trigger status.\\\\0: Invalid, No effect\\\\1: Clear"]
    #[inline(always)]
    pub fn ledc_evt_duty_chng_end_ch5_st_clr(
        &mut self,
    ) -> LEDC_EVT_DUTY_CHNG_END_CH5_ST_CLR_W<'_, EVT_ST0_CLR_SPEC> {
        LEDC_EVT_DUTY_CHNG_END_CH5_ST_CLR_W::new(self, 31)
    }
}
#[doc = "Events trigger status clear register\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`evt_st0_clr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
pub struct EVT_ST0_CLR_SPEC;
impl crate::RegisterSpec for EVT_ST0_CLR_SPEC {
    type Ux = u32;
}
#[doc = "`write(|w| ..)` method takes [`evt_st0_clr::W`](W) writer structure"]
impl crate::Writable for EVT_ST0_CLR_SPEC {
    type Safety = crate::Unsafe;
}
#[doc = "`reset()` method sets EVT_ST0_CLR to value 0"]
impl crate::Resettable for EVT_ST0_CLR_SPEC {}