efm32pg1b-pac 0.4.3

///Register `DCDCMISCCTRL` reader
pub type R = crate::R<DCDCMISCCTRLrs>;
///Register `DCDCMISCCTRL` writer
pub type W = crate::W<DCDCMISCCTRLrs>;
///Field `LNFORCECCM` reader - Force DCDC Into CCM Mode in Low Noise Operation
pub type LnforceccmR = crate::BitReader;
///Field `LNFORCECCM` writer - Force DCDC Into CCM Mode in Low Noise Operation
pub type LnforceccmW<'a, REG> = crate::BitWriter<'a, REG>;
///Field `PFETCNT` reader - PFET Switch Number Selection
pub type PfetcntR = crate::FieldReader;
///Field `PFETCNT` writer - PFET Switch Number Selection
pub type PfetcntW<'a, REG> = crate::FieldWriter<'a, REG, 4>;
///Field `NFETCNT` reader - NFET Switch Number Selection
pub type NfetcntR = crate::FieldReader;
///Field `NFETCNT` writer - NFET Switch Number Selection
pub type NfetcntW<'a, REG> = crate::FieldWriter<'a, REG, 4>;
///Field `BYPLIMSEL` reader - Current Limit in Bypass Mode
pub type ByplimselR = crate::FieldReader;
///Field `BYPLIMSEL` writer - Current Limit in Bypass Mode
pub type ByplimselW<'a, REG> = crate::FieldWriter<'a, REG, 4>;
///Field `LPCLIMILIMSEL` reader - Current Limit Level Selection for Current Limiter in LP Mode
pub type LpclimilimselR = crate::FieldReader;
///Field `LPCLIMILIMSEL` writer - Current Limit Level Selection for Current Limiter in LP Mode
pub type LpclimilimselW<'a, REG> = crate::FieldWriter<'a, REG, 3>;
///Field `LNCLIMILIMSEL` reader - Current Limit Level Selection for Current Limiter in LN Mode
pub type LnclimilimselR = crate::FieldReader;
///Field `LNCLIMILIMSEL` writer - Current Limit Level Selection for Current Limiter in LN Mode
pub type LnclimilimselW<'a, REG> = crate::FieldWriter<'a, REG, 3>;
///LP Mode Comparator Bias Selection
///
///Value on reset: 3
#[cfg_attr(feature = "defmt", derive(defmt::Format))]
#[derive(Clone, Copy, Debug, PartialEq, Eq)]
#[repr(u8)]
pub enum LPCMPBIAS {
    ///0: Maximum load current less than 75uA.
    Bias0 = 0,
    ///1: Maximum load current less than 500uA.
    Bias1 = 1,
    ///2: Maximum load current less than 2.5mA.
    Bias2 = 2,
    ///3: Maximum load current less than 10mA.
    Bias3 = 3,
}
impl From<LPCMPBIAS> for u8 {
    #[inline(always)]
    fn from(variant: LPCMPBIAS) -> Self {
        variant as _
    }
}
impl crate::FieldSpec for LPCMPBIAS {
    type Ux = u8;
}
impl crate::IsEnum for LPCMPBIAS {}
///Field `LPCMPBIAS` reader - LP Mode Comparator Bias Selection
pub type LpcmpbiasR = crate::FieldReader<LPCMPBIAS>;
impl LpcmpbiasR {
    ///Get enumerated values variant
    #[inline(always)]
    pub const fn variant(&self) -> LPCMPBIAS {
        match self.bits {
            0 => LPCMPBIAS::Bias0,
            1 => LPCMPBIAS::Bias1,
            2 => LPCMPBIAS::Bias2,
            3 => LPCMPBIAS::Bias3,
            _ => unreachable!(),
        }
    }
    ///Maximum load current less than 75uA.
    #[inline(always)]
    pub fn is_bias0(&self) -> bool {
        *self == LPCMPBIAS::Bias0
    }
    ///Maximum load current less than 500uA.
    #[inline(always)]
    pub fn is_bias1(&self) -> bool {
        *self == LPCMPBIAS::Bias1
    }
    ///Maximum load current less than 2.5mA.
    #[inline(always)]
    pub fn is_bias2(&self) -> bool {
        *self == LPCMPBIAS::Bias2
    }
    ///Maximum load current less than 10mA.
    #[inline(always)]
    pub fn is_bias3(&self) -> bool {
        *self == LPCMPBIAS::Bias3
    }
}
///Field `LPCMPBIAS` writer - LP Mode Comparator Bias Selection
pub type LpcmpbiasW<'a, REG> = crate::FieldWriter<'a, REG, 2, LPCMPBIAS, crate::Safe>;
impl<'a, REG> LpcmpbiasW<'a, REG>
where
    REG: crate::Writable + crate::RegisterSpec,
    REG::Ux: From<u8>,
{
    ///Maximum load current less than 75uA.
    #[inline(always)]
    pub fn bias0(self) -> &'a mut crate::W<REG> {
        self.variant(LPCMPBIAS::Bias0)
    }
    ///Maximum load current less than 500uA.
    #[inline(always)]
    pub fn bias1(self) -> &'a mut crate::W<REG> {
        self.variant(LPCMPBIAS::Bias1)
    }
    ///Maximum load current less than 2.5mA.
    #[inline(always)]
    pub fn bias2(self) -> &'a mut crate::W<REG> {
        self.variant(LPCMPBIAS::Bias2)
    }
    ///Maximum load current less than 10mA.
    #[inline(always)]
    pub fn bias3(self) -> &'a mut crate::W<REG> {
        self.variant(LPCMPBIAS::Bias3)
    }
}
impl R {
    ///Bit 0 - Force DCDC Into CCM Mode in Low Noise Operation
    #[inline(always)]
    pub fn lnforceccm(&self) -> LnforceccmR {
        LnforceccmR::new((self.bits & 1) != 0)
    }
    ///Bits 8:11 - PFET Switch Number Selection
    #[inline(always)]
    pub fn pfetcnt(&self) -> PfetcntR {
        PfetcntR::new(((self.bits >> 8) & 0x0f) as u8)
    }
    ///Bits 12:15 - NFET Switch Number Selection
    #[inline(always)]
    pub fn nfetcnt(&self) -> NfetcntR {
        NfetcntR::new(((self.bits >> 12) & 0x0f) as u8)
    }
    ///Bits 16:19 - Current Limit in Bypass Mode
    #[inline(always)]
    pub fn byplimsel(&self) -> ByplimselR {
        ByplimselR::new(((self.bits >> 16) & 0x0f) as u8)
    }
    ///Bits 20:22 - Current Limit Level Selection for Current Limiter in LP Mode
    #[inline(always)]
    pub fn lpclimilimsel(&self) -> LpclimilimselR {
        LpclimilimselR::new(((self.bits >> 20) & 7) as u8)
    }
    ///Bits 24:26 - Current Limit Level Selection for Current Limiter in LN Mode
    #[inline(always)]
    pub fn lnclimilimsel(&self) -> LnclimilimselR {
        LnclimilimselR::new(((self.bits >> 24) & 7) as u8)
    }
    ///Bits 28:29 - LP Mode Comparator Bias Selection
    #[inline(always)]
    pub fn lpcmpbias(&self) -> LpcmpbiasR {
        LpcmpbiasR::new(((self.bits >> 28) & 3) as u8)
    }
}
impl core::fmt::Debug for R {
    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
        f.debug_struct("DCDCMISCCTRL")
            .field("lnforceccm", &self.lnforceccm())
            .field("pfetcnt", &self.pfetcnt())
            .field("nfetcnt", &self.nfetcnt())
            .field("byplimsel", &self.byplimsel())
            .field("lpclimilimsel", &self.lpclimilimsel())
            .field("lnclimilimsel", &self.lnclimilimsel())
            .field("lpcmpbias", &self.lpcmpbias())
            .finish()
    }
}
impl W {
    ///Bit 0 - Force DCDC Into CCM Mode in Low Noise Operation
    #[inline(always)]
    pub fn lnforceccm(&mut self) -> LnforceccmW<'_, DCDCMISCCTRLrs> {
        LnforceccmW::new(self, 0)
    }
    ///Bits 8:11 - PFET Switch Number Selection
    #[inline(always)]
    pub fn pfetcnt(&mut self) -> PfetcntW<'_, DCDCMISCCTRLrs> {
        PfetcntW::new(self, 8)
    }
    ///Bits 12:15 - NFET Switch Number Selection
    #[inline(always)]
    pub fn nfetcnt(&mut self) -> NfetcntW<'_, DCDCMISCCTRLrs> {
        NfetcntW::new(self, 12)
    }
    ///Bits 16:19 - Current Limit in Bypass Mode
    #[inline(always)]
    pub fn byplimsel(&mut self) -> ByplimselW<'_, DCDCMISCCTRLrs> {
        ByplimselW::new(self, 16)
    }
    ///Bits 20:22 - Current Limit Level Selection for Current Limiter in LP Mode
    #[inline(always)]
    pub fn lpclimilimsel(&mut self) -> LpclimilimselW<'_, DCDCMISCCTRLrs> {
        LpclimilimselW::new(self, 20)
    }
    ///Bits 24:26 - Current Limit Level Selection for Current Limiter in LN Mode
    #[inline(always)]
    pub fn lnclimilimsel(&mut self) -> LnclimilimselW<'_, DCDCMISCCTRLrs> {
        LnclimilimselW::new(self, 24)
    }
    ///Bits 28:29 - LP Mode Comparator Bias Selection
    #[inline(always)]
    pub fn lpcmpbias(&mut self) -> LpcmpbiasW<'_, DCDCMISCCTRLrs> {
        LpcmpbiasW::new(self, 28)
    }
}
///DCDC Miscellaneous Control Register
///
///You can [`read`](crate::Reg::read) this register and get [`dcdcmiscctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dcdcmiscctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
pub struct DCDCMISCCTRLrs;
impl crate::RegisterSpec for DCDCMISCCTRLrs {
    type Ux = u32;
}
///`read()` method returns [`dcdcmiscctrl::R`](R) reader structure
impl crate::Readable for DCDCMISCCTRLrs {}
///`write(|w| ..)` method takes [`dcdcmiscctrl::W`](W) writer structure
impl crate::Writable for DCDCMISCCTRLrs {
    type Safety = crate::Unsafe;
}
///`reset()` method sets DCDCMISCCTRL to value 0x3330_7700
impl crate::Resettable for DCDCMISCCTRLrs {
    const RESET_VALUE: u32 = 0x3330_7700;
}